Nevertheless, most of our benchmarks are written to the distributed-memory MIMD programming model, with so-called scalable distributed-memory hardware in mind. The hardware of such computers consists of a large number of "nodes" connected by a communication network (typically with a mesh or hypercube topology), across which messages pass between the nodes. Each node typically contains one or more microprocessors for performing arithmetic (perhaps some with vector processing capabilities), communication chips that are used to interface with the network, and local memory. For this reason, the computational parts of the computer are commonly referred to as either "nodes" or "processors", and the computer is scaled up in size by increasing their number. Both names are acceptable, but "nodes" is perhaps preferable for use in descriptions of the hardware, because we can then say that one node may contain several processors.
The F77+PVM programming model that we are using is, however, much simpler, in that the node is the smallest element of the computer that can be programmed, and it is always used as if it contained a single processor, because it runs a single F77 program. If the hardware actually uses several processors to run the single program faster, this should be beneficial to the benchmark result, but it is hidden from the programmer. Thus from the programmer's view, there is no useful distinction between node and processor, and in this document we have tried to use the term "processor" consistently to mean the "logical processor" of the F77+PVM programming model, whether or not it may be implemented by one or several physical processors.