Let us now try to analyze the technology used for the processors. With respect to the chip technology, we find in Fig. 7 that the number of systems based on ECL chip technology is steadily decreasing from 332 in mid 1993 to 194 by the end of 1994. This contradicts an increase in the number of CMOS based systems from 168 to 306. We also found only two GaAs based systems in the TOP500 . These are two installed CRAY/3 systems.
We now analyze the TOP500 to find out how many of the systems are using proprietary processors with custom chips and how many are using off the shelf processors. We do this analysis on different architectural levels. In Fig. 7 we first show the number of systems using proprietary CPU designs versus the number of systems using off-the-shelf CPUs. In Fig. 8 we show how many systems use proprietary floating point accelerators versus how many systems use off-the-shelf processors only for achieving floating point performance. In Fig. 9 we show how many systems use proprietary designed nodes versus how many systems use wo rkstation nodes or binary-compatible nodes to workstations.
Figure 7: The usage of different CPU technologies as can be seen in the TOP500 . We count for this figure the following systems as CMOS off-the-shelf: Convex SPP1000, Cray T3D and CS6400, IBM SP1/2, intel Paragon and iPSC/860, Meiko CS/i860, Parsytec GC/PP, SGI, TMC CM5/CM5E.
Figure 8: The usage of different FPU technologies as can be seen in the TOP500 . We count for this figure the following systems as CMOS off-the-shelf: Convex SPP1000, Cray T3D and CS6400, IBM SP1/2, intel Paragon and iPSC/860, , Meiko CS/i860, Parsytec GC/PP, SGI.
Figure 9: The usage of different node technologies as can be seen in the TOP500 . We count for this figure the following systems as CMOS off-the-shelf: Convex SPP1000, IBM SP1/2, SGI.
In Fig. 7, we see that the number of systems with off-the-shelf CPUs was steadily increasing during the last two years and is now with 48% almost equal to the number of systems with proprietary CPUs. We also see that the number of systems with proprietary CMOS based CPUs is almost stable. This is the result of the following two facts. Traditional MPP manufacturers are using less and less proprietary CPU designs. But as the vendors using traditionally ECL technology are im plementing their proprietary CPUs in more and more cases in CMOS, the total number remains quite stable at present.
If we now look at Fig. 8 we see that the number of systems using off-the-shelf processors for achieving floating point performance is similarly increasing over time and has now reached a level of 40%. In Fig. 9 we see that the number of systems with nodes binary-compatible to workstation systems has increased very much during 1994 and has now reached 19%. This class of systems contains the systems from Silicon Graphics, the Convex SPP10 00 and the IBM SP1 and SP2 systems. The very strong increase of systems with such a node design indicates a new very strong trend in the field of high performance computing. This trend is driven by the advantage that using standard workstation node designs can keep the design costs low and also that all available software for the workstations can immediately be used on the parallel systems, at least on a single processor. As a consequence the German computer manufacturer Parsytec for instance announced tha t they will use standard PowerPC-based PC boards as building nodes for their next generation parallel systems.