%%% -*-BibTeX-*-
%%% ====================================================================
%%%  BibTeX-file{
%%%     author          = "Nelson H. F. Beebe",
%%%     version         = "1.19",
%%%     date            = "17 August 2013",
%%%     time            = "12:20:28 MDT",
%%%     filename        = "dectechj.bib",
%%%     address         = "University of Utah
%%%                        Department of Mathematics, 110 LCB
%%%                        155 S 1400 E RM 233
%%%                        Salt Lake City, UT 84112-0090
%%%                        USA",
%%%     telephone       = "+1 801 581 5254",
%%%     FAX             = "+1 801 581 4148",
%%%     URL             = "http://www.math.utah.edu/~beebe",
%%%     checksum        = "38413 14026 67775 709800",
%%%     email           = "beebe at math.utah.edu, beebe at acm.org,
%%%                        beebe at computer.org (Internet)",
%%%     codetable       = "ISO/ASCII",
%%%     keywords        = "bibliography; BibTeX; DEC; Digital Equipment
%%%                        Corporation; Digital Technical Journal",
%%%     license         = "public domain",
%%%     supported       = "yes",
%%%     docstring       = "This is a bibliography of publications in the
%%%                        Digital Technical Journal (CODEN DTJOEL, ISSN
%%%                        0898-901X), published by Digital Equipment
%%%                        Corporation.
%%%
%%%                        Coverage should be complete from volume 3
%%%                        (1991) to 1998, when publication ceased
%%%                        with Volume 10, number 1, possibly as a
%%%                        result of the acquisition of Digital
%%%                        Equipment Corporation by Compaq.
%%%
%%%                        At version 1.19, the year coverage looked
%%%                        like this:
%%%
%%%                             1985 (   7)    1990 (  34)    1995 (  27)
%%%                             1986 (  19)    1991 (  37)    1996 (  43)
%%%                             1987 (   9)    1992 (  43)    1997 (  11)
%%%                             1988 (  26)    1993 (  44)    1998 (  22)
%%%                             1989 (  18)    1994 (  27)
%%%
%%%                             Article:        367
%%%
%%%                             Total entries:  367
%%%
%%%                        Volume 1 was published in 9 issues over
%%%                        four years, 1985--1989.  Volumes 2 through
%%%                        7 (1990--1996) appeared quarterly in
%%%                        Winter, Spring, Summer, and Fall.  Volume 7
%%%                        appeared over two years: 1995--1996. Volume
%%%                        7, number 4 (1996) changed to issues
%%%                        identified by month name.
%%%
%%%                        Compaq/DEC maintains information about this
%%%                        journal at the World-Wide Web location
%%%
%%%                            http://www.digital.com:80/info/DTJ/home.html
%%%
%%%                        There is additional data available at
%%%
%%%                            http://ejournals.cic.net/entry.52.html
%%%
%%%                        Note added on 18 July 2006: Those Web sites
%%%                        are no longer accessible, and are not
%%%                        recorded in http://www.archive.org/.
%%%                        However, the DEC Technical Journal has been
%%%                        scanned into electronic form, and the entire
%%%                        collection is available for a fee via these
%%%                        links:
%%%
%%%                            http://www.dtjcd.vmsresource.org.uk/dtj_cd_index.html
%%%                            http://www.vmsresource.org.uk/dtj_archive.html
%%%
%%%                        PDF files for volumes 3--10 are available
%%%                        online at
%%%
%%%                            http://www.hpl.hp.com/hpjournal/dtj/
%%%
%%%                        Many of the entries below have been extracted
%%%                        from the first source; regrettably, the records
%%%                        there lack page number information.  However,
%%%                        electronic copies of every article starting
%%%                        with Volume 3 in 1991 (except volume 4,
%%%                        number 2) are available, as ASCII text, and
%%%                        for more recent volumes, also as PostScript
%%%                        and PDF. URL keywords in the entries below
%%%                        give the World-Wide Web location of these
%%%                        articles.
%%%
%%%                        You can try file extensions .abs (ASCII
%%%                        abstract), .txt (ASCII text), .ps
%%%                        (PostScript), and .pdf (Portable Document
%%%                        Format) in these URLs; generally only the
%%%                        .ps, or more recently, .pdf, form is cited
%%%                        in the URL in the bibliographic entry.
%%%
%%%                        Starting with Volume 7 Number 4, the file
%%%                        naming convention changed: when the URL
%%%                        ends in e.g. DTJK07/, it represents an HTML
%%%                        file, and the related files can be found
%%%                        under names DTJK07/DTJK07SC.TXT,
%%%                        DTJK07/DTJK07P8.PS, and
%%%                        DTJK07/DTJK07PF.PDF: that is, with suffixes
%%%                        SC.TXT, P8.PS, or PF.PDF respectively.
%%%
%%%                        The DEC archive noted above contains
%%%                        reprints of the papers prior to volume 5,
%%%                        number 3, but each starts (incorrectly)
%%%                        with page number 1.  Where possible,
%%%                        corrected page numbers have been supplied
%%%                        from bibliographic entries in other papers
%%%                        in the Digital Technical Journal.  At the
%%%                        time of writing, there are no articles
%%%                        available for volume 4 number 2, and
%%%                        Ulichney:1993:VR in volume 5 number 2 is
%%%                        available only as an abstract.  There are a
%%%                        small number of other irregularities in the
%%%                        collections at the DEC archive that are
%%%                        being reported to the maintainers.
%%%
%%%                        This bibliography has been collected from
%%%                        bibliographies in the author's personal
%%%                        files, from the OCLC Contents1st database,
%%%                        from the IEEE INSPEC (1989--1996) database,
%%%                        from the UnCover database, from the DEC WWW
%%%                        resource noted above, and from the computer
%%%                        science bibliography collection on
%%%                        ftp.ira.uka.de in /pub/bibliography to
%%%                        which many people of have contributed.  The
%%%                        snapshot of this collection was taken on
%%%                        5-May-1994, and it consists of 441 BibTeX
%%%                        files, 2,672,675 lines, 205,289 entries,
%%%                        and 6,375 <at>String{} abbreviations,
%%%                        occupying 94.8MB of disk space.
%%%
%%%                        Numerous errors in the sources noted above
%%%                        have been corrected.  Spelling has been
%%%                        verified with the UNIX spell and GNU ispell
%%%                        programs using the exception dictionary
%%%                        stored in the companion file with extension
%%%                        .sok.
%%%
%%%                        BibTeX citation tags are uniformly chosen as
%%%                        name:year:abbrev, where name is the family
%%%                        name of the first author or editor, year is a
%%%                        4-digit number, and abbrev is a 3-letter
%%%                        condensation of important title
%%%                        words. Citation tags were automatically
%%%                        generated by software developed for the
%%%                        BibNet Project.
%%%
%%%                        In this bibliography, entries are sorted in
%%%                        publication order, using bibsort -byvolume.
%%%
%%%                        The checksum field above contains a CRC-16
%%%                        checksum as the first value, followed by the
%%%                        equivalent of the standard UNIX wc (word
%%%                        count) utility output of lines, words, and
%%%                        characters.  This is produced by Robert
%%%                        Solovay's checksum utility.",
%%%  }
%%% ====================================================================

%%% ====================================================================
%%% Acknowledgement abbreviations:

@String{ack-nhfb = "Nelson H. F. Beebe,
                    University of Utah,
                    Department of Mathematics, 110 LCB,
                    155 S 1400 E RM 233,
                    Salt Lake City, UT 84112-0090, USA,
                    Tel: +1 801 581 5254,
                    FAX: +1 801 581 4148,
                    e-mail: \path|beebe@math.utah.edu|,
                            \path|beebe@acm.org|,
                            \path|beebe@ieee.org| (Internet),
                    URL: \path|http://www.math.utah.edu/~beebe/|"}

@String{ack-svs = "Sergey Svishchev,
                   e-mail: \path|svs@ropnet.ru| (Internet)"}

%%% ====================================================================
%%% Journal abbreviations:

@String{j-DEC-TECH-J            = "Digital Technical Journal of
                                  Digital Equipment Corporation"}

%%% ====================================================================
%%% Bibliography entries:

@Article{Fossum:1985:OVS,
  author =       "Tryggve Fossum and James B. McElroy and William
                 English",
  title =        "An Overview of the {VAX 8600} System",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "1",
  pages =        "8--23",
  month =        aug,
  year =         "1985",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sun Jan 10 10:34:07 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Troiani:1985:VBP,
  author =       "Mario Troiani and S. Stephen Ching and Nii N. Quaynor
                 and John E. Bloem and Fernando C. Colon Osorio",
  title =        "The {VAX 8600} {I} Box, {A} Pipelined Implementation
                 of the {VAX} Architecture",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "1",
  pages =        "24--42",
  month =        aug,
  year =         "1985",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sun Jan 10 10:34:07 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Fossum:1985:FBF,
  author =       "Tryggve Fossum and William R. Grundmann and Virginia
                 C. Blaha",
  title =        "The {F} Box, Floating Point in the {VAX 8600} System",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "1",
  pages =        "43--53",
  month =        aug,
  year =         "1985",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sun Jan 10 10:34:07 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{McElroy:1985:PVP,
  author =       "James B. McElroy",
  title =        "Packaging the {VAX 8600} Processor",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "1",
  pages =        "54--60",
  month =        aug,
  year =         "1985",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sun Jan 10 10:34:07 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Hackenberg:1985:SIV,
  author =       "John H. Hackenberg",
  title =        "Signal Integrity in the {VAX 8600} System",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "1",
  pages =        "61--65",
  month =        aug,
  year =         "1985",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sun Jan 10 10:34:07 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Kalita:1985:CVP,
  author =       "E. Brian Kalita and William English",
  title =        "Cooling the {VAX 8600} Processor",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "1",
  pages =        "66--70",
  month =        aug,
  year =         "1985",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sun Jan 10 10:34:07 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Bruckert:1985:DRV,
  author =       "William B. Bruckert and Ronald E. Josephson",
  title =        "Designing Reliability into the {VAX 8600} System",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "1",
  pages =        "71--77",
  month =        aug,
  year =         "1985",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sun Jan 10 10:34:07 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Dobberpuhl:1986:MCM,
  author =       "Daniel W. Dobberpuhl and Robert M. Supnik and Richard
                 T. Witek",
  title =        "The {MicroVAX 78032} Chip, {A} 32-Bit Microprocessor",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "2",
  pages =        "12--23",
  month =        mar,
  year =         "1986",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sat Mar 27 20:35:11 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Bidermann:1986:MFP,
  author =       "William R. Bidermann and Amnon Fisher and Burton M.
                 Leary and Robert J. Simcoe and William R. Wheeler",
  title =        "The {MicroVAX 78132} Floating Point Chip",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "2",
  pages =        "24--36",
  month =        mar,
  year =         "1986",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sat Mar 27 20:35:11 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Maskas:1986:DMC,
  author =       "Barry A. Maskas",
  title =        "Developing the {MicroVAX II} {CPU} Board",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "2",
  pages =        "37--47",
  month =        mar,
  year =         "1986",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sat Mar 27 20:35:11 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Hutchings:1986:ECC,
  author =       "Anthony F. Hutchings",
  title =        "The Evolution of the Custom {CAD} Suite Used on the
                 {MicroVAX II} System",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "2",
  pages =        "48--55",
  month =        mar,
  year =         "1986",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sat Mar 27 20:35:11 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Spitz:1986:MMW,
  author =       "Rick Spitz and Peter George and Stephen Zalewski",
  title =        "The Making of a {MicroVAX} Workstation",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "2",
  pages =        "56--65",
  month =        mar,
  year =         "1986",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sat Mar 27 20:35:11 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Warchol:1986:RQDX,
  author =       "Nicholas A. Warchol and Stephen F. Shirron",
  title =        "The {RQDX3} Design Project",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "2",
  pages =        "66--75",
  month =        mar,
  year =         "1986",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sat Mar 27 20:35:11 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Morse:1986:EIE,
  author =       "Kathleen D. Morse and Lawrence J. Kenah",
  title =        "The Evolution of Instruction Emulation for the
                 {MicroVAX} Systems",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "2",
  pages =        "76--85",
  month =        mar,
  year =         "1986",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sat Mar 27 20:35:11 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Boone:1986:TCT,
  author =       "Steven E. Boone and Guenter E. Schneider",
  title =        "The {TK50} Cartridge Tape Drive",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "2",
  pages =        "86--98",
  month =        mar,
  year =         "1986",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sat Mar 27 20:35:11 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Lanza:1986:PUS,
  author =       "Raymond J. Lanza",
  title =        "Porting {ULTRIX} Software to the {MicroVAX} System",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "2",
  pages =        "99--105",
  month =        mar,
  year =         "1986",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sat Mar 27 20:35:11 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Lauck:1986:DNA,
  author =       "Anthony G. Lauck and David R. Oran and Radia J.
                 Perlman",
  title =        "{Digital Network Architecture} Overview",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "3",
  pages =        "10--24",
  month =        sep,
  year =         "1986",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sun Jan 10 10:34:07 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Jain:1986:PAM,
  author =       "R. Jain and W. R. Hawe",
  title =        "Performance Analysis and Modeling of {Digital}'s
                 {Networking Architecture}",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "3",
  pages =        "25--34",
  month =        sep,
  year =         "1986",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Wed Jan 3 06:23:17 MST 1996",
  bibsource =    "/usr/local/src/bib/bibliography/Distributed/networking.bib;
                 http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-nhfb,
}

@Article{Morency:1986:DSG,
  author =       "John P. Morency and David Porter and Richard M. Pitkin
                 and David R. Oran",
  title =        "The {DECnet\slash SNA} Gateway Product --- {A} Case
                 Study in Cross Vendor Networking",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "3",
  pages =        "35--53",
  month =        sep,
  year =         "1986",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sun Jan 10 10:34:07 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Hawe:1986:ELA,
  author =       "William R. Hawe and Mark F. Kempf and Alan J. Kirby",
  title =        "The Extended Local Area Network Architecture and
                 {LANBridge 100}",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "3",
  pages =        "54--72",
  month =        sep,
  year =         "1986",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sun Jan 10 10:34:07 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Mann:1986:TSE,
  author =       "Bruce E. Mann and Colin Strutt and Mark F. Kempf",
  title =        "Terminal Servers on {Ethernet} Local Area Networks",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "3",
  pages =        "73--87",
  month =        sep,
  year =         "1986",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sun Jan 10 10:34:07 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Beck:1986:DVP,
  author =       "P. Beck and J. Krycka",
  title =        "The {DECnet-VAX} Product --- An Integrated Approach to
                 Networking",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "3",
  pages =        "88--99",
  month =        sep,
  year =         "1986",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Mon Jun 24 08:07:37 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-nhfb,
}

@Article{Forecast:1986:DUS,
  author =       "John Forecast and James L. Jackson and Jeffrey A.
                 Schriesheim",
  title =        "The {DECnet-ULTRIX} Software",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "3",
  pages =        "100--107",
  month =        sep,
  year =         "1986",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sun Jan 10 10:34:07 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Mierswa:1986:DS,
  author =       "Peter O. Mierswa and David J. Mitton and Martha L.
                 Spence",
  title =        "The {DECnet-DOS} System",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "3",
  pages =        "108--116",
  month =        sep,
  year =         "1986",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sun Jan 10 10:34:07 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Pelle:1986:ENM,
  author =       "Nancy R. La Pelle and Mark J. Seger and Mark W.
                 Sylor",
  title =        "The Evolution of Network Management Products",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "3",
  pages =        "117--128",
  month =        sep,
  year =         "1986",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sun Jan 10 10:34:07 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Sylor:1986:NDM,
  author =       "Mark W. Sylor",
  title =        "The {NMCC\slash DECnet} Monitor Design",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "3",
  pages =        "129--141",
  month =        sep,
  year =         "1986",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sun Jan 10 10:34:07 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Mishra:1987:VM,
  author =       "S. Mishra",
  title =        "The {VAX 8800} Microarchitecture",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "4",
  pages =        "20--33",
  month =        feb,
  year =         "1987",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Mon Jun 24 08:23:22 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-nhfb,
}

@Article{Kronenberg:1987:VC,
  author =       "Nancy P. Kronenberg and Henry M. Levy and William D.
                 Strecker and Richard J. Merewood",
  title =        "The {VAXcluster} Concept: An Overview of a Distributed
                 System",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "5",
  pages =        "7--21",
  month =        sep,
  year =         "1987",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Mar 19 02:56:53 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Duffy:1987:SCA,
  author =       "Darrell J. Duffy",
  title =        "The {System Communication Architecture}",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "5",
  pages =        "22--28",
  month =        sep,
  year =         "1987",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Mar 19 02:56:53 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Snaman:1987:VVD,
  author =       "William E. {Snaman, Jr.} and David W. Thiel",
  title =        "The {VAX\slash VMS} Distributed Lock Manager",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "5",
  pages =        "29--44",
  month =        sep,
  year =         "1987",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Mon Jun 24 11:35:05 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-nhfb,
}

@Article{Goldstein:1987:DFS,
  author =       "Andrew C. Goldstein",
  title =        "The Design and Implementation of a Distributed File
                 System",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "5",
  pages =        "45--55",
  month =        sep,
  year =         "1987",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Mar 19 02:56:53 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Fox:1987:LAV,
  author =       "Michael S. Fox and John A. Ywoskus",
  title =        "Local Area {VAXcluster} Systems",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "5",
  pages =        "56--68",
  month =        sep,
  year =         "1987",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Mar 19 02:56:53 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Balkovich:1987:VAM,
  author =       "Edward E. Balkovich and Prashant Bhabhalia and William
                 R. Dunnington and Thomas F. Weyant",
  title =        "{VAXcluster} Availability Modeling",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "5",
  pages =        "69--79",
  month =        sep,
  year =         "1987",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Mar 19 02:56:53 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Park:1987:SLP,
  author =       "Daeil Park and Rekha D. Von Ehren and Tzyh-Long Wang
                 and Nii N. Quaynor",
  title =        "System Level Performance of {VAX 8974} and 8978
                 Systems",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "5",
  pages =        "80--92",
  month =        sep,
  year =         "1987",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Mar 19 02:56:53 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Cao:1987:CBA,
  author =       "Xi-ren Cao and Nii N. Quaynor and Fernando C. Colon
                 Osorio",
  title =        "{CI} Bus Arbitration Performance in a {VAXcluster}
                 System",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "5",
  pages =        "93--103",
  month =        sep,
  year =         "1987",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Mar 19 02:56:53 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Beander:1988:VVS,
  author =       "B. Beander",
  title =        "{VAX\slash VMS} software development environment",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "6",
  pages =        "10--19",
  month =        feb,
  year =         "1988",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-nhfb,
  classcodes =   "C6115 (Programming support)",
  corpsource =   "Digital Equipment Corp., Hudson, MA, USA",
  keywords =     "analysis; browsing environment; code; cycle; DEC; DEC
                 computers; documentation tools; dynamic; environments;
                 interface; management; operating systems; operating
                 systems (computers); program debugging; programming;
                 project communications; project management tool;
                 software development environment; software life;
                 software tools; static analysis; system building; test
                 management; user; VAX/VMS",
  treatment =    "P Practical",
}

@Article{Duncan:1988:SPM,
  author =       "A. Smith Duncan and T. J. Harris",
  title =        "Software productivity measurements",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "6",
  pages =        "20--27",
  month =        feb,
  year =         "1988",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-nhfb,
  classcodes =   "C0310F (Software development management); C6110B
                 (Software engineering techniques)",
  corpsource =   "Digital Equipment Corp., Hudson, MA, USA",
  keywords =     "costs; DEC; defect rate; development cycle; Digital;
                 DP management; engineering productivity; software;
                 Software Engineering; software engineering; software
                 metrics; software productivity",
  treatment =    "P Practical",
}

@Article{Lupton:1988:LE,
  author =       "G. Lupton",
  title =        "Language-sensitive editor",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "6",
  pages =        "28--39",
  month =        feb,
  year =         "1988",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-nhfb,
  classcodes =   "C6115 (Programming support); C6130 (Data handling
                 techniques)",
  corpsource =   "Digital Equipment Corp., Hudson, MA, USA",
  keywords =     "DEC; DEC computers; environments; language-sensitive
                 editor; language-sensitive features; multiple
                 languages; operating systems (computers); program
                 development environment; programmer productivity;
                 programming; software tools; text editing; text editor;
                 user extensions; user interface; VAX; VAX/VMS",
  treatment =    "P Practical",
}

@Article{Greenwood:1988:VSR,
  author =       "S. R. Greenwood",
  title =        "{VAX SCAN}: rule-based text processing software",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "6",
  pages =        "40--50",
  month =        feb,
  year =         "1988",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-nhfb,
  classcodes =   "C6115 (Programming support); C6130D (Document
                 processing techniques)",
  corpsource =   "Digital Equipment Corp., Hudson, MA, USA",
  keywords =     "character recognition; DEC; DEC computers; editing;
                 pattern-matching; procedural language; rule-based
                 software; software productivity; software tools; text;
                 text patterns; text processing; text recognition; VAX
                 SCAN; word processing",
  treatment =    "P Practical",
}

@Article{Conti:1988:SPF,
  author =       "R. A. Conti",
  title =        "Software productvity features provided by the {Ada}
                 language and the {VAX Ada} compiler",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "6",
  pages =        "51--61",
  month =        feb,
  year =         "1988",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-nhfb,
  classcodes =   "C6140D (High level languages); C6150C (Compilers,
                 interpreters and other processors)",
  corpsource =   "Digital Equipment Corp., Hudson, MA, USA",
  keywords =     "Ada; Ada compiler; automatic inlining; checking; DEC;
                 DEC computers; operating system; portability; program
                 compilers; program library manager; software
                 development productivity; VAX; VMS",
  treatment =    "P Practical",
}

@Article{Axtell:1988:PPA,
  author =       "B. A. Axtell and W. H. Clifford and J. S. Saltz",
  title =        "Programmer productivity aspects of the {VAX GKS} and
                 {VAX PHIGS} products",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "6",
  pages =        "62--70",
  month =        feb,
  year =         "1988",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-nhfb,
  classcodes =   "C6115 (Programming support); C6130B (Graphics
                 techniques)",
  corpsource =   "Digital Equipment Corp., Hudson, MA, USA",
  keywords =     "Base Graphics Architecture; code modules; computer
                 graphics; DEC; DEC computers; devices; graphics;
                 graphics programming; high-performance; programmer
                 productivity; software; software reuse; software tools;
                 standards; tools; VAX GKS; VAX PHIGS",
  treatment =    "P Practical",
}

@Article{Lasher:1988:VRS,
  author =       "L. Lasher",
  title =        "The {VAX RALLY} system-a relational fourth-generation
                 language",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "6",
  pages =        "71--79",
  month =        feb,
  year =         "1988",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-nhfb,
  classcodes =   "C6115 (Programming support); C6140D (High level
                 languages); C6160D (Relational DBMS)",
  corpsource =   "Digital Equipment Corp., Hudson, MA, USA",
  keywords =     "application generators; concurrent; databases; DEC;
                 DEC computers; definition system; fourth-; generation
                 language; high level languages; interactive database;
                 object-based; read/write access; relational; relational
                 databases; relational language; run-time environment;
                 software tools; user interface; VAX RALLY",
  treatment =    "P Practical",
}

@Article{Benson:1988:VVP,
  author =       "L. E. Benson and M. Gianatassio and K. L. McKeen",
  title =        "{VTX} and {VALU}-software productivity tools for
                 distributed applications development",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "6",
  pages =        "80--90",
  month =        feb,
  year =         "1988",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-nhfb,
  classcodes =   "C5620 (Computer networks and techniques); C6115
                 (Programming support)",
  corpsource =   "Digital Equipment Corp., Hudson, MA, USA",
  keywords =     "computer networks; DEC; DEC computers; distributed
                 applications development; distributed processing;
                 heterogeneous environments; information retrieval;
                 information services; information-retrieval tool;
                 network access; programming interfaces; software
                 productivity; software tools; tools; VALU; VAX;
                 videotex; viewdata; VTX; VTX Application Link
                 Utilities",
  treatment =    "P Practical",
}

@Article{Brender:1988:PDV,
  author =       "R. F. Brender and B. R. Brett and C. Z. Mitchell",
  title =        "Pragmatics in the Development of {VAX Ada}",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "6",
  pages =        "91--100",
  month =        feb,
  year =         "1988",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "/usr/local/src/bib/bibliography/Compiler/compiler.bib;
                 http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The software tools and techniques-pragmatics-used
                 daily by the VAX Ada developers significantly
                 contributed to increases in product performance and
                 developer productivity. Approximately 500,000 lines of
                 code were written for this project. Of particular
                 interest in this project's development is the
                 automation of the coding process, instrumentation of
                 the compiler, built-in consistency checking within the
                 compiler-self-checking, and the use of self-describing
                 data structures. This paper gives examples of how these
                 tools and techniques were used in the development of
                 the compiler. However, these tools and techniques can
                 be applied to a wide range of software development
                 efforts.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6110B (Software engineering techniques); C6115
                 (Programming support); C6120 (File organisation);
                 C6150C (Compilers, interpreters and other processors)",
  corpsource =   "Digital Equipment Corp., Hudson, MA, USA",
  keywords =     "Ada; automatic programming; compiler; consistency
                 checking; data structures; DEC computers; describing
                 data structures; program compilers; self-;
                 self-checking; software; software development; software
                 engineering; software tools; tools; VAX Ada",
  owner =        "manning",
  treatment =    "P Practical",
}

@Article{Grass:1988:DGP,
  author =       "S. J. Grass",
  title =        "Development of a graphical program generator",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "6",
  pages =        "101--109",
  month =        feb,
  year =         "1988",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-nhfb,
  classcodes =   "C6110B (Software engineering techniques); C6115
                 (Programming support); C6130B (Graphics techniques)",
  corpsource =   "Digital Equipment Corp., Hudson, MA, USA",
  keywords =     "application generators; COBOL; COBOL applications;
                 computer graphics; computers; data dictionary; DEC;
                 design documentation; development tools; fourth;
                 generation language; graphical program generator;
                 graphical-; interface; software engineering; software
                 tools; VAX COBOL GENERATOR software; work-file",
  treatment =    "P Practical",
}

@Article{Ziman:1988:PMV,
  author =       "L. Ziman and M. Dickau",
  title =        "Project management of the {VAX DEC\slash Test Manager}
                 software version 2.0",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "6",
  pages =        "110--116",
  month =        feb,
  year =         "1988",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-nhfb,
  classcodes =   "C0310F (Software development management); C6110B
                 (Software engineering techniques); C6115 (Programming
                 support)",
  keywords =     "code management; conferencing; DEC; DEC computers;
                 DEC/Test; DP management; engineering; iterative
                 development; Manager; performance analysis; program
                 testing; project management; requirements analysis;
                 software; software engineering; software tools; source;
                 specification; VAX DEC/CMS; VAX Language-Sensitive
                 Editor; VAX NOTES; VAX Performance and Coverage
                 Analyzer; VMS productivity tools",
  treatment =    "P Practical",
}

@Article{Gilbert:1988:DVN,
  author =       "P. D. Gilbert",
  title =        "Development of the {VAX NOTES} system",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "6",
  pages =        "117--124",
  month =        feb,
  year =         "1988",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-nhfb,
  classcodes =   "C6110B (Software engineering techniques); C7410F
                 (Communications)",
  corpsource =   "Digital Equipment Corp., Hudson, MA, USA",
  keywords =     "callable interface; communications tool; computer
                 conferencing; DEC; DEC computers; discussions; human
                 factors; human-factors engineering; interfaces; medium;
                 multiprogramming; multitasking; multithreaded server;
                 online; program; program testing; software engineering;
                 storage; technical writer; teleconferencing; testing;
                 user; user interface; VAX NOTES",
  treatment =    "P Practical",
}

@Article{Good:1988:SUE,
  author =       "M. D. Good",
  title =        "Software usability engineering",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "6",
  pages =        "125--133",
  month =        feb,
  year =         "1988",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-nhfb,
  classcodes =   "C6110 (Systems analysis and programming)",
  corpsource =   "Digital Equipment Corp., Hudson, MA, USA",
  keywords =     "analysis; DEC; development cycle; software
                 engineering; software usability engineering; system
                 users; systems; systems analysis; usability
                 specification development; user interfaces",
  treatment =    "P Practical",
}

@Article{Allison:1988:OVF,
  author =       "Brian Allison",
  title =        "An Overview of the {VAX 6200} Family of Systems",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "7",
  pages =        "10--18",
  month =        aug,
  year =         "1988",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Mon Jun 24 06:57:43 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-nhfb,
}

@Article{Allison:1988:ADP,
  author =       "Brian R. Allison",
  title =        "The Architectural Definition Process of the {VAX 6200}
                 Family",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "7",
  pages =        "19--27",
  month =        aug,
  year =         "1988",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Mar 19 02:56:53 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Gillett:1988:IVM,
  author =       "Richard B. {Gillett, Jr.}",
  title =        "Interfacing a {VAX} Microprocessor to a High-speed
                 Multiprocessing Bus",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "7",
  pages =        "28--46",
  month =        aug,
  year =         "1988",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Mar 19 02:56:53 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Basmaji:1988:CAE,
  author =       "Jean H. Basmaji and Glenn P. Garvey and Masood Heydari
                 and Arthur L. Singer",
  title =        "The Role of Computer-aided Engineering in the Design
                 of the {VAX 6200} System",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "7",
  pages =        "47--56",
  month =        aug,
  year =         "1988",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Mar 19 02:56:53 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Gamache:1988:VSM,
  author =       "Rodney N. Gamache and Kathleen D. Morse",
  title =        "{VMS} Symmetric Multiprocessing",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "7",
  pages =        "57--63",
  month =        feb,
  year =         "1988",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Jan 05 08:07:54 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-nhfb,
}

@Article{Moses:1988:PEV,
  author =       "Bhagyam Moses and Karen T. DeGregory",
  title =        "Performance Evaluation of the {VAX 6200} Systems",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "7",
  pages =        "64--78",
  month =        aug,
  year =         "1988",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Mar 19 02:56:53 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Lidington:1988:OVP,
  author =       "Gary P. Lidington",
  title =        "Overview of the {MicroVAX 3500/3600} Processor
                 Module",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "7",
  pages =        "79--86",
  month =        aug,
  year =         "1988",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Mar 19 02:56:53 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{DeVane:1988:DVS,
  author =       "Charles J. DeVane",
  title =        "Design of the {MicroVAX 3500/3600} Second-level
                 Cache",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "7",
  pages =        "87--94",
  month =        aug,
  year =         "1988",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Mar 19 02:56:53 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Fox:1988:CVAX,
  author =       "Thomas F. Fox and Paul E. Gronowski and Anil K. Jain
                 and Burton M. Leary and Daniel G. Miner",
  title =        "The {CVAX 78034} Chip, a 32-bit Second-generation
                 {VAX} Microprocessor",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "7",
  pages =        "95--108",
  month =        aug,
  year =         "1988",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Mar 19 02:56:53 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{McLellan:1988:DCF,
  author =       "Edward J. McLellan and Gilbert M. Wolrich and Robert
                 AJ Yodlowski",
  title =        "Development of the {CVAX} Floating Point Chip",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "7",
  pages =        "109--120",
  month =        aug,
  year =         "1988",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Mar 19 02:56:53 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Winston:1988:SSC,
  author =       "Jeff Winston",
  title =        "The System Support Chip, a Multifunction Chip for
                 {CVAX} Systems",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "7",
  pages =        "121--128",
  month =        aug,
  year =         "1988",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Mar 19 02:56:53 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Maskas:1988:DCQ,
  author =       "Barry A. Maskas",
  title =        "Development of the {CVAX Q22}-bus Interface Chip",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "7",
  pages =        "129--138",
  month =        aug,
  year =         "1988",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Mon Jun 24 07:32:49 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-nhfb,
}

@Article{Morgan:1988:CMCTL,
  author =       "David K. Morgan",
  title =        "The {CVAX} {CMCTL} -- {A} {CMOS} Memory Controller
                 Chip",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "7",
  pages =        "139--143",
  month =        aug,
  year =         "1988",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Mar 19 02:56:53 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Lary:1989:HSC,
  author =       "Richard E. Lary and Robert G. Bean",
  title =        "The Hierarchical Storage Controller, {A} Tightly
                 Coupled Multiprocessor as Storage Server",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "8",
  pages =        "8--24",
  month =        feb,
  year =         "1989",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Mar 19 02:56:53 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Bates:1989:PAH,
  author =       "Kenneth H. Bates",
  title =        "Performance Aspects of the {HSC} Controller",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "8",
  pages =        "25--37",
  month =        feb,
  year =         "1989",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Mar 19 02:56:53 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Emlich:1989:VFM,
  author =       "Larry W. Emlich and Herman D. Polich",
  title =        "{VAXsimPLUS}, {A} Fault Manager Implementation",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "8",
  pages =        "38--45",
  month =        feb,
  year =         "1989",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Mar 19 02:56:53 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Crane:1989:DDT,
  author =       "Barbara A. Crane",
  title =        "Disk Drive Technology Improvements in the {RA90}",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "8",
  pages =        "46--60",
  month =        feb,
  year =         "1989",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Mar 19 02:56:53 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Sidman:1989:CST,
  author =       "Michael D. Sidman",
  title =        "Control Systems Technology in Digital's Disk Drives",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "8",
  pages =        "61--73",
  month =        feb,
  year =         "1989",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Mar 19 02:56:53 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Smith:1989:MDO,
  author =       "Alan B. Smith",
  title =        "Magnetic Domain Observations in Thin-Film Heads Using
                 Kerr Microscopy",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "8",
  pages =        "74--80",
  month =        feb,
  year =         "1989",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Mar 19 02:56:53 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Kretschmer:1989:MAM,
  author =       "Reinhard Kretschmer and Siegbert Sadowski",
  title =        "Margin Analysis on Magnetic Disk Recording Channels",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "8",
  pages =        "81--87",
  month =        feb,
  year =         "1989",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Mar 19 02:56:53 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Rengarajan:1989:HAM,
  author =       "T. Rengarajan and P. Spiro and W. Wright",
  title =        "High Availability Mechanisms of {VAX DBMS} Software",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "8",
  pages =        "88--98",
  month =        feb,
  year =         "1989",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Mon Jun 24 11:36:08 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-nhfb,
}

@Article{Joshi:1989:RDM,
  author =       "Ashok M. Joshi and Karen E. Rodwell",
  title =        "A Relational Database Management System for Production
                 Applications",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "8",
  pages =        "99--109",
  month =        feb,
  year =         "1989",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Mar 19 02:56:53 MSK 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  acknowledgement = ack-svs,
}

@Article{Martin:1989:DVD,
  author =       "Sally J. Martin and Janet M. McCann and David R.
                 Oran",
  title =        "Development of the {VAX} distributed name service",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "9",
  pages =        "9--15",
  month =        jun,
  year =         "1989",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The VAX distributed name service (DNS) is a global,
                 highly scalable directory system for computer networks.
                 This robust name service provides fast translation of
                 network-wide names into the values of attributes stored
                 with the names. The DNS designers utilized such
                 techniques as partitioning of the namespace and data
                 replication to ensure service reliability and
                 availability. For improved performance, DNS implements
                 the client interface by means of a clerk which controls
                 communication protocols and also maintains a cache.",
  acknowledgement = ack-nhfb,
  classcodes =   "B6210L (Computer communications); C6150E (General
                 utility programs); C5620 (Computer networks and
                 techniques); C6150J (Operating systems)",
  classification = "B6210L (Computer communications); C5620 (Computer
                 networks and techniques); C6150E (General utility
                 programs); C6150J (Operating systems)",
  keywords =     "attributes; Attributes; cache; Cache; Clerk; clerk;
                 client; Client interface; Communication protocols;
                 communication protocols; Computer networks; computer
                 networks; data replication; Data replication; DEC
                 computers; DNS designers; fast; Fast translation;
                 highly scalable directory; Highly scalable directory
                 system; interface; Network-wide names; network-wide
                 names; Partitioning; partitioning; robust name service;
                 Robust name service; service reliability; Service
                 reliability; software packages; supervisory programs;
                 system; translation; utility programs; VAX distributed
                 name service",
  thesaurus =    "Computer networks; DEC computers; Software packages;
                 Supervisory programs; Utility programs",
  treatment =    "P Practical; R Product Review",
}

@Article{Nichols:1989:DIV,
  author =       "William G. Nichols and Joel S. Emer",
  title =        "Design and implementation of the {VAX} distributed
                 file service",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "9",
  pages =        "16--28",
  month =        jun,
  year =         "1989",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The VAX distributed file service (DFS) provides fast,
                 remote file access for VAX/VMS systems. DFS appears to
                 be a local file service and thus requires no changes
                 either to applications or to user commands. The DFS
                 designers first examined the VMS file system to
                 determine what type of service-disk, file, or
                 record-would best achieve their goals. Having
                 determined that a file service would meet the goals,
                 they used a queuing network model to assess program
                 response time and throughput for users in a multiple
                 workstation environment. This model was used to assess
                 a number of design alternatives. The resulting
                 implementation is well integrated into the VMS
                 operating system and consists of device drivers and a
                 server process. The authors present the design options,
                 the model and the DFS implementation.",
  acknowledgement = ack-nhfb,
  classcodes =   "B6210L (Computer communications); C6150E (General
                 utility programs); C6120 (File organisation); C5620
                 (Computer networks and techniques); C6150J (Operating
                 systems)",
  classification = "B6210L (Computer communications); C5620 (Computer
                 networks and techniques); C6120 (File organisation);
                 C6150E (General utility programs); C6150J (Operating
                 systems)",
  keywords =     "access; computer networks; DEC computers; Design
                 alternatives; design alternatives; Design options;
                 design options; Device drivers; device drivers; DFS
                 designers; DFS implementation; DSS product; file; file
                 organisation; input-output programs; Local file
                 service; local file service; Multiple workstation
                 environment; multiple workstation environment; Program
                 response time; program response time; programs; Queuing
                 network model; queuing network model; remote file;
                 Remote file access; Server process; server process;
                 servers; software packages; User commands; user
                 commands; utility; VAX distributed file service;
                 VAX/VMS systems; VMS file system; VMS operating
                 system",
  thesaurus =    "Computer networks; DEC computers; File organisation;
                 File servers; Input-output programs; Software packages;
                 Utility programs",
  treatment =    "P Practical; R Product Review",
}

@Article{Griffin:1989:RSM,
  author =       "David M. Griffin and Brad C. Johnson",
  title =        "Remote system management in network environments",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "9",
  pages =        "29--36",
  month =        jun,
  year =         "1989",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The introduction of the DECnet system services product
                 set opened new possibilities for the management of
                 systems. One of the products in this set is the remote
                 system manager (RSM) software, which allows managers
                 and operations staff to support numbers of systems from
                 a central point on the network. Based on a
                 client-server model, RSM is designed to provide such
                 useful functions as software distribution, file backup
                 and restoration, and client administration. Each of the
                 these services uses common RSM facilities and tools
                 that exist in the operating system environment-either
                 VMS or ULTRIX.",
  acknowledgement = ack-nhfb,
  classcodes =   "B6210L (Computer communications); C6150E (General
                 utility programs); C5620 (Computer networks and
                 techniques); C0310 (EDP management)",
  classification = "B6210L (Computer communications); C0310 (EDP
                 management); C5620 (Computer networks and techniques);
                 C6150E (General utility programs)",
  keywords =     "Client administration; client administration;
                 Client-server model; client-server model; computer
                 networks; DEC computers; DECnet system services product
                 set; distribution; DP management; DSS; facilities; File
                 backup; file backup; Network environments; network
                 environments; Operating system environment; operating
                 system environment; Operations staff; operations staff;
                 packages; Remote system manager; remote system manager;
                 RSM; RSM facilities; RSM software; software; Software
                 distribution; Systems management; systems management;
                 ULTRIX; utility programs; VMS",
  thesaurus =    "Computer networks; DEC computers; DP management;
                 Software packages; Utility programs",
  treatment =    "P Practical; R Product Review",
}

@Article{Mierswa:1989:EM,
  author =       "Peter O. Mierswa",
  title =        "The evolution of the {MAILbus}",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "9",
  pages =        "37--43",
  month =        jun,
  year =         "1989",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The MAILbus product family provides facilities for
                 creating, transmitting, receiving, and managing
                 messages in a multiple vendor network environment.
                 Messages can consist of combinations of text, data, and
                 arbitrary files and can be exchanged among people or
                 applications in various computing environments,
                 including the DECnet network, X.400-conformant
                 messaging systems, IBM professional office systems and
                 IBM systems network architecture distribution services
                 systems. The author presents the development history of
                 the MAILbus product family and the design decisions
                 that have made possible the provision of the MAILbus
                 communication services in a changing heterogeneous
                 network environment.",
  acknowledgement = ack-nhfb,
  classcodes =   "B6210L (Computer communications); C5620 (Computer
                 networks and techniques); C6150J (Operating systems)",
  classification = "B6210L (Computer communications); C5620 (Computer
                 networks and techniques); C6150J (Operating systems)",
  keywords =     "Arbitrary files; arbitrary files; architecture
                 distribution services systems; computer networks;
                 computers; computing; Computing environments; DEC
                 computers; decisions; DECnet network; design; Design
                 decisions; electronic messaging; environments;
                 heterogeneous; Heterogeneous network environment; IBM;
                 IBM professional office systems; IBM systems network;
                 IBM systems network architecture distribution services
                 systems; MAILbus communication services; MAILbus
                 product family; message; Message creation/management;
                 message creation/management; Message
                 transmission/receipt; Messaging systems; messaging
                 systems; multiple; Multiple vendor network environment;
                 network environment; professional office systems;
                 software packages; standards; transmission/receipt;
                 vendor network environment; X400 standard",
  thesaurus =    "Computer networks; DEC computers; Electronic
                 messaging; IBM computers; Software packages;
                 Standards",
  treatment =    "P Practical; R Product Review",
}

@Article{Abrahams:1989:VSM,
  author =       "Alan Abrahams",
  title =        "{VAX\slash VMS} services for {MS-DOS}",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "9",
  pages =        "44--50",
  month =        jun,
  year =         "1989",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sat Sep 14 13:52:47 MDT 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "VAX/VMS services for MS-DOS is a distributed
                 application which provides file and disk services to
                 personal computers from a VAX/VMS system. Using a
                 server-based model, the product's heterogeneous file
                 system seamlessly integrates the remote file system
                 into the MS-DOS environment. The file server allows
                 simultaneous access to shared data on the VAX system.
                 The disk server provides a logical block service that
                 maps MS-DOS disk access requests into a VMS container
                 file. One of the challenges for product developers was
                 the design of a remote boot service which allows any
                 personal computer to be booted over the network by
                 means of the disk server.",
  acknowledgement = ack-nhfb,
  classification = "B6210L (Computer communications); C5620 (Computer
                 networks and techniques); C6150J (Operating systems)",
  keywords =     "(computers); boot service; computer networks; DEC
                 computers; disk server; disk services; distributed
                 application; environment; file server; file servers;
                 heterogeneous file system; input-output; logical block
                 service; microcomputer applications; MS-DOS; MS-DOS
                 disk access; operating systems; personal computers;
                 product developers; programs; remote; remote file
                 system; requests; server-based model; shared data;
                 simultaneous access; VAX/VMS services; VAX/VMS system;
                 VMS container file",
  thesaurus =    "Computer networks; DEC computers; File servers;
                 Input-output programs; Microcomputer applications;
                 Operating systems [computers]",
  treatment =    "P Practical; R Product Review",
}

@Article{Viscarola:1989:WTB,
  author =       "Peter G. Viscarola and Jeffrey E. Watkins",
  title =        "The {WAVE} tools base for protocol testing",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "9",
  pages =        "51--60",
  month =        jun,
  year =         "1989",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "One goal of data communications protocol testing is to
                 ensure that the protocols that are implemented adhere
                 to the relevant standards. Reaching this goal is often
                 time-consuming and difficult. To help simplify this
                 particular type of testing, called protocol conformance
                 testing, Digital's networks and communications (NAC)
                 conformance engineering group has developed the WAVE
                 tools base. This unique tool forms a reusable platform
                 that can be used at almost any protocol layer. The WAVE
                 tools base implements a programming language
                 specifically designed to make developing protocol tests
                 and prototypes easy. Examples of the WAVE design
                 features presented, are derived from the group's
                 experiences in developing a conformance test suite for
                 the DECnet Phase V network routing layer.",
  acknowledgement = ack-nhfb,
  classcodes =   "B6210L (Computer communications); C5620 (Computer
                 networks and techniques); C6150G (Diagnostic, testing,
                 debugging and evaluating systems); C6140D (High level
                 languages); C6155 (Computer communications software)",
  classification = "B6210L (Computer communications); C5620 (Computer
                 networks and techniques); C6140D (High level
                 languages); C6150G (Diagnostic, testing, debugging and
                 evaluating systems); C6155 (Computer communications
                 software)",
  keywords =     "Conformance engineering group; conformance engineering
                 group; Conformance test suite; conformance test suite;
                 conformance testing; Data communications protocol
                 testing; data communications protocol testing; DEC
                 computers; DECnet Phase V network routing layer; high
                 level languages; language; programming; Programming
                 language; protocol; Protocol conformance testing;
                 Protocol layer; protocol layer; protocols; Reusable
                 platform; reusable platform; Standards; standards;
                 tools base; WAVE; WAVE design features; WAVE tools
                 base",
  thesaurus =    "Conformance testing; DEC computers; High level
                 languages; Protocols; Standards",
  treatment =    "P Practical; R Product Review",
}

@Article{Finkelstein:1989:PED,
  author =       "Eugene Finkelstein and Richard A. Grawin",
  title =        "Performance evaluation of distributed applications and
                 services in the {DECnet} environment",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "9",
  pages =        "61--77",
  month =        jun,
  year =         "1989",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "Performance evaluation is critical in the design of
                 distributed systems as well as for purposes of capacity
                 planning. The distributed system technical evaluation
                 group (DSTEG), has developed a methodology for
                 distributed system performance evaluation at the system
                 level and has applied it in the DECnet environment. The
                 core of the methodology is the systematic use of an
                 empirical/analytical approach in which measurements and
                 modeling are closely coupled. The authors focus on the
                 empirical component and provide details on experiment
                 complexity reduction, an instrumented test-bed, and
                 tools for data collection, reduction, and analysis. The
                 case studies of VAX DNS, VAX DFS, and RSM, from which
                 the methodology evolved, present performance evaluation
                 results of product qualification testing. VAX/VMS mail
                 and VAX/VMS copy case studies, to which the methodology
                 was applied, include network file transfer performance
                 and capacity planning data.",
  acknowledgement = ack-nhfb,
  classcodes =   "B6210L (Computer communications); C6110 (Systems
                 analysis and programming); C6150J (Operating systems);
                 C5620 (Computer networks and techniques); C6150E
                 (General utility programs)",
  classification = "B6210L (Computer communications); C5620 (Computer
                 networks and techniques); C6110 (Systems analysis and
                 programming); C6150E (General utility programs); C6150J
                 (Operating systems)",
  keywords =     "Capacity planning data; capacity planning data; Case
                 studies; case studies; collection; computer networks;
                 copy case studies; data; Data collection; DEC
                 computers; DECnet environment; Distributed system
                 performance evaluation; distributed system performance
                 evaluation; Distributed system technical evaluation
                 group; distributed system technical evaluation group;
                 Empirical/analytical approach; empirical/analytical
                 approach; evaluation results; Experiment complexity
                 reduction; experiment complexity reduction;
                 Instrumented test-bed; instrumented test-bed;
                 multiprocessing programs; Network file transfer
                 performance; network file transfer performance;
                 performance; performance evaluation; Performance
                 evaluation results; Product qualification testing;
                 product qualification testing; program testing; RSM;
                 System level; system level; utility programs; VAX DFS;
                 VAX DNS; VAX/VMS; VAX/VMS copy case studies; VAX/VMS
                 mail",
  thesaurus =    "Computer networks; DEC computers; Multiprocessing
                 programs; Performance evaluation; Program testing;
                 Utility programs",
  treatment =    "P Practical",
}

@Article{DSilva:1989:MAT,
  author =       "Vijay G. D'Silva and Ruei-Hsin Hsiao",
  title =        "Measurement and analysis techniques for {DECnet}
                 products",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "9",
  pages =        "78--86",
  month =        jun,
  year =         "1989",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The network performance and conformance engineering
                 group (NPACE), is actively involved in the stages of
                 product design, development, and implementation.
                 Specifically to evaluate an implementation, analysis
                 first define metrics that effectively reflect a
                 product's performance. They use and sometimes develop
                 software tools for testing, and the results are then
                 generalized and extended using a wide variety of
                 analytical techniques. Two cases serve to demonstrate
                 the utility of their approach: the performance
                 evaluations of VAX distributed file service and those
                 of VAX distributed name service software. The various
                 factors affecting performance of these cases were
                 identified, and these findings led to increased product
                 performance.",
  acknowledgement = ack-nhfb,
  classcodes =   "B6210L (Computer communications); C6110B (Software
                 engineering techniques); C6150E (General utility
                 programs); C5620 (Computer networks and techniques);
                 C5470 (Performance evaluation and testing)",
  classification = "B6210L (Computer communications); C5470 (Performance
                 evaluation and testing); C5620 (Computer networks and
                 techniques); C6110B (Software engineering techniques);
                 C6150E (General utility programs)",
  keywords =     "Analysis techniques; analysis techniques; Analytical
                 techniques; analytical techniques; computer networks;
                 Conformance engineering; conformance engineering; DEC
                 computers; DECnet products; distributed file service;
                 Network performance; network performance; performance
                 evaluation; Performance evaluations; performance
                 evaluations; Product design; product design; Product
                 performance; product performance; program testing;
                 software; software engineering; Software tools;
                 software tools; utility programs; VAX; VAX distributed
                 file service; VAX distributed name service; VAX
                 distributed name service software",
  thesaurus =    "Computer networks; DEC computers; Performance
                 evaluation; Program testing; Software engineering;
                 Utility programs",
  treatment =    "P Practical",
}

@Article{Morency:1989:MAD,
  author =       "John P. Morency and Richard P. Pitkin and Ramasamy
                 Jesuraj and Ambrose C. Kwong",
  title =        "Modeling and analysis of the {DECnet}\slash {SNA}
                 gateway",
  journal =      j-DEC-TECH-J,
  volume =       "1",
  number =       "9",
  pages =        "87--99",
  month =        jun,
  year =         "1989",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The DECnet/SNA gateway links the DECnet and SNA
                 environments to provide a rich range of services to
                 users. To simulate arbitrary session mixes over this
                 gateway, the network and communications group at DEC,
                 developed a programmed model primarily as a tool for
                 capacity planning. Designers chose to develop a
                 simulation model-as opposed to a queuing model-to
                 support the DECnet/SNA terminal emulator, the data
                 transfer facility and remote job entry. Special tools
                 and techniques were created during development to
                 ensure consistent and efficient collection and
                 reporting of experiment results. Validation of the
                 model reveals the model's accuracy; a margin of less
                 than 10 percent is shown between measured results and
                 model output.",
  acknowledgement = ack-nhfb,
  classcodes =   "B6210L (Computer communications); C5620L (Local area
                 networks); C6155 (Computer communications software);
                 C5470 (Performance evaluation and testing); C6110
                 (Systems analysis and programming)",
  classification = "B6210L (Computer communications); C5470 (Performance
                 evaluation and testing); C5620L (Local area networks);
                 C6110 (Systems analysis and programming); C6155
                 (Computer communications software)",
  keywords =     "Arbitrary session mixes; arbitrary session mixes;
                 Capacity planning; capacity planning; computer
                 communications software; Data transfer facility; data
                 transfer facility; DEC computers; DECnet/SNA gateway;
                 DECnet/SNA terminal; DECnet/SNA terminal emulator;
                 digital; Efficient collection; efficient collection;
                 emulator; environments; evaluation; Experiment results;
                 experiment results; IBM computers; local area networks;
                 Model output; model output; performance; Programmed
                 model; programmed model; Remote job entry; remote job
                 entry; simulation; Simulation model; simulation model;
                 SNA; SNA environments; standards; Systems network
                 architecture; systems network architecture",
  thesaurus =    "Computer communications software; DEC computers;
                 Digital simulation; IBM computers; Local area networks;
                 Performance evaluation; Standards",
  treatment =    "P Practical",
}

@Article{Travis:1990:COC,
  author =       "Robert L. {Travis, Jr.}",
  title =        "{CDA} overview (compound document architecture)",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "1",
  pages =        "8--15",
  month =        "Winter",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The CDA family of architectures, services, and
                 applications is designed to support the creation,
                 interchange, and processing of compound documents in a
                 heterogeneous network environment. This family emerged
                 as the result of a fundamental goal: to develop a
                 coherent set of standards and capabilities for data
                 interchange across the Digital computing environment.
                 Of the four stages identified by the CDA document
                 processing model, the central focus is the revisable
                 compound document and its logical structures and data
                 cross-linkages. Key design decisions for each of the
                 major CDA components were made with reference to
                 Digital, industry, and international standards.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6130 (Data handling techniques); C0200 (General
                 computer topics)",
  classification = "C0200 (General computer topics); C6130 (Data
                 handling techniques)",
  keywords =     "CDA document processing model; compound document;
                 Compound document architecture; compound document
                 architecture; data cross-linkages; Data cross-linkages;
                 data interchange; Data interchange; DEC; DEC computers;
                 design decisions; Design decisions; Digital computing;
                 Digital computing environment; electronic data
                 interchange; environment; heterogeneous network;
                 Heterogeneous network environment; international
                 standards; International standards; Logical structures;
                 logical structures; revisable; Revisable compound
                 document; standards",
  thesaurus =    "DEC computers; Electronic data interchange;
                 Standards",
  treatment =    "G General Review",
}

@Article{Laurune:1990:DDI,
  author =       "William R. Laurune and Robert L. {Travis, Jr.}",
  title =        "The {Digital} document interchange format",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "1",
  pages =        "16--27",
  month =        "Winter",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The DDIF document interchange format is one of the
                 central data formats of the CDA architecture. The
                 design of the format was driven by the user demand for
                 increased data portability and system support for more
                 sophisticated document processing capabilities. The
                 DDIF format supports highly integrated text, graphics,
                 images, and application data. A major goal was used to
                 design the DDIF format for acceptance as a standard
                 document format. The design includes easy and speedy
                 data access, minimal storage size, high-quality data
                 representation, revisability, and format extensibility.
                 The extensibility of the format makes it easy for users
                 to accommodate individual and future needs.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6130 (Data handling techniques); C6110 (Systems
                 analysis and programming); C7100 (Business and
                 administration)",
  classification = "C6110 (Systems analysis and programming); C6130
                 (Data handling techniques); C7100 (Business and
                 administration)",
  keywords =     "administrative data processing; application data;
                 Application data; CDA architecture; central data
                 formats; Central data formats; data interchange; DDIF
                 document; DDIF document interchange format; DEC
                 computers; Digital document interchange format;
                 electronic; extensibility; format; Format
                 extensibility; future needs; Future needs; Graphics;
                 graphics; high-; High-quality data representation;
                 images; Images; increased data portability; Increased
                 data portability; integrated; Integrated text;
                 interchange format; Minimal storage size; minimal
                 storage size; quality data representation;
                 revisability; Revisability; software portability;
                 Sophisticated document processing capabilities;
                 sophisticated document processing capabilities; Speedy
                 data access; speedy data access; standard document;
                 Standard document format; standards; system support;
                 System support; text; user demand; User demand",
  thesaurus =    "Administrative data processing; DEC computers;
                 Electronic data interchange; Software portability;
                 Standards",
  treatment =    "P Practical",
}

@Article{Young:1990:DTI,
  author =       "Carol A. Young and Neal F. Jacobson",
  title =        "The {Digital} table interchange format",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "1",
  pages =        "28--37",
  month =        "Winter",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The information explosion has created a multitude of
                 end-user data table processing applications including
                 database access tools, spreadsheets, charting packages,
                 laboratory automation systems and electronic business
                 documents. As the amount and popularity of tabular data
                 increases, so does the need to share or interchange
                 tabular data between applications. Within the CDA
                 architecture, the DTIF table interchange format defines
                 an application-independent and architecture-neutral
                 format for the interchange and storage of revisable
                 data tables. The DTIF format uses the DDIS data
                 interchange syntax as the basis for a three-part
                 architecture that defines the syntax and encoding for
                 documents containing revisable data tables, the formula
                 for expressions defining relationships between table
                 elements, and the presentation and other processing
                 characteristics of a data table.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6130 (Data handling techniques); C6110 (Systems
                 analysis and programming); C7100 (Business and
                 administration)",
  classification = "C6110 (Systems analysis and programming); C6130
                 (Data handling techniques); C7100 (Business and
                 administration)",
  keywords =     "administrative data processing;
                 application-independent; Application-independent;
                 architecture-neutral format; Architecture-neutral
                 format; automation systems; CDA architecture; Charting
                 packages; charting packages; data; data interchange;
                 database access; Database access tools; DDIS data
                 interchange syntax; DEC computers; DTIF table
                 interchange format; electronic; Electronic business
                 documents; electronic business documents; encoding;
                 Encoding; End-user data table processing applications;
                 end-user data table processing applications;
                 laboratory; Laboratory automation systems; part
                 architecture; processing characteristics; Processing
                 characteristics; programming; revisable data tables;
                 Revisable data tables; spreadsheets; Spreadsheets;
                 standards; table lookup; tabular; Tabular data; three-;
                 Three-part architecture; tools",
  thesaurus =    "Administrative data processing; DEC computers;
                 Electronic data interchange; Programming; Standards;
                 Table lookup",
  treatment =    "P Practical",
}

@Article{Gumbel:1990:DCT,
  author =       "Richard T. Gumbel and Martin L. Jack",
  title =        "Development of the {CDA} toolkit",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "1",
  pages =        "38--48",
  month =        "Winter",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "Application program access to CDA documents is complex
                 because of the many types of data these documents
                 contain and their complex internal structures. The CDA
                 toolkit addresses the problem of access by providing a
                 portable procedure library. The toolkit's primary
                 feature is a procedural interface that enables
                 applications to create, modify, read, and write
                 compound documents. Designers of the toolkit's
                 interface focused on the definition of the mapping
                 between the stored document content and the document
                 content in memory. The basic unit of interaction
                 between the toolkit and the application is an in-memory
                 data structure, termed an aggregate. Layered above the
                 toolkit is a converter architecture that imports and
                 exports documents to and from non-CDA formats. The
                 converter makes available a variety of document sources
                 and destinations to application programs.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6130 (Data handling techniques); C6120 (File
                 organisation); C6110 (Systems analysis and
                 programming); C6115 (Programming support)",
  classification = "C6110 (Systems analysis and programming); C6115
                 (Programming support); C6120 (File organisation); C6130
                 (Data handling techniques)",
  keywords =     "aggregate; Aggregate; CDA documents; CDA toolkit;
                 Complex internal structures; complex internal
                 structures; converter architecture; Converter
                 architecture; data structures; DEC computers; document
                 content; electronic data interchange; in-memory data
                 structure; In-memory data structure; non-CDA formats;
                 Non-CDA formats; portable procedure library; Portable
                 procedure library; procedural interface; Procedural
                 interface; software portability; software tools;
                 standards; stored; Stored document content;
                 subroutines",
  thesaurus =    "Data structures; DEC computers; Electronic data
                 interchange; Software portability; Software tools;
                 Standards; Subroutines",
  treatment =    "P Practical",
}

@Article{Cheung:1990:IAI,
  author =       "Baldwin K. Cheung and Neal F. Jacobson",
  title =        "Interapplication access and integration",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "1",
  pages =        "49--49",
  month =        "Winter",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "Applications within the CDA architecture can share and
                 interchange data through the DECwrite and DECdecision
                 LiveLink connection. Applications developers can build
                 more tightly integrated levels of applications with the
                 AIL library, while DECdecision's Builder allows
                 application integration at the user-interaction level.
                 AIL is a platform-independent subroutine library that
                 provides application invocation, data exchange and flow
                 control services for interacting applications. Builder
                 can be used as either a conforming LiveLink application
                 or stand on its own. Together, these tools form an
                 interapplication architecture that permits easy
                 application access and integration.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6130 (Data handling techniques); C6155 (Computer
                 communications software); C6180 (User interfaces);
                 C6150E (General utility programs); C7100 (Business and
                 administration)",
  classification = "C6130 (Data handling techniques); C6150E (General
                 utility programs); C6155 (Computer communications
                 software); C6180 (User interfaces); C7100 (Business and
                 administration)",
  keywords =     "administrative data processing; AIL library;
                 application; application access; Application
                 integration; application invocation; Application
                 invocation; Builder; CDA architecture; computer
                 communications; conforming; Conforming LiveLink
                 application; Data exchange; data exchange; DEC
                 computers; DECdecision LiveLink connection; DECwrite;
                 easy; Easy application access; electronic data
                 interchange; flow control services; Flow control
                 services; integration; interacting applications;
                 Interacting applications; Interapplication
                 architecture; interapplication architecture; LiveLink
                 application; platform-independent; Platform-independent
                 subroutine library; software; subroutine library;
                 subroutines; Tightly integrated levels; tightly
                 integrated levels; user interfaces; user-interaction
                 level; User-interaction level; utility programs",
  thesaurus =    "Administrative data processing; Computer
                 communications software; DEC computers; Electronic data
                 interchange; Subroutines; User interfaces; Utility
                 programs",
  treatment =    "P Practical",
}

@Article{Sung:1990:DDD,
  author =       "Alan Sung and Neal F. Jacobson and Carol A. Young",
  title =        "The design and development of the {DECdecision}
                 product",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "1",
  pages =        "60--72",
  month =        "Winter",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The DECdecision product is an end-user decision
                 support application composed of five components that
                 perform database access, spreadsheet, charting, flow
                 control and management functions. Each component
                 presents a consistent, rich, graphical DECwindows user
                 interface. Users can easily share data between the
                 components, or with other applications, using the
                 DECwindows QuickCopy and clipboard facilities. The CDA
                 architecture supplies the foundation for this data
                 interchange, as well as support for reading or writing
                 DECdecision data in a variety of formats. The
                 DECdecision product provides a level of sophistication
                 and seamless data integration not found in many
                 products. The DECdecision product is one of the first,
                 large-scale applications to showcase the capabilities
                 of DECwindows and the CDA architecture.",
  acknowledgement = ack-nhfb,
  classcodes =   "C7102 (Decision support systems); C6180 (User
                 interfaces); C6130 (Data handling techniques)",
  classification = "C6130 (Data handling techniques); C6180 (User
                 interfaces); C7102 (Decision support systems)",
  keywords =     "architecture; CDA; CDA architecture; Charting;
                 charting; Clipboard facilities; clipboard facilities;
                 computer graphics; data integration; data interchange;
                 Data interchange; database access; Database access;
                 DECdecision data; DECdecision product; decision support
                 systems; DECwindows QuickCopy; electronic data;
                 End-user decision support application; end-user
                 decision support application; Flow control; flow
                 control; Graphical DECwindows user interface; graphical
                 DECwindows user interface; interchange; large-scale
                 applications; Large-scale applications; Management
                 functions; management functions; seamless; Seamless
                 data integration; Spreadsheet; spreadsheet; standards;
                 user interfaces",
  thesaurus =    "Computer graphics; Decision support systems;
                 Electronic data interchange; Standards; User
                 interfaces",
  treatment =    "P Practical; R Product Review",
}

@Article{Cohen:1990:RBD,
  author =       "Seth S. Cohen and Wm. Eugene Morgan",
  title =        "The relationship between the {DECwrite} editor and the
                 {Digital} document interchange format",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "1",
  pages =        "73--82",
  month =        "Winter",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The DECwrite editor is Digital's new DECwindows-based
                 compound document editor. It is also the first compound
                 document editor to implement the CDA architecture. The
                 DECwrite editor supports the creation, editing,
                 formatting and printing of compound documents across
                 multiple computing environments. DECwrite uses the DDIF
                 document interchange format to support the editing of
                 both CDA documents and those based on other formats,
                 including SGML and GKS. One of the design issues faced
                 by the DECwrite editor was how to fully conform to the
                 DDIF format's interchange goals without compromising
                 formatting speed and ease of editing. The DECwrite
                 editor overcomes these conflicting needs by isolating
                 their side effects to the DECwrite editor's read and
                 write code.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6130D (Document processing techniques); C6120 (File
                 organisation)",
  classification = "C6120 (File organisation); C6130D (Document
                 processing techniques)",
  keywords =     "CDA architecture; CDA documents; data structures; DDIF
                 document interchange format; DEC computers;
                 DECwindows-based compound document editor; DECwrite
                 editor; electronic data interchange; formatting speed;
                 Formatting speed; GKS; multiple computing environments;
                 Multiple computing environments; Printing; printing;
                 SGML; software packages; standards; text editing; word
                 processing",
  thesaurus =    "Data structures; DEC computers; Electronic data
                 interchange; Software packages; Standards; Text
                 editing; Word processing",
  treatment =    "P Practical",
}

@Article{Appel:1990:CSE,
  author =       "Neal B. Appel and Ronald M. Olson",
  title =        "{CDA} in science and engineering",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "1",
  pages =        "83--89",
  month =        "Winter",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The CDA architecture is being extended to support the
                 specific requirements of the scientific and engineering
                 communities. The DECview3D application is part of the
                 CDA tools suite that enables science and engineering
                 users to integrate two-dimensional and
                 three-dimensional graphics into compound documents.
                 Graphics can be translated into various formats,
                 including the DDIF interchange format and engineering
                 and scientific data can be viewed and annotated.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6130B (Graphics techniques); C7400 (Engineering);
                 C7300 (Natural sciences)",
  classification = "C6130B (Graphics techniques); C7300 (Natural
                 sciences); C7400 (Engineering)",
  keywords =     "CDA architecture; CDA tools suite; compound documents;
                 Compound documents; DDIF; DDIF interchange format; DEC
                 computers; DECview3D application; electronic data
                 interchange; engineering; engineering communities;
                 Engineering communities; engineering users; Engineering
                 users; graphics; interchange format; natural sciences
                 computing; Science; science; scientific data;
                 Scientific data; software packages; standards;
                 Three-dimensional graphics; three-dimensional
                 graphics",
  thesaurus =    "DEC computers; Electronic data interchange;
                 Engineering graphics; Natural sciences computing;
                 Software packages; Standards",
  treatment =    "P Practical; R Product Review",
}

@Article{Slater:1990:VPV,
  author =       "Debra L. Slater and David M. Fenwick and D. John
                 Shakshober and Douglas D. Williams",
  title =        "Vector processing on the {VAXvector} 6000 {Model}
                 400",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "2",
  pages =        "11--26",
  month =        "Spring",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The VAXvector 6000 Model 400 processor extends the VAX
                 6000 family of midrange CMOS-based multiprocessors to
                 address the computing needs of numerically intensive
                 applications. The three function units of the vector
                 processor combine to form an overall vector pipeline
                 that operates at speeds of up to 90 MFLOPS for
                 single-precision calculations and 45 MFLOPS for
                 double-precision calculations. The processor's
                 performance can also be enhanced by taking advantage of
                 overlapping and out-of-order instruction execution, as
                 well as chaining. Further, applications can be tuned to
                 the VAXvector 6000 hardware through algorithm
                 optimizations in areas such as equation solvers and
                 signal processing routines to achieve optimal
                 performance. Using the VAXvector 6000 Model 400 system,
                 performance increases ranging from 3 to 35 times that
                 of the VAX 6000 Model 400 scalar system have been
                 realized.",
  acknowledgement = ack-nhfb,
  classcodes =   "B1265F (Microprocessors and microcomputers); B2570D
                 (CMOS integrated circuits); C5130 (Microprocessor
                 chips); C5440 (Multiprocessor systems and techniques)",
  classification = "B1265F (Microprocessors and microcomputers); B2570D
                 (CMOS integrated circuits); C5130 (Microprocessor
                 chips); C5440 (Multiprocessor systems and techniques)",
  keywords =     "45 to 90 MFLOPS; 45 To 90 MFLOPS; Algorithm
                 optimizations; algorithm optimizations; chaining;
                 Chaining; CMOS integrated circuits; CMOS-based;
                 CMOS-based multiprocessors; Equation solvers; equation
                 solvers; microprocessor chips; multiprocessors;
                 out-of-order instruction execution; Out-of-order
                 instruction execution; parallel; processing; processing
                 routines; signal; Signal processing routines; VAXvector
                 6000 Model 400; vector processing; Vector processing",
  numericalindex = "Computer speed 4.5E+07 to 9.0E+07 FLOPS",
  thesaurus =    "CMOS integrated circuits; Microprocessor chips;
                 Parallel processing",
  treatment =    "P Practical",
}

@Article{Sullivan:1990:VMS,
  author =       "Patrick Sullivan and Michael A. {Callander, Sr.} and
                 James R. Lundberg and Rebecca L. Stamm and William J.
                 Bowhill",
  title =        "The {VAX 6000 Model 400} scalar processor module",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "2",
  pages =        "27--35",
  month =        "Spring",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The VAX 6000 Model 400 CPU module is the latest
                 generation of the compatible VAX 6000 family of
                 computers. The Model 400 is a single-board, CMOS-based
                 CPU that significantly extends the performance of the
                 VAX 6000 series. The system provides nearly 7 VAX units
                 of performance (VUPs) in single-processor applications
                 and up to 36 VUPs in six-processor systems. The Model
                 400 module is a plug-in replacement for the Model 200
                 and Model 300 processors. Chip set and module designers
                 of this new system cooperated closely to meet
                 aggressive timing and performance goals. Several
                 enhancements were made to the cache and bus interface
                 units to improve multiprocessor performance. A vector
                 interface was included for connection to a companion
                 vector processor module. Signal integrity was an
                 important consideration for both chip and module
                 design.",
  acknowledgement = ack-nhfb,
  classcodes =   "B1265F (Microprocessors and microcomputers); B2570D
                 (CMOS integrated circuits); C5130 (Microprocessor
                 chips); C5440 (Multiprocessor systems and techniques)",
  classification = "B1265F (Microprocessors and microcomputers); B2570D
                 (CMOS integrated circuits); C5130 (Microprocessor
                 chips); C5440 (Multiprocessor systems and techniques)",
  keywords =     "bus interface; Bus interface units; Cache; cache; CMOS
                 integrated circuits; CMOS-based CPU; microprocessor
                 chips; parallel; performance goals; Performance goals;
                 plug-in; Plug-in replacement; processing; replacement;
                 Timing; timing; units; VAX 6000 Model 400 CPU module;
                 vector interface; Vector interface",
  thesaurus =    "CMOS integrated circuits; Microprocessor chips;
                 Parallel processing",
  treatment =    "P Practical",
}

@Article{Durdan:1990:OVM,
  author =       "W. Hugh Durdan and William J. Bowhill and John F.
                 Brown and William V. Herrick and Richard C. Marcello
                 and Sridhar Samudrala and G. Michael Uhler and Nicholas
                 Wade",
  title =        "An overview of the {VAX 6000 Model 400} chip set",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "2",
  pages =        "36--51",
  month =        "Spring",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The VAX 6000 Model 400 processor is a CMOS
                 implementation of Digital's VAX architecture, offering
                 an average of seven times the performance of the
                 VAX-11/780 processor at a cycle time of 28 ns. The
                 processor comprises five custom chips implemented in
                 Digital's proprietary CMOS-1 and CMOS-2 semiconductor
                 processes. The chip set design incorporates the best
                 features of the previous VAX 8700 and VLSI VAX designs
                 and in addition implements new performance features.
                 Among these are a larger translation buffer and primary
                 cache, a de-multiplexed 27-bit address and 64-bit data
                 bus, and a tightly coupled 128 KB backup cache. The
                 five chips, which are designed for multiprocessing
                 environments, are the REX520 CPU, the floating point
                 accelerator, the VC vector and cache controller chip,
                 the RSSC system support chip, and the CLK clock chip.",
  acknowledgement = ack-nhfb,
  classcodes =   "B1265F (Microprocessors and microcomputers); B2570D
                 (CMOS integrated circuits); C5130 (Microprocessor
                 chips); C5440 (Multiprocessor systems and techniques)",
  classification = "B1265F (Microprocessors and microcomputers); B2570D
                 (CMOS integrated circuits); C5130 (Microprocessor
                 chips); C5440 (Multiprocessor systems and techniques)",
  keywords =     "64-Bit data bus; 64-bit data bus; accelerator;
                 architecture; Cache controller chip; cache controller
                 chip; CLK clock chip; CMOS implementation; CMOS
                 integrated circuits; CMOS-1; CMOS-2; floating point;
                 Floating point accelerator; microprocessor chips;
                 Multiprocessing environments; multiprocessing
                 environments; parallel; Performance features;
                 performance features; Primary cache; primary cache;
                 processing; REX520 CPU; RSSC system; RSSC system
                 support chip; support chip; Translation buffer;
                 translation buffer; VAX; VAX 6000 Model 400 processor;
                 VAX architecture; VC vector",
  thesaurus =    "CMOS integrated circuits; Microprocessor chips;
                 Parallel processing",
  treatment =    "P Practical",
}

@Article{Bartoszek:1990:VMP,
  author =       "John T. Bartoszek and Robert J. Hannemann and Stephen
                 P. Hansen and Robert J. McCarty and John C. Sweeney",
  title =        "{VAX 6000 Model 400} physical technology",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "2",
  pages =        "52--63",
  month =        "Spring",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The physical realization of the VAX 6000 Model 400
                 microprocessor design offered a number of significant
                 challenges at both the chip package and the module
                 levels. In meeting the requirements for a robust and
                 manufacturable midrange implementation, the VAX 6000
                 Model 400 physical technology approach broke new ground
                 for Digital, and, in some cases, for the industry. New
                 developments included the first tape-automated bonding
                 (TAB) interconnected semiconductors, extensive
                 board-level physical simulation, and the use of
                 advanced testability features on a microprocessor-based
                 midrange product. This paper provides details of the
                 physical technology used in the VAX 6000 Model 400
                 project to achieve system-level product goals.",
  acknowledgement = ack-nhfb,
  classcodes =   "B1265F (Microprocessors and microcomputers); B2570D
                 (CMOS integrated circuits); C5130 (Microprocessor
                 chips); C5440 (Multiprocessor systems and techniques)",
  classification = "B1265F (Microprocessors and microcomputers); B2570D
                 (CMOS integrated circuits); C5130 (Microprocessor
                 chips); C5440 (Multiprocessor systems and techniques)",
  keywords =     "Advanced testability features; advanced testability
                 features; chip package; Chip package; design; extensive
                 board-level; Extensive board-level physical simulation;
                 Interconnected semiconductors; interconnected
                 semiconductors; lead bonding; microprocessor;
                 microprocessor chips; Microprocessor design;
                 Microprocessor-based midrange product;
                 microprocessor-based midrange product; Module levels;
                 module levels; parallel processing; physical
                 simulation; tape-automated bonding; Tape-automated
                 bonding; VAX 6000 Model 400 physical technology",
  thesaurus =    "Lead bonding; Microprocessor chips; Parallel
                 processing",
  treatment =    "P Practical",
}

@Article{Calcagni:1990:VMC,
  author =       "Richard E. Calcagni and Will Sherwood",
  title =        "{VAX 6000 Model 400 CPU} chip set functional design
                 verification",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "2",
  pages =        "64--72",
  month =        "Spring",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The VAX 6000 Model 400 system is Digital's first VLSI
                 CPU to employ a fully micropipelined architecture. The
                 CPU chip set for this system posed verification
                 challenges far beyond those of previous designs. The
                 major problem was the large number of complex control
                 sequences and combinations that could exhibit design
                 errors. A single verification strategy would not
                 sufficiently handle this complexity. Therefore,
                 verification engineers developed a multipronged
                 approach for simulation modeling and functional design
                 verification. They also employed CPU diagnostic
                 programs, hand-generated tests, and directed
                 pseudo-random techniques to verify that the design
                 conformed to the VAX architecture. These techniques
                 helped them find bugs prior to committing the design to
                 masks. As a result, the first-pass versions of the CPU
                 chip set successfully booted an operating system.
                 Simulation also minimized chip rework and delays in
                 bringing the product to market.",
  acknowledgement = ack-nhfb,
  classcodes =   "B1265F (Microprocessors and microcomputers); B2570D
                 (CMOS integrated circuits); C5130 (Microprocessor
                 chips); C5440 (Multiprocessor systems and techniques)",
  classification = "B1265F (Microprocessors and microcomputers); B2570D
                 (CMOS integrated circuits); C5130 (Microprocessor
                 chips); C5440 (Multiprocessor systems and techniques)",
  keywords =     "CMOS integrated circuits; Complex control sequences;
                 complex control sequences; Design errors; design
                 errors; diagnostic; Diagnostic programs; Direct
                 pseudorandom techniques; direct pseudorandom
                 techniques; First-pass versions; first-pass versions;
                 Fully micropipelined architecture; fully micropipelined
                 architecture; hand-generated tests; Hand-generated
                 tests; microprocessor chips; parallel; processing;
                 programs; Simulation modeling; simulation modeling;
                 single; Single verification strategy; VAX 6000 Model
                 400 CPU chip set functional design; VAX 6000 Model 400
                 CPU chip set functional design verification;
                 verification; verification strategy; VLSI; VLSI CPU",
  thesaurus =    "CMOS integrated circuits; Microprocessor chips;
                 Parallel processing; VLSI",
  treatment =    "P Practical",
}

@Article{Croll:1990:TQV,
  author =       "John W. Croll and Larry T. Camilli and Anthony J.
                 Vaccaro",
  title =        "Test and qualification of the {VAX 6000 Model 400}
                 system",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "2",
  pages =        "73--83",
  month =        "Spring",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "Computer-aided design simulation, which is used in the
                 design of the VAX 6000 family, finds most problems
                 during the hardware design phase. Simulation, however,
                 cannot test a complex system running under system
                 software control. For the VAX 6000 Model 400 system, a
                 qualification process was designed to completely test
                 the interaction of the system's hardware and software
                 components. The benefit of such a process is clearly
                 shown in the results. Nearly all the problems found in
                 the qualification stage could not have been found in
                 the simulation process. The testing and qualification
                 of the Model 400 was a multigroup effort. This paper
                 describes the methods and tools of three Midrange
                 Systems Engineering groups who were involved in the
                 project.",
  acknowledgement = ack-nhfb,
  classcodes =   "B1265F (Microprocessors and microcomputers); B2570D
                 (CMOS integrated circuits); C5130 (Microprocessor
                 chips); C7410D (Electronic engineering); C5440
                 (Multiprocessor systems and techniques)",
  classification = "B1265F (Microprocessors and microcomputers); B2570D
                 (CMOS integrated circuits); C5130 (Microprocessor
                 chips); C5440 (Multiprocessor systems and techniques);
                 C7410D (Electronic engineering)",
  keywords =     "CAD simulation; circuit CAD; hardware design; Hardware
                 design phase; microprocessor chips; parallel
                 processing; phase; Qualification process; qualification
                 process; Testing; testing; VAX 6000 Model 400 system",
  thesaurus =    "Circuit CAD; Microprocessor chips; Parallel
                 processing",
  treatment =    "P Practical",
}

@Article{Furlong:1990:DD,
  author =       "Thomas C. Furlong and Michael J. K. Nielsen and Neil
                 C. Wilhelm",
  title =        "Development of the {DECstation} 3100",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "2",
  pages =        "84--88",
  month =        "Spring",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The DECstation 3100 is the first member of Digital's
                 family of high-performance ULTRIX workstations. Built
                 with the R2000 chip set from MIPS Computer Systems
                 Inc., and highly integrated I/O and graphics
                 subsystems, the DECstation 3100 implements 12 mips of
                 RISC-based computing, workstation I/O, and excellent
                 bit-map graphics on a single module. The DECstation
                 3100 workstation runs Digital's ULTRIX operating system
                 (compatible with UNIX software) as well as DECwindows
                 software, TCP/IP, DECnet software, and Network File
                 Service (NFS). The workstation can be configured with 8
                 MB to 24 MB of parity-protected memory, monochrome or
                 8-plane color graphics, 15-inch or 19-inch monitors,
                 and SCSI disk and tape devices. This paper describes
                 the DEC station 3100 product, the design effort,
                 details of the system, and measured benchmark
                 performance.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5430 (Microcomputers)",
  classification = "C5430 (Microcomputers)",
  keywords =     "12 MIPS; 8 to 24 MByte; 8 To 24 MByte; DEC computers;
                 DECstation 3100; DECwindows software; Graphics
                 subsystems; graphics subsystems; Network File Service;
                 parity-; Parity-protected memory; protected memory;
                 R2000 chip set; RISC-based computing; SCSI disk;
                 TCP/IP; ULTRIX workstations; UNIX software;
                 workstations",
  numericalindex = "Computer execution rate 1.2E+07 IPS; Memory size
                 8.4E+06 to 2.5E+07 Byte",
  thesaurus =    "DEC computers; Workstations",
  treatment =    "P Practical",
}

@Article{Weber:1990:COR,
  author =       "Larry B. Weber",
  title =        "Compiler optimization in {RISC} systems",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "2",
  pages =        "89--95",
  month =        "Spring",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "Compiler optimization determines the level of RISC
                 system performance. The architecture design of
                 compilers from MIPS Computer Systems, Inc. combined
                 with support tools facilitates compiler optimization
                 and overall system throughput. The compiler design
                 takes advantage of small and high-speed cache memory to
                 enhance performance. The cord tool positions the
                 program in memory to ensure that the most frequently
                 used memory locations never compete for the same cache
                 locations. Portability is crucial to compiler
                 effectiveness. MIPS compilers implement many
                 industry-wide extensions to the standard languages to
                 make them compatible with other implementations.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6150J (Operating systems); C5220 (Computer
                 architecture)",
  classification = "C5220 (Computer architecture); C6150J (Operating
                 systems)",
  keywords =     "cache memory; Cache memory; Compiler optimisation;
                 compiler optimisation; memory locations; Memory
                 locations; Performance; performance; program compilers;
                 reduced instruction set computing; RISC systems",
  thesaurus =    "Program compilers; Reduced instruction set computing",
  treatment =    "P Practical",
}

@Article{McGregor:1990:ODA,
  author =       "S. A. McGregor",
  title =        "An overview of the {DECwindows} architecture",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "3",
  pages =        "9--15",
  month =        "Summer",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The DECwindows architecture builds on industry
                 standards and adds enhancements to provide greater
                 performance and reliability in the window environment.
                 The architecture is based on the X Window System
                 developed at MIT, which consists of three main
                 components-the X server, Xlib, and the toolkit
                 intrinsics. The DECwindows implementation extends X in
                 several ways. DECwindows uses algorithms that expose
                 additional interfaces, supports a broader choice of
                 programming languages, provides a complete set of tools
                 for application development, and promotes ease of use
                 and user-interface consistency by means of a style
                 guide. In addition, the DECwindows architecture
                 includes industry-standard interfaces and extends the
                 server to take advantage of PostScript,
                 three-dimensional graphics, and imaging.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6180 (User interfaces); C6130B (Graphics techniques);
                 C6150J (Operating systems)",
  classification = "C6130B (Graphics techniques); C6150J (Operating
                 systems); C6180 (User interfaces)",
  keywords =     "application development; Application development;
                 computer graphics; consistency; DEC computers;
                 DECwindows architecture; ease of use; Ease of use;
                 imaging; Imaging; Industry-standard interfaces;
                 industry-standard interfaces; interfaces;
                 multiprogramming; PostScript; Programming languages;
                 programming languages; Style guide; style guide;
                 System; Three-dimensional graphics; three-dimensional
                 graphics; toolkit; Toolkit; user; user-interface;
                 User-interface consistency; window environment; Window
                 environment; X server; X Window; X Window System;
                 Xlib",
  thesaurus =    "Computer graphics; DEC computers; Multiprogramming;
                 User interfaces",
  treatment =    "P Practical",
}

@Article{Angebranndt:1990:SXS,
  author =       "S. Angebranndt and T. D. Newman",
  title =        "The sample {X11} server architecture",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "3",
  pages =        "16--23",
  month =        "Summer",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The X11 protocol is the backbone of Digital's
                 DECwindows program. The sample server is an
                 implementation of the protocol. The server was
                 developed by Digital and has become the basis for all
                 digital product servers. As part of Digital's
                 commitment to support open system standards within the
                 industry, the server code was donated to MIT. Because
                 the software is now publicly available, the server is
                 the starting point for the X server product
                 implementations for all other vendors. The paper
                 describes the architecture of the sample server and
                 comments on the implementation.",
  acknowledgement = ack-nhfb,
  classcodes =   "B6210L (Computer communications); C5620 (Computer
                 networks and techniques); C6150J (Operating systems);
                 C6180 (User interfaces); C6130B (Graphics techniques)",
  classification = "B6210L (Computer communications); C5620 (Computer
                 networks and techniques); C6130B (Graphics techniques);
                 C6150J (Operating systems); C6180 (User interfaces)",
  keywords =     "computer graphics; DEC computers; DECwindows;
                 DECwindows program; Digital; file servers;
                 multiprogramming; open system standards; Open system
                 standards; program; protocols; Sample X11 server
                 architecture; sample X11 server architecture; user
                 interfaces; X server; X11 protocol",
  thesaurus =    "Computer graphics; DEC computers; File servers;
                 Multiprogramming; Protocols; User interfaces",
  treatment =    "P Practical",
}

@Article{Treggiari:1990:DXT,
  author =       "L. P. Treggiari and M. D. Collins",
  title =        "Development of the {XUI} toolkit",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "3",
  pages =        "24--33",
  month =        "Summer",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The XUI toolkit is a set of run-time routines and
                 application development tools based upon the X Window
                 System version 11 (X11). A programmer can use these
                 tools to create application programs that implement the
                 user interface techniques and appearance guidelines
                 used by a DECwindows system. The toolkit was developed
                 in parallel with the X toolkit intrinsics and is
                 layered on top of the intrinsics. Within the
                 architecture, no layer is hidden from another layer.
                 Programmers can mix calls to all layers. Because of the
                 toolkit's maturity, performance, and adherence to
                 standards in its design, XUI was chosen as the base
                 programming interface for the Open Software
                 Foundation's Motif toolkit.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6115 (Programming support); C6180 (User interfaces);
                 C6150J (Operating systems)",
  classification = "C6115 (Programming support); C6150J (Operating
                 systems); C6180 (User interfaces)",
  keywords =     "appearance guidelines; Appearance guidelines;
                 application development; Application development tools;
                 Application programs; application programs; DECwindows;
                 DECwindows system; Motif toolkit; multiprogramming;
                 Programming interface; programming interface; run-time
                 routines; Run-time routines; software tools; system;
                 tools; user interface techniques; User interface
                 techniques; user interfaces; X Window System version
                 11; XUI toolkit",
  thesaurus =    "Multiprogramming; Software tools; User interfaces",
  treatment =    "P Practical",
}

@Article{Greenwood:1990:DUI,
  author =       "S. R. Greenwood",
  title =        "The {DECwindows} user interface language",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "3",
  pages =        "34--43",
  month =        "Summer",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "A key theme of the DECwindows program is to improve
                 productivity for both the end user and the developer of
                 an application. End user productivity can improve
                 through the use of a windowing environment; the
                 developers' productivity is improved by the
                 availability of a high-level set of constructs for
                 building a windowing application. The user interface
                 language (UIL) plays an important role in enhancing
                 productivity. UIL significantly reduces the cost to
                 build and maintain DECwindows applications by providing
                 a specification language for describing an application
                 interface. The paper analyzes the motivation for
                 developing UIL, its key features, several interesting
                 implementation issues, and possible future directions
                 for the language and the product.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6180 (User interfaces); C6140D (High level
                 languages); C6150J (Operating systems)",
  classification = "C6140D (High level languages); C6150J (Operating
                 systems); C6180 (User interfaces)",
  keywords =     "application interface; Application interface; DEC
                 computers; DECwindows user interface language;
                 directions; future; Future directions; high-level set
                 of constructs; High-level set of constructs;
                 multiprogramming; specification language; Specification
                 language; specification languages; user interfaces;
                 Windowing application; windowing application; Windowing
                 environment; windowing environment",
  thesaurus =    "DEC computers; Multiprogramming; Specification
                 languages; User interfaces",
  treatment =    "P Practical",
}

@Article{Spine:1990:EXU,
  author =       "T. M. Spine and J. L. VanNoy",
  title =        "The evolution of the {X} user interface style",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "3",
  pages =        "44--51",
  month =        "Summer",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The X user interface (XUI) was a key element of the
                 DECwindows program version 1.0. XUI changed Digital's
                 approach to modern, graphic, direct-manipulation user
                 interfaces and consistency across applications. The XUI
                 style provides a consistent means of user interaction
                 across the VMS, ULTRIX, and MS-DOS operating systems
                 and the applications available on these operating
                 system platforms. The design was used by the developers
                 of the XUI toolkit, as well as application designers.
                 Further, detailed attention to the iterative
                 development of an application's graphic user interface
                 is now a standard aspect of the software development
                 process.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6180 (User interfaces); C6130B (Graphics techniques);
                 C6150J (Operating systems)",
  classification = "C6130B (Graphics techniques); C6150J (Operating
                 systems); C6180 (User interfaces)",
  keywords =     "computer graphics; DECwindows program; direct-;
                 Direct-manipulation user interfaces; graphic user;
                 Graphic user interface; interface; manipulation user
                 interfaces; MS-DOS; multiprogramming; Operating
                 systems; operating systems; software development;
                 Software development; ULTRIX; User interaction; user
                 interaction; user interfaces; VMS; X user interface
                 style; XUI toolkit",
  thesaurus =    "Computer graphics; Multiprogramming; User interfaces",
  treatment =    "P Practical",
}

@Article{Rost:1990:PNT,
  author =       "R. J. Rost and J. D. Friedberg and P. L. Nishimoto",
  title =        "{PEX}: a network-transparent three-dimensional
                 graphics system",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "3",
  pages =        "52--63",
  month =        "Summer",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "PEX is an extension to the X Window System that is
                 designed to efficiently support PHIGS and much of the
                 functionality in the proposed PHIGS+extension to PHIGS.
                 PEX allows each window on the screen display to act as
                 a complete, independent, virtual three-dimensional
                 graphics workstation. the paper presents a brief
                 overview of PEX and describes how it fits into the
                 network environment of X. In addition, the paper gives
                 some details about X and PHIGS and discusses the major
                 design decisions made during the PEX design, as well as
                 the ramifications of those decisions. The intent is to
                 share some of the things designers learned in their
                 effort to unify the different environments of X and
                 PHIGS.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6180 (User interfaces); C6130B (Graphics techniques);
                 C6150J (Operating systems)",
  classification = "C6130B (Graphics techniques); C6150J (Operating
                 systems); C6180 (User interfaces)",
  keywords =     "computer graphics; multiprogramming; network
                 operating; network-transparent three-dimensional
                 graphics system; Network-transparent three-dimensional
                 graphics system; PEX; PHIGS+extension; screen display;
                 Screen display; systems; user interfaces; virtual
                 three-dimensional graphics workstation; Virtual
                 three-dimensional graphics workstation; window; Window;
                 X Window System",
  thesaurus =    "Computer graphics; Multiprogramming; Network operating
                 systems; User interfaces",
  treatment =    "P Practical",
}

@Article{Kent:1990:XDP,
  author =       "C. A. Kent",
  title =        "{XDPS}: a {Display PostScript System} extension for
                 {DECwindows}",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "3",
  pages =        "64--73",
  month =        "Summer",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "XDPS extends the Display PostScript System into the
                 DECwindows environment. The extension integrates the
                 capabilities of both the X imaging model within
                 DECwindows and the PostScript language for screen
                 display-Display PostScript. Designers resolved
                 differences between X and PostScript systems in order
                 to add a complete PostScript interpreter to the
                 DECwindows server and a protocol that defines
                 application access. Most significant among the
                 differences encountered was each system's approach to
                 graphical attributes, coordinate systems, color
                 strategies, and communications models. In their
                 implementation of the extension protocol and merger of
                 the two graphics systems, the designers' overall goal
                 was to provide applications programmers the best
                 features of each system without imposing constraints on
                 their use.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6140D (High level languages); C6150J (Operating
                 systems); C6130B (Graphics techniques); C6180 (User
                 interfaces)",
  classification = "C6130B (Graphics techniques); C6140D (High level
                 languages); C6150J (Operating systems); C6180 (User
                 interfaces)",
  keywords =     "application access; Application access; attributes;
                 color strategies; Color strategies; communications
                 models; Communications models; computer graphics;
                 coordinate systems; Coordinate systems; DECwindows;
                 DECwindows environment; DECwindows server; display;
                 Display PostScript; Display PostScript System
                 extension; environment; graphical; Graphical
                 attributes; graphics systems; Graphics systems; high
                 level languages; multiprogramming; PostScript
                 interpreter; PostScript language; protocol; Protocol;
                 screen; Screen display; user interfaces; X imaging
                 model; XDPS",
  thesaurus =    "Computer graphics; High level languages;
                 Multiprogramming; User interfaces",
  treatment =    "P Practical",
}

@Article{Ryan:1990:DDV,
  author =       "M. R. Ryan and J. H. VanGilder",
  title =        "The development of {DECwindows VMS} mail",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "3",
  pages =        "74--83",
  month =        "Summer",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "In the DECwindows program, the windowing interface to
                 the VMS mail utility demonstrates the power of
                 window-based user interfaces. Users can access mail
                 from either character-cell terminals or workstations,
                 exchange mail between all Digital systems, and exchange
                 compound documents. DEC windows VMS mail also supports
                 a common user interface with its counterpart on the
                 ULTRIX system. The development of DEC windows VMS mail
                 illustrates many of the issues faced in developing
                 DECwindows applications of moderate size. Further, the
                 development exemplifies the more general problems
                 encountered by developers who most integrate
                 applications with components which are themselves in
                 initial development stages.",
  acknowledgement = ack-nhfb,
  classcodes =   "B6210G (Electronic mail); C7100 (Business and
                 administration)C6150J (Operating systems); C6180 (User
                 interfaces)",
  classification = "B6210G (Electronic mail); C6150J (Operating
                 systems); C6180 (User interfaces); C7100 (Business and
                 administration)",
  keywords =     "Character-cell terminals; character-cell terminals;
                 common; Common user interface; compound documents;
                 Compound documents; DEC computers; DEC windows VMS
                 mail; Digital; Digital systems; electronic mail;
                 interfaces; multiprogramming; systems; ULTRIX system;
                 user; user interface; VMS mail utility; window-based
                 user; Window-based user interfaces; windowing
                 interface; Windowing interface; workstations;
                 Workstations",
  thesaurus =    "DEC computers; Electronic mail; Multiprogramming; User
                 interfaces",
  treatment =    "P Practical",
}

@Article{Mirchandani:1990:EPR,
  author =       "D. Mirchandani and P. Biswas",
  title =        "Ethernet performance of remote {DECwindows}
                 applications",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "3",
  pages =        "84--94",
  month =        "Summer",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "In Digital's windowed computing system, the Ethernet
                 is the communication medium for both DECwindows traffic
                 and remote disk I/O traffic. This level of traffic
                 prompted a study to investigate whether or not the
                 Ethernet would be a system-level bottleneck for
                 DECwindows applications. The methodology developed
                 characterizes the Ethernet traffic generated by a
                 DECwindows application executing remotely on the
                 workstations in a local area VAXcluster. A simulation
                 model was used to predict the Ethernet performance of a
                 large cluster running this application and a range of
                 other hypothetical remote DECwindows applications. The
                 results of this study can be extended in many ways and
                 should be of interest to those involved in sizing local
                 area clusters running remote DECwindows applications.",
  acknowledgement = ack-nhfb,
  classcodes =   "B6210L (Computer communications); C5620L (Local area
                 networks); C6180 (User interfaces); C6150J (Operating
                 systems)",
  classification = "B6210L (Computer communications); C5620L (Local area
                 networks); C6150J (Operating systems); C6180 (User
                 interfaces)",
  keywords =     "area clusters; DEC computers; DECwindows traffic;
                 Ethernet; Ethernet performance; Ethernet traffic;
                 interfaces; large cluster; Large cluster; local; Local
                 area clusters; local area networks; Local area
                 VAXcluster; local area VAXcluster; model;
                 multiprogramming; Predict; predict; remote DECwindows
                 applications; Remote DECwindows applications; Remote
                 disk I/O traffic; remote disk I/O traffic; simulation;
                 Simulation model; traffic; user; Workstations;
                 workstations",
  thesaurus =    "DEC computers; Local area networks; Multiprogramming;
                 User interfaces",
  treatment =    "P Practical",
}

@Article{Fite:1990:DSV,
  author =       "D. B. {Fite, Jr.} and T. Fossum and D. Manley",
  title =        "Design strategy for the {VAX 9000} system",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "4",
  pages =        "13--24",
  month =        "Fall",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The VAX 9000 system is Digital's newest high-end
                 processor in the VAX family. This paper describes the
                 design strategy used to achieve high performance and
                 shows how RISC concepts were applied to a CISC
                 architecture. New opportunities for parallelism in VAX
                 program execution were found by breaking the VAX
                 instructions into simple tasks which could be pipelined
                 efficiently. By using independent, dedicated pipeline
                 stages, execution rates approach one instruction per
                 cycle.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "C5420 (Mainframes and minicomputers); C5440
                 (Multiprocessor systems and techniques); C5220
                 (Computer architecture)",
  classification = "C5220 (Computer architecture); C5420 (Mainframes and
                 minicomputers); C5440 (Multiprocessor systems and
                 techniques)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "architecture; CISC; CISC architecture; DEC computers;
                 Design strategy; design strategy; instruction set
                 computing; mainframes; parallel processing;
                 parallelism; Parallelism; reduced; RISC; VAX 9000
                 system",
  thesaurus =    "DEC computers; Mainframes; Parallel processing;
                 Reduced instruction set computing",
  treatment =    "P Practical",
}

@Article{Murray:1990:VII,
  author =       "J. E. Murray and R. C. Hetherington and R. M. Salett",
  title =        "{VAX} instructions that illustrate the architectural
                 features of the {VAX 9000 CPU}",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "4",
  pages =        "25--42",
  month =        "Fall",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The VAX 9000 system is Digital's largest and most
                 powerful VAX system. As such, it offers many unique
                 features that required the use of advanced technology
                 and innovative architecture in the design of the
                 system. Overall, the VAX 9000 micro architecture
                 produces a high level of system performance and the
                 lowest cycle time of any VAX processor, i.e. less than
                 five cycles per instruction. Three sections of the VAX
                 9000 CPU-the instruction fetch and decode unit (I-box),
                 the execution unit (E-box), and the data cache and main
                 memory interface unit (M-box)-are illustrated in this
                 paper through descriptions of a small sample of VAX
                 instructions. These instructions are discussed in
                 relation to their flow through the pipeline, how their
                 architectural features combine to work on a single
                 macro instruction, and how various stages of the
                 pipeline interact.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "C5420 (Mainframes and minicomputers); C5220 (Computer
                 architecture)",
  classification = "C5220 (Computer architecture); C5420 (Mainframes and
                 minicomputers)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "9000 CPU; architectural features; Architectural
                 features; computer architecture; data cache; Data
                 cache; DEC computers; Decode unit; decode unit;
                 Execution unit; execution unit; Instruction fetch;
                 instruction fetch; instruction sets; main memory
                 interface unit; Main memory interface unit; mainframes;
                 Micro architecture; micro architecture; System
                 performance; system performance; VAX; VAX 9000 CPU; VAX
                 instructions",
  thesaurus =    "Computer architecture; DEC computers; Instruction
                 sets; Mainframes",
  treatment =    "P Practical",
}

@Article{Adiletta:1990:STH,
  author =       "M. J. Adiletta and R. L. Doucette and J. H. Hackenberg
                 and D. H. Leuthold and D. M. Litwinetz",
  title =        "Semiconductor technology in a high-performance {VAX}
                 system",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "4",
  pages =        "43--60",
  month =        "Fall",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The VAX 9000 system is the newest number of Digital's
                 VAX family of computer systems. The 9000 is a
                 high-performance ECL processor, with a very fast,
                 16-nanosecond cycle time. To achieve this high level of
                 performance, a new generation of semicustom and custom
                 integrated circuits was required for the scalar CPU and
                 the vector processing option. Goals for circuit
                 density, performance, and skew maintenance were
                 fulfilled with the development of a high-speed gate
                 array, special custom chips used in key applications,
                 and a high-speed RAM employing a new architecture.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "B2570 (Semiconductor integrated circuits); C5420
                 (Mainframes and minicomputers)",
  classification = "B2570 (Semiconductor integrated circuits); C5420
                 (Mainframes and minicomputers)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "circuit density; Circuit density; DEC computers; ECL
                 processor; gate array; Gate array; high-performance;
                 High-performance VAX system; high-speed RAM; High-speed
                 RAM; integrated circuit technology; mainframes;
                 semiconductor technology; Semiconductor technology;
                 skew maintenance; Skew maintenance; VAX 9000 system;
                 VAX system",
  thesaurus =    "DEC computers; Integrated circuit technology;
                 Mainframes",
  treatment =    "P Practical",
}

@Article{Brunner:1990:VPV,
  author =       "R. A. Brunner and D. P. Bhandarkar and F. X. McKeen
                 and B. Patel and W. J. {Rogers, Jr.} and G. L. Yoder",
  title =        "Vector processing on the {VAX 9000} system",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "4",
  pages =        "61--79",
  month =        "Fall",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The VAX 9000 system provides the first emitter-coupled
                 logic (ECL) implementation of the VAX vector
                 architecture. The optional vector processor on the VAX
                 9000 system addresses the computing needs of
                 numerically intensive applications with a peak
                 performance of 125 MFLOPS for double-precision
                 calculations. The innovative design of the vector
                 register file allows the vector processor to overlap
                 the execution of up to three vector instructions.
                 Supported by both the VMS and ULTRIX operating systems,
                 the vector processor on the VAX 9000 system provides
                 four to five times performance improvement for
                 vectorizable applications over its scalar processor.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "C5420 (Mainframes and minicomputers); C5220 (Computer
                 architecture)",
  classification = "C5220 (Computer architecture); C5420 (Mainframes and
                 minicomputers)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "125 MFLOPS; DEC computers; Emitter-coupled logic;
                 emitter-coupled logic; mainframes; operating systems;
                 parallel architectures; ULTRIX; ULTRIX operating
                 systems; VAX 9000 system; vector architecture; Vector
                 architecture; vector register file; Vector register
                 file; VMS",
  numericalindex = "Computer speed 1.25E+08 FLOPS",
  thesaurus =    "DEC computers; Mainframes; Parallel architectures",
  treatment =    "P Practical",
}

@Article{Dunbeck:1990:HMU,
  author =       "P. B. Dunbeck and R. J. Dischler and J. B. McElroy and
                 F. J. Swiatowiec",
  title =        "{HDSC} and multichip unit design and manufacture",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "4",
  pages =        "80--89",
  month =        "Fall",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The VAX 9000 system effectively integrates
                 state-of-the-art packaging and interconnects with
                 advanced integrated circuits to achieve a short machine
                 cycle time (16 nanoseconds) and a high rate of
                 instruction execution. To meet high-frequency
                 electrical signal and pin count requirements for the
                 system, engineers chose tape automated bonding
                 technology and consequently conceived and developed the
                 high-density signal carrier (HDSC). The HDSC offers
                 densities three to five times greater than conventional
                 printed circuit boards. This unique technology is
                 manufactured using semiconductor and advanced printed
                 circuit board techniques. The HDSC is at the heart of
                 the multichip unit, a high-performance logic module,
                 with which the VAX 9000 CPUs and system control unit
                 are constructed.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "B2240 (Microassembly techniques); B0170J (Product
                 packaging); C5420 (Mainframes and minicomputers)",
  classification = "B0170J (Product packaging); B2240 (Microassembly
                 techniques); C5420 (Mainframes and minicomputers)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "board techniques; count requirements; DEC computers;
                 HDSC; high density signal carrier; High density signal
                 carrier; interconnects; Interconnects; lead bonding;
                 mainframes; Manufacture; manufacture; multichip;
                 Multichip unit design; packaging; Packaging; packaging;
                 pin; Pin count requirements; printed circuit; Printed
                 circuit board techniques; system control unit; System
                 control unit; tape automated bonding; Tape automated
                 bonding; unit design",
  thesaurus =    "DEC computers; Lead bonding; Mainframes; Packaging",
  treatment =    "P Practical",
}

@Article{Goldman:1990:VSP,
  author =       "M. S. Goldman and P. H. Dormitzer and P. A. Leveille",
  title =        "The {VAX 9000} service processor unit",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "4",
  pages =        "90--101",
  month =        "Fall",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The VAX 9000 service processor unit provides the
                 front-end services needed to support a highly available
                 and reliable mainframe system. The unit is closely
                 linked to the VAX 9000 system to provide realtime
                 detection and recovery of system failures. However, the
                 unit is independent enough to be isolated for
                 maintenance without affecting normal system processor
                 operation. This combination is a first for VAX systems.
                 The service processor also provides various debugging
                 features that were essential for development and early
                 manufacture of the VAX 9000 system. These features
                 utilize a system-wide scan architecture to achieve
                 direct access to machine-state, which provides
                 extensive visibility and control of system logic
                 functions. The inclusion and use of such a scan
                 architecture is a new feature for a Digital
                 processor.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "C5420 (Mainframes and minicomputers); C5220 (Computer
                 architecture)",
  classification = "C5220 (Computer architecture); C5420 (Mainframes and
                 minicomputers)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "computer architecture; debugging features; Debugging
                 features; DEC computers; front-end; Front-end services;
                 logic functions; mainframes; Realtime detection;
                 realtime detection; Recovery; recovery; scan
                 architecture; Scan architecture; services; system;
                 system failures; System failures; System logic
                 functions; system-wide scan architecture; System-wide
                 scan architecture; VAX 9000 service processor unit",
  thesaurus =    "Computer architecture; DEC computers; Mainframes",
  treatment =    "P Practical",
}

@Article{Chin:1990:UFV,
  author =       "D. J. Chin and B. G. Brown and C. F. Butala and L. L.
                 Chang and S. J. Chenetz and G. E. Cotter and B. T.
                 Lynch and T. Natarajan and L. J. Salafia",
  title =        "The unique features of the {VAX 9000} power system
                 design",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "4",
  pages =        "102--117",
  month =        "Fall",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The VAX 9000 series represents Digital's first
                 implementation of a mainframe computer system. To be
                 competitive in this market, the power system for the
                 VAX 9000 series had to provide high system
                 availability. To meet this goal, the system includes
                 features neither considered nor found in previous large
                 Digital computer systems. Some of these features are
                 the use of redundancy in parts of the design and the
                 addition of more power system diagnosis capability for
                 quicker fault isolation and faulty unit replacement.
                 Other features provide competitive advantages in
                 specific marketplaces, such as meeting low harmonic
                 distortion for AC input current, which is an emerging
                 European AC power quality standard. Simulation tools,
                 which are used more prevalently in digital logic, were
                 used to improve the power design.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "B1210 (Power electronics, supply and supervisory
                 circuits); C5420 (Mainframes and minicomputers); C5150
                 (Other circuits for digital computers)",
  classification = "B1210 (Power electronics, supply and supervisory
                 circuits); C5150 (Other circuits for digital
                 computers); C5420 (Mainframes and minicomputers)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "DEC computers; Fault isolation; fault isolation;
                 mainframes; power supplies to apparatus; power supply
                 circuits; power system design; Power system design;
                 redundancy; Redundancy; simulation tools; Simulation
                 tools; unique features; Unique features; VAX 9000",
  thesaurus =    "DEC computers; Mainframes; Power supplies to
                 apparatus; Power supply circuits",
  treatment =    "P Practical",
}

@Article{Hooper:1990:SCS,
  author =       "D. F. Hooper and J. C. Eck",
  title =        "Synthesis in the {CAD} system used to design the {VAX}
                 9000 system",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "4",
  pages =        "118--129",
  month =        "Fall",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The design of the VAX 9000 system represents a sixfold
                 increase in complexity over the VAX 8600/8650 system.
                 This increased complexity posed a significant challenge
                 because of the concurrent need to shorten the duration
                 of the project design cycle and convert all
                 high-performance systems computer-aided design (CAD)
                 software from the DECSYSTEM-20 system to the VAX
                 system. As part of the task of meeting these
                 challenges, the CAD Group proposed the implementation
                 of a design methodology that used logic synthesis for
                 the first time in the development of a major product
                 for Digital. The primary objectives of this methodology
                 were to increase the productivity of the logic
                 designers and to reduce the number of errors introduced
                 during conversion of high-level designs into gate-level
                 structural designs.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "B1265B (Logic circuits); C5210B (Computer-aided logic
                 design)C5420 (Mainframes and minicomputers)",
  classification = "B1265B (Logic circuits); C5210B (Computer-aided
                 logic design); C5420 (Mainframes and minicomputers)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "CAD system; DEC computers; gate-level structural
                 designs; Gate-level structural designs; High-level
                 designs; high-level designs; logic; logic CAD; Logic
                 synthesis; mainframes; Project design cycle; project
                 design cycle; synthesis; VAX 9000 system",
  thesaurus =    "DEC computers; Logic CAD; Mainframes",
  treatment =    "P Practical",
}

@Article{Barnard:1990:HFD,
  author =       "K. E. Barnard and R. P. Harokopus",
  title =        "Hierarchical fault detection and isolation strategy
                 for the {VAX 9000} system",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "4",
  pages =        "130--141",
  month =        "Fall",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The VAX 9000 system was designed to compete in the
                 mainframe market. Mainframe customers not only require
                 high processor performance and throughput, but also a
                 system which is reliable and always available. This
                 paper demonstrates how the newly implemented scan
                 system, in conjunction with scan pattern testing and
                 symptom-directed diagnosis (SDD), is essential to
                 satisfy these needs. SDD is the use of on-line error
                 detectors and state information saved at the time of an
                 error to isolate the fault that caused the error. The
                 scan system of the VAX 9000 system allows individual
                 state elements in the processor to be set and sensed,
                 and is the basis for fault detection and isolation.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "C5420 (Mainframes and minicomputers); C5470
                 (Performance evaluation and testing)",
  classification = "C5420 (Mainframes and minicomputers); C5470
                 (Performance evaluation and testing)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "computers; DEC; DEC computers; fault tolerant
                 computing; Hierarchical fault detection; hierarchical
                 fault detection; high; High processor performance;
                 Isolation strategy; isolation strategy; mainframes;
                 Online error detection; online error detection;
                 processor performance; scan pattern testing; Scan
                 pattern testing; Scan system; scan system; state
                 elements; State elements; Symptom-directed diagnosis;
                 symptom-directed diagnosis; VAX 9000 system",
  thesaurus =    "DEC computers; Fault tolerant computing; Mainframes",
  treatment =    "P Practical",
}

@Article{Anonymous:1991:EIa,
  author =       "Anonymous",
  title =        "Editors Introduction",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "1",
  pages =        "??--??",
  month =        "Winter",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Jan 04 06:22:45 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/tp-introduction.txt",
  acknowledgement = ack-nhfb,
}

@Article{Bernstein:1991:DDD,
  author =       "Philip A. Bernstein and William T. Emberton and Vijay
                 Treba",
  title =        "{DECdta} --- Digital's Distributed Transaction
                 Processing Architecture",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "1",
  pages =        "10--17",
  month =        "Winter",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n1/DECdta_Digitals_Distribute_01oct1991DTJ101P8.ps;
                 http://www.digital.com:80/info/DTJ101/DTJ101SC.TXT",
  abstract =     "Digital's Distributed Transaction Processing
                 Architecture (DECdta) describes the modules and
                 interfaces that are common to Digital's transaction
                 processing (DECtp) products. The architecture allows
                 easy distribution of DECtp products. In particular, it
                 supports client\slash server style applications.
                 Distributed transaction management is the main function
                 that ties DECdta modules together. It ensures that
                 application programs, database systems, and other
                 resource managers interoperate reliably in a
                 distributed system.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "C6150J (Operating systems)",
  classification = "C6150J (Operating systems)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "DECdta; distributed; Distributed architecture;
                 distributed architecture; distributed processing;
                 Distributed system; distributed transaction;
                 Distributed transaction processing architecture;
                 processing architecture; system; transaction
                 processing; Transaction processing; transaction
                 processing",
  thesaurus =    "Distributed processing; Transaction processing",
  treatment =    "P Practical",
}

@Article{Speer:1991:DTP,
  author =       "Thomas G. Speer and Mark W. Storm",
  title =        "{Digital}'s Transaction Processing Monitors",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "1",
  pages =        "18--32",
  month =        "Winter",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "/usr/local/src/bib/bibliography/Database/Graefe.bib;
                 http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n1/Digitals_Transaction_Processi_01oct1991DTJ102P8.ps;
                 http://www.digital.com:80/info/DTJ102/DTJ102SC.TXT",
  abstract =     "Digital provides two transaction processing (TP)
                 monitor products --- ACMS (Application Control and
                 Management System) and DECintact (Integrated
                 Application Control). Each monitor is a unified set of
                 transaction processing services for the application
                 environment. These services are layered on the VMS
                 operating system. Although there is a large functional
                 overlap between the two, both products achieve similar
                 goals by means of some significantly different
                 implementation strategies. Flow control and
                 multithreading in the ACMS monitor is managed by means
                 of a fourth-generation language (4GL) task definition
                 language. Flow control and multithreading in the
                 DECintact monitor is managed at the application level
                 by third-generation language (3GL) calls to a library
                 of services. The ACMS monitor supports a deferred task
                 model of queuing, and the DECintact monitor supports a
                 message-based model. Over time, the persistent
                 distinguishing feature between the two monitors will be
                 their different application programming inter faces.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "C6150J (Operating systems)",
  classification = "C6150J (Operating systems)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "ACMS; Application; Application Control; Application
                 Control and Management System; Application programming
                 interfaces; application programming interfaces; Control
                 and Management System; DECintact; Digital; Integrated;
                 Integrated Application Control; message-based model;
                 Message-based model; monitors; Monitors;
                 Multithreading; multithreading; Queuing; queuing;
                 supervisory programs; task definition language; Task
                 definition language; transaction processing;
                 Transaction processing; transaction processing; VMS
                 operating system",
  thesaurus =    "Supervisory programs; Transaction processing",
  treatment =    "P Practical",
}

@Article{Laing:1991:TMS,
  author =       "William A. Laing and James E. Johnson and Robert V.
                 Landau",
  title =        "Transaction Management Support in the {VMS} Operating
                 System Kernal",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "1",
  pages =        "33--44",
  month =        "Winter",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "/usr/local/src/bib/bibliography/Database/Graefe.bib;
                 http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n1/Transaction_Management_Suppor_01oct1991DTJ103P8.ps;
                 http://www.digital.com:80/info/DTJ103/DTJ103SC.TXT",
  abstract =     "Distributed transaction management support is an
                 enhancement to the VMS operating system. This support
                 provides services in the VMS operating system for
                 atomic transactions that may span multiple resource
                 managers, such as those for flat files, net work
                 databases, and relational databases. These transactions
                 may also be distributed across multiple nodes in a
                 network, independent of the communications mechanisms
                 used by either the application programs or the resource
                 managers. The Digital distributed transaction manager
                 (DECdtm) services implement an optimized variant of the
                 two phase commit protocol to ensure transaction
                 atomicity. Additionally, these services take advantage
                 of the unique VAXcluster capabilities to greatly reduce
                 the potential for blocking that occurs with the
                 traditional two-phase commit protocol. These features,
                 now part of the VMS operating system, are readily
                 available to multiple resource managers and to many
                 applications outside the traditional transaction
                 processing monitor environment.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "C6150J (Operating systems)",
  classification = "C6150J (Operating systems)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "Atomic transactions; atomic transactions; databases;
                 DECdtm; distributed processing; Flat files; flat files;
                 managers; multiple resource; Multiple resource
                 managers; Network databases; network databases;
                 operating system; Operating system kernel; operating
                 system kernel; operating systems (computers);
                 relational; Relational databases; transaction
                 management support; Transaction management support;
                 transaction processing; VMS; VMS operating system",
  thesaurus =    "Distributed processing; Operating systems [computers];
                 Transaction processing",
  treatment =    "P Practical",
}

@Article{Kohler:1991:PET,
  author =       "Walter H. Kohler and Yun-Ping Hsu and Thomas K. Rogers
                 and Wael H. Bahaa-El-Din",
  title =        "Performance Evaluation of Transaction Processing
                 Systems",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "1",
  pages =        "45--58 (or 45--57??)",
  month =        "Winter",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "/usr/local/src/bib/bibliography/Database/Graefe.bib;
                 http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n1/Performance_Evaluation_of_Tran_01oct1991DTJ104P8.ps;
                 http://www.digital.com:80/info/DTJ104/DTJ104SC.TXT",
  abstract =     "Performance and price/performance are important
                 attributes to consider when evaluating a transaction
                 processing system. Two major approaches to performance
                 evaluation are measurement and modeling. TPC Benchmark
                 A is an industry standard benchmark for measuring a
                 transaction processing system's performance and
                 price/performance. Digital has implemented TPC
                 Benchmark A in a distributed transaction processing
                 environment. Benchmark measurements were performed on
                 the VAX 9000 Model 210 and the VAX 4000 Model 300
                 systems. Further, a comprehensive analytical model was
                 developed and customized to model the performance
                 behavior of TPC Benchmark A on Digital's transaction
                 processing platforms. This model was validated using
                 measurement results and has proven to be an accurate
                 performance prediction tool.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "C6150G (Diagnostic, testing, debugging and evaluating
                 systems); C6150J (Operating systems)",
  classification = "C6150G (Diagnostic, testing, debugging and
                 evaluating systems); C6150J (Operating systems)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "Benchmark A; Distributed transaction processing
                 environment; distributed transaction processing
                 environment; performance evaluation; Performance
                 evaluation; performance evaluation; TPC; TPC Benchmark
                 A; transaction processing; Transaction processing;
                 transaction processing; VAX 4000 Model 300; VAX 9000
                 Model 210",
  thesaurus =    "Performance evaluation; Transaction processing",
  treatment =    "P Practical",
}

@Article{Zahavi:1991:TTP,
  author =       "William Z. Zahavi and Frances A. Habib and Kenneth J.
                 Omahen",
  title =        "Tools and Techniques for Preliminary Sizing of
                 Transaction Processing Applications",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "1",
  pages =        "58--64",
  month =        "Winter",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "/usr/local/src/bib/bibliography/Database/Graefe.bib;
                 http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n1/Tools_and_Techniques_for_Preli_01oct1991DTJ105P8.ps;
                 http://www.digital.com:80/info/DTJ105/DTJ105SC.TXT",
  abstract =     "Sizing transaction processing systems correctly is a
                 difficult task. By nature, transaction processing
                 applications are not predefined and can vary from the
                 simple to the complex. Sizing during the analysis and
                 design stages of the application development cycle is
                 particularly difficult. It is impossible to measure the
                 resource requirements of an application which is not
                 yet written or fully implemented. To make sizing easier
                 and more accurate in these stages, a sizing methodology
                 was developed that uses measurements from systems on
                 which industry-standard benchmarks have been run and
                 employs standard systems analysis techniques for
                 acquiring sizing information. These metrics are then
                 used to predict future transaction resource usage.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "C6110B (Software engineering techniques)",
  classification = "C6110B (Software engineering techniques)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "Analysis; analysis; application development;
                 Application development cycle; applications; cycle;
                 Design; design; industry-; Industry-standard
                 benchmarks; Metrics; metrics; Resource requirements;
                 resource requirements; Sizing; sizing; Sizing
                 methodology; sizing methodology; software metrics;
                 standard benchmarks; systems analysis techniques;
                 Systems analysis techniques; transaction processing;
                 Transaction processing; transaction processing;
                 Transaction processing applications; Transaction
                 resource usage; transaction resource usage",
  thesaurus =    "Software metrics; Transaction processing",
  treatment =    "P Practical",
}

@Article{Raghavan:1991:DAT,
  author =       "Ananth Raghavan and T. K. Rengarajan",
  title =        "Database Availability for Transaction Processing",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "1",
  pages =        "65--69",
  month =        "Winter",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "/usr/local/src/bib/bibliography/Database/Graefe.bib;
                 http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n1/Database_Availability_for_Tran_01oct1991DTJ106P8.ps;
                 http://www.digital.com:80/info/DTJ106/DTJ106SC.TXT",
  abstract =     "A transaction processing system relies on its database
                 management system to supply high availability. Digital
                 offers a network-based product, the VAX DBMS system,
                 and a relational data-based product, the VAX Rdb/VMS
                 database system, for its transaction processing
                 systems. These database systems have several strategies
                 to survive failures, disk head crashes, revectored bad
                 blocks, database corruptions, memory corruptions, and
                 memory over writes by faulty application programs. They
                 use base hardware technologies and also employ novel
                 software techniques, such as parallel transaction
                 recovery, recovery on surviving nodes of a VAXcluster
                 system, restore and roll-forward operations on areas of
                 the database, on-line backup, verification and repair
                 utilities, and executive mode protection of trusted
                 database management system code.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "C6160 (Database management systems (DBMS)); C6160D
                 (Relational DBMS)",
  classification = "C6160 (Database management systems (DBMS)); C6160D
                 (Relational DBMS)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "Database management system; database management
                 system; database management systems; Digital; fault
                 tolerant computing; Network-based product;
                 network-based product; parallel transaction; Parallel
                 transaction recovery; product; recovery; Recovery on
                 surviving nodes; recovery on surviving nodes;
                 relational data-based; Relational data-based product;
                 relational databases; transaction processing;
                 Transaction processing; transaction processing; VAX
                 DBMS; VAX Rdb/VMS database system",
  thesaurus =    "Database management systems; Fault tolerant computing;
                 Relational databases; Transaction processing",
  treatment =    "P Practical",
}

@Article{Spiro:1991:DOT,
  author =       "Peter M. Spiro and Ashok M. Joshi and T. K.
                 Rengarajan",
  title =        "Designing an optimized transaction commit protocol",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "1",
  pages =        "70--78 (or 70--79??)",
  month =        "Winter",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "/usr/local/src/bib/bibliography/Database/Graefe.bib;
                 http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n1/Designing_an_Optimized_Transac_01oct1991DTJ107P8.ps;
                 http://www.digital.com:80/info/DTJ107/DTJ107SC.TXT",
  abstract =     "Digital's database products, VAX Rdb/VMS and VAX DBMS,
                 share the same database kernel called KODA. KODA uses a
                 grouping mechanism to commit many concurrent
                 transactions together. This feature enables high
                 transaction rates in a transaction processing (TP)
                 environment. Since group commit processing affects the
                 maximum throughput of the transaction processing
                 system, the KODA group designed and implemented several
                 grouping algorithms and studied their performance
                 characteristics. Preliminary results indicate that it
                 is possible to achieve up to a 66 percent improvement
                 in transaction throughput by using more efficient
                 grouping designs.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "C6160 (Database management systems (DBMS))",
  classification = "C6160 (Database management systems (DBMS))",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "Database kernel; database kernel; database management
                 systems; Digital; Group commit; group commit; KODA;
                 processing; protocols; transaction; Transaction commit
                 protocol; transaction commit protocol; VAX DBMS; VAX
                 Rdb/VMS",
  thesaurus =    "Database management systems; Protocols; Transaction
                 processing",
  treatment =    "P Practical",
}

@Article{Bruckert:1991:VFF,
  author =       "William F. Bruckert and Carlos Alonso and James M.
                 Melvin",
  title =        "Verification of the first fault-tolerant {VAX}
                 system",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "1",
  pages =        "79--85",
  month =        "Winter",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "/usr/local/src/bib/bibliography/Database/Graefe.bib;
                 http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n1/Verification_of_the_First_Faul_01oct1991DTJ108P8.ps;
                 http://www.digital.com:80/info/DTJ108/DTJ108SC.TXT",
  abstract =     "The fault-tolerant character of the VAXft 3000 system
                 required that plans be made early in the development
                 stages for the verification and test of the system. To
                 ensure proper test coverage of the fault-tolerant
                 features, engineers built fault-insertion points
                 directly into the system hardware. During the
                 verification process, test engineers used hardware and
                 software fault insertion in directed and random test
                 forms. A four-phase verification strategy was devised
                 to ensure that the VAXft system hardware and software
                 was fully tested for error recovery that is transparent
                 to applications on the system.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "C5470 (Performance evaluation and testing)",
  classification = "C5470 (Performance evaluation and testing)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "computer testing; computing; digital computers; error
                 recovery; Error recovery; fault tolerant;
                 Fault-tolerant; fault-tolerant; strategy; Test; test;
                 VAXft 3000; Verification; verification; Verification
                 strategy",
  thesaurus =    "Computer testing; Digital computers; Fault tolerant
                 computing",
  treatment =    "P Practical",
}

@Article{Anonymous:1991:EIb,
  author =       "Anonymous",
  title =        "Editors Introduction",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "2",
  pages =        "??--??",
  month =        "Spring",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Jan 04 06:22:45 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/fddi-introduction.txt",
  acknowledgement = ack-nhfb,
}

@Article{Kempf:1991:F,
  author =       "Mark F. Kempf",
  title =        "Foreword",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "2",
  pages =        "??--??",
  month =        "Spring",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Jan 04 06:22:45 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/fddi-foreword.txt",
  acknowledgement = ack-nhfb,
}

@Article{Hawe:1991:FDD,
  author =       "William R. Hawe and Richard Graham and Peter C.
                 Hayden",
  title =        "Fiber Distributed Data Interface Overview",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "2",
  pages =        "10--19 (or 1--10??)",
  month =        "Spring",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n2/Fiber_Distributed_Data_Interfa_01jan1992DTJ201P8.ps;
                 http://www.digital.com:80/info/DTJ201/DTJ201SC.TXT",
  abstract =     "After exploring various alternatives to second
                 generation local area networks (LANs), Digital selected
                 the fiber distributed data interface (FDDI) system.
                 FDDI implements the International Standards
                 Organization (ISO) physical layer and the media access
                 control sublayer of the data link layer. This system is
                 based on a 100-megabit-per-second fiber-optic ring
                 network and uses a timed-token protocol to coordinate
                 station access to the network. Digital has developed
                 the FDDI base technology, including very large-scale
                 integration (VLSI) chips and software. These chips,
                 licensed to Advanced Micro Devices and Motorola, Inc.,
                 provide high-quality alternatives in the market and
                 foster cost reduction. Digital's implementation of
                 FDDI, including back bones in extended LANs, as well as
                 high-speed interconnection of workstations, servers,
                 and central computers, makes available a complete range
                 of system products.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "C5610N (Network interfaces)",
  classification = "C5610N (Network interfaces)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "access control sublayer; computer interfaces; data
                 link layer; Data link layer; DEC; Digital; distributed
                 data interface; FDDI; fiber; Fiber distributed data
                 interface; fiber-optic ring; Fiber-optic ring network;
                 LANs; media; Media access control sublayer; network;
                 networks; optical links; physical layer; Physical
                 layer; second-generation local area networks;
                 Second-generation local area networks; standards;
                 timed-token protocol; Timed-token protocol; token",
  thesaurus =    "Computer interfaces; Optical links; Standards; Token
                 networks",
  treatment =    "P Practical",
}

@Article{Hutchison:1991:DFP,
  author =       "Jerry D. Hutchison and Christopher Baldwin and Bruce
                 W. Thompson",
  title =        "Development of the {FDDI} Physical Layer",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "2",
  pages =        "19--30",
  month =        "Spring",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n2/Development_of_the_FDDI_Physic_01jan1992DTJ202P8.ps;
                 http://www.digital.com:80/info/DTJ202/DTJ202SC.TXT",
  abstract =     "The engineering development of the FDDI physical layer
                 resulted in the delivery of components, specifications,
                 and protocols. The development presented new design
                 problems related to the technology and to the operation
                 of token rings. The choice of the most appropriate
                 technologies for the chip set was based on technology
                 issues, risk control, and costs. The chip set that
                 emerged after the physical layer functions were
                 partitioned uses both ECL and CMOS technology. Further,
                 three design problems of general interest arose during
                 development: the elasticity buffer and circuitry
                 related to the distributed clocks in an FDDI LAN, the
                 multimode fiber-optic link using light emitting diodes,
                 and the media error processes as related to correctness
                 and fault isolation.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "C5610N (Network interfaces)",
  classification = "C5610N (Network interfaces)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "chip set; Chip set; clocks; components; Components;
                 computer interfaces; distributed; Distributed clocks;
                 elasticity buffer; Elasticity buffer; FDDI LAN; FDDI
                 physical layer; media error; Media error processes;
                 multimode fiber-optic link; Multimode fiber-optic link;
                 optical links; processes; protocols; Protocols;
                 specifications; Specifications; token networks; token
                 rings; Token rings",
  thesaurus =    "Computer interfaces; Optical links; Token networks",
  treatment =    "P Practical",
}

@Article{Yang:1991:FDL,
  author =       "Henry S. Yang and Barry A. Spinney and Stephen
                 Towning",
  title =        "{FDDI} Data Link Development",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "2",
  pages =        "31--41",
  month =        "Spring",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n2/FDDI_Data_Link_Developmentysic_01jan1992DTJ203P8.ps;
                 http://www.digital.com:80/info/DTJ203/DTJ203SC.TXT",
  abstract =     "The fiber distributed data interface (FDDI) data link
                 is based on the ANSI X3T9.5 FDDI standards with
                 Digital's enhancements to provide greater performance,
                 reliability, and robustness. The FDDI project team
                 encountered significant challenges, including the
                 evolving ANSI X3T9.5 FDDI standards and the development
                 of the technology to implement the data link, coupled
                 with time-to-market pressure. Appropriate
                 considerations and design trade-offs were made to
                 design complexity, performance, risk, cost, and
                 schedule, when deciding functional partitioning and
                 semiconductor technology. Extensive simulations and a
                 novel test approach were used to verify the algorithms,
                 the functional models comprising the chips, and the
                 physical chips themselves.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp. Maynard, MA, USA",
  classcodes =   "C5610N (Network interfaces); C5620L (Local area
                 networks)",
  classification = "C5610N (Network interfaces); C5620L (Local area
                 networks)",
  corpsource =   "Digital Equipment Corp. Maynard, MA, USA",
  keywords =     "ANSI X3T9.5; chips; Chips; complexity; Complexity;
                 computer interfaces; cost; Cost; data; Data link; FDDI;
                 fiber distributed data interface; Fiber distributed
                 data interface; functional models; Functional models;
                 link; networks; optical links; performance;
                 Performance; risk; Risk; schedule; Schedule; standards;
                 token",
  thesaurus =    "Computer interfaces; Optical links; Standards; Token
                 networks",
  treatment =    "P Practical",
}

@Article{Ciarfella:1991:OCN,
  author =       "Paul W. Ciarfella and David Benson and David S.
                 Sawyer",
  title =        "An Overview of the {Common Node} Software",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "2",
  pages =        "42--52",
  month =        "Spring",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/fddi-node-software.txt;
                 http://www.digital.com:80/info/DTJ204/DTJ204SC.TXT",
  abstract =     "To address an aggressive fiber distributed data
                 interface (FDDI) program schedule and reduce the
                 complexity of the concurrent development of multiple
                 FDDI products, Digital developed a common
                 implementation of the FDDI station management standard.
                 This implementation, called the Common Node Software,
                 manages the physical and logical connections to the
                 100-megabit-per-second fiber-optic ring for Digital's
                 FDDI product set. Including the Common Node Software in
                 each product yields consistent behavior at the FDDI
                 data link and physical layers. Direct reuse of the
                 software reduces the development and testing efforts by
                 providing a proven implementation.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "C5610N (Network interfaces); C5620L (Local area
                 networks)",
  classification = "C5610N (Network interfaces); C5620L (Local area
                 networks)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "Common Node Software; Digital; FDDI product set;
                 fiber-optic ring; Fiber-optic ring; optical links;
                 standards; station management standard; Station
                 management standard; token networks",
  thesaurus =    "Optical links; Standards; Token networks",
  treatment =    "P Practical",
}

@Article{Kochem:1991:DDP,
  author =       "Robert C. Kochem and James S. Hiscock and Brian T.
                 Mayo",
  title =        "Development of the {DECbridge} 500 Product",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "2",
  pages =        "53--63 (or 53--65??)",
  month =        "Spring",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n2/Development_of_the_DECbridge_5_01jan1992DTJ204P8.ps;
                 http://www.digital.com:80/info/DTJ205/DTJ205SC.TXT",
  abstract =     "The DECbridge 500 product connects Ethernet\slash
                 802.3 local area networks (LANs) to fiber distributed
                 data interface (FDDI) LANs and is, therefore, a
                 fundamental element of an extended LAN. Developers of
                 this product encountered many technical hurdles. The
                 higher data rate and token ring topology inherent in
                 the FDDI technology impose several demands on any
                 bridging product connected to an FDDI LAN. The
                 differences in formats and size of frames on the two
                 types of LANs introduce further requirements. The
                 development team met these requirements and delivered a
                 high-performance product that provides seamless
                 integration of both LAN types.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "C5610N (Network interfaces)",
  classification = "C5610N (Network interfaces)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "bridging product; Bridging product; computer
                 interfaces; data interface; Ethernet/802.3 local area
                 networks; FDDI; fiber distributed; Fiber distributed
                 data interface; LANs; local area networks; protocols;
                 token ring topology; Token ring topology",
  thesaurus =    "Computer interfaces; Local area networks; Protocols",
  treatment =    "P Practical",
}

@Article{Tiffany:1991:DP,
  author =       "William J. Tiffany and G. Paul Koning and James E.
                 Kuenzel",
  title =        "The {DECconcentrator} 500 Product",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "2",
  pages =        "64--75",
  month =        "Spring",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n2/The_DECconcentrator_500_Produc_01jan1992DTJ206P8.ps;
                 http://www.digital.com:80/info/DTJ206/DTJ206SC.TXT",
  abstract =     "Digital's decision to implement the fiber distributed
                 data interface (FDDI) physical topology with a dual
                 ring of trees, as opposed to a dual ring only, resulted
                 in the development of the DECconcentrator 500 product.
                 The dual ring of trees topology provides high
                 availability, manageability, and support for building
                 wiring standards. The function of the concentrator
                 demanded that the product be reliable, provide for
                 remote management and control, and allow a low cost per
                 connection. The use of common FDDI hardware and
                 software components developed by Digital helped the
                 product team to meet these goals.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "C5620L (Local area networks); C5610N (Network
                 interfaces)",
  classification = "C5610N (Network interfaces); C5620L (Local area
                 networks)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "computer interfaces; DECconcentrator 500; dual ring of
                 trees; Dual ring of trees; FDDI; fiber distributed data
                 interface; Fiber distributed data interface; local area
                 networks; network topology; wiring standards; Wiring
                 standards",
  thesaurus =    "Computer interfaces; Local area networks; Network
                 topology",
  treatment =    "P Practical",
}

@Article{Sweet:1991:DMD,
  author =       "Bruce E. Sweet",
  title =        "{DECelms} --- Managing {Digital}'s {FDDI} and
                 {Ethernet} Extended Local Area Networks",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "2",
  pages =        "76--84",
  month =        "Spring",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n2/DECelms_Managing_Digitals_F_01jan1992DTJ207P8.ps;
                 http://www.digital.com:80/info/DTJ207/DTJ207SC.TXT",
  abstract =     "The DECelms software product provides extended local
                 area network management for Digital's Ethernet\slash
                 IEEE 802.3 and fiber distributed data interface (FDDI)
                 bridges and for its FDDI wiring concentrator. Product
                 development entailed keeping pace with a changing set
                 of requirements. These included the evolving ANSI FDDI
                 standard, the proposed Digital Network Architecture
                 FDDI data link specification, the Enterprise Management
                 Architecture, the ability to extend the serviceability
                 of the products, and the aggressive schedules of the
                 hard ware and firmware development teams. DECelms
                 development resulted in an improved network management
                 functionality including fault, performance, and
                 topology management. These advanced features required
                 corresponding enhancements to the user interface and
                 dependable documentation. The development team met
                 these challenges and successfully delivered the DECelms
                 product to market as a part of Digital's FDDI
                 program.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "C5620L (Local area networks); C6150J (Operating
                 systems)",
  classification = "C5620L (Local area networks); C6150J (Operating
                 systems)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "ANSI FDDI standard; Data link; data link; DECelms
                 software product; Digital Network Architecture;
                 distributed data interface; Enterprise; Enterprise
                 Management Architecture; Ethernet/IEEE 802.3; Extended
                 local area networks; extended local area networks;
                 FDDI; fiber; Fiber distributed data interface; Local
                 area network management; local area network management;
                 local area networks; Management Architecture; network
                 operating systems",
  thesaurus =    "Local area networks; Network operating systems",
  treatment =    "P Practical",
}

@Article{Sinkewicz:1991:UFD,
  author =       "Ursula Sinkewicz and Chran-Ham Chang and Lawrence G.
                 Palmer and Craig Smelser and Fred L. Templin",
  title =        "{ULTRIX} Fiber Distributed Data Interface Networking
                 Subsystem Implementation",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "2",
  pages =        "85--93 (or 85--94??)",
  month =        "Spring",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n2/ULTRIX_Fiber_Distributed_Data_01jan1992DTJ208P8.ps;
                 http://www.digital.com:80/info/DTJ208/DTJ208SC.TXT",
  abstract =     "The ULTRIX operating system, Digital's version of the
                 UNIX operating system, supports the first
                 implementation of a host networking subsystem with a
                 fiber distributed data interface (FDDI) network
                 adapter. Digital's FDDI controller 700 adapter provides
                 a single FDDI attachment for the reduced instruction
                 set computer (RISC)-based, DECstation 5000 model 200
                 platform. Combined with the ULTRIX networking
                 subsystem, this adapter brings high-speed communication
                 directly to the workstation.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "C6150J (Operating systems)",
  classification = "C6150J (Operating systems)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "700 adapter; distributed data interface; FDDI
                 controller; FDDI controller 700 adapter; fiber; Fiber
                 distributed data interface; host networking subsystem;
                 Host networking subsystem; local area networks; network
                 adapter; Network adapter; network operating systems;
                 reduced instruction set computer; Reduced instruction
                 set computer; ULTRIX operating system",
  thesaurus =    "Local area networks; Network operating systems",
  treatment =    "P Practical",
}

@Article{Anonymous:1991:EIc,
  author =       "Anonymous",
  title =        "Editors Introduction",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "3",
  pages =        "??--??",
  month =        "Summer",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Mon Jun 24 18:53:10 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/vc-introduction.txt",
  acknowledgement = ack-nhfb,
}

@Article{Hayakawa:1991:F,
  author =       "Howard H. Hayakawa and George S. Hoff",
  title =        "Foreword",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "3",
  pages =        "??--??",
  month =        "Summer",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Jan 04 06:22:45 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/vc-foreword.txt",
  acknowledgement = ack-nhfb,
}

@Article{Jain:1991:PAH,
  author =       "Raj Jain",
  title =        "Performance Analysis of a High-Speed {FDDI} Adapter
                 (or ``Performance Analysis of {FDDI}''??)",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "3",
  pages =        "1--11 (??)",
  month =        "Summer",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Mon Jun 24 18:53:12 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n3/Performance_Analysis_of_FDDIgh_01apr1992DTJ307P8.ps",
  abstract =     "The performance of an FDDI LAN depends upon
                 configuration and workload parameters such as the
                 extent of the ring, the number of stations on the ring,
                 the number of stations that are waiting to transmit,
                 and the frame size. In addition, one key parameter that
                 network managers can control to improve performance is
                 the target token rotation time (TTRT). Analytical
                 modeling and simulation methods were used to
                 investigate the effect of the TTRT on various
                 performance metrics for different ring configurations.
                 This analysis demonstrated that setting the TTRT at 8
                 milliseconds provides good performance over a wide
                 range of configurations and workloads.",
  acknowledgement = ack-nhfb,
}

@Article{Davis:1991:DVV,
  author =       "Scott H. Davis",
  title =        "Design of {VMS Volume Shadowing Phase II} ---
                 Host-based Shadowing",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "3",
  pages =        "7--15",
  month =        "Summer",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n3/Design_of_VMS_Volume_Shadowin_01apr1992DTJ301P8.ps;
                 http://www.digital.com:80/info/DTJ301/DTJ301SC.TXT",
  abstract =     "VMS Volume Shadowing Phase II is a fully distributed,
                 clusterwide data availability product designed to
                 replace the obsolete controller-based shadowing
                 implementation. Phase II is intended to service current
                 and future generations of storage architectures. In
                 these architectures, there is no intelligent, multiunit
                 controller that functions as a centralized gateway to
                 the multiple drives in the shadow set. The new software
                 makes many additional topologies suitable for
                 shadowing, including DSSI drives, DSA drives, and
                 shadowing across VMS MSCP servers. This last
                 configuration allows shadow set members to be separated
                 by any supported cluster interconnect, including FDDI.
                 All essential shadowing functions are performed within
                 the VMS operating system. New MSCP controllers and
                 drives can optionally implement a set of shadowing
                 performance assists, which Digital intends to support
                 in a future release of the shadowing product.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6150J (Operating systems); C6120 (File organisation);
                 C5310 (Storage system design)",
  classification = "C5310 (Storage system design); C6120 (File
                 organisation); C6150J (Operating systems)",
  keywords =     "availability; cluster; Cluster interconnect; data;
                 Data availability; data security; Data security; DEC
                 computers; Digital; drives; DSA; DSA drives; DSSI
                 drives; FDDI; interconnect; MSCP controllers; Operating
                 system; operating system; operating systems
                 (computers); security of; Shadow set members; shadow
                 set members; Storage architectures; storage
                 architectures; storage management; VMS MSCP servers;
                 VMS Volume Shadowing Phase II",
  thesaurus =    "DEC computers; Operating systems [computers]; Security
                 of data; Storage management",
  treatment =    "P Practical; R Product Review",
}

@Article{Snaman:1991:ADV,
  author =       "William E. {Snaman, Jr.}",
  title =        "Application Design in a {VAXcluster} System",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "3",
  pages =        "16--26",
  month =        "Summer",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n3/Application_Design_in_a_VAXclu_01apr1992DTJ302P8.ps;
                 http://www.digital.com:80/info/DTJ302/DTJ302SC.TXT",
  abstract =     "VAXcluster systems provide a flexible way to configure
                 a computing system that can survive the failure of any
                 component. In addition, these systems can grow with an
                 organization and can be serviced without disruption to
                 applications. These features make VAXcluster systems an
                 ideal base for developing high-availability
                 applications such as transaction processing systems,
                 servers for network client server applications, and
                 data sharing applications. Understanding the basic
                 design of VAXcluster systems and the possible
                 configuration options can help application designers
                 take advantage of the availability and growth
                 characteristics of these systems.\par

                 Many organizations depend on near constant access to
                 data and computing resources; interruption of these
                 services results in the interruption of primary
                 business functions. In addition, growing organizations
                 face the need to increase the amount of computing power
                 available to them over an extended period of time.
                 VAXcluster systems provide solutions to these data
                 availability and growth problems that modern
                 organizations face.[1]\par

                 This paper begins with an overview of VAXcluster
                 systems and application design in such systems and
                 proceeds with a detailed discussion of VAXcluster
                 design and implementation. The paper then focuses on
                 how this information affects the design of applications
                 that take advantage of the availability and growth
                 characteristics of a VAXcluster system.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6150J (Operating systems); C6110 (Systems analysis
                 and programming)",
  classification = "C6110 (Systems analysis and programming); C6150J
                 (Operating systems)",
  keywords =     "applications; Data sharing applications; data sharing
                 applications; DEC computers; distributed processing;
                 High-availability applications; high-availability
                 applications; network client-server; Network
                 client-server applications; network operating;
                 programming; systems; transaction processing systems;
                 Transaction processing systems; VAXcluster system;
                 VMS",
  thesaurus =    "DEC computers; Distributed processing; Network
                 operating systems; Programming",
  treatment =    "P Practical",
}

@Article{Leahy:1991:NAF,
  author =       "Lee Leahy",
  title =        "New availability features of local area {VAXcluster}
                 systems",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "3",
  pages =        "27--35",
  month =        "Summer",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n3/New_Availability_Features_of_L_01apr1992DTJ303P8.ps;
                 http://www.digital.com:80/info/DTJ303/DTJ303SC.TXT",
  abstract =     "VMS version 5.4-3 increases the availability of local
                 area VAXcluster (LAVc) configurations by allowing the
                 use of multiple local area network (LAN) adapters in
                 the VAXcluster system. Availability is increased by
                 enabling fail-over between LAN adapters, reducing
                 channel failure detection time, and providing better
                 network troubleshooting. Combined, these changes
                 significantly increase the availability of LAN-based
                 VAXcluster configurations by allowing the VAXcluster
                 system to tolerate and work around network failures.",
  acknowledgement = ack-nhfb,
  classcodes =   "B6210L (Computer communications); C5620L (Local area
                 networks); C5470 (Performance evaluation and testing)",
  classification = "B6210L (Computer communications); C5470 (Performance
                 evaluation and testing); C5620L (Local area networks)",
  keywords =     "Availability features; availability features; channel;
                 Channel failure detection time; DEC computers;
                 fail-over; Fail-over; failure detection time; fault
                 tolerant computing; local area; local area networks;
                 Local area VAXcluster; multiple local area network;
                 Multiple local area network; Network troubleshooting;
                 network troubleshooting; VAXcluster; VMS version
                 5.4-3",
  thesaurus =    "DEC computers; Fault tolerant computing; Local area
                 networks",
  treatment =    "P Practical; R Product Review",
}

@Article{Stockdale:1991:DDL,
  author =       "Richard E. Stockdale and Judy B. Weiss",
  title =        "Design of the {DEC LANcontroller} 400 Adapter",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "3",
  pages =        "36--47",
  month =        "Summer",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n3/Design_of_the_DEC_LANcontrolle_01apr1992DTJ304P8.ps;
                 http://www.digital.com:80/info/DTJ304/DTJ304SC.TXT",
  abstract =     "The DEC LANcontroller 400, Digital's XMI-to Ethernet
                 adapter (DEMNA), connects systems based on the Digital
                 XMI bus to an Ethernet/IEEE 802.3 local area network
                 (LAN). These systems use the XMI bus either as the
                 system bus (VAX 6000 systems) or as an I/O bus (VAX
                 9000 systems). The new systems, which can utilize the
                 full bandwidth of the Ethernet, are characterized by
                 increased host processor speeds. The DEMNA adapter was
                 designed to support these I/O requirements. In
                 addition, console and monitor facilities were built
                 into the adapter firmware for debugging, verification,
                 and user visibility. The adapter's performance for
                 small packets exceeds system capabilities, and Ethernet
                 bandwidth is the limiting factor for large packets.",
  acknowledgement = ack-nhfb,
  classcodes =   "B6210L (Computer communications); C5630 (Networking
                 equipment); C5610N (Network interfaces); C5620L (Local
                 area networks)",
  classification = "B6210L (Computer communications); C5610N (Network
                 interfaces); C5620L (Local area networks); C5630
                 (Networking equipment)",
  keywords =     "bus; data communication equipment; DEC computers; DEC
                 LANcontroller 400; DEMNA adapter; Digital XMI; Digital
                 XMI bus; equipment; Ethernet/IEEE 802.3 local area
                 network; evaluation (computers); I/O; I/O bus; local
                 area networks; network servers; system bus; System bus;
                 User visibility; user visibility; verification;
                 Verification; XMI-to-Ethernet adapter",
  thesaurus =    "Data communication equipment; DEC computers; Equipment
                 evaluation [computers]; Local area networks; Network
                 servers",
  treatment =    "P Practical; R Product Review",
}

@Article{Rege:1991:AIH,
  author =       "Satish L. Rege",
  title =        "The Architecture and Implementation of a
                 High-performance {FDDI} Adapter",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "3",
  pages =        "48--63",
  month =        "Summer",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n3/The_Architecture_and_Implement_01apr1992DTJ305P8.ps;
                 http://www.digital.com:80/info/DTJ305/DTJ305SC.TXT",
  abstract =     "With the advent of fiber distributed data interface
                 (FDDI) technology, Digital saw the need to define an
                 architecture for a high-performance adapter that could
                 transmit data 30 times faster than previously-built
                 Ethernet adapters. We specified a first generation FDDI
                 data link layer adapter architecture that is capable of
                 meeting the maximum FDDI packet-carrying capacity. The
                 DEC FDDIcontroller 400 is an implementation of this
                 architecture. This adapter acts as an interface between
                 XMI-based CPUs, such as the VAX 6000 and VAX 9000
                 series of computers, and an FDDI local area network.",
  acknowledgement = ack-nhfb,
  classcodes =   "B6210L (Computer communications); B6260 (Optical links
                 and equipment); C5630 (Networking equipment); C5620L
                 (Local area networks); C5610N (Network interfaces)",
  classification = "B6210L (Computer communications); B6260 (Optical
                 links and equipment); C5610N (Network interfaces);
                 C5620L (Local area networks); C5630 (Networking
                 equipment)",
  keywords =     "computer interfaces; computers; CPUs; data
                 communication equipment; data link layer adapter
                 architecture; Data link layer adapter architecture;
                 DEC; DEC FDDIcontroller 400; distributed data
                 interface; Ethernet adapters; FDDI local area network;
                 fiber; Fiber distributed data interface;
                 high-performance adapter; High-performance adapter;
                 High-performance FDDI adapter; high-performance FDDI
                 adapter; network servers; optical communication
                 equipment; packet-carrying capacity; Packet-carrying
                 capacity; token networks; Token networks; VAX 6000; VAX
                 9000; XMI-based; XMI-based CPUs",
  thesaurus =    "Computer interfaces; Data communication equipment; DEC
                 computers; Network servers; Optical communication
                 equipment; Token networks",
  treatment =    "P Practical; R Product Review",
}

@Article{Kalkunte:1991:PAH,
  author =       "Ramsesh S. Kalkunte",
  title =        "Performance Analysis of a High-speed {FDDI} Adapter",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "3",
  pages =        "64--77",
  month =        "Summer",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n3/Performance_Analysis_of_a_High_01apr1992DTJ306P8.ps;
                 http://www.digital.com:80/info/DTJ306/DTJ306SC.TXT",
  abstract =     "The DEC FDDIcontroller 400 host-to-FDDI network
                 adapter implements real-time processing functionality
                 in hardware, unlike conventional microprocessor-based
                 designs. To develop this high-performance product with
                 the available technological resources and at minimal
                 cost, we optimized the adapter design by creating a
                 simulation model. This model, apart from predicting
                 performance, enabled engineers to analyze the
                 functional correctness and the performance impact of
                 potential designs. As a result, our implementation
                 delivers close to ultimate performance for an FDDI
                 adapter and surpasses the initial project
                 expectations.",
  acknowledgement = ack-nhfb,
  classcodes =   "B6210L (Computer communications); B6260 (Optical links
                 and equipment); C5630 (Networking equipment); C5620L
                 (Local area networks); C5470 (Performance evaluation
                 and testing); C5610N (Network interfaces)",
  classification = "B6210L (Computer communications); B6260 (Optical
                 links and equipment); C5470 (Performance evaluation and
                 testing); C5610N (Network interfaces); C5620L (Local
                 area networks); C5630 (Networking equipment)",
  keywords =     "communication equipment; computer interfaces; DEC
                 computers; DEC FDDIcontroller 400 host-to-FDDI network
                 adapter; functional correctness; Functional
                 correctness; network servers; networks; optical;
                 performance evaluation; performance impact; Performance
                 impact; real-; Real-time processing; time processing;
                 token",
  thesaurus =    "Computer interfaces; DEC computers; Network servers;
                 Optical communication equipment; Performance
                 evaluation; Token networks",
  treatment =    "P Practical",
}

@Article{Jain:1991:PAF,
  author =       "R. Jain",
  title =        "Performance analysis of {FDDI}",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "3",
  pages =        "78--88",
  month =        "Summer",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n3/Performance_Analysis_of_FDDIgh_01apr1992DTJ307P8.ps;
                 http://www.digital.com:80/info/DTJ307/DTJ307SC.TXT",
  abstract =     "The performance of an FDDI LAN depends upon
                 configuration and workload parameters such as the
                 extent of the ring, the number of stations on the ring,
                 the number of stations that are waiting to transmit,
                 and the frame size. In addition, one key parameter that
                 network managers can control to improve performance is
                 the target token rotation time (TTRT). Analytical
                 modeling and simulation methods were used to
                 investigate the effect of the TTRT on various
                 performance metrics for different ring configurations.
                 This analysis demonstrated that setting the TTRT at 8
                 milliseconds provides good performance over a wide
                 range of configurations and workloads.",
  acknowledgement = ack-nhfb,
  classcodes =   "B6210L (Computer communications); B6260 (Optical links
                 and equipment); C5620L (Local area networks); C5470
                 (Performance evaluation and testing)",
  classification = "B6210L (Computer communications); B6260 (Optical
                 links and equipment); C5470 (Performance evaluation and
                 testing); C5620L (Local area networks)",
  keywords =     "FDDI LAN; network managers; Network managers; optical
                 communication equipment; performance evaluation;
                 performance metrics; Performance metrics; ring
                 configurations; Ring configurations; rotation time;
                 token; token networks; Token rotation time; workload
                 parameters; Workload parameters",
  thesaurus =    "Optical communication equipment; Performance
                 evaluation; Token networks",
  treatment =    "P Practical",
}

@Article{Anonymous:1991:EId,
  author =       "Anonymous",
  title =        "Editors Introduction",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "4",
  pages =        "??--??",
  month =        "Fall",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Jan 04 06:22:45 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/im-introduction.txt",
  acknowledgement = ack-nhfb,
}

@Article{Cabrinety:1991:F,
  author =       "Larry Cabrinety",
  title =        "Foreword",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "4",
  pages =        "??--??",
  month =        "Fall",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Jan 04 06:22:45 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/im-foreword.txt",
  acknowledgement = ack-nhfb,
}

@Article{Payson:1991:HAB,
  author =       "Christopher J. Payson and Christopher J. Cianciolo and
                 Robert N. Crouse and Catherine F. Winsor",
  title =        "Hardware Accelerators for Bitonal Image Processing",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "4",
  pages =        "9--25 (or 9--26??)",
  month =        "Fall",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "/usr/local/src/bib/bibliography/Database/Graefe.bib;
                 http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n4/Hardware_Accelerators_for_Bito_01jul1992DTJ401P8.ps;
                 http://www.digital.com:80/info/DTJ401/DTJ401SC.TXT",
  abstract =     "Electronic imaging systems transfer views of
                 real-world scenes or objects into digital bits for
                 storage, manipulation, and viewing. In the area of
                 bitonal images, a large market exists in document
                 management, which consists of scanning volumes of
                 papers for storage and retrieval. However, high scan
                 densities produce huge volumes of data, requiring
                 compression and decompression techniques to preserve
                 system memory and improve system throughput. These
                 techniques, as well as general image processing
                 algorithms, are compute-intensive and require high
                 memory bandwidth. To address the memory issues, and to
                 achieve interactive image display performance, Digital
                 has designed a series of bitonal image hardware
                 accelerators. The intent was to create interactive
                 media view stations, with imaging applications
                 alongside other applications. In addition to achieving
                 memory, performance, and versatility goals, the
                 hardware accelerators have significantly improved final
                 image legibility.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "C5260B (Computer vision and picture processing); C5150
                 (Other circuits for digital computers); C6130D
                 (Document processing techniques)",
  classification = "C5150 (Other circuits for digital computers); C5260B
                 (Computer vision and picture processing); C6130D
                 (Document processing techniques)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "add-on boards; Bitonal image processing; bitonal image
                 processing; Bitonal images; bitonal images;
                 computerised picture processing; document; Document
                 management; image processing; Interactive image
                 display; interactive image display; management; Media
                 view stations; media view stations",
  thesaurus =    "Add-on boards; Computerised picture processing;
                 Document image processing",
  treatment =    "P Practical",
}

@Article{Engberg:1991:XWT,
  author =       "Bj{\"o}rn Engberg and Thomas Porcher",
  title =        "{X Window} Terminals",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "4",
  pages =        "26--35",
  month =        "Fall",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "/usr/local/src/bib/bibliography/Database/Graefe.bib;
                 http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n4/X_Window_Terminals_01jul1992DTJ402P8.ps;
                 http://www.digital.com:80/info/DTJ402/DTJ402SC.TXT",
  abstract =     "X window terminals occupy a niche between X window
                 workstations and graphics terminals. The purpose of
                 terminals in general is to provide low-cost user access
                 to host computers or smaller dedicated systems. X
                 window terminals further the advance in graphics
                 terminals and provide new and interesting ways to
                 utilize host systems. Ethernet cable provides for
                 graphics performance previously not seen in terminals.
                 The X Window System developed by MIT allows multiple
                 applications to be displayed and controlled from the
                 user's workstation. Now, with X window terminals, the
                 same powerful user interface is available on host and
                 other non workstation computers.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "C5540 (Terminals and graphic displays); C6180G
                 (Graphical user interfaces)",
  classification = "C5540 (Terminals and graphic displays); C6180G
                 (Graphical user interfaces)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "computers; DEC Equipment Corporation; graphical user
                 interfaces; graphics performance; Graphics performance;
                 Graphics terminals; graphics terminals; host computers;
                 Host computers; interactive terminals; non-workstation;
                 Non-workstation computers; User interface; user
                 interface; X window terminals",
  thesaurus =    "Graphical user interfaces; Interactive terminals",
  treatment =    "P Practical",
}

@Article{Sichel:1991:ABO,
  author =       "Peter A. Sichel",
  title =        "{ACCESS.bus}, an Open Desktop Bus",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "4",
  pages =        "36--42",
  month =        "Fall",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "/usr/local/src/bib/bibliography/Database/Graefe.bib;
                 http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n4/ACCESS.bus_an_Open_Desktop_Bu_01jul1992DTJ403P8.ps;
                 http://www.digital.com:80/info/DTJ403/DTJ403SC.TXT",
  abstract =     "With the recent introduction of the ACCESS.bus
                 product, Digital has affirmed its commitment to open
                 systems and thus to facilitating better solutions for
                 interactive computing. This open desktop bus provides a
                 simple, uniform way to link a desktop computer to as
                 many as 14 low-speed I/O devices such as a keyboard,
                 mouse, tablet, or three-dimensional tracker. ACCESS.bus
                 features a 100-kilobit-per-second maximum data rate,
                 hardware arbitration, dynamic reconfiguration, a mature
                 capabilities grammar to support generic device drivers,
                 and off-the-shelf, low-cost I$^2$C micro controller
                 technology.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Marnard, MA, USA",
  classcodes =   "C5610S (System buses); C5430 (Microcomputers)",
  classification = "C5430 (Microcomputers); C5610S (System buses)",
  corpsource =   "Digital Equipment Corp., Marnard, MA, USA",
  keywords =     "ACCESS.bus; computer interfaces; computing; Desktop
                 bus; desktop bus; interactive; Interactive computing;
                 microcomputers; minicomputers; open; Open desktop bus;
                 open desktop bus; open systems; Open systems; systems",
  thesaurus =    "Computer interfaces; Microcomputers; Minicomputers;
                 Open systems",
  treatment =    "P Practical",
}

@Article{Landau:1991:DDC,
  author =       "Richard Landau and Alan Guenther",
  title =        "Design of the {DECprint Common Printer Supervisor} for
                 {VMS} System",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "4",
  pages =        "43--54",
  month =        "Fall",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "/usr/local/src/bib/bibliography/Database/Graefe.bib;
                 http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n4/Design_of_the_DECprint_Common_01jul1992DTJ404P8.ps;
                 http://www.digital.com:80/info/DTJ404/DTJ404SC.TXT",
  abstract =     "DECprint Printing Services software controls a variety
                 of printer features for a wide range of printers. It
                 supports several different page description languages,
                 handles multiple media simultaneously, and uses
                 different I/O interconnections and communication
                 protocols. Operating within the VMS printing
                 environment, it implements a large number of user
                 specified options to the PRINT command. DECprint
                 Printing Services functions as the supervisor in the
                 VMS printing system for all PostScript printers
                 supplied by Digital. The common printer supervisor has
                 an especially flexible internal structure and
                 processing method to serve complex printing
                 environments.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "C6150J (Operating systems); C5550 (Printers, plotters
                 and other hard-copy output devices)",
  classification = "C5550 (Printers, plotters and other hard-copy output
                 devices); C6150J (Operating systems)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "Common printer supervisor; common printer supervisor;
                 DECprint Printing; DECprint Printing Services software;
                 input-output programs; media; multiple; Multiple media;
                 Page description languages; page description languages;
                 printers; Services software; supervisory programs; VMS
                 printing system; VMS systems",
  thesaurus =    "Input-output programs; Printers; Supervisory
                 programs",
  treatment =    "P Practical",
}

@Article{Jones:1991:CPA,
  author =       "James D. Jones and Ajay P. Kachrani and Thomas E.
                 Powers",
  title =        "The {Common Printer Access Protocol}",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "4",
  pages =        "55--60",
  month =        "Fall",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "/usr/local/src/bib/bibliography/Database/Graefe.bib;
                 http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n4/The_Common_Printer_Access_Prot_01jul1992DTJ405P8.ps;
                 http://www.digital.com:80/info/DTJ405/DTJ405SC.TXT",
  abstract =     "The concept of a `Printer Access Protocol' or `PAP'
                 was introduced during the mid-1980s to provide for
                 comprehensive access to the new generation of more
                 capable, networked printers. The design goals for a PAP
                 need to consider the variety of data presentation
                 protocols in use and the heterogeneous nature of
                 distributed interconnection methods. A Digital printing
                 architecture team adopted an existing prototype, the
                 Reid-Kent Print Server Protocol, as the basis for a
                 proposed `Common Printer Access Protocol,' or CPAP.
                 Digital's first server instantiation of the CPAP,
                 PrintServer Supporting Host Software version 4.0, also
                 needed to address implementation practicalities to
                 ensure interoperability and back wards compatibility.
                 The solutions selected are applicable to a broad range
                 of client-server systems where clients and servers may
                 be independently developed, and where such components
                 may be in stalled and upgraded asynchronously from one
                 an other. CPAP is being considered for adoption as an
                 Internet standard, and is an element of the Palladium
                 Printing System, which has been accepted as the
                 printing systems component of OSF/1.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Marnard, MA, USA",
  classcodes =   "C6150J (Operating systems); C5550 (Printers, plotters
                 and other hard-copy output devices)",
  classification = "C5550 (Printers, plotters and other hard-copy output
                 devices); C6150J (Operating systems)",
  corpsource =   "Digital Equipment Corp., Marnard, MA, USA",
  keywords =     "access protocol; common printer; Common printer access
                 protocol; CPAP; DEC PrintServer Supporting Host
                 Software; DECnet; input-output programs; local area
                 print server; Local area print server; Open Software
                 Foundation; printers; programs; protocols; supervisory;
                 VMS access",
  thesaurus =    "Input-output programs; Printers; Protocols;
                 Supervisory programs",
  treatment =    "T Theoretical or Mathematical",
}

@Article{Simone:1991:DTP,
  author =       "Guido Simone and Jeffrey A. Metzger and Gary
                 Vaillette",
  title =        "Design of the {Turbo PrintServer} 20 Controller",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "4",
  pages =        "61--72 (or 61--76??)",
  month =        "Fall",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "/usr/local/src/bib/bibliography/Database/Graefe.bib;
                 http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n4/Design_of_the_Turbo_PrintServe_01jul1992DTJ406P8.ps;
                 http://www.digital.com:80/info/DTJ406/DTJ406SC.TXT",
  abstract =     "The turbo PrintServer 20 controller is a performance
                 enhancement of the original PrintServer 20 system
                 controller. The turbo controller was developed to
                 enable PostScript code to execute faster and thus
                 improve page throughput for complex documents. The
                 RETrACE analysis system was designed to analyze the
                 performance of the original PrintServer 20 system and
                 estimate expected performance of future systems. The
                 turbo controller's processor and its three subsystems
                 for memory, write buffer, and bit-map data transfer
                 were selected based on the analysis results.
                 Performance tests conducted on both the original and
                 the turbo PrintServer 20 indicate the enhanced
                 processing performance of the turbo controller.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "C6150J (Operating systems)",
  classification = "C6150J (Operating systems)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "Controller; controller; input-output programs; Page
                 throughput; page throughput; performance enhancement;
                 Performance enhancement; printers; RETrACE analysis
                 system; supervisory programs; Turbo PrintServer 20;
                 turbo PrintServer 20",
  thesaurus =    "Input-output programs; Printers; Supervisory
                 programs",
  treatment =    "P Practical",
}

@Article{Anonymous:1992:EIa,
  author =       "Anonymous",
  title =        "Editors Introduction",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "1",
  pages =        "??--??",
  month =        "Winter",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Jan 04 06:22:45 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/pw-introduction.txt",
  acknowledgement = ack-nhfb,
}

@Article{Carchidi:1992:F,
  author =       "Joseph A. Carchidi",
  title =        "Foreword",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "1",
  pages =        "??--??",
  month =        "Winter",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Jan 04 06:22:45 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/pw-foreword.txt",
  acknowledgement = ack-nhfb,
}

@Article{Abrahams:1992:OPP,
  author =       "Alan Abrahams and David A. Low",
  title =        "An Overview of the {PATHWORKS} Product Family",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "1",
  pages =        "8--14 (or 8--15??)",
  month =        "Winter",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n1/An_Overview_of_the_PATHWORKS_01oct1992DTJ501P8.ps;
                 http://www.digital.com:80/info/DTJ501/DTJ501SC.TXT",
  abstract =     "As the number of personal computers continues to grow,
                 so does the demand for networking products and services
                 to allow these PCs to share networked resources.
                 Digital's Personal Computing Systems Architecture
                 enables the integration of PCs into Digital's
                 enterprise-wide network systems. The software products
                 developed using this architecture are referred to as
                 the PATHWORKS product family. PATHWORKS products
                 support a variety of PC platforms and operating
                 systems, and accommodate different physical networks
                 and transport and service protocols. This flexibility
                 allows PC users to access resources outside their PC
                 environment, such as remote files, printers, databases,
                 and electronic mail.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5620 (Computer networks and techniques)",
  classification = "C5620 (Computer networks and techniques)",
  keywords =     "computer networks; Database servers; database servers;
                 DEC computers; desktop devices; Desktop devices;
                 gateways; Gateways; Host system services; host system
                 services; PATHWORKS product family; print servers;
                 Print servers; software packages; transaction
                 processing systems; Transaction processing systems",
  thesaurus =    "Computer networks; DEC computers; Software packages",
  treatment =    "P Practical; R Product Review",
}

@Article{Bresnahan:1992:PVF,
  author =       "Edward W. Bresnahan and Siu Yin Cheng",
  title =        "{PATHWORKS} for {VMS} File Server",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "1",
  pages =        "15--23 (or 15--22??)",
  month =        "Winter",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n1/PATHWORKS_for_VMS_File_Server_01oct1992DTJ502P8.ps;
                 http://www.digital.com:80/info/DTJ502/DTJ502SC.TXT",
  abstract =     "The PATHWORKS for VMS file server integrates
                 industry-standard personal computers with VAX VMS
                 systems over a communications network. It implements
                 Microsoft's server message block (SMB) core protocol,
                 which provides resource sharing using a client-server
                 model. The server provides transparent network access
                 to VAX VMS FILES-11 files from a PC's native operating
                 system. The architecture supports multiple transports
                 to ensure interoperability among all PCs connected on
                 an open network. Due to the performance constraints of
                 many PC applications, data caching and a variety of
                 other algorithms and heuristics were employed to
                 decrease request response time. The file server also
                 implements a security model to provide VMS security
                 mechanisms to PC users.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6150N (Distributed systems); C5630 (Networking
                 equipment)",
  classification = "C5630 (Networking equipment); C6150N (Distributed
                 systems)",
  keywords =     "communications network; Communications network;
                 distributed processing; File server; file server; file
                 servers; PATHWORKS for VMS; security; transparent
                 network access; Transparent network access; VMS; VMS
                 file server; VMS security",
  thesaurus =    "Distributed processing; File servers",
  treatment =    "P Practical; R Product Review",
}

@Article{Wells:1992:DOP,
  author =       "Philip J. Wells",
  title =        "The Development of an Optimized {PATHWORKS} Transport
                 Interface",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "1",
  pages =        "24--30 (or 24--31??)",
  month =        "Winter",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n1/The_Development_of_an_Optimize_01oct1992DTJ503P8.ps;
                 http://www.digital.com:80/info/DTJ503/DTJ503SC.TXT",
  abstract =     "Digital's Personal Computing Systems Group developed
                 an optimized transport interface to improve the
                 performance of the PATHWORKS for VMS version 4.0
                 server. The development process involved selecting a
                 transport protocol, designing appropriate interface
                 test scenarios, and measuring server performance for
                 each transport interface model. The engineering team
                 then implemented the optimized design in the server and
                 performed benchmark testing for specified server
                 workloads. Using an optimized transport interface
                 improved server performance by decreasing the time
                 required to complete the test while maintaining or
                 decreasing the percent CPU utilization.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5610N (Network interfaces); C6150N (Distributed
                 systems)",
  classification = "C5610N (Network interfaces); C6150N (Distributed
                 systems)",
  keywords =     "Benchmark testing; benchmark testing; computer
                 interfaces; file servers; File servers; optimized
                 transport interface; Optimized transport interface;
                 PATHWORKS for; PATHWORKS for VMS; Server workloads;
                 server workloads; VMS",
  thesaurus =    "Computer interfaces; File servers",
  treatment =    "P Practical",
}

@Article{Rizzolo:1992:DPU,
  author =       "Anthony J. Rizzolo and Elizabeth A. Brewer and Martha
                 A. Chandler",
  title =        "Design of the {PATHWORKS} for {ULTRIX} File Server",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "1",
  pages =        "31--39 (or 31--40??)",
  month =        "Winter",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n1/Design_of_the_PATHWORKS_for_01oct1992DTJ504P8.ps;
                 http://www.digital.com:80/info/DTJ504/DTJ504SC.TXT",
  abstract =     "The PATHWORKS for ULTRIX product integrates personal
                 computers with the ULTRIX operating system on a local
                 area network. The software supports both the TCP/IP
                 protocol and the DECnet transport stacks. The design
                 and implementation of the PATHWORKS for ULTRIX file
                 server is based on a client-server model. The server
                 provides file, print, mail, and time services to client
                 PCs on the network. Network file service management is
                 accessed through a PC-style menu interface. The file
                 server's performance was optimized to allow parallelism
                 to occur when the client is generating data at the same
                 time the server is writing the data to disk.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6150N (Distributed systems); C5620L (Local area
                 networks)",
  classification = "C5620L (Local area networks); C6150N (Distributed
                 systems)",
  keywords =     "Client-server model; client-server model; DECnet
                 transport stacks; file server; File server; file
                 servers; local area network; Local area network; local
                 area networks; network operating systems; PATHWORKS for
                 ULTRIX; TCP/IP protocol",
  thesaurus =    "File servers; Local area networks; Network operating
                 systems",
  treatment =    "P Practical; R Product Review",
}

@Article{Lichtenberg:1992:DTA,
  author =       "Mitchell P. Lichtenberg and Jeffrey R. Curless",
  title =        "{DECnet} Transport Architecture",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "1",
  pages =        "40--47 (or 40--46??)",
  month =        "Winter",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n1/DECnet_Transport_Architecture_01oct1992DTJ505P8.ps;
                 http://www.digital.com:80/info/DTJ505/DTJ505SC.TXT",
  abstract =     "The PATHWORKS family of software products includes an
                 implementation of the DECnet transport protocol to
                 allow Intel-based personal computers access to network
                 resources. This implementation, the DECnet Network
                 Process (DNP) transport component, provides basic file
                 and print services, terminal emulation, and application
                 services. The new DNP component for the version 4.1
                 release of the PATHWORKS for DOS client software is
                 written in assembly language to improve performance and
                 reduce memory usage. The DOS and OS/2 versions of the
                 component contain the same base source code, thus
                 decreasing the development and maintenance costs.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5640 (Protocols)",
  classification = "C5640 (Protocols)",
  keywords =     "DECnet; DECnet Network; DECnet Network Process; DOS
                 client software; PATHWORKS family; Process; protocols;
                 transport protocol; Transport protocol",
  thesaurus =    "Protocols",
  treatment =    "P Practical",
}

@Article{Nourse:1992:MWN,
  author =       "Andrew W. Nourse",
  title =        "{Microsoft Windows} Network Virtual Device Drivers in
                 {PATHWORKS} for {DOS}",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "1",
  pages =        "47--55 (or 47--56??)",
  month =        "Winter",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n1/Microsoft_Windows_Network_Virt_01oct1992DTJ506P8.ps;
                 http://www.digital.com:80/info/DTJ506/DTJ506SC.TXT",
  abstract =     "Digital's PATHWORKS for DOS version 4.1 personal
                 computer integration software includes two network
                 virtual device drivers for the Microsoft Windows
                 environment. These drivers allow Windows applications
                 operating in a protected processor mode and standard
                 DOS applications in a virtual machine to concurrently
                 access services designed to run in real mode under the
                 DOS operating system. The network virtual device
                 drivers, available only in Microsoft Windows enhanced
                 mode, manage DECnet and NetBIOS operations and permit
                 the full use of these interfaces.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6150N (Distributed systems)",
  classification = "C6150N (Distributed systems)",
  keywords =     "DECnet; device drivers; graphical user interfaces;
                 Microsoft Windows; NetBIOS; network operating systems;
                 network virtual; Network virtual device drivers;
                 personal computer integration software; Personal
                 computer integration software",
  thesaurus =    "Graphical user interfaces; Network operating systems",
  treatment =    "P Practical",
}

@Article{Giokas:1992:EWI,
  author =       "Dennis G. Giokas and Andrew T. Leskowitz",
  title =        "{eXcursion} for {Windows}: integrating two windowing
                 systems",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "1",
  pages =        "56--67",
  month =        "Winter",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/pw-excursion.txt;
                 http://www.digital.com:80/info/DTJ507/DTJ507SC.TXT",
  abstract =     "Digital's eXcursion for Windows, display server is an
                 application for Microsoft Windows. The eXcursion for
                 Windows product is based on the X Window System and
                 allows X client applications to display output, receive
                 input, and exchange data in the Microsoft Windows
                 environment. The eXcursion software visually integrates
                 the X and Microsoft Windows environments-applications
                 from both environments display on a single screen and
                 have the same appearance. A key component of Network
                 Applications Support (NAS) and Digital's PC integration
                 program, the eXcursion for Windows display server
                 enables information exchange among PC users and non-PC
                 users linked throughout a network.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6150N (Distributed systems); C6180G (Graphical user
                 interfaces)",
  classification = "C6150N (Distributed systems); C6180G (Graphical user
                 interfaces)",
  keywords =     "Digital's; display server; Display server; EXcursion
                 for Windows; eXcursion for Windows; file servers;
                 graphical user interfaces; integrated software;
                 Microsoft Windows; Network Applications; Network
                 Applications Support; PC integration program; Support;
                 windowing systems; Windowing systems; X Window System",
  thesaurus =    "File servers; Graphical user interfaces; Integrated
                 software",
  treatment =    "P Practical",
}

@Article{Methot:1992:CMP,
  author =       "Christopher E. Methot",
  title =        "Capacity Modeling of {PATHWORKS} Client-Server
                 Workloads",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "1",
  pages =        "68--76",
  month =        "Winter",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n1/Capacity_Modeling_of_PATHWORK_01oct1992DTJ508P8.ps;
                 http://www.digital.com:80/info/DTJ508/DTJ508SC.TXT",
  abstract =     "PATHWORKS network operating system software runs on
                 the remote server computer that accesses files on
                 behalf of clients connected to a network. The PATHWORKS
                 file server provides clients with centralized backup,
                 printing, and security. Popular desktop applications
                 can be used in a manner that consumes larger or small
                 amounts of server resources. Capacity planning seeks to
                 determine which network filing system is appropriate to
                 current workloads and to predict capacity needs as the
                 PATHWORKS client-server environment changes. The
                 desktop industry lacks standardized performance tests.
                 Digital has developed a general process that can be
                 applied to any workload, including those in which the
                 number of users causing the server process's resource
                 consumption are unknown to a data collector
                 DECperformance Solution software was the primary tool
                 used in the modeling process. Its analytical queuing
                 model was used to predict performance and help define
                 configuration alternatives.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6150N (Distributed systems); C5670 (Network
                 performance)",
  classification = "C5670 (Network performance); C6150N (Distributed
                 systems)",
  keywords =     "Capacity planning; capacity planning; Client-server
                 workloads; client-server workloads; evaluation; file
                 servers; network; network filing; Network filing
                 system; Network operating system; network operating
                 systems; operating system; PATHWORKS client-server
                 environment; PATHWORKS file server; performance;
                 Queuing model; queuing model; system",
  thesaurus =    "File servers; Network operating systems; Performance
                 evaluation",
  treatment =    "P Practical",
}

@Article{Zetterlund:1992:MPP,
  author =       "B. Zetterlund and J. A. Farrell and T. F. Fox",
  title =        "Microprocessor Performance and Process Complexity in
                 {CMOS} Technologies",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "2",
  pages =        "12--24",
  month =        "Spring",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "Digitals CMOS technology is characterized by a scaling
                 methodology that doubles the gate density and improves
                 the gate speed by approximately 30 percent with each
                 new generation. Decreasing feature size from one
                 generation of CMOS technology to the next is
                 fundamental to improving the performance of VLSI chips.
                 Each of Digital's successive CMOS generations has added
                 new technology features to improve performance further.
                 Digital's latest, qualified CMOS technology
                 incorporates features such as low voltage operation,
                 low-resistance topside substrate contacts,
                 low-resistance transistor gate material, local
                 interconnects in SRAMs, three levels of metal
                 interconnect, and fuses for redundancy.",
  acknowledgement = ack-nhfb,
  classcodes =   "B2570D (CMOS integrated circuits); B1265F
                 (Microprocessors and microcomputers); C5130
                 (Microprocessor chips)",
  classification = "B1265F (Microprocessors and microcomputers); B2570D
                 (CMOS integrated circuits); C5130 (Microprocessor
                 chips)",
  keywords =     "circuit technology; CMOS integrated circuits; CMOS
                 technology; digital computers; gate density; Gate
                 density; integrated; local interconnects in SRAMs;
                 Local interconnects in SRAMs; Low voltage operation;
                 low voltage operation; low-; low-resistance;
                 Low-resistance topside substrate contacts;
                 Low-resistance transistor gate material; metal
                 interconnect; Metal interconnect; microprocessor chips;
                 Process complexity; process complexity; resistance
                 topside substrate contacts; scaling methodology;
                 Scaling methodology; transistor gate material; VLSI;
                 VLSI chips",
  thesaurus =    "CMOS integrated circuits; Digital computers;
                 Integrated circuit technology; Microprocessor chips;
                 VLSI",
  treatment =    "P Practical",
}

@Article{Seavey:1992:NDP,
  author =       "Marden H. Seavey and John V. Faricelli and Nadim A.
                 Khalil and G. Nanz and L. M. Richardson and C. O.
                 Schiebl and H. R. Soleimani and M. Thurner",
  title =        "Numerical device and process simulation tools in
                 transistor design",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "2",
  pages =        "25--38",
  month =        "Spring",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib;
                 UnCover library database",
  abstract =     "Numerical device and process simulation programs are
                 fundamental tools in the design and characterization of
                 silicon transistors. These tools employ numerical
                 mathematical methods to simulate the operation of the
                 elemental transistor structures that are the building
                 blocks of CMOS VLSI circuitry. When designing these
                 basic structures, CMOS process and device design teams
                 require efficient, high-performance simulators that use
                 accurate physical models. Digital has developed thermal
                 annealing, mobility, and avalanche models, and has
                 improved the numerical methods used in its process and
                 device simulation programs. Also, supporting software
                 was developed to help integrate the various simulation
                 tools.",
  acknowledgement = ack-nhfb,
  classcodes =   "B1130B (Computer-aided circuit analysis and design);
                 B2570D (CMOS integrated circuits); C7410D (Electronic
                 engineering)",
  classification = "B1130B (Computer-aided circuit analysis and design);
                 B2570D (CMOS integrated circuits); C7410D (Electronic
                 engineering)",
  keywords =     "Avalanche models; avalanche models; circuit CAD; CMOS
                 integrated circuits; CMOS VLSI; Device simulation
                 programs; device simulation programs; digital
                 simulation; mathematical methods; Mathematical methods;
                 Mobility; mobility; process simulation; Process
                 simulation; semiconductor device models; simulators;
                 Simulators; thermal annealing; Thermal annealing;
                 Transistor design; transistor design",
  thesaurus =    "Circuit CAD; CMOS integrated circuits; Digital
                 simulation; Semiconductor device models",
  treatment =    "P Practical",
}

@Article{Nasr:1992:CTF,
  author =       "Andre I. Nasr and Gregory J. Grula and Antonio C.
                 Berti and R. D. Jones",
  title =        "{CMOS}-4 technology for fast logic and dense on-chip
                 memory",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "2",
  pages =        "39--50",
  month =        "Spring",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib;
                 UnCover library database",
  abstract =     "Digital's fourth-generation CMOS technology has
                 produced the industry's highest performance
                 microprocessors. The NVAX and Alpha 21064 chips are
                 based on 0.75- mu m, 3.3-V CMOS technology capable of
                 producing operating frequencies of up to 100 MHz and
                 200 MHz respectively. The high-performance CMOS
                 transistors consist of a 105-AA gate oxide, symmetric
                 n+ and p+ doped polysilicon for surface channel
                 conduction, low threshold voltage, and good turn-off
                 characteristics. The transistor has an on-wafer
                 electrical gate length of 0.5 mu m, a shallow medium
                 doped drain junction for hot electron immunity, a
                 CoSi/sub 2/ salicided gate, and source and drain
                 regions for low interconnect sheet resistance. A
                 TiN/CoSi/sub 2/ local interconnect scheme was used to
                 strap the drain and gate regions to form a
                 six-transistor memory cell with an area equivalent to
                 100 mu m/sup 2/.",
  acknowledgement = ack-nhfb,
  classcodes =   "B1265F (Microprocessors and microcomputers); B2570D
                 (CMOS integrated circuits); C5130 (Microprocessor
                 chips)",
  classification = "B1265F (Microprocessors and microcomputers); B2570D
                 (CMOS integrated circuits); C5130 (Microprocessor
                 chips)",
  keywords =     "100 MHz; 200 MHz; 21064; Alpha; Alpha 21064; chips;
                 CMOS integrated circuits; CMOS technology; CMOS
                 transistors; digital computers; Fast logic; fast logic;
                 low; Low threshold voltage; microprocessor;
                 Microprocessors; microprocessors; NVAX; surface channel
                 conduction; Surface channel conduction; threshold
                 voltage",
  numericalindex = "Frequency 1.0E+08 Hz; Frequency 2.0E+08 Hz",
  thesaurus =    "CMOS integrated circuits; Digital computers;
                 Microprocessor chips",
  treatment =    "P Practical",
}

@Article{Garver:1992:CBP,
  author =       "Marion M. Garver and Joseph M. Bulger and Thomas E.
                 Clark and J. H. Dubash and L. M. Ross and D. J. Welch",
  title =        "{CMOS-4} Back-end Process Development for a {VLSI}
                 0.75 $ \mu $ m Triple-level Interconnection
                 Technology",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "2",
  pages =        "51--72",
  month =        "Spring",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib;
                 UnCover library database",
  abstract =     "Digital's CMOS-4 on-chip interconnect technology,
                 developed for and used in production of the NVAX and
                 the Alpha 21064 microprocessor chips, is a three-level
                 aluminum alloy metallization process with planarized
                 TEOS-based silicon dioxide dielectrics, tungsten-filled
                 contacts and vias, and a minimum feature size of 0.75
                 mu m. The process development effort was a twofold
                 approach based on the maximum use of existing
                 manufacturing capability and the introduction of
                 required new process features. for photolithography,
                 plasma etch, and PVD metallization, the 1.0- mu m
                 manufacturing equipment set and processes were modified
                 and reoptimized for the submicron regime. In addition,
                 two new process features, a blanket CVD tungsten
                 process and a TEOS-based oxide planarization process,
                 were developed and implemented in manufacturing to meet
                 the CMOS-4 technology requirements.",
  acknowledgement = ack-nhfb,
  classcodes =   "B2570D (CMOS integrated circuits); B2550E (Surface
                 treatment)B2550F (Metallisation); B2550G (Lithography);
                 B0520F (Vapour deposition)",
  classification = "B0520F (Vapour deposition); B2550E (Surface
                 treatment ); B2550F (Metallisation); B2550G
                 (Lithography); B2570D (CMOS integrated circuits)",
  keywords =     "aluminium alloys; Aluminum alloy; aluminum alloy;
                 chemical vapour deposition; CMOS; CMOS-4; CVD tungsten
                 process; development; integrated circuit manufacture;
                 integrated circuit technology; integrated circuits;
                 metallisation; metallization; metallization process;
                 Metallization process; on-chip interconnect technology;
                 On-chip interconnect technology; oxide planarization;
                 Oxide planarization process; photolithography;
                 Photolithography; photolithography; plasma etch; Plasma
                 etch; process; Process development; PVD; PVD
                 metallization; sputter etching; tungsten;
                 tungsten-filled contacts; Tungsten-filled contacts;
                 VLSI",
  thesaurus =    "Aluminium alloys; Chemical vapour deposition; CMOS
                 integrated circuits; Integrated circuit manufacture;
                 Integrated circuit technology; Metallisation;
                 Photolithography; Sputter etching; Tungsten; VLSI",
  treatment =    "P Practical",
}

@Article{Nasr:1992:IDR,
  author =       "Mary Beth Nasr and Ellen J. Mager",
  title =        "Implementation of Defect Reduction Strategies into
                 {VLSI} Manufacturing",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "2",
  pages =        "73--82",
  month =        "Spring",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib;
                 UnCover library database",
  abstract =     "CMOS-4 technology combines a high-performance
                 microprocessor with a fast, dense RAM. Consistently
                 obtaining a specified die yield on CMOS-4 devices
                 required the implementation of a series of defect
                 reduction procedures. To achieve high yields,
                 microcontamination and defect reduction plans needed to
                 be in place well before initiation of product
                 manufacturing. Levels of overall cleanliness had to be
                 specified and controlled. Process equipment was
                 monitored at the new particle level of 0.375 mu m and
                 greater to collect data. Defect density test reticles
                 were designed and wafers were processed. Electrical
                 results were then incorporated into a yield model and
                 used to prioritize yield enhancement activities.
                 Experiments were designed to reduce the defect levels
                 of process areas, such as p-gate leakage and metal two
                 short circuits.",
  acknowledgement = ack-nhfb,
  classcodes =   "B2570D (CMOS integrated circuits); B2220C (General
                 fabrication techniques)",
  classification = "B2220C (General fabrication techniques); B2570D
                 (CMOS integrated circuits)",
  keywords =     "Cleanliness; cleanliness; CMOS integrated circuits;
                 defect reduction strategies; Defect reduction
                 strategies; high-; High-performance; integrated circuit
                 manufacture; microprocessor; Microprocessor;
                 microprocessor chips; performance; VLSI; VLSI
                 manufacturing",
  thesaurus =    "CMOS integrated circuits; Integrated circuit
                 manufacture; Microprocessor chips; VLSI",
  treatment =    "P Practical",
}

@Article{Collica:1992:YEM,
  author =       "Randall S. Collica and X. Joseph Dietrich and Rudolf
                 {Lambracht Jr.} and D. G. Lau",
  title =        "A yield enhancement methodology for custom {VLSI}
                 manufacturing",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "2",
  pages =        "83--99",
  month =        "Spring",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib;
                 UnCover library database",
  abstract =     "Integrated circuit yield enhancement is a complex
                 issue due to the many steps involved in the
                 manufacturing process and the number of variables
                 governing the overall yield. The task is further
                 compounded by industry technology goals for continually
                 improving performance achieved by decreasing minimum
                 feature size, increasing chip area, and incorporating
                 more on-chip functionality from generation to
                 generation. In the final analysis, the cost of
                 producing chips is directly related to the yield, hence
                 the necessity for a comprehensive yield improvement
                 strategy.",
  acknowledgement = ack-nhfb,
  classcodes =   "B2220C (General fabrication techniques)",
  classification = "B2220C (General fabrication techniques)",
  keywords =     "integrated circuit manufacture; Manufacturing process;
                 manufacturing process; VLSI; VLSI manufacturing; yield
                 enhancement; Yield enhancement",
  thesaurus =    "Integrated circuit manufacture; VLSI",
  treatment =    "P Practical",
}

@Article{Jackson:1992:THC,
  author =       "Daniel B. Jackson and David A. Bell and Brian S. Doyle
                 and B. J. Fishbein and D. B. Krakauer",
  title =        "Transistor hot carrier reliability assurance in {CMOS}
                 technologies",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "2",
  pages =        "100--113",
  month =        "Spring",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib;
                 UnCover library database",
  abstract =     "Hot carrier-induced degradation of MOS transistors is
                 an essential consideration in the development of CMOS
                 processes. Most empirical approaches that characterize
                 transistor hot carrier lifetime only provide
                 indications of relative degradation; they do not make a
                 connection between circuit operation and hot carrier
                 degradation under experimental stress conditions.
                 Digitals Advanced Semiconductor Development Group has
                 devised a physically based method for ensuring that the
                 hot carrier lifetime of transistors produced by a new
                 process technology is acceptable. The models used
                 incorporate degradation under three voltage bias
                 conditions and allow for the effect of dominant
                 manufacturing variations on transistor hot carrier
                 lifetime. The method also takes into account the
                 sensitivity of the circuit design to transistor hot
                 carrier degradation. This hot carrier reliability
                 assurance gives developers the ability to predict
                 circuit hot carrier lifetime and thus allows them to
                 maximize transistor performance.",
  acknowledgement = ack-nhfb,
  classcodes =   "B2560R (Insulated gate field effect transistors)",
  classification = "B2560R (Insulated gate field effect transistors)",
  keywords =     "carrier degradation; CMOS technologies; degradation;
                 Degradation; hot carrier reliability; Hot carrier
                 reliability; insulated gate field effect transistors;
                 MOS; MOS transistors; reliability; Reliability;
                 reliability; transistor hot; Transistor hot carrier
                 degradation; transistor hot carrier lifetime;
                 Transistor hot carrier lifetime; transistors",
  thesaurus =    "Insulated gate field effect transistors; Reliability",
  treatment =    "P Practical",
}

@Article{Clement:1992:ERV,
  author =       "J. Joseph Clement and Eugenia M. Atakov and James R.
                 Lloyd",
  title =        "Electromigration reliability of {VLSI} interconnect",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "2",
  pages =        "114--125",
  month =        "Spring",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib;
                 UnCover library database",
  abstract =     "Increased speed, reduced line widths, larger chip
                 size, and additional levels of interconnect are all
                 factors that contribute significantly to the improved
                 performance and functionality of VLSI circuits. At the
                 same time, these factors place growing demands on
                 interconnect reliability. Therefore, careful
                 characterization of the interconnect reliability is
                 important in achieving VLSI performance and reliability
                 goals. A scaling model was developed and used to
                 examine factors essential to assuring electromigration
                 reliability in Digital's CMOS-4 technology and in the
                 Alpha 21064 microprocessor which uses this
                 technology.",
  acknowledgement = ack-nhfb,
  classcodes =   "B2570D (CMOS integrated circuits)",
  classification = "B2570D (CMOS integrated circuits)",
  keywords =     "Alpha 21064; Alpha 21064 microprocessor; CMOS
                 integrated circuits; CMOS-4; Digital; electromigration
                 reliability; Electromigration reliability;
                 microprocessor; reliability; Reliability; reliability;
                 VLSI; VLSI interconnect; VLSI performance",
  thesaurus =    "CMOS integrated circuits; Reliability; VLSI",
  treatment =    "P Practical",
}

@Article{Anonymous:1992:EIc,
  author =       "Anonymous",
  title =        "Editors Introduction",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "3",
  pages =        "??--??",
  month =        "Summer",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Jan 04 06:22:45 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/nv-introduction.txt",
  acknowledgement = ack-nhfb,
}

@Article{Supnik:1992:Fc,
  author =       "Robert M. Supnik",
  title =        "Foreword",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "3",
  pages =        "9--??",
  month =        "Summer",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Jan 04 06:22:45 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/nv-foreword.txt",
  acknowledgement = ack-nhfb,
}

@Article{Uhler:1992:NNH,
  author =       "G. Michael Uhler and Debra Bernstein and Larry L. Biro
                 and John F. {Brown III} and John H. Edmondson and
                 Jeffrey D. Pickholtz and Rebecca L. Stamm",
  title =        "The {NVAX} and {NVAX}+ high-performance {VAX}
                 microprocessors",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "3",
  pages =        "11--23",
  month =        "Summer",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n3/The_NVAX_and_NVAX_Highperfor_01jan1993DTJ701P8.ps;
                 http://www.digital.com:80/info/DTJ701/DTJ701SC.TXT",
  abstract =     "The NVAX and NVAX+ CPU chips are high performance VAX
                 microprocessors that use techniques traditionally
                 associated with RISC microprocessor designs to
                 dramatically improve VAX performance. The two chips
                 provide an upgrade path for existing VAX systems and a
                 migration path from VAX systems to the new Alpha AXP
                 systems. The design evolved throughout the project as
                 time to-market, performance, and complexity trade-offs
                 were made. Special design features address the issues
                 of debug, maintenance, and analysis.",
  acknowledgement = ack-nhfb,
  classcodes =   "B1265F (Microprocessors and microcomputers); C5130
                 (Microprocessor chips); C5220 (Computer architecture)",
  classification = "B1265F (Microprocessors and microcomputers); C5130
                 (Microprocessor chips); C5220 (Computer architecture)",
  keywords =     "Alpha AXP systems; Complexity; complexity; Debug;
                 debug; high-performance VAX microprocessors;
                 High-performance VAX microprocessors; Maintenance;
                 maintenance; microprocessor chips; migration; Migration
                 path; NVAX; NVAX+; path; performance; Performance;
                 reduced instruction set computing",
  thesaurus =    "Microprocessor chips; Reduced instruction set
                 computing",
  treatment =    "P Practical",
}

@Article{Donchin:1992:NCC,
  author =       "Dale R. Donchin and Timothy C. Fischer and Thomas F.
                 Fox and Victor Peng and Ronald P. Preston and William
                 R. Wheeler",
  title =        "The {NVAX CPU} Chip: Design Challenges, Methods, and
                 {CAD} Tools",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "3",
  pages =        "24--37",
  month =        "Summer",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n3/The_NVAX_CPU_Chip_Design_01jan1993DTJ702P8.ps;
                 http://www.digital.com:80/info/DTJ702/DTJ702SC.TXT",
  abstract =     "The NVAX CPU chip is a 1.3 million transistor, VAX
                 microprocessor designed in Digital's 0.75-micrometer
                 CMOS-4 technology. It has a typical cycle time of 12 ns
                 under worst-case operating conditions. The goal of the
                 chip design team was to design a high-performance,
                 robust, and reliable chip, within the constraints of a
                 short schedule. Design strategies were developed to
                 achieve this goal, including organization of a chip
                 design flow and new implementation and verification
                 methods. New proprietary CAD tools also played
                 important roles in the chip development.",
  acknowledgement = ack-nhfb,
  classcodes =   "B1265F (Microprocessors and microcomputers); B2570D
                 (CMOS integrated circuits); C5130 (Microprocessor
                 chips); C7410D (Electronic engineering)",
  classification = "B1265F (Microprocessors and microcomputers); B2570D
                 (CMOS integrated circuits); C5130 (Microprocessor
                 chips); C7410D (Electronic engineering)",
  keywords =     "0.75; 0.75 Micron; 12 Ns; 12 ns; CAD tools; Chip
                 design flow; chip design flow; circuit CAD; CMOS
                 integrated circuits; CMOS-4; CMOS-4 technology; micron;
                 microprocessor chips; NVAX CPU chip; technology; VAX
                 microprocessor; verification methods; Verification
                 methods",
  numericalindex = "Size 7.5E-07 m; Time 1.2E-08 s",
  thesaurus =    "Circuit CAD; CMOS integrated circuits; Microprocessor
                 chips",
  treatment =    "P Practical",
}

@Article{Anderson:1992:LVN,
  author =       "Walker Anderson",
  title =        "Logical Verification of the {NVAX CPU} Chip Design",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "3",
  pages =        "38--46",
  month =        "Summer",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n3/Logical_Verification_of_the_NV_01jan1993DTJ703P8.ps;
                 http://www.digital.com:80/info/DTJ703/DTJ703SC.TXT",
  abstract =     "Digital's NVAX high-performance microprocessor has a
                 complex logical design. A rigorous simulation based
                 verification effort was undertaken to ensure that there
                 were no logical errors. At the core of the effort were
                 implementation-oriented, directed, pseudo random
                 exercisers. These exercisers were supplemented with
                 implementation-specific focused tests and existing VAX
                 architectural tests. Only 15 logical bugs, all
                 unobtrusive, were detected in the first pass design,
                 and the operating system booted with first-pass chips
                 in a prototype system.",
  acknowledgement = ack-nhfb,
  classcodes =   "B1265F (Microprocessors and microcomputers); B1265B
                 (Logic circuits); C5130 (Microprocessor chips); C5210
                 (Logic design methods)",
  classification = "B1265B (Logic circuits); B1265F (Microprocessors and
                 microcomputers); C5130 (Microprocessor chips); C5210
                 (Logic design methods)",
  keywords =     "logic CAD; logic testing; Logic verification; logic
                 verification; microprocessor chips; NVAX CPU chip
                 design; Operating system; operating system; Prototype
                 system; prototype system; rigorous; Rigorous
                 simulation-based verification effort; simulation-based
                 verification effort",
  thesaurus =    "Logic CAD; Logic testing; Microprocessor chips",
  treatment =    "P Practical",
}

@Article{Chisvin:1992:VMP,
  author =       "Lawrence Chisvin and Gregg A. Bouchard and Thomas M.
                 Wenners",
  title =        "The {VAX 6000 Model 600} processor",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "3",
  pages =        "47--59",
  month =        "Summer",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n3/The_VAX_6000_Model_600_01jan1993DTJ704P8.ps;
                 http://www.digital.com:80/info/DTJ704/DTJ704SC.TXT",
  abstract =     "The Model 600 is the newest member of the VAX 6000
                 series of XMI2-based, multiprocessing computers. The
                 Model 600 processor integrates easily into existing
                 platforms. Each processor module provides 40.5
                 SPECmarks of performance made possible by the NVAX CPU
                 chip. The major VLSI interface chip, called NEXMI, was
                 created using Digital's internal CMOS-3 design and
                 layout process. The ability to design and fabricate the
                 interface chip internally was critical to delivering a
                 working CPU prototype module on schedule. The
                 aggressive module timing goals were met by employing
                 previous module experience in combination with
                 extensive SPICE simulation.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5440 (Multiprocessor systems and techniques); C5470
                 (Performance evaluation and testing); C7410D
                 (Electronic engineering)",
  classification = "C5440 (Multiprocessor systems and techniques); C5470
                 (Performance evaluation and testing); C7410D
                 (Electronic engineering)",
  keywords =     "circuit analysis computing; CMOS-3 design; computers;
                 CPU prototype; layout process; Layout process;
                 multiprocessing; Multiprocessing computers;
                 multiprocessing systems; NEXMI; NVAX CPU chip;
                 performance; Performance; performance evaluation;
                 simulation; SPICE; SPICE simulation; VAX 6000 Model 600
                 processor; VLSI interface chip; XM12-based",
  thesaurus =    "Circuit analysis computing; Multiprocessing systems;
                 Performance evaluation",
  treatment =    "P Practical",
}

@Article{Crowell:1992:DVMa,
  author =       "Jonathan C. Crowell and Kwong-Tak A. Chui and Thomas
                 E. Kopec and Samyojita A. Nadkarni and Dean A. Sovie",
  title =        "Design of the {VAX 4000 Model 400, 500, and 600
                 Systems}",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "3",
  pages =        "60--72",
  month =        "Summer",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n3/Design_of_the_VAX_4000_01jan1993DTJ705P8.ps;
                 http://www.digital.com:80/info/DTJ705/DTJ705SC.TXT",
  abstract =     "The design of Digital's NVAX CPU chip provided the
                 opportunity to bring RISC-class performance to deskside
                 CISC VAX computer systems. The new VAX 4000 Model 400,
                 500, and 600 low-end systems take full advantage of the
                 performance capabilities of the NVAX microprocessor.
                 The three systems offer from two to four times the
                 performance of the previous top-of-the-line VAX 4000
                 Model 300 system in the same deskside enclosure. To
                 achieve this increased performance, Digital's systems
                 engineers designed a new high-performance memory
                 controller chip as part of the CPU module, whose basic
                 design is shared by the three systems. In addition, a
                 high-performance memory module and a VLSI bus adapter
                 chip were designed.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5440 (Multiprocessor systems and techniques); C5470
                 (Performance evaluation and testing)",
  classification = "C5440 (Multiprocessor systems and techniques); C5470
                 (Performance evaluation and testing)",
  keywords =     "chip; CISC; CISC VAX computer systems; CPU module;
                 memory controller; Memory controller chip; Model 500;
                 Model 600; multiprocessing systems; NVAX
                 microprocessor; Performance; performance; performance
                 evaluation; VAX 4000 Model 400; VAX computer systems;
                 VLSI bus adapter chip",
  thesaurus =    "Multiprocessing systems; Performance evaluation",
  treatment =    "P Practical",
}

@Article{Crowell:1992:DVMb,
  author =       "Jonathan C. Crowell and David W. Maruska",
  title =        "The design of the {VAX 4000 Model 100} and {MicroVAX
                 3100 Model 90} desktop systems",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "3",
  pages =        "73--81",
  month =        "Summer",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n3/The_Design_of_the_VAX_01jan1993DTJ706P8.ps;
                 http://www.digital.com:80/info/DTJ706/DTJ706SC.TXT",
  abstract =     "The MicroVAX 3100 Model 90 and VAX 4000 Model 100
                 systems were designed to meet the growing demand for
                 low-cost, high-performance desktop servers and
                 timesharing systems. Both systems are based on the NVAX
                 CPU chip and a set of VLSI support chips, which provide
                 outstanding CPU and I/O performance. Housed in like
                 desktop enclosures, the two systems provide 24 times
                 the CPU performance of the original VAX-11/780
                 computer. With over 2.5 gigabytes of disk storage and
                 128 megabytes of main memory; the complete base system
                 fits in less than one cubic foot of space. The system
                 design was highly leveraged from existing designs to
                 help meet an aggressive schedule.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5440 (Multiprocessor systems and techniques); C5470
                 (Performance evaluation and testing)",
  classification = "C5440 (Multiprocessor systems and techniques); C5470
                 (Performance evaluation and testing)",
  keywords =     "CPU; I/O performance; MicroVAX 3100 Model 90 desktop
                 systems; multiprocessing systems; performance
                 evaluation; VAX 4000 Model 100; VAX-11/780 computer;
                 VLSI",
  thesaurus =    "Multiprocessing systems; Performance evaluation",
  treatment =    "P Practical",
}

@Article{Callander:1992:VM,
  author =       "Michael A. {Callander, Sr.} and Lauren M. Carlson and
                 Andrew R. Ladd and Mitchell O. Norcross",
  title =        "The {VAXstation} 4000 {Model} 90",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "3",
  pages =        "82--91",
  month =        "Summer",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n3/The_VAXstation_4000_Model_90_01jan1993DTJ707P8.ps;
                 http://www.digital.com:80/info/DTJ707/DTJ707SC.TXT",
  abstract =     "The VAXstation 4000 Model 90 is the latest member of
                 the VAXstation product line. Based on the NVAX CPU, the
                 Model 90 was designed as a module upgrade to the
                 VAXstation 4000 Model 60 system. The Model 90 has 2.7
                 times the CPU performance of the Model 60 and provides
                 base-level, two-dimensional graphics performance of
                 266,000 vectors per second. It supports up to 128MB of
                 memory, an SCSI-1 bus interface, a TURBOchannel option,
                 a synchronous communication option, and several
                 graphics options. The design team used only
                 programmable devices to implement the new logic
                 designed into the system. In addition, a breadboard
                 provided the basis for logic and software
                 verification.",
  acknowledgement = ack-nhfb,
  classcodes =   "B1265F (Microprocessors and microcomputers); C5430
                 (Microcomputers); C5470 (Performance evaluation and
                 testing)",
  classification = "B1265F (Microprocessors and microcomputers); C5430
                 (Microcomputers); C5470 (Performance evaluation and
                 testing)",
  keywords =     "Breadboard; breadboard; CPU performance; dimensional
                 graphics performance; NVAX CPU; performance evaluation;
                 SCSI-1 bus interface; Software verification; software
                 verification; Synchronous communication option;
                 synchronous communication option; TURBOchannel option;
                 two-; Two-dimensional graphics performance; VAXstation
                 4000 Model 90; workstations",
  thesaurus =    "Performance evaluation; Workstations",
  treatment =    "P Practical",
}

@Article{Porter:1992:VEH,
  author =       "Brian Porter",
  title =        "{VAX 6000} error handling: a pragmatic approach",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "3",
  pages =        "92--104",
  month =        "Summer",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n3/VAX_6000_Error_Handling_A_01jan1993DTJ708P8.ps;
                 http://www.digital.com:80/info/DTJ708/DTJ708SC.TXT",
  abstract =     "The VMS operating system's CPU-dependent support of
                 the VAX 6000 family of computers implements a complex
                 and sophisticated set of error-handling routines. At
                 the start of a VMS session, these routines help
                 construct the necessary framework to support the I/O
                 subsystem as the system begins to emerge. For much of a
                 VMS session, these routines then lay [sic] dormant
                 within the SYSLOA image. Periodically, when aroused,
                 they peer into hardware registers looking for signs of
                 trouble. Often, all is well, and the routines return to
                 hibernation. On those occasions when the hardware
                 requires assistance, error handling takes complete
                 control of the system. It has but one mission: identify
                 the error, recover if possible, but at all costs ensure
                 that the integrity of the system remains intact and
                 that data is preserved.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5440 (Multiprocessor systems and techniques); C5470
                 (Performance evaluation and testing)",
  classification = "C5440 (Multiprocessor systems and techniques); C5470
                 (Performance evaluation and testing)",
  keywords =     "dependent support; fault tolerant computing; Hardware
                 registers; hardware registers; multiprocessing systems;
                 performance evaluation; SYSLOA image; VAX 6000 error
                 handling; VMS operating system's CPU-; VMS operating
                 system's CPU-dependent support",
  thesaurus =    "Fault tolerant computing; Multiprocessing systems;
                 Performance evaluation",
  treatment =    "P Practical",
}

@Article{Anonymous:1992:EId,
  author =       "Anonymous",
  title =        "Editors Introduction",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "4",
  pages =        "??--??",
  month =        "Fall",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Jan 04 06:22:45 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/axp-introduction.txt",
  acknowledgement = ack-nhfb,
}

@Article{Supnik:1992:Fd,
  author =       "Robert M. Supnik",
  title =        "Foreword",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "4",
  pages =        "??--??",
  month =        "Fall",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Jan 04 06:22:45 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/axp-foreword.txt",
  acknowledgement = ack-nhfb,
}

@Article{Sites:1992:AAA,
  author =       "Richard L. Sites",
  title =        "Alpha {AXP} architecture",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "4",
  pages =        "19--34",
  month =        "Fall",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n4/Alpha_AXP_Architecture_01apr1993DTJ801P8.ps;
                 http://www.digital.com:80/info/DTJ801/DTJ801SC.TXT",
  abstract =     "The Alpha AXP 64-bit computer architecture is designed
                 for high performance and longevity. Because of the
                 focus on multiple instruction issue, the architecture
                 does not contain facilities such as branch delay slots,
                 byte writes, and precise arithmetic exceptions. Because
                 of the focus on multiple processors, the architecture
                 does contain a careful shared-memory model,
                 atomic-update primitive instructions, and relaxed
                 read/write ordering. The first implementation of the
                 Alpha AXP architecture is the world's fastest
                 single-chip microprocessor. The DECchip 21064 runs
                 multiple operating systems and runs native-compiled
                 programs that were translated from the VAX and MIPS
                 architectures.\par

                 {\em Thus in all these cases the Romans did what all
                 wise princes ought to do; namely, not only to look to
                 all present troubles, but also to those in the future,
                 against which they provided with the utmost prudence.
                 -- Niccolo Machiavelli, The Prince}",
  acknowledgement = ack-nhfb,
  classcodes =   "C5220P (Parallel architecture); C5130 (Microprocessor
                 chips); C5440 (Multiprocessor systems and techniques)",
  classification = "C5130 (Microprocessor chips); C5220P (Parallel
                 architecture); C5440 (Multiprocessor systems and
                 techniques)",
  keywords =     "21064; 64; 64 Bit; Alpha AXP 64-bit computer
                 architecture; Atomic-update primitive instructions;
                 atomic-update primitive instructions; bit; computing;
                 DEC computers; DECchip; DECchip 21064; high
                 performance; High performance; memory model;
                 microprocessor chips; MIPS architectures; multiple
                 instruction issue; Multiple instruction issue; multiple
                 processors; Multiple processors; native-compiled
                 programs; Native-compiled programs; read/write
                 ordering; reduced instruction set; relaxed; Relaxed
                 read/write ordering; shared memory systems; shared-;
                 Shared-memory model; Single-chip microprocessor;
                 single-chip microprocessor; VAX",
  numericalindex = "Word length 6.4E+01 bit",
  thesaurus =    "DEC computers; Microprocessor chips; Reduced
                 instruction set computing; Shared memory systems",
  treatment =    "P Practical; R Product Review",
}

@Article{Dobberpuhl:1992:DCM,
  author =       "Daniel W. Dobberpuhl and Richard T. Witek and Randy
                 Allmon and Robert Anglin and David Bertucci and Sharon
                 Britton and Linda Chao and Robert A. Conrad and Daniel
                 E. Dever and Bruce Gieseke and Soha M. N. Hassoun and
                 Gregory W. Hoeppner and Kathryn Kuchler and Maureen
                 Ladd and Burton M. Leary and Liam Madden and Edward J.
                 McLellan and Derrick R. Meyer and James Montanaro and
                 Donald A. Priore and Vidya Rajagopalan and Sridhar
                 Samudrala and Sribalan Santhanam",
  title =        "A 200-{MHz} 64-bit Dual-Issue {CMOS} Microprocessor",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "4",
  pages =        "35--50",
  month =        "Fall",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n4/A_200MHz_64bit_Dualissue_CM_01apr1993DTJ802P8.ps;
                 http://www.digital.com:80/info/DTJ802/DTJ802SC.TXT",
  abstract =     "A 400-mips/200-MFLOPS (peak) custom 64-bit VLSI CPU
                 chip is described. The chip is fabricated in a 0.75-$
                 \mu $ m CMOS technology utilizing three levels of
                 metalization and optimized for 3.3-V operation. The die
                 size is 16.8 mm $ \times $ 13.9 mm and contains 1.68
                 million transistors. The chip includes separate 8KB
                 instruction and data caches and a fully pipelined
                 floating-point unit that can handle both IEEE and VAX
                 standard floating-point data types. It is designed to
                 execute two instructions per cycle among scoreboarded
                 integer, floating-point, address, and branch execution
                 units. Power dissipation is 30 W at 200-MHz
                 operation.",
  acknowledgement = ack-nhfb,
  classcodes =   "B2570D (CMOS integrated circuits); C5130
                 (Microprocessor chips); C5220 (Computer architecture)",
  classification = "B2570D (CMOS integrated circuits); C5130
                 (Microprocessor chips); C5220 (Computer architecture)",
  keywords =     "200; 200 MFLOPS; 200 MHz; 400 MIPS; 64 bit; 64 Bit;
                 Branch execution units; branch execution units; CMOS
                 integrated circuits; CMOS technology; Custom 64-bit
                 VLSI CPU chip; custom 64-bit VLSI CPU chip; data
                 caches; Data caches; Die size; die size; fully
                 pipelined floating-point unit; Fully pipelined
                 floating-point unit; integer; metallization;
                 Metallization; MFLOPS; microprocessor chips; pipeline;
                 processing; reduced instruction set computing;
                 scoreboarded; Scoreboarded integer; VAX standard
                 floating-point data types; VLSI",
  numericalindex = "Word length 6.4E+01 bit; Computer execution rate
                 4.0E+08 IPS; Computer speed 2.0E+08 FLOPS; Frequency
                 2.0E+08 Hz",
  thesaurus =    "CMOS integrated circuits; Microprocessor chips;
                 Pipeline processing; Reduced instruction set computing;
                 VLSI",
  treatment =    "P Practical",
}

@Article{Thacker:1992:ADU,
  author =       "Charles P. Thacker and David G. Conroy and Lawrence C.
                 Stewart",
  title =        "The {Alpha} Demonstration Unit: {A} High-performance
                 Multiprocessor for Software and Chip Development",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "4",
  pages =        "51--65",
  month =        "Fall",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n4/The_Alpha_Demonstration_Unit_01apr1993DTJ803P8.ps;
                 http://www.digital.com:80/info/DTJ803/DTJ803SC.TXT",
  abstract =     "Digital's first RISC system built using the 64-bit
                 Alpha AXP architecture is the prototype known as the
                 Alpha demonstration unit or ADU. It consists of a
                 backplane containing 14 slots, each of which can hold a
                 CPU module, a 64 MB storage module, or a module
                 containing two 50 MB/s I/O channels. A new cache
                 coherence protocol provides each processor and I/O
                 channel with a consistent view of shared memory.
                 Thirty-five ADU systems were built within Digital to
                 accelerate software development and early chip
                 testing.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5220P (Parallel architecture); C5440 (Multiprocessor
                 systems and techniques)",
  classification = "C5220P (Parallel architecture); C5440
                 (Multiprocessor systems and techniques)",
  keywords =     "50 Mbit/s; 64-bit Alpha AXP architecture; 64-Bit Alpha
                 AXP architecture; ADU; Alpha; Alpha demonstration unit;
                 backplane; Backplane; buffer storage; cache coherence
                 protocol; Cache coherence protocol; consistent;
                 Consistent view; CPU module; demonstration unit; early
                 chip; Early chip testing; I/O channel; memory systems;
                 module; reduced instruction set computing; RISC system;
                 shared; Shared memory; shared memory; Software
                 development; software development; storage; Storage
                 module; testing; view",
  numericalindex = "Bit rate 5.0E+07 bit/s",
  thesaurus =    "Buffer storage; Reduced instruction set computing;
                 Shared memory systems",
  treatment =    "P Practical",
}

@Article{Dutton:1992:DDA,
  author =       "Todd A. Dutton and Daniel Eiref and Hugh R. Kurth and
                 James J. Reisert and Robin L. Stewart",
  title =        "The design of the {DEC} 3000 {AXP} systems, two
                 high-performance workstations",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "4",
  pages =        "66--81",
  month =        "Fall",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n4/The_Design_of_the_DEC_01apr1993DTJ804P8.ps;
                 http://www.digital.com:80/info/DTJ804/DTJ804SC.TXT",
  abstract =     "A family of high-performance 64-bit RISC workstations
                 and servers based on the new Digital Alpha AXP
                 architecture is described. The hardware implementation
                 uses the powerful new DECchip 21064 CPU and employs a
                 sophisticated new system interconnect structure to
                 achieve the necessary high bandwidth and low-latency
                 cache, memory, and I/O buses. The memory subsystem of
                 the high-end DEC 3000 AXP Model 500 provides a 512 KB
                 secondary cache and up to 1 GB of memory. The I/O
                 subsystem of the Model 500 has integral two-dimensional
                 graphics, SCSI, ISDN, and six TURBOchannel expansion
                 slots.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5440 (Multiprocessor systems and techniques); C5220P
                 (Parallel architecture)",
  classification = "C5220P (Parallel architecture); C5440
                 (Multiprocessor systems and techniques)",
  keywords =     "3000 AXP Model 500; 64 Bit; 64 bit; architecture;
                 bandwidth; DECchip 21064 CPU; Digital Alpha AXP;
                 Digital Alpha AXP architecture; Hardware
                 implementation; hardware implementation; high; High
                 bandwidth; high-end DEC; High-end DEC 3000 AXP Model
                 500; high-performance 64-bit RISC workstations;
                 High-performance 64-bit RISC workstations; instruction
                 set computing; integral two-dimensional graphics;
                 Integral two-dimensional graphics; ISDN; low-latency
                 cache; Low-latency cache; memory subsystem; Memory
                 subsystem; multiprocessing systems; parallel
                 architectures; reduced; SCSI; Sophisticated new system
                 interconnect structure; sophisticated new system
                 interconnect structure; TURBOchannel expansion slots;
                 workstations",
  numericalindex = "Word length 6.4E+01 bit",
  thesaurus =    "Multiprocessing systems; Parallel architectures;
                 Reduced instruction set computing; Workstations",
  treatment =    "P Practical; R Product Review",
}

@Article{Maskas:1992:DPD,
  author =       "Barry A. Maskas and Stephen F. Shirron and Nicholas A.
                 Warchol",
  title =        "Design and performance of the {DEC} 4000 {AXP}
                 departmental server computing systems",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "4",
  pages =        "82--99",
  month =        "Fall",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n4/Design_and_Performance_of_the_01apr1993DTJ805P8.ps;
                 http://www.digital.com:80/info/DTJ805/DTJ805SC.TXT",
  abstract =     "DEC 4000 AXP systems demonstrate the highest
                 performance and functionality for Digital's 4000 series
                 of departmental server systems. DEC 4000 AXP systems
                 are based on Digital's Alpha AXP architecture and the
                 IEEE's Futurebus+ profile B standard. They provide
                 symmetric multiprocessing performance for OpenVMS AXP
                 and DEC OSF/1 AXP operating systems in an office
                 environment. The DEC 4000 AXP systems were designed to
                 optimize the cost-performance ratio and to include
                 upgradability and expandability. The systems combine
                 the DECchip 21064 microprocessor, submicron CMOS
                 sea-of-gates technology, CMOS memory and I/O
                 peripherals technology, a high-performance
                 multiprocessing backplane interconnect, and modular
                 system design to supply the most advanced functionality
                 for performance-driven applications.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5440 (Multiprocessor systems and techniques); C5630
                 (Networking equipment); C5220P (Parallel
                 architecture)",
  classification = "C5220P (Parallel architecture); C5440
                 (Multiprocessor systems and techniques); C5630
                 (Networking equipment)",
  keywords =     "Advanced functionality; advanced functionality; Alpha
                 AXP; Alpha AXP architecture; applications;
                 architecture; CMOS; CMOS memory; cost-performance;
                 Cost-performance ratio; DEC 4000 AXP systems; DEC
                 computers; DEC OSF/1 AXP; DEC OSF/1 AXP operating
                 systems; DECchip 21064; DECchip 21064 microprocessor;
                 departmental server systems; Departmental server
                 systems; design; expandability; Expandability; file
                 servers; high-performance; High-performance
                 multiprocessing backplane interconnect; I/O peripherals
                 technology; IEEE's Futurebus+profile B standard;
                 memory; microprocessor; modular system; Modular system
                 design; multiprocessing backplane interconnect;
                 multiprocessing performance; multiprocessing systems;
                 office environment; Office environment; OpenVMS AXP;
                 operating systems; parallel architectures;
                 performance-driven; Performance-driven applications;
                 ratio; Submicron CMOS sea-of-gates technology;
                 submicron CMOS sea-of-gates technology; symmetric;
                 Symmetric multiprocessing performance; Upgradability;
                 upgradability",
  thesaurus =    "DEC computers; File servers; Multiprocessing systems;
                 Parallel architectures",
  treatment =    "P Practical",
}

@Article{Allison:1992:TDD,
  author =       "Brian R. Allison and Catharine van Ingen",
  title =        "Technical Description of the {DEC 7000} and {DEC 10000
                 AXP} Family",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "4",
  pages =        "100--110",
  month =        "Fall",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n4/Technical_Description_of_the_D_01apr1993DTJ806P8.ps;
                 http://www.digital.com:80/info/DTJ806/DTJ806SC.TXT",
  abstract =     "The DEC 7000 and DEC 10000 products are mid range and
                 mainframe Alpha AXP system offerings from Digital
                 Equipment Corporation. These machines were designed to
                 meet the needs of large commercial and scientific
                 applications and therefore are high-performance,
                 expandable systems that can be easily upgraded. The DEC
                 7000 and 10000 systems utilize the DECchip 21064
                 microprocessor operating at speeds up to 200 MHz. The
                 high-speed chips, large caches, multiprocessor system
                 architecture, high-performance backplane interconnect,
                 and large memory capacity combine to create mainframe
                 class performance with a cost and size previously
                 attributed to mid-range systems.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5440 (Multiprocessor systems and techniques); C5220P
                 (Parallel architecture)",
  classification = "C5220P (Parallel architecture); C5440
                 (Multiprocessor systems and techniques)",
  keywords =     "21064 microprocessor; applications; backplane
                 interconnect; class performance; DEC 10000 products;
                 DEC 7000; DEC computers; DECchip; DECchip 21064
                 microprocessor; Digital Equipment Corporation;
                 Expandable systems; expandable systems;
                 high-performance; High-performance; High-performance
                 backplane interconnect; high-speed chips; High-speed
                 chips; large caches; Large caches; large memory
                 capacity; Large memory capacity; mainframe Alpha AXP
                 system; Mainframe Alpha AXP system offerings;
                 mainframe-; Mainframe-class performance; microprocessor
                 chips; multiprocessing systems; multiprocessor system
                 architecture; Multiprocessor system architecture;
                 offerings; scientific; Scientific applications",
  thesaurus =    "DEC computers; Microprocessor chips; Multiprocessing
                 systems",
  treatment =    "P Practical; R Product Review",
}

@Article{Kronenberg:1992:POV,
  author =       "Nancy P. Kronenberg and Thomas R. Benson and Wayne M.
                 Cardoza and Ravindran Jagannathan and Benjamin J.
                 {Thomas III}",
  title =        "Porting {OpenVMS} From {VAX} to {Alpha AXP}",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "4",
  pages =        "111--120",
  month =        "Fall",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n4/Porting_OpenVMS_from_VAX_to_01apr1993DTJ807P8.ps;
                 http://www.digital.com:80/info/DTJ807/DTJ807SC.TXT",
  abstract =     "The OpenVMS operating system, developed by Digital for
                 the VAX family of computers, was recently moved from
                 the VAX to the Alpha AXP architecture. The Alpha AXP
                 architecture is a new RISC architecture introduced by
                 Digital in 1992. This paper describes solutions to
                 several problems in porting the operating system, in
                 addition to performance benefits measured on one of the
                 systems that implements this new architecture.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5220P (Parallel architecture); C5440 (Multiprocessor
                 systems and techniques); C6150J (Operating systems)",
  classification = "C5220P (Parallel architecture); C5440
                 (Multiprocessor systems and techniques); C6150J
                 (Operating systems)",
  keywords =     "(computers); Alpha AXP; Alpha AXP architecture;
                 architecture; computing; DEC computers; multiprocessing
                 systems; OpenVMS operating system; Operating system;
                 operating system; operating systems; parallel
                 architectures; Performance benefits; performance
                 benefits; reduced instruction set; RISC architecture;
                 VAX family",
  thesaurus =    "DEC computers; Multiprocessing systems; Operating
                 systems [computers]; Parallel architectures; Reduced
                 instruction set computing",
  treatment =    "P Practical",
}

@Article{Blickstein:1992:GOC,
  author =       "David S. Blickstein and Peter W. Craig and Caroline S.
                 Davidson and R. Neil {Faiman, Jr.} and Kent D. Glossop
                 and Richard B. Grove and Steven O. Hobbs and William B.
                 Noyce",
  title =        "The {GEM} Optimizing Compiler System",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "4",
  pages =        "121--136",
  month =        "Fall",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n4/The_GEM_Optimizing_Compiler_Sy_01apr1993DTJ808P8.ps;
                 http://www.digital.com:80/info/DTJ808/DTJ808SC.TXT",
  abstract =     "The GEM compiler system is the technology Digital is
                 using to build state-of-the-art compiler products for a
                 variety of languages and hardware\slash software
                 platforms. Portable, modular software components with
                 carefully specified interfaces simplify the engineering
                 of diverse compilers. A single optimizer, independent
                 of the language and the target platform, transforms the
                 intermediate language generated by the front end into a
                 semantically equivalent form that executes faster on
                 the target machine. The GEM system supports a range of
                 languages and has been successfully retargeted and
                 rehosted for the Alpha AXP and MIPS architectures and
                 for several operating environments.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6150C (Compilers, interpreters and other processors);
                 C6140D (High level languages); C5220P (Parallel
                 architecture)",
  classification = "C5220P (Parallel architecture); C6140D (High level
                 languages); C6150C (Compilers, interpreters and other
                 processors)",
  keywords =     "Alpha AXP; Compiler products; compiler products; DEC
                 computers; environments; equivalent form; GEM compiler
                 system; hardware/software; Hardware/software platforms;
                 high level languages; Intermediate language;
                 intermediate language; MIPS architectures; Modular
                 software components; modular software components;
                 operating; Operating environments; parallel
                 architectures; platforms; program compilers;
                 semantically; Semantically equivalent form; Single
                 optimizer; single optimizer; Target platform; target
                 platform",
  thesaurus =    "DEC computers; High level languages; Parallel
                 architectures; Program compilers",
  treatment =    "P Practical; R Product Review",
}

@Article{Sites:1992:BT,
  author =       "Richard L. Sites and Anton Chernoff and Matthew B.
                 Kirk and Maurice P. Marks and Scott G. Robinson",
  title =        "Binary translation",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "4",
  pages =        "137--152",
  month =        "Fall",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n4/Binary_Translation_01apr1993DTJ809P8.ps;
                 http://www.digital.com:80/info/DTJ809/DTJ809SC.TXT",
  abstract =     "Binary translation is a technique used to change an
                 executable program for one computer architecture and
                 operating system into an executable program for a
                 different computer architecture and operating system.
                 Two binary translators are among the migration tools
                 available for Alpha AXP computers: VEST translates
                 OpenVMS VAX binary images to OpenVMS AXP images; mx
                 translates ULTRIX MIPS images to DEC OSF/1 AXP images.
                 In both cases, translated code usually runs on Alpha
                 AXP computers as fast or faster than the original code
                 runs on the original architecture. In contrast to other
                 migration efforts in the industry, the VAX translator
                 reproduces subtle CISC behavior on a RISC machine, and
                 both open-ended translators provide good performance on
                 dynamically modified programs. Alpha AXP binary
                 translators are important migration tools --- hundreds
                 of translated OpenVMS VAX and ULTRIX MIPS images
                 currently run on Alpha AXP systems.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6150C (Compilers, interpreters and other processors);
                 C5220P (Parallel architecture); C5440 (Multiprocessor
                 systems and techniques)",
  classification = "C5220P (Parallel architecture); C5440
                 (Multiprocessor systems and techniques); C6150C
                 (Compilers, interpreters and other processors)",
  keywords =     "Alpha AXP computers; binary translators; Binary
                 translators; CISC behavior; computer architecture;
                 Computer architecture; DEC computers; DEC OSF/1 AXP
                 images; Dynamically modified programs; dynamically
                 modified programs; Executable program; executable
                 program; Migration tools; migration tools; MIPS images;
                 open-ended; Open-ended translators; OpenVMS AXP images;
                 OpenVMS VAX binary images; Operating system; operating
                 system; parallel architectures; program interpreters;
                 reduced instruction set computing; RISC machine;
                 Translated code; translated code; translator;
                 translators; ULTRIX; ULTRIX MIPS images; VAX; VAX
                 translator; VEST",
  thesaurus =    "DEC computers; Parallel architectures; Program
                 interpreters; Reduced instruction set computing",
  treatment =    "P Practical",
}

@Article{Coffler:1992:PDD,
  author =       "Jeffrey A. Coffler and Zia Mohamed and Peter M.
                 Spiro",
  title =        "Porting {Digital}'s database management products to
                 the {Alpha AXP} platform",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "4",
  pages =        "153--164",
  month =        "Fall",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n4/Porting_Digitals_Database_Man_01apr1993DTJ810P8.ps;
                 http://www.digital.com:80/info/DTJ810/DTJ810SC.TXT",
  abstract =     "The cornerstone software component of high-end
                 production systems is a database management system.
                 Digital has successfully ported the DEC Rdb for OpenVMS
                 relational database management system and the DEC DBMS
                 for OpenVMS network database management system to the
                 Alpha AXP platform. Rdb and DBMS were perhaps the most
                 complex layered products to be ported. The tight
                 coupling of these two products to the OpenVMS VAX
                 system made the port a challenging task. To avoid the
                 future problem of integrating two source code bases,
                 the porting team decided to use a common code base and
                 to overlap current VAX development with the Alpha AXP
                 port. The goal was to provide an easy migration path
                 for software products to the Alpha AXP platform.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6160D (Relational DBMS); C6160B (Distributed DBMS);
                 C6110B (Software engineering techniques); C5440
                 (Multiprocessor systems and techniques); C5220P
                 (Parallel architecture)",
  classification = "C5220P (Parallel architecture); C5440
                 (Multiprocessor systems and techniques); C6110B
                 (Software engineering techniques); C6160B (Distributed
                 DBMS); C6160D (Relational DBMS)",
  keywords =     "Alpha AXP platform; architectures; Common code base;
                 common code base; Cornerstone software component;
                 cornerstone software component; coupling; current VAX;
                 Current VAX development; Database management system;
                 database management system; DEC computers; DEC DBMS;
                 DEC Rdb; development; distributed databases; High-end
                 production systems; high-end production systems;
                 Migration path; migration path; multiprocessing;
                 OpenVMS network; OpenVMS network database management
                 system; OpenVMS relational; OpenVMS relational database
                 management system; OpenVMS VAX system; operating
                 systems (computers); parallel; relational databases;
                 software portability; Software products; software
                 products; systems; tight; Tight coupling",
  thesaurus =    "DEC computers; Distributed databases; Multiprocessing
                 systems; Operating systems [computers]; Parallel
                 architectures; Relational databases; Software
                 portability",
  treatment =    "P Practical",
}

@Article{Colombo:1992:DOA,
  author =       "James V. Colombo and Pamela J. Rickard and Paul
                 Benoit",
  title =        "{DECnet} for {OpenVMS AXP}: a case history",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "4",
  pages =        "165--180",
  month =        "Fall",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n4/DECnet_for_OpenVMS_AXP_A_01apr1993DTJ811P8.ps;
                 http://www.digital.com:80/info/DTJ811/DTJ811SC.TXT",
  abstract =     "The DECnet for OpenVMS AXP networking software
                 facilitates the integration of OpenVMS AXP systems into
                 existing DECnet computing environments. This new
                 software product supports application migration by
                 providing the following networking capabilities:
                 support of compatible libraries, consistent application
                 programming interfaces, and the assurance of a common
                 semantic operation with the OpenVMS VAX system. The
                 team implemented a phased porting process and executed
                 the project cooperatively. The effort resulted in a
                 solid knowledge base with which to approach future
                 porting undertakings. Using common code where possible
                 and avoiding architecture-specific code were lessons
                 learned during the project.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6150N (Distributed systems); C6110B (Software
                 engineering techniques)",
  classification = "C6110B (Software engineering techniques); C6150N
                 (Distributed systems)",
  keywords =     "Application migration; application migration;
                 application programming interfaces;
                 architecture-specific; Architecture-specific code;
                 code; Common code; common code; common semantic; Common
                 semantic operation; compatible libraries; Compatible
                 libraries; consistent; Consistent application
                 programming interfaces; DEC computers; DECnet
                 computing; DECnet computing environments; environments;
                 network operating systems; networking capabilities;
                 Networking capabilities; OpenVMS AXP networking
                 software; operation; phased porting process; Phased
                 porting process; portability; porting undertakings;
                 Porting undertakings; software; Software product;
                 software product; Solid knowledge base; solid knowledge
                 base",
  thesaurus =    "DEC computers; Network operating systems; Software
                 portability",
  treatment =    "P Practical; R Product Review",
}

@Article{Darcy:1992:USD,
  author =       "George A. {Darcy III} and Ronald F. Brender and
                 Stephen J. Morris and Michael V. Iles",
  title =        "Using Simulation to Develop and Port Software",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "4",
  pages =        "181--192",
  month =        "Fall",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n4/Using_Simulation_to_Develop_an_01apr1993DTJ812P8.ps;
                 http://www.digital.com:80/info/DTJ812/DTJ812SC.TXT",
  abstract =     "Among the tools developed to support Digital's Alpha
                 AXP program were four software simulators. The
                 Mannequin and ISP instruction set simulators were used
                 to port the OpenVMS and OSF/1 operating systems to the
                 Alpha AXP platform. The Alpha User-mode Debugging
                 Environment (AUD) allowed Alpha AXP user-mode code to
                 be debugged with support from the OpenVMS VAX run-time
                 environment on VAX hardware. AUD was built from a
                 combination of new and existing Digital software
                 components. The Alpha User-mode Debugging Environment
                 for Translated Images (AUDI) allowed translated images
                 to be debugged on a simulator running on a VAX
                 computer. With these debugging environments, user-mode
                 applications and code components could be tested before
                 Alpha AXP hardware and operating system software were
                 available.",
  acknowledgement = ack-nhfb,
  classcodes =   "C7430 (Computer engineering); C6150J (Operating
                 systems); C5440 (Multiprocessor systems and
                 techniques); C6150G (Diagnostic, testing, debugging and
                 evaluating systems)",
  classification = "C5440 (Multiprocessor systems and techniques);
                 C6150G (Diagnostic, testing, debugging and evaluating
                 systems); C6150J (Operating systems); C7430 (Computer
                 engineering)",
  keywords =     "(computers); Alpha; Alpha AXP platform; Alpha AXP
                 program; Alpha AXP user-mode code; Alpha User-Mode
                 Debugging Environment; AUDI; AXP platform; AXP
                 user-mode code; Code components; code components;
                 computer; debugged; Debugged; debugging environments;
                 Debugging environments; DEC computers; environment;
                 instruction set simulators; ISP; ISP instruction set
                 simulators; Mannequin; multiprocessing systems; OpenVMS
                 VAX run-time; OpenVMS VAX run-time environment;
                 operating systems; OSF/1 operating systems; program
                 debugging; software portability; Software simulators;
                 software simulators; translated images; Translated
                 images; VAX; VAX computer; VAX hardware; virtual
                 machines",
  thesaurus =    "DEC computers; Multiprocessing systems; Operating
                 systems [computers]; Program debugging; Software
                 portability; Virtual machines",
  treatment =    "P Practical",
}

@Article{Conklin:1992:EMM,
  author =       "Peter F. Conklin",
  title =        "Enrollment management, managing the {Alpha AXP}
                 program",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "4",
  pages =        "193--205 (or 193--207?? or 192--208??)",
  month =        "Fall",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n4/Enrollment_Management_Managin_01apr1993DTJ813P8.ps;
                 http://www.digital.com:80/info/DTJ813/DTJ813SC.TXT",
  abstract =     "Digital's multiyear Alpha AXP program has involved
                 more than two thousand engineers across many
                 disciplines. Innovative management styles and
                 techniques were required to deliver this high-quality
                 program on an aggressive schedule. The Alpha AXP
                 Program Office used a four-point methodology for
                 management: (1) establish an appropriately large shared
                 vision; (2) delegate completely and elicit specific
                 commitments; (3) inspect rigorously, providing
                 supportive feedback; (4) acknowledge every advance,
                 learning as the program progresses. Each project event
                 was consciously used to propel progress and gain
                 momentum. Digital delivered the Alpha AXP program on
                 schedule with industry-leadership capabilities.",
  acknowledgement = ack-nhfb,
  classcodes =   "C0310F (Software development management); C5220P
                 (Parallel architecture); C5440 (Multiprocessor systems
                 and techniques)",
  classification = "C0310F (Software development management); C5220P
                 (Parallel architecture); C5440 (Multiprocessor systems
                 and techniques)",
  keywords =     "Alpha AXP program; architectures; commitments; DEC
                 computers; four-point methodology; Four-point
                 methodology; High-quality program; high-quality
                 program; industry-; Industry-leadership capabilities;
                 Large shared vision; large shared vision; leadership
                 capabilities; management styles; Management styles;
                 multiprocessing systems; parallel; Project event;
                 project event; project management; specific; Specific
                 commitments; supportive feedback; Supportive feedback",
  thesaurus =    "DEC computers; Multiprocessing systems; Parallel
                 architectures; Project management",
  treatment =    "P Practical",
}

@Article{Anonymous:1993:EIa,
  author =       "Anonymous",
  title =        "Editors Introduction",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "1",
  pages =        "??--??",
  month =        "Winter",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Jan 04 06:22:45 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/nw-01-introduction.txt",
  acknowledgement = ack-nhfb,
}

@Article{Lauck:1993:F,
  author =       "Anthony G. Lauck",
  title =        "Foreword",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "1",
  pages =        "??--??",
  month =        "Winter",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Jan 04 06:22:45 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/nw-02-foreword.txt",
  acknowledgement = ack-nhfb,
}

@Article{Buxton:1993:UIO,
  author =       "Kim A. Buxton and Edward J. Ferris and Andrew K.
                 Nash",
  title =        "The {ULTRIX} Implementation of {DECnet\slash OSI}",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "1",
  pages =        "1--10 (??)",
  month =        "Winter",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Jan 04 06:22:45 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n1/The_ULTRIX_Implementation_of_D_01jul1993DTJ903P8.ps",
  abstract =     "The DECnet\slash OSI for ULTRIX software was developed
                 to allow the ULTRIX operating system and ULTRIX
                 workstation software systems to operate in a
                 multivendor, multiprotocol network based on open
                 standards. It operates in a complex networking
                 environment that includes OSI, DECnet Phase IV, X.25,
                 and TCP\slash IP protocols. BSD sockets and protocol
                 switch tables provide the entry points that define
                 interfaces for protocol modules. The DECnet\slash OSI
                 for ULTRIX software incorporates Digital's Enterprise
                 Management Architecture, which provides a framework on
                 which to consistently manage the various components of
                 a distributed system. The DECnet\slash OSI for ULTRIX
                 software provides a set of powerful tools and a system
                 that can be extended to include new functions as they
                 are incorporated in the OSI standard.",
  acknowledgement = ack-nhfb,
}

@Article{Harper:1993:ODO,
  author =       "John Harper",
  title =        "Overview of {Digital}'s open networking",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "1",
  pages =        "12--20",
  month =        "Winter",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n1/Overview_of_Digitals_Open_Net_01jul1993DTJ901P8.ps;
                 http://www.digital.com:80/info/DTJ901/DTJ901SC.TXT",
  abstract =     "The principal element of Digital's open networking
                 family of products is the DECnet computer network. In
                 its latest form, DECnet supports very large networks of
                 more than 100,000 nodes and incorporates industry
                 standards such as OSI and TCP/IP. To meet the design
                 goals of the Digital Network Architecture, the
                 structure of DECnet is divided into layers with defined
                 relationships between layers. Since its introduction in
                 1974, DECnet has evolved in parallel with the standards
                 for open networking. Digital has contributed to the
                 formation of networking standards, and the standards
                 have, in turn, influenced the design of DECnet.",
  acknowledgement = ack-nhfb,
  affiliation =  "Corporate Backbone Networks Group, Digital Equipment
                 Corp., Maynard, MA, USA",
  classcodes =   "B6210L (Computer communications); C5620 (Computer
                 networks and techniques)",
  classification = "B6210L (Computer communications); C5620 (Computer
                 networks and techniques)",
  corpsource =   "Corporate Backbone Networks Group, Digital Equipment
                 Corp., Maynard, MA, USA",
  keywords =     "computer networks; DECnet computer network; Digital
                 Network Architecture; Digital's open networking;
                 industry; Industry standards; open systems; OSI;
                 standards; TCP/IP",
  thesaurus =    "Computer networks; Open systems; Standards",
  treatment =    "P Practical",
}

@Article{Yetto:1993:DOO,
  author =       "Lawrence Yetto and Dorothy Noren Millbrandt and Yanick
                 Pouffary and Daniel J. {Ryan Jr.} and David J.
                 Sullivan",
  title =        "The {DECnet}\slash {OSI} for {OpenVMS} version 5.5
                 implementation",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "1",
  pages =        "21--33 (or 1--13??)",
  month =        "Winter",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n1/The_DECnetOSI_for_OpenVMS_Ver_01jul1993DTJ902P8.ps;
                 http://www.digital.com:80/info/DTJ902/DTJ902SC.TXT",
  abstract =     "The DECnet\slash OSI for OpenVMS version 5.5 product
                 implements a functional Digital Network Architecture
                 Phase V networking product on the OpenVMS system. This
                 new software product ensures that all existing OpenVMS
                 application programs utilizing published interfaces to
                 DECnet VAX Phase IV operate without modification over
                 the new DECnet product. The components of DECnet/OSI
                 for OpenVMS version 5.5 include the new interprocess
                 communication interface. The design goals and
                 implementation strategy were redefined for network
                 management, the session control layer, and the
                 transport layer. The configuration utility was
                 structured into several files that are easy to read.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "B6210L (Computer communications); C5620 (Computer
                 networks and techniques); C6155 (Computer
                 communications software)",
  classification = "B6210L (Computer communications); C5620 (Computer
                 networks and techniques); C6155 (Computer
                 communications software)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "Application programs; application programs; computer
                 communications software; configuration; Configuration
                 utility; DECnet/OSI; Design goals; design goals;
                 Digital Network Architecture Phase V networking
                 product; functional; Functional Digital Network
                 Architecture Phase V networking product; Implementation
                 strategy; implementation strategy; Interprocess
                 communication interface; interprocess communication
                 interface; Network management; network management; open
                 systems; OpenVMS version 5.5 implementation; Session
                 control layer; session control layer; standards;
                 telecommunication network management; Transport layer;
                 transport layer; utility",
  thesaurus =    "Computer communications software; Open systems;
                 Standards; Telecommunication network management",
  treatment =    "P Practical",
}

@Article{Buxton:1993:UID,
  author =       "K. A. Buxton and E. J. Ferris and A. K. Nash",
  title =        "The {ULTRIX} implementation of {DECnet}\slash {OSI}",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "1",
  pages =        "34--43",
  month =        "Winter",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n1/The_ULTRIX_Implementation_of_D_01jul1993DTJ903P8.ps;
                 http://www.digital.com:80/info/DTJ903/DTJ903SC.TXT",
  abstract =     "The DECnet/OSI for ULTRIX software was developed to
                 allow the ULTRIX operating system and ULTRIX
                 workstation software systems to operate in a
                 multivendor multi-protocol network based on open
                 standards. It operates in a complex networking
                 environment that includes OSI, DECnet Phase IV, X.25,
                 and TCP/IP protocols. BSD sockets and protocol switch
                 tables provide the entry points that define interfaces
                 for protocol modules. The DECnet/OSI for ULTRIX
                 software incorporates Digitals Enterprise Management
                 Architecture, which provides a framework on which to
                 consistently manage the various components of a
                 distributed system. The DECnet/OSI for ULTRIX software
                 provides a set of powerful tools and a system that can
                 be extended to include new functions as they are
                 incorporated in the OSI standard.",
  acknowledgement = ack-nhfb,
  affiliation =  "Networks and Commun., Reading, UK",
  classcodes =   "B6210L (Computer communications); B6150M (Protocols);
                 C5620 (Computer networks and techniques); C6155
                 (Computer communications software); C5640 (Protocols)",
  classification = "B6150M (Protocols); B6210L (Computer
                 communications); C5620 (Computer networks and
                 techniques); C5640 (Protocols); C6155 (Computer
                 communications software)",
  corpsource =   "Networks and Commun., Reading, UK",
  keywords =     "BSD sockets; complex networking environment; Complex
                 networking environment; computer communications
                 software; DECnet Phase IV; DECnet/OSI; Digitals
                 Enterprise; Digitals Enterprise Management
                 Architecture; Distributed system; distributed system;
                 Management Architecture; Multi-protocol network;
                 multi-protocol network; network management; network
                 operating systems; open; Open standards; open systems;
                 Operating system; operating system; protocols;
                 standards; TCP/IP protocols; telecommunication; ULTRIX
                 implementation; Workstation software systems;
                 workstation software systems; X.25",
  thesaurus =    "Computer communications software; Network operating
                 systems; Open systems; Protocols; Standards;
                 Telecommunication network management",
  treatment =    "P Practical",
}

@Article{Chang:1993:HPT,
  author =       "Chran-Ham Chang and Richard Flower and John Forecast
                 and Heather Gray and William R. Hawe and Ashok P.
                 Nadkarni and K. K. Ramakrishnan and Uttam N. Shikarpur
                 and Kathleen M. Wilde",
  title =        "High-performance {TCP\slash IP} and {UDP\slash IP}
                 Networking in {DEC OSF/1} for {Alpha AXP}",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "1",
  pages =        "44--61",
  month =        "Winter",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n1/Highperformance_TCPIP_and_UD_01jul1993DTJ904P8.ps;
                 http://www.digital.com:80/info/DTJ904/DTJ904SC.TXT",
  abstract =     "The combination of the Alpha AXP workstations, the DEC
                 FDDIcontroller\slash TURBOchannel network interface,
                 the DEC OSF/1 AXP operating system, and a streamlined
                 implementation of the TCP\slash IP and UDP\slash IP
                 delivers to user applications almost the full FDDI
                 bandwidth of 100 Mb/s. This combination eliminates the
                 network I/O bottleneck for distributed systems. The
                 TCP\slash IP implementation includes extensions to TCP
                 such as support for large transport windows for higher
                 performance. This is particularly desirable for
                 higher-speed networks and\slash or large delay
                 networks. The DEC FDDIcontroller\slash TURBOchannel
                 network interface delivers full bandwidth to the system
                 using DMA, and it supports the patented point-to-point,
                 full duplex FDDI mode. Measurement results show UDP
                 performance is comparable to TCP. Unlike typical
                 BSD-derived systems, the UDP receive throughput to user
                 applications is also maintained at high load.",
  acknowledgement = ack-nhfb,
  affiliation =  "UNIX Syst. Eng. Group, Digital Equipment Corp.,
                 Maynard, MA, USA",
  classcodes =   "B6150M (Protocols); B6210L (Computer communications);
                 B6260 (Optical links and equipment); C5640 (Protocols);
                 C5620 (Computer networks and techniques); C5610N
                 (Network interfaces)",
  classification = "B6150M (Protocols); B6210L (Computer
                 communications); B6260 (Optical links and equipment);
                 C5610N (Network interfaces); C5620 (Computer networks
                 and techniques); C5640 (Protocols)",
  corpsource =   "UNIX Syst. Eng. Group, Digital Equipment Corp.,
                 Maynard, MA, USA",
  keywords =     "Alpha AXP; Alpha AXP workstations; computer networks;
                 DEC FDDIcontroller/TURBOchannel network; DEC
                 FDDIcontroller/TURBOchannel network interface; DEC
                 OSF/1; DMA; duplex FDDI mode; FDDI; full-; Full-duplex
                 FDDI mode; interface; network; network interfaces;
                 operating system; Operating system; operating systems;
                 point-to-point; Point-to-point; protocols; TCP/IP;
                 UDP/IP networking; workstations",
  thesaurus =    "Computer networks; FDDI; Network interfaces; Network
                 operating systems; Protocols",
  treatment =    "A Application; P Practical",
}

@Article{Perlman:1993:RA,
  author =       "Radia J. Perlman and Ross W. Callon and I. Michael C.
                 Shand",
  title =        "Routing architecture",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "1",
  pages =        "62--69",
  month =        "Winter",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n1/Routing_Architecture_01jul1993DTJ905P8.ps;
                 http://www.digital.com:80/info/DTJ905/DTJ905SC.TXT",
  abstract =     "Digital developed the intermediate
                 system-to-intermediate system (IS-IS) intra-domain
                 routing information exchange protocol for the DECnet
                 Phase V network layer architecture. This protocol,
                 which has been adopted by the International
                 Organization for Standardization, is based on a link
                 state routing algorithm. The benefits derived from the
                 IS-IS protocol include a self-stabilizing method for
                 reliable link state packet distribution, a hierarchical
                 network structure to support larger networks, protocols
                 for efficiently utilizing local area networks, and
                 simultaneous support for multiple network layer
                 protocols.",
  acknowledgement = ack-nhfb,
  affiliation =  "Network Archit. Group, Digital Equipment Corp.,
                 Maynard, MA, USA",
  classcodes =   "B6150M (Protocols); B6210L (Computer communications);
                 C5640 (Protocols); C5620 (Computer networks and
                 techniques)",
  classification = "B6150M (Protocols); B6210L (Computer
                 communications); C5620 (Computer networks and
                 techniques); C5640 (Protocols)",
  corpsource =   "Network Archit. Group, Digital Equipment Corp.,
                 Maynard, MA, USA",
  keywords =     "DECnet Phase V; DECnet Phase V network layer
                 architecture; distribution; Hierarchical network
                 structure; hierarchical network structure; intermediate
                 system-to-intermediate system; Intermediate
                 system-to-intermediate system; internetworking;
                 intra-domain; Intra-domain routing information exchange
                 protocol; Link state routing algorithm; link state
                 routing algorithm; local area; local area networks;
                 Local area networks; Multiple network layer protocols;
                 multiple network layer protocols; network layer
                 architecture; networks; protocols; reliable link state
                 packet; Reliable link state packet distribution;
                 routing information exchange protocol; Self-stabilizing
                 method; self-stabilizing method; standards",
  thesaurus =    "Internetworking; Local area networks; Protocols;
                 Standards",
  treatment =    "P Practical",
}

@Article{Cobb:1993:DMR,
  author =       "Graham R. Cobb and Elliot C. Gerberg",
  title =        "Digital's multiprotocol routing software design",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "1",
  pages =        "70--83",
  month =        "Winter",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n1/Digitals_Multiprotocol_Routin_01jul1993DTJ906P8.ps;
                 http://www.digital.com:80/info/DTJ906/DTJ906SC.TXT",
  abstract =     "The implementation of Digital's multiprotocol routing
                 strategy required addressing various technical design
                 issues, principally the stability of the distributed
                 routing algorithms, network management, performance,
                 and interactions between routing and bridging.
                 Developers of Digital's DEC WANrouter and DECNIS
                 products enhanced real-time kernel software,
                 implemented performance-centered protocol software, and
                 used high-coverage, high-quality testing and simulation
                 methods to solve problems related to these issues. In
                 particular, a packet management strategy ensured that
                 queuing requirements were met to guarantee the
                 stability of the routing algorithms. Also, network
                 management costs were minimized by down-line loading
                 software, using a menu-driven configuration program,
                 and careful monitoring. Router performance was
                 optimized by maximizing the packet forwarding rate
                 while minimizing the transit delay.",
  acknowledgement = ack-nhfb,
  affiliation =  "Internet Products Eng. Group, Digital Equipment Corp.,
                 Maynard, MA, USA",
  classcodes =   "B6210L (Computer communications); B6150M (Protocols);
                 C5620 (Computer networks and techniques); C5640
                 (Protocols); C5670 (Network performance); C6155
                 (Computer communications software)",
  classification = "B6150M (Protocols); B6210L (Computer
                 communications); C5620 (Computer networks and
                 techniques); C5640 (Protocols); C5670 (Network
                 performance); C6155 (Computer communications
                 software)",
  corpsource =   "Internet Products Eng. Group, Digital Equipment Corp.,
                 Maynard, MA, USA",
  keywords =     "Bridging; bridging; computer communications software;
                 configuration program; DEC WANrouter; DECNIS products;
                 Digital's multiprotocol routing software design;
                 Distributed routing algorithms; distributed routing
                 algorithms; high-quality testing; High-quality testing;
                 internetworking; management; management strategy;
                 menu-driven; Menu-driven configuration program; network
                 management; Network management; packet; Packet
                 forwarding rate; packet forwarding rate; Packet
                 management strategy; performance; Performance;
                 performance evaluation; performance-centered protocol;
                 Performance-centered protocol software; protocols;
                 queuing requirements; Queuing requirements; real-;
                 Real-time kernel software; Simulation methods;
                 simulation methods; software; stability; Stability;
                 telecommunication network; time kernel software;
                 Transit delay; transit delay",
  thesaurus =    "Computer communications software; Internetworking;
                 Performance evaluation; Protocols; Telecommunication
                 network management",
  treatment =    "P Practical",
}

@Article{Bryant:1993:DMB,
  author =       "Stewart F. Bryant and David L. A. Brash",
  title =        "The {DECNIS} 500\slash 600 multiprotocol bridge\slash
                 router and gateway",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "1",
  pages =        "84--98",
  month =        "Winter",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n1/The_DECNIS_500600_Multiprotoc_01jul1993DTJ907P8.ps;
                 http://www.digital.com:80/info/DTJ907/DTJ907SC.TXT",
  abstract =     "The DECNIS 500/600 high performance multiprotocol
                 bridge/router and gateway are described. The issues
                 affecting the design of routers with this class of
                 performance are outlined, along with a description of
                 the architecture and implementation. The system
                 described uses a distributed forwarding algorithm and a
                 distributed buffer management algorithm executed on
                 plug-in linecards to achieve scalable performance. An
                 overview of the currently available linecards is
                 provided, along with performance results achieved
                 during system test.",
  acknowledgement = ack-nhfb,
  affiliation =  "Networks and Commun., Reading, UK",
  classcodes =   "B6210L (Computer communications); B6150M (Protocols);
                 C5640 (Protocols); C5620L (Local area networks); C5630
                 (Networking equipment)",
  classification = "B6150M (Protocols); B6210L (Computer
                 communications); C5620L (Local area networks); C5630
                 (Networking equipment); C5640 (Protocols)",
  corpsource =   "Networks and Commun., Reading, UK",
  keywords =     "buffer management algorithm; DECNIS 500/600
                 multiprotocol bridge/router; distributed; Distributed
                 buffer management algorithm; Distributed forwarding
                 algorithm; distributed forwarding algorithm; gateway;
                 Gateway; internetworking; network servers; performance;
                 Performance results; performance results; Plug-in
                 linecards; plug-in linecards; protocols; Routers;
                 routers; scalable; Scalable performance; System test;
                 system test",
  thesaurus =    "Internetworking; Network servers; Protocols",
  treatment =    "P Practical",
}

@Article{Roden:1993:FRN,
  author =       "Robert J. Roden and Deborah Tayler",
  title =        "Frame relay networks",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "1",
  pages =        "99--106",
  month =        "Winter",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n1/Frame_Relay_Networks_01jul1993DTJ908P8.ps;
                 http://www.digital.com:80/info/DTJ908/DTJ908SC.TXT",
  abstract =     "Frame relay networks reduce the cost of transmission
                 lines and equipment and improve network performance and
                 response time. Designed for transmission lines with a
                 low error rate, frame relay networks provide minimal
                 internal checking, and consequently, error detection
                 and recovery is implemented in the attached user
                 systems. The Frame Relay Bearer Service was developed
                 specifically as a data service to handle high-volume,
                 bursty traffic by means of high-speed packet
                 transmission, minimal network delay, and efficient use
                 of network bandwidth. The frame protocol supports the
                 data transfer phase of the Service; the frame relay
                 header and the local management interface are sources
                 of congestion avoidance mechanisms. Current
                 implementations include the StrataCom IPX FastPacket
                 digital networking system, which provides the frame
                 relay network, and Digital's DECNIS 500/600 and DEC
                 WANrouter 100/500 software for attaching user
                 equipment.",
  acknowledgement = ack-nhfb,
  affiliation =  "Networks Eng., Digital Equipment Corp., Maynard, MA,
                 USA",
  classcodes =   "B6210L (Computer communications); B6150M (Protocols);
                 C5620 (Computer networks and techniques); C5640
                 (Protocols); C5670 (Network performance)",
  classification = "B6150M (Protocols); B6210L (Computer
                 communications); C5620 (Computer networks and
                 techniques); C5640 (Protocols); C5670 (Network
                 performance)",
  corpsource =   "Networks Eng., Digital Equipment Corp., Maynard, MA,
                 USA",
  keywords =     "100/500 software; avoidance mechanisms; Bursty
                 traffic; bursty traffic; congestion; Congestion
                 avoidance mechanisms; data; Data service; data transfer
                 phase; Data transfer phase; DEC WANrouter; DEC
                 WANrouter 100/500 software; Digitals DECNIS 500/600;
                 Error detection; error detection; error recovery; Error
                 recovery; Frame protocol; frame protocol; frame relay
                 header; Frame relay header; frame relay networks; Frame
                 relay networks; High-speed packet transmission;
                 high-speed packet transmission; internetworking; local
                 management interface; Local management interface;
                 minimal network delay; Minimal network delay; network
                 interfaces; network performance; Network performance;
                 networking system; protocols; Response time; response
                 time; service; StrataCom IPX FastPacket digital;
                 StrataCom IPX FastPacket digital networking system;
                 Transmission lines; transmission lines",
  thesaurus =    "Internetworking; Network interfaces; Protocols",
  treatment =    "P Practical",
}

@Article{Robinson:1993:IOU,
  author =       "David C. Robinson and Lawrence N. Friedman and Scott
                 A. Wattum",
  title =        "An implementation of the {OSI} upper layers and
                 applications",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "1",
  pages =        "107--116",
  month =        "Winter",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n1/An_Implementation_of_the_OSI_01jul1993DTJ909P8.ps;
                 http://www.digital.com:80/info/DTJ909/DTJ909SC.TXT",
  abstract =     "Above the transport layer, the open systems
                 interconnection (OSI) basic reference model describes
                 several application standards supported by a common
                 upper layer protocol stack. Digital's high performance
                 implementation of the upper layers of the protocol
                 stack concentrates on maximizing data throughput while
                 minimizing connection establishment delay. An
                 additional benefit derived from the implementation is
                 that, for normal data exchanges, the delivery delay is
                 also minimized. The implementation features of
                 Digital's two OSI applications --- file transfer,
                 access, and management (FTAM) and virtual terminal (VT)
                 --- include the use of common code to facilitate
                 portability and efficient buffer management to improve
                 performance.",
  acknowledgement = ack-nhfb,
  affiliation =  "Network Eng. Europe, Digital Equipment Corp., Maynard,
                 MA, USA",
  classcodes =   "B6150M (Protocols); B6210L (Computer communications);
                 C5640 (Protocols); C6120 (File organisation); C5620
                 (Computer networks and techniques)",
  classification = "B6150M (Protocols); B6210L (Computer
                 communications); C5620 (Computer networks and
                 techniques); C5640 (Protocols); C6120 (File
                 organisation)",
  corpsource =   "Network Eng. Europe, Digital Equipment Corp., Maynard,
                 MA, USA",
  keywords =     "application; Application standards; basic reference
                 model; Basic reference model; Buffer management; buffer
                 management; common upper layer protocol stack; Common
                 upper layer protocol stack; data; Data throughput;
                 delivery delay; Delivery delay; file organisation; file
                 transfer, access, and; File transfer, access, and
                 management; interconnection; management; open systems;
                 Open systems interconnection; OSI upper layers;
                 portability; Portability; protocols; standards;
                 throughput; transport layer; Transport layer; Virtual
                 terminal; virtual terminal",
  thesaurus =    "File organisation; Open systems; Protocols;
                 Standards",
  treatment =    "A Application; P Practical",
}

@Article{Sylor:1993:NM,
  author =       "Mark W. Sylor and Francis Dolan and David G.
                 Shurtleff",
  title =        "Network management",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "1",
  pages =        "117--129",
  month =        "Winter",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n1/Network_Management_01jul1993DTJ910P8.ps;
                 http://www.digital.com:80/info/DTJ910/DTJ910SC.TXT",
  abstract =     "DECnet\slash OSI Phase V incorporates a new network
                 management architecture based on Digital's Enterprise
                 Management Architecture (EMA). The EMA entity model was
                 developed to manage all entities in a consistent
                 manner, structuring any manageable component regardless
                 of its internal complexity. The DNA CMIP management
                 protocol was developed in conjunction with the model to
                 express the basic concepts in the entity model. Phase V
                 network management is extensible; the Phase V
                 management architecture transparently assimilates new
                 devices and technologies. Phase V was designed to be an
                 open architecture. Management of DECnet/OSI Phase V
                 components is effective in a multivendor network.",
  acknowledgement = ack-nhfb,
  affiliation =  "Enterprise Manage. Archit. Group, Digital Equipment
                 Corp., Maynard, MA, USA",
  classcodes =   "B6210C (Network management); B6210L (Computer
                 communications)C5620 (Computer networks and
                 techniques); C0310 (EDP management)",
  classification = "B6210C (Network management); B6210L (Computer
                 communications); C0310 (EDP management); C5620
                 (Computer networks and techniques)",
  corpsource =   "Enterprise Manage. Archit. Group, Digital Equipment
                 Corp., Maynard, MA, USA",
  keywords =     "computer networks; DECnet/OSI Phase V; Digital's
                 Enterprise Management Architecture; DNA CMIP management
                 protocol; DP management; entities; Entities; Entity
                 model; entity model; internetworking; Multivendor
                 network; multivendor network; network management
                 architecture; Network management architecture; open;
                 open architecture; Open architecture; systems;
                 telecommunication network management",
  thesaurus =    "Computer networks; DP management; Internetworking;
                 Open systems; Telecommunication network management",
  treatment =    "P Practical",
}

@Article{Strutt:1993:DDM,
  author =       "Colin Strutt and James A. Swist",
  title =        "Design of the {DECmcc Management Director}",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "1",
  pages =        "130--142",
  month =        "Winter",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n1/Design_of_the_DECmcc_Managemen_01jul1993DTJ911P8.ps;
                 http://www.digital.com:80/info/DTJ911/DTJ911SC.TXT",
  abstract =     "The DECmcc product family represents a significant
                 achievement in the development of enterprise management
                 capabilities. DECmcc embodies the director portion of
                 Digital's Enterprise Management Architecture (EMA) and
                 is both a platform for the development of new
                 management capabilities and a vehicle for aiding
                 customers to manage their computing and communications
                 environments. Initially, the DECmcc director was
                 intended to facilitate sophisticated management of
                 evolving networks. In addition to network management,
                 DECmcc has been adapted to the needs of system,
                 applications, data, environment, and telecommunications
                 management. The first implementations contained the
                 DECmcc kernel, a developer's toolkit, and various
                 management modules.",
  acknowledgement = ack-nhfb,
  affiliation =  "Enterprise Manage. Frameworks, Digital Equipment
                 Corp., Maynard, MA, USA",
  classcodes =   "B6210C (Network management); B6210L (Computer
                 communications)C5620 (Computer networks and
                 techniques)",
  classification = "B6210C (Network management); B6210L (Computer
                 communications); C5620 (Computer networks and
                 techniques)",
  corpsource =   "Enterprise Manage. Frameworks, Digital Equipment
                 Corp., Maynard, MA, USA",
  keywords =     "Communications environments; communications
                 environments; computer environment; Computer
                 environment; DECmcc management director; Digital's
                 Enterprise Management Architecture; enterprise;
                 Enterprise management; internetworking; management;
                 open systems; telecommunication network;
                 Telecommunications management; telecommunications
                 management",
  thesaurus =    "Internetworking; Open systems; Telecommunication
                 network management",
  treatment =    "P Practical",
}

@Article{Anonymous:1993:EIb,
  author =       "Anonymous",
  title =        "Editors Introduction",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "2",
  pages =        "??--??",
  month =        "Spring",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Jan 04 06:22:45 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/mm-01-introduction.txt",
  acknowledgement = ack-nhfb,
}

@Article{Ascher:1993:DAI,
  author =       "David Ascher",
  title =        "{DEC @aGlance} --- Integration of Desktop Tools and
                 Manufacturing Process Information Systems",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "2",
  pages =        "??--??",
  month =        "Spring",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Mon Jun 24 18:53:15 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n2/DEC_aGlanceIntegration_of_De_01oct1993DTJA09SC.txt;
                 http://www.digital.com:80/info/DTJA09/DTJA09SC.TXT",
  abstract =     "The DEC @aGlance architecture supports the integration
                 of manufacturing process information systems with the
                 analysis, scheduling, design, and management tools that
                 are used to improve and manage production. DEC @aGlance
                 software comprises a set of run-time libraries, an
                 application development tool kit, and extensions to
                 popular spreadsheet applications, all implemented with
                 Digital's object-oriented Application Control
                 Architecture (ACA) Services. The tool kit helps
                 developers produce DEC @aGlance client and server
                 applications that will interoperate with other
                 independently developed DEC @aGlance applications.
                 Spreadsheet extensions (add-ins) to Lotus 1-2-3 for
                 Windows and to Microsoft Excel for Windows allow users
                 to access real-time and historical data from DEC
                 @aGlance servers. With DEC @aGlance software, control
                 engineers and other manufacturing process professionals
                 can use familiar desktop tools on a variety of
                 platforms and have simple, interactive, and transparent
                 access to current and past process data in their
                 plants.",
  acknowledgement = ack-nhfb,
}

@Article{Morse:1993:F,
  author =       "John A. Morse",
  title =        "Foreword",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "2",
  pages =        "??--??",
  month =        "Spring",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Jan 04 06:22:45 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/mm-02-foreword.txt",
  acknowledgement = ack-nhfb,
}

@Article{Ulichney:1993:VR,
  author =       "Robert Ulichney",
  title =        "Video Rendering",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "2",
  pages =        "9--18",
  month =        "Spring",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n2/Video_Rendering_01oct1993DTJA01P8.ps;
                 http://www.digital.com:80/info/DTJA01/DTJA01SC.TXT",
  abstract =     "Video rendering, the process of generating
                 device-dependent pixel data from device-independent
                 sampled image data, is key to image quality. System
                 components include scaling, color adjustment,
                 quantization, and color space conversion. This paper
                 emphasizes methods that yield high image quality, are
                 fast, and yet are simple and inexpensive to implement.
                 Particular attention is placed on the derivation and
                 analysis of new multilevel dithering schemes. While
                 permitting smaller frame buffers, dithering also
                 provides faster transport of the processed image to the
                 display --- a key benefit for the massive pixel rates
                 associated with full-motion video.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6130B (Graphics techniques); C5260B (Computer vision
                 and picture processing)",
  classification = "C5260B (Computer vision and picture processing);
                 C6130B (Graphics techniques)",
  keywords =     "Color adjustment; color adjustment; color space; Color
                 space conversion; conversion; data; Device-dependent;
                 device-dependent; image processing; image quality;
                 Image quality; Multilevel dithering; multilevel
                 dithering; Pixel data; pixel data; rendering (computer
                 graphics); sampled image; Sampled image data; Scaling;
                 scaling; Smaller frame buffers; smaller frame buffers;
                 video rendering; Video rendering",
  thesaurus =    "Image processing; Rendering [computer graphics]",
  treatment =    "P Practical",
}

@Article{Neidecker-Lutz:1993:SMP,
  author =       "Burkhard K. Neidecker-Lutz and Robert Ulichney",
  title =        "Software Motion Pictures",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "2",
  pages =        "19--27",
  month =        "Spring",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n2/Software_Motion_Pictures_01oct1993DTJA02P8.ps;
                 http://www.digital.com:80/info/DTJA02/DTJA02SC.TXT",
  abstract =     "Software motion pictures is a method of generating
                 digital video on general-purpose desktop computers
                 without using special decompression hardware. The
                 compression algorithm is designed for rapid
                 decompression in software and generates deterministic
                 data rates for use from CD-ROM and network connections.
                 The decompression part offers device independence and
                 integrates well with existing window systems and
                 application programming interfaces. Software motion
                 pictures features a portable, low-cost solution to
                 digital video playback.",
  acknowledgement = ack-nhfb,
  classcodes =   "B6140C (Optical information and image processing);
                 C6180G (Graphical user interfaces); B6120B (Codes);
                 C6130B (Graphics techniques); C5260B (Computer vision
                 and picture processing)",
  classification = "B6120B (Codes); B6140C (Optical information and
                 image processing); C5260B (Computer vision and picture
                 processing); C6130B (Graphics techniques); C6180G
                 (Graphical user interfaces)",
  keywords =     "Application programming interfaces; application
                 programming interfaces; CD-ROM; Compression algorithm;
                 compression algorithm; data compression; desktop
                 computers; deterministic data; Deterministic data
                 rates; digital video; Digital video; general-purpose;
                 General-purpose desktop computers; graphical user
                 interfaces; image coding; image processing; network
                 connections; Network connections; rates; software
                 motion pictures; Software motion pictures; window
                 systems; Window systems",
  thesaurus =    "Data compression; Graphical user interfaces; Image
                 coding; Image processing",
  treatment =    "P Practical",
}

@Article{Pan:1993:DAC,
  author =       "Davis Yen Pan",
  title =        "Digital Audio Compression",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "2",
  pages =        "28--33 (or 28--40??)",
  month =        "Spring",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n2/Digital_Audio_Compression_01oct1993DTJA03P8.ps;
                 http://www.digital.com:80/info/DTJA03/DTJA03SC.TXT",
  abstract =     "Compared to most digital data types, with the
                 exception of digital video, the data rates associated
                 with uncompressed digital audio are substantial.
                 Digital audio compression enables more efficient
                 storage and transmission of audio data. The many forms
                 of audio compression techniques offer a range of
                 encoder and decoder complexity, compressed audio
                 quality, and differing amounts of data compression. The
                 $ \mu $-law transformation and ADPCM coder are simple
                 approaches with low-complexity, low-compression, and
                 medium audio quality algorithms. The MPEG\slash audio
                 standard is a high-complexity, high-compression, and
                 high audio-quality algorithm. These techniques apply to
                 general audio signals and are not specifically tuned
                 for speech signals.",
  acknowledgement = ack-nhfb,
  classcodes =   "B6120 (Modulation methods); B6140 (Signal processing
                 and detection)",
  classification = "B6120 (Modulation methods); B6140 (Signal processing
                 and detection)",
  keywords =     "ADPCM coder; audio signals; Compressed audio quality;
                 compressed audio quality; data compression; Data
                 compression; data compression; Data rates; data rates;
                 Decoder; decoder; Digital audio compression; digital
                 audio compression; encoder; Encoder; MPEG/audio
                 standard; mu -law; Mu-law transformation; pulse-code
                 modulation; standards; transformation",
  thesaurus =    "Audio signals; Data compression; Pulse-code
                 modulation; Standards",
  treatment =    "P Practical; T Theoretical or Mathematical",
}

@Article{teKiefte:1993:MID,
  author =       "Jan B. {te Kiefte} and Bob Hasenaar and Joop W. Mevius
                 and Theo M. {van Hunnik}",
  title =        "The {Megadoc} Image Document Management System",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "2",
  pages =        "41--49",
  month =        "Spring",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n2/The_Megadoc_Image_Document_Man_01oct1993DTJA04P8.ps;
                 http://www.digital.com:80/info/DTJA04/DTJA04SC.TXT",
  abstract =     "Megadoc image document management solutions are the
                 result of a systems engineering effort that combined
                 several disciplines, ranging from optical disk hardware
                 to an image application framework. Although each of the
                 component technologies may be fairly mature, combining
                 them into easy-to customize solutions presented a
                 significant systems engineering challenge. The
                 resulting application framework allows the
                 configuration of customized solutions with low systems
                 integration cost and short time to deployment.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6160S (Spatial and pictorial databases); C5260B
                 (Computer vision and picture processing); C7100
                 (Business and administration); C7250 (Information
                 storage and retrieval)",
  classification = "C5260B (Computer vision and picture processing);
                 C6160S (Spatial and pictorial databases); C7100
                 (Business and administration); C7250 (Information
                 storage and retrieval)",
  keywords =     "cost; customized solutions; Customized solutions;
                 document image processing; engineering effort;
                 framework; image application; Image application
                 framework; low systems integration; Low systems
                 integration cost; Megadoc image document management
                 system; Optical disk hardware; optical disk hardware;
                 systems; Systems engineering effort; visual databases",
  thesaurus =    "Document image processing; Visual databases",
  treatment =    "P Practical",
}

@Article{Riley:1993:DMO,
  author =       "Mark F. Riley and James J. {Feenan, Jr.} and John L.
                 {Janosik, Jr.} and T. K. Rengarajan",
  title =        "The Design of Multimedia Object Support in {DEC Rdb}",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "2",
  pages =        "50--64 (or 50--65??)",
  month =        "Spring",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n2/The_Design_of_Multimedia_Objec_01oct1993DTJA05P8.ps;
                 http://www.digital.com:80/info/DTJA05/DTJA05SC.TXT",
  abstract =     "Storing multimedia objects in a relational database
                 offers advantages over file system storage. Digital's
                 relational database software product DEC Rdb supports
                 the storing and indexing of multimedia objects ---
                 text, still frame images, compound documents, audio,
                 video, and any binary large object. After evaluating
                 the existing DEC Rdb version 3.1 for its ability to
                 insert, fetch, and process multimedia data, software
                 designers decided to modify many parts of Rdb and to
                 use write-once optical disks configured in standalone
                 drive or jukebox configurations. Enhancements were made
                 to the buffer manager and page allocation algorithms,
                 thus reducing wasted disk space. Performance and
                 capacity field tests indicate that DEC Rdb can sustain
                 a 200-kilobyte-per-second SQL fetch throughput and a
                 57.7-kilobyte-per-second SQL\slash Services fetch
                 throughput, insert and fetch a 2-gigabyte object, and
                 build a 50-gigabyte database.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6160D (Relational DBMS); C5320K (Optical storage);
                 C7250 (Information storage and retrieval)",
  classification = "C5320K (Optical storage); C6160D (Relational DBMS);
                 C7250 (Information storage and retrieval)",
  keywords =     "200 Kbyte/s; 50 Gbyte; 57.7 Kbyte/s; audio; Audio;
                 buffer manager; Buffer manager; compound documents;
                 Compound documents; databases; DECRdb; frame images;
                 indexing; Indexing; Jukebox configurations; jukebox
                 configurations; Multimedia object support; multimedia
                 object support; multimedia systems; optical disc
                 storage; optical disks; page allocation algorithms;
                 Page allocation algorithms; relational; software
                 packages; SQL fetch; SQL fetch throughput; standalone
                 drive; Standalone drive; still; Still frame images;
                 Storing; storing; throughput; Video; video; write-once;
                 Write-once optical disks",
  numericalindex = "Memory size 5.4E+10 Byte; Byte rate 2.0E+05 Byte/s;
                 Byte rate 5.77E+04 Byte/s",
  thesaurus =    "Multimedia systems; Optical disc storage; Relational
                 databases; Software packages",
  treatment =    "P Practical",
}

@Article{Palmer:1993:DND,
  author =       "Lawrence G. Palmer and Ricky S. Palmer",
  title =        "{DECspin}: {A} Networked Desktop Videoconferencing
                 Application",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "2",
  pages =        "65--76",
  month =        "Spring",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n2/DECspin_A_Networked_Desktop_V_01oct1993DTJA06P8.ps;
                 http://www.digital.com:80/info/DTJA06/DTJA06SC.TXT",
  abstract =     "The Sound Picture Information Networks (SPIN)
                 technology that is part of the DECspin Version 1.0
                 product takes digitized audio and video from desk top
                 computers and distributes this data over a network to
                 form real-time conferences. SPIN uses standard local
                 and wide area data networks, adjusting to the various
                 latency and bandwidth differences, and does not require
                 a dedicated bandwidth allocation. A high-level SPIN
                 protocol was developed to synchronize audio and video
                 data and thus alleviate network congestion. SPIN
                 performance on Digital's hardware and software
                 platforms results in sound and pictures suitable for
                 carrying on personal communications over a data
                 network. The Society of Technical Communication chose
                 the DECspin Version 1.0 application as a first-place
                 recipient of the Distinguished Technical Communication
                 Award in 1992.",
  acknowledgement = ack-nhfb,
  classcodes =   "B6210P (Teleconferencing); C7104 (Office automation);
                 C7410F (Communications); B6150M (Protocols); B6210L
                 (Computer communications); C5640 (Protocols); C5620L
                 (Local area networks); C5620W (Other networks)",
  classification = "B6150M (Protocols); B6210L (Computer
                 communications); B6210P (Teleconferencing); C5620L
                 (Local area networks); C5620W (Other networks); C5640
                 (Protocols); C7104 (Office automation); C7410F
                 (Communications)",
  keywords =     "Bandwidth; bandwidth; data networks; DECspin;
                 Digital's hardware and software; high-level SPIN
                 protocol; High-level SPIN protocol; Information
                 Networks; latency; Latency; Local area data networks;
                 local area data networks; local area networks;
                 networked desktop videoconferencing; Networked desktop
                 videoconferencing; networks; protocols; Real-time
                 conferences; real-time conferences; Sound Picture;
                 Sound Picture Information Networks; SPIN;
                 teleconferencing; wide area; Wide area data networks",
  thesaurus =    "Local area networks; Protocols; Teleconferencing; Wide
                 area networks",
  treatment =    "P Practical",
}

@Article{Hayden:1993:LAD,
  author =       "Peter C. Hayden",
  title =        "{LAN} Addressing for Digital Video Data",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "2",
  pages =        "77--83",
  month =        "Spring",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n2/LAN_Addressing_for_Digital_Vid_01oct1993DTJA07P8.ps;
                 http://www.digital.com:80/info/DTJA07/DTJA07SC.TXT",
  abstract =     "Multicast addressing was chosen over the broadcast
                 address and unicast address mechanisms for the
                 transmission of video data over the LAN. Dynamic
                 allocation of multicast addresses enables such features
                 as the continuous playback of full motion video over a
                 network with multiple viewers. Design of this video
                 data transmission system permits interested nodes on a
                 LAN to dynamically allocate a single multicast address
                 from a pool of multicast addresses. When the allocated
                 address is no longer needed, it is returned to the
                 pool. This mechanism permits nodes to use fewer
                 multicast addresses than are required in a traditional
                 scheme where a unique address is allocated for each
                 possible function.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5620L (Local area networks); C6150N (Distributed
                 systems)",
  classification = "C5620L (Local area networks); C6150N (Distributed
                 systems)",
  keywords =     "Addressing mechanisms; addressing mechanisms; digital
                 video data; Digital video data; full motion video; Full
                 motion video; LAN addressing; local area data; Local
                 area data network; local area networks; multicast
                 addresses; Multicast addresses; multiple; Multiple
                 stations; multiple stations; Multiple viewers; network;
                 network operating systems; Video data transmission;
                 video data transmission; viewers",
  thesaurus =    "Local area networks; Network operating systems",
  treatment =    "P Practical",
}

@Article{Patrick:1993:CIU,
  author =       "Paul B. {Patrick, Sr.}",
  title =        "{CASE} integration using {ACA} services",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "2",
  pages =        "84--99",
  month =        "Spring",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n2/CASE_Integration_Using_ACA_Ser_01oct1993DTJA08P8.ps;
                 http://www.digital.com:80/info/DTJA08/DTJA08SC.TXT",
  abstract =     "Digital uses the object-oriented software Application
                 Control Architecture (ACA) Services to address the
                 problems associated with data access, interapplication
                 communication, and work flow in a distributed,
                 multivendor CASE environment. The modeling of
                 applications, data, and operations in ACA Services
                 provides the foundation on which to build a CASE
                 environment. ACA Services enables the seamless
                 integration of CASE applications ranging from compilers
                 to analysis and design tools. ACA Services is Digital's
                 implementation of the Object Management Group's (OMG)
                 Common Object Request Broker Architecture (CORBA)
                 specification.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6115 (Programming support); C6110J (Object-oriented
                 programming)",
  classification = "C6110J (Object-oriented programming); C6115
                 (Programming support)",
  keywords =     "ACA services; Application Control Architecture; CASE
                 integration; computer aided software; Computer aided
                 software engineering; Digital; Distributed;
                 distributed; engineering; environment management;
                 Environment management; Multivendor CASE environment;
                 multivendor CASE environment; object oriented; Object
                 oriented; object-oriented programming; programming
                 environments; software engineering",
  thesaurus =    "Object-oriented programming; Programming environments;
                 Software engineering",
  treatment =    "P Practical",
}

@Article{Ascher:1993:DDT,
  author =       "D. Ascher",
  title =        "{DEC@aGlance} --- integration of desktop tools and
                 manufacturing process information systems",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "2",
  pages =        "100--112",
  month =        "Spring",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The DEC@aGlance architecture supports the integration
                 of manufacturing process information systems with the
                 analysis, scheduling, design, and management tools that
                 are used to improve and manage production. DEC@aGlance
                 software comprises a set of run-time libraries, an
                 application development tool kit, and extensions to
                 popular spreadsheet applications, all implemented with
                 Digital's object-oriented Application Control
                 Architecture (ACA) Services. The tool kit helps
                 developers produce DEC@aGlance client and server
                 applications that will interoperate with other
                 independently developed DEC@aGlance applications.
                 Spreadsheet extensions (add-ins) to Lotus 1-2-3 for
                 Windows and to Microsoft Excel for Windows allow users
                 to access real-time and historical data from
                 DEC@aGlance servers. With DEC@aGlance software, control
                 engineers and other manufacturing process professionals
                 can use familiar desktop tools on a variety of
                 platforms and have simple, interactive, and transparent
                 access to current and past process data in their
                 plants.",
  acknowledgement = ack-nhfb,
  classcodes =   "C7160 (Manufacturing and industry); C6115 (Programming
                 support)",
  classification = "C6115 (Programming support); C7160 (Manufacturing
                 and industry)",
  keywords =     "Analysis; analysis; data processing; DEC computers;
                 DEC@aGlance; Lotus 1-2-3; management information
                 systems; manufacturing; Manufacturing process
                 information systems; manufacturing process information
                 systems; Microsoft Excel; Run-time libraries; run-time
                 libraries; scheduling; Scheduling; software tools;
                 Spreadsheet applications; spreadsheet applications;
                 spreadsheet programs; Tool kit; tool kit",
  thesaurus =    "DEC computers; Management information systems;
                 Manufacturing data processing; Software tools;
                 Spreadsheet programs",
  treatment =    "P Practical",
}

@Article{Anonymous:1993:EIc,
  author =       "Anonymous",
  title =        "Editors Introduction",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "3",
  pages =        "??--??",
  month =        "Summer",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Jan 04 06:22:45 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/I18N-intro.txt",
  acknowledgement = ack-nhfb,
}

@Article{Pesquet:1993:F,
  author =       "Claude Henri Pesquet",
  title =        "Foreword",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "3",
  pages =        "??--??",
  month =        "Summer",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Jan 04 06:22:45 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/I18N-foreword.txt",
  acknowledgement = ack-nhfb,
}

@Article{Greenwood:1993:ICD,
  author =       "Timothy G. Greenwood",
  title =        "International Cultural Differences In Software",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "3",
  pages =        "8--20",
  month =        "Summer",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n3/INTERNATIONAL_CULTURAL_DIFFERE_01jan1994DTJB01P8.ps;
                 http://www.digital.com:80/info/DTJB01/DTJB01SC.TXT",
  abstract =     "Throughout the world, computer users approach a
                 computer system with a specific set of cultural
                 requirements. In all cultures, they expect computer
                 systems to accommodate their needs. A major part of
                 interaction with computers occurs through written
                 language. Cultural requirements, particularly written
                 languages, influence the way computer systems must
                 operate. Cultural differences concerning national
                 conventions for the presentation of date, time, and
                 number and user interface design for the components of
                 images, color, sound, and the overall layout of the
                 screen also affect the development of computer
                 technology. Successful computer systems must respond to
                 the multicultural needs of users.",
  acknowledgement = ack-nhfb,
  classcodes =   "C0230 (Economic, social and political aspects); C6180
                 (User interfaces)",
  classification = "C0230 (Economic, social and political aspects);
                 C6180 (User interfaces)",
  keywords =     "cultural; Cultural requirements; international
                 cultural differences; International cultural
                 differences; National conventions; national
                 conventions; requirements; social aspects of
                 automation; software; Software; User interface design;
                 user interface design; user interfaces",
  thesaurus =    "Social aspects of automation; User interfaces",
  treatment =    "G General Review; P Practical",
}

@Article{Bettels:1993:UUC,
  author =       "J{\"o}rgen Bettels and F. Avery Bishop",
  title =        "{Unicode}: {A} Universal Character Code",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "3",
  pages =        "21--31",
  month =        "Summer",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n3/UNICODE_A_UNIVERSAL_CHARACTE_01jan1994DTJB02P8.ps;
                 http://www.digital.com:80/info/DTJB02/DTJB02SC.TXT",
  abstract =     "A universal character encoding is required to produce
                 software that can be localized for any language or that
                 can process and communicate data in any language. The
                 Unicode standard is the product of a joint effort of
                 information technology companies and individual
                 experts; its encoding has been accepted by ISO as the
                 international standard ISO\slash IEC 10646. Unicode
                 defines 16-bit codes for the characters of most scripts
                 used in the world's languages. Encoding for some
                 missing scripts will be added over time. The Unicode
                 standard defines a set of rules that help implementors
                 build text-processing and rendering engines. For
                 Digital, Unicode represents a strategic direction in
                 internationalization technology. Many software
                 producing companies have also announced future support
                 for Unicode.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6130 (Data handling techniques); B6120B (Codes);
                 C7104 (Office automation)",
  classification = "B6120B (Codes); C6130 (Data handling techniques);
                 C7104 (Office automation)",
  keywords =     "16-Bit codes; 16-bit codes; character sets; codes;
                 encoding; Encoding; information; Information technology
                 companies; ISO/IEC 10646; office automation;
                 processing; Rendering engines; rendering engines;
                 standards; technology companies; text-;
                 Text-processing; Unicode; Universal character code;
                 universal character code",
  thesaurus =    "Character sets; Codes; Encoding; Office automation;
                 Standards",
  treatment =    "P Practical",
}

@Article{Rannenberg:1993:XOI,
  author =       "Wendy Rannenberg and J{\"o}rgen Bettels",
  title =        "The {X/Open} Internationalization Model",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "3",
  pages =        "32--42",
  month =        "Summer",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n3/THE_XOPEN_INTERNATIONALIZATIO_01jan1994DTJB03P8.ps;
                 http://www.digital.com:80/info/DTJB03/DTJB03SC.TXT",
  abstract =     "Software internationalization standards allow
                 developers to create applications that are neutral with
                 respect to language and cultural information. X/Open
                 adopted a model for internationalization and has
                 revised the model several times to expand the range of
                 support. The latest version of the X/Open
                 internationalization model, which supports multibyte
                 code sets, provides a set of interfaces that enables
                 users in most of Europe and Asia to develop portable
                 applications independent of the language and code set.
                 One implementation of this model, the internationalized
                 DEC OSF/1 AXP version 1.2 (based on OSF/1 release 1.2)
                 supports complex Asian languages such as Chinese and
                 Japanese.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6110B (Software engineering techniques); C6130 (Data
                 handling techniques); C5620 (Computer networks and
                 techniques)",
  classification = "C5620 (Computer networks and techniques); C6110B
                 (Software engineering techniques); C6130 (Data handling
                 techniques)",
  keywords =     "1.2; Chinese; codes; complex Asian languages; Complex
                 Asian languages; internationalized DEC OSF/1 AXP
                 version; Internationalized DEC OSF/1 AXP version 1.2;
                 Japanese; multibyte code sets; Multibyte code sets;
                 open systems; OSF/1 release 1.2; software engineering;
                 software standards; Software standards; standards;
                 X/Open internationalization model",
  thesaurus =    "Codes; Open systems; Software engineering; Standards",
  treatment =    "P Practical",
}

@Article{Haentjens:1993:OUC,
  author =       "Ren{\'e} Haentjens",
  title =        "The Ordering Of Universal Character Strings",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "3",
  pages =        "43--52",
  month =        "Summer",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n3/THE_ORDERING_OF_UNIVERSAL_CHAR_01jan1994DTJB04P8.ps;
                 http://www.digital.com:80/info/DTJB04/DTJB04SC.TXT",
  abstract =     "In the countries of the world, people have developed
                 various methods to order words and names based on their
                 cultures. Many challenges and problems are associated
                 with developing ways for computers to emulate human
                 ordering methods. An efficient computer method for
                 obtaining a quality ordering has been devised as an
                 extension to the single-step compare. It solves many
                 but not all of the problems. A universal code now
                 exists to store words and names written in many
                 languages and scripts, but there is no universal way to
                 order words and names. Hence, formal specification
                 methods are needed for computer users to describe
                 culture-specific ordering rules. This area is still
                 open to research. Meanwhile, international
                 standardization committees endeavor to formulate
                 sensible proposals for multicultural contexts.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6110B (Software engineering techniques); C6130 (Data
                 handling techniques)",
  classification = "C6110B (Software engineering techniques); C6130
                 (Data handling techniques)",
  keywords =     "character sets; codes; Culture-specific ordering
                 rules; culture-specific ordering rules; formal; Formal
                 specification; formal specification; International
                 standardization; international standardization;
                 specification; standardisation; Universal character
                 strings; universal character strings; Universal code;
                 universal code",
  thesaurus =    "Character sets; Codes; Formal specification;
                 Standardisation",
  treatment =    "P Practical",
}

@Article{Winters:1993:IDS,
  author =       "Gayn B. Winters",
  title =        "International distributed systems --- architectural
                 and practical issues",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "3",
  pages =        "53--62",
  month =        "Summer",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n3/INTERNATIONAL_DISTRIBUTED_SYST_01jan1994DTJB05P8.ps;
                 http://www.digital.com:80/info/DTJB05/DTJB05SC.TXT",
  abstract =     "Building distributed systems for international usage
                 requires addressing many architectural and practical
                 issues. Key to the efficient construction of such
                 systems, modularity in systems and in run-time
                 libraries allows greater reuse of components and thus
                 permits incremental improvements to multilingual
                 systems. Using safe software practices, such as
                 banishing the use of literals and parameterizing user
                 preferences, can help minimize the costs associated
                 with localization, reengineering, maintenance, and
                 design.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5620 (Computer networks and techniques)",
  classification = "C5620 (Computer networks and techniques)",
  keywords =     "distributed processing; Distributed systems;
                 distributed systems; Incremental improvements;
                 incremental improvements; International distributed
                 systems; international distributed systems;
                 Localization engineering; localization engineering;
                 Maintenanc; maintenanc; modularity; Modularity;
                 Multilingual systems; multilingual systems; Run-time
                 libraries; run-time libraries",
  thesaurus =    "Distributed processing",
  treatment =    "P Practical",
}

@Article{Yau:1993:SCJ,
  author =       "Michael M. T. Yau",
  title =        "Supporting the {Chinese}, {Japanese}, and {Korean}
                 Languages in the {OpenVMS} Operating System",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "3",
  pages =        "63--79",
  month =        "Summer",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n3/SUPPORTING_THE_CHINESE_JAPANE_01jan1994DTJB06P8.ps;
                 http://www.digital.com:80/info/DTJB06/DTJB06SC.TXT",
  abstract =     "The Asian language versions of the OpenVMS operating
                 system allow Asian-speaking users to interact with the
                 OpenVMS system in their native languages and provide a
                 platform for developing Asian applications. Since the
                 OpenVMS variants must be able to handle multibyte
                 character sets, the requirements for the internal
                 representation, input, and output differ considerably
                 from those for the standard English version. A review
                 of the Japanese, Chinese, and Korean writing systems
                 and character set standards provides the context for a
                 discussion of the features of the Asian OpenVMS
                 variants. The localization approach adopted in
                 developing these Asian variants was shaped by business
                 and engineering constraints; issues related to this
                 approach are presented.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6150J (Operating systems); C6130 (Data handling
                 techniques)",
  classification = "C6130 (Data handling techniques); C6150J (Operating
                 systems)",
  keywords =     "Asian language versions; character sets; Chinese;
                 internal representation; Internal representation;
                 Japanese; Korean writing systems; Localization
                 approach; localization approach; multibyte; Multibyte
                 character sets; open systems; OpenVMS operating system;
                 operating systems (computers); standards",
  thesaurus =    "Character sets; Open systems; Operating systems
                 [computers]; Standards",
  treatment =    "P Practical",
}

@Article{Yoshioka:1993:CID,
  author =       "Hirotaka Yoshioka and Jim Melton",
  title =        "Character Internationalization in Databases: {A} Case
                 Study",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "3",
  pages =        "80--96",
  month =        "Summer",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n3/CHARACTER_INTERNATIONALIZATIO_01jan1994DTJB07P8.ps;
                 http://www.digital.com:80/info/DTJB07/DTJB07SC.TXT",
  abstract =     "Character internationalization poses difficult
                 problems for database management systems because they
                 must address user (stored) data, source code, and
                 metadata. The revised (1992) standard for database
                 language SQL is one of the first standards to address
                 internationalization in a significant way. DEC Rdb is
                 one of the few Digital products that has a complete
                 internationalization (Asian) implementation that is
                 also MIA compliant. The product is still evolving from
                 a noninternationalized product to a fully
                 internationalized one; this evolution has taken four
                 years and provides an excellent example of the issues
                 that must be resolved and the approaches to resolving
                 them. Rdb can serve as a case study for the software
                 engineering community on how to build internationalized
                 products.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6130 (Data handling techniques); C6160 (Database
                 management systems (DBMS)); C6110B (Software
                 engineering techniques)",
  classification = "C6110B (Software engineering techniques); C6130
                 (Data handling techniques); C6160 (Database management
                 systems (DBMS))",
  keywords =     "Character internationalization; character
                 internationalization; character sets; database;
                 Database management systems; database management
                 systems; databases; Databases; DEC Rdb; engineering;
                 management systems; metadata; Metadata; software;
                 Software engineering; software engineering; source
                 code; Source code; SQL; standards; user data; User
                 data",
  thesaurus =    "Character sets; Database management systems; Software
                 engineering; Standards",
  treatment =    "P Practical",
}

@Article{Honma:1993:JIM,
  author =       "Takahide Honma and Hiroyoshi Baba and Kuniaki
                 Takizawa",
  title =        "{Japanese} Input Method Independent of Applications",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "3",
  pages =        "97--107",
  month =        "Summer",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n3/JAPANESE_INPUT_METHOD_INDEPEND_01jan1994DTJB08P8.ps;
                 http://www.digital.com:80/info/DTJB08/DTJB08SC.TXT",
  abstract =     "The Japanese input method is a complex procedure
                 involving preediting operations. An application that
                 accepts Japanese from an input device must have three
                 systems for the input method: a keybinding system, a
                 manipulator for preediting, and a kana-to-kanji
                 conversion system. Various keybinding systems and
                 manipulators accelerate input operations. Our
                 implementation separates an application from the
                 Japanese input method in three layers. An application
                 can use a front-end input processor to perform all
                 operations including I/O. An application can use the
                 henkan (conversion) module and implement I/O operation
                 itself. An application can execute all operations
                 except keybinding, which is handled by an input method
                 library.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5540B (Interactive-input devices); C5585 (Speech
                 recognition and synthesis); C6130 (Data handling
                 techniques)",
  classification = "C5540B (Interactive-input devices); C5585 (Speech
                 recognition and synthesis); C6130 (Data handling
                 techniques)",
  keywords =     "character sets; equipment; front-end; Front-end input
                 processor; I/O operation; Input device; input device;
                 Input method library; input method library; input
                 processor; interactive devices; Japanese input method;
                 Kana-to-kanji conversion system; kana-to-kanji
                 conversion system; keybinding system; Keybinding
                 system; manipulator; Manipulator; speech recognition",
  thesaurus =    "Character sets; Interactive devices; Speech
                 recognition equipment",
  treatment =    "P Practical",
}

@Article{Anonymous:1993:EId,
  author =       "Anonymous",
  title =        "Editors Introduction",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "4",
  pages =        "??--??",
  month =        "Fall",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Jan 04 06:22:45 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/swp-introduction.txt",
  acknowledgement = ack-nhfb,
}

@Article{Hutchings:1993:F,
  author =       "Tony F. Hutchings",
  title =        "Foreword",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "4",
  pages =        "??--??",
  month =        "Fall",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Jan 04 06:22:45 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/swp-foreword.txt",
  acknowledgement = ack-nhfb,
}

@Article{Knox:1993:MCS,
  author =       "Stephen T. Knox",
  title =        "Modeling the Cost of Software Quality",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "4",
  pages =        "9--17",
  month =        "Fall",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n4/Modeling_the_Cost_of_Software_01apr1994DTJC01P8.ps;
                 http://www.digital.com:80/info/DTJC01/DTJC01SC.TXT",
  abstract =     "This paper offers an extrapolation of the
                 manufacturing and service industries' Cost of Quality
                 Model to the business of software development. The
                 intent is to provide a theoretical account of the
                 changing quality cost structure as a function of a
                 maturing software development process. Thus, the trends
                 in expenditures due to the four major quality cost
                 categories --- appraisal, prevention, internal
                 failures, and external failures --- are presented over
                 the five levels of software process maturity, according
                 to the Software Engineering Institute's (SEI's)
                 Capability Maturity Model for Software (CMM). The
                 Software Cost of Quality Model conservatively proposes
                 that the total cost of quality, expressed as a
                 percentage of the cost of development, can be decreased
                 by approximately two-thirds as process maturity grows
                 from Level 1 to Level 5 of the SEI's CMM.",
  acknowledgement = ack-nhfb,
  affiliation =  "Software Eng. Technol. Center, Digital Equipment
                 Corp., Littleton, MA, USA",
  classcodes =   "C0310F (Software development management); C6110B
                 (Software engineering techniques)",
  classification = "C0310F (Software development management); C6110B
                 (Software engineering techniques)",
  corpsource =   "Software Eng. Technol. Center, Digital Equipment
                 Corp., Littleton, MA, USA",
  keywords =     "Appraisal; appraisal; Capability Maturity Model; Cost
                 of Quality Model; development; DP management; external
                 failures; External failures; extrapolation;
                 Extrapolation; extrapolation; failures; internal;
                 Internal failures; prevention; Prevention; quality;
                 quality cost; Quality cost; software; Software
                 development; software engineering; Software process
                 maturity; software process maturity; Software quality;
                 software quality",
  thesaurus =    "DP management; Extrapolation; Software engineering;
                 Software quality",
  treatment =    "E Economic; P Practical",
}

@Article{Huntwork:1993:CRP,
  author =       "Paul K. Huntwork and Douglas W. Muzzey and Christine
                 M. Pietras and Dennis R. Wixon",
  title =        "Changing the Rules: {A} Pragmatic Approach to Product
                 Development",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "4",
  pages =        "18--35",
  month =        "Fall",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n4/Changing_the_Rules_A_Pragmati_01apr1994DTJC02P8.ps;
                 http://www.digital.com:80/info/DTJC02/DTJC02SC.TXT",
  abstract =     "Developing quality software rapidly and at low cost
                 has been an elusive goal. Nevertheless, meeting this
                 goal is essential in today's competitive environment
                 where more and better products appear at accelerating
                 rates and customers demand systems that support `what
                 users need to do' in a natural and cost effective
                 manner. This paper discusses the processes used by the
                 TeamLinks for Macintosh project team to achieve
                 customer focus throughout the development of a
                 groupware office product. Listening to customers
                 radically reshaped the product and led to more rapid
                 decisions, shorter development cycles, higher quality,
                 and greater customer satisfaction.",
  acknowledgement = ack-nhfb,
  affiliation =  "Software Eng. Technol. Center, Digital Equipment
                 Corp., Littleton, MA, USA",
  classcodes =   "C0310F (Software development management); C6110B
                 (Software engineering techniques); C6150N (Distributed
                 systems)",
  classification = "C0310F (Software development management); C6110B
                 (Software engineering techniques); C6150N (Distributed
                 systems)",
  corpsource =   "Software Eng. Technol. Center, Digital Equipment
                 Corp., Littleton, MA, USA",
  keywords =     "Customer satisfaction; customer satisfaction;
                 development cycles; Development cycles; groupware;
                 Groupware office product; groupware office product;
                 Macintosh; Product development; product development;
                 quality; Quality; quality software; Quality software;
                 software quality; TeamLinks for; TeamLinks for
                 Macintosh",
  thesaurus =    "Groupware; Software quality",
  treatment =    "P Practical",
}

@Article{Hrones:1993:DGR,
  author =       "John A. {Hrones, Jr.} and Benjamin C. {Jedrey, Jr.}
                 and Driss Zaaf",
  title =        "Defining global requirements with distributed {QFD}",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "4",
  pages =        "36--46",
  month =        "Fall",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n4/Defining_Global_Requirements_w_01apr1994DTJC03P8.ps;
                 http://www.digital.com:80/info/DTJC03/DTJC03SC.TXT",
  abstract =     "Obtaining valid data on customer needs and translating
                 it into optimum product functionality is always a
                 challenge, but especially so when the customers are
                 geographically, culturally, and functionally diverse.
                 Digital's Corporate Telecommunications Software
                 Engineering (CTSE) used groupware techniques supported
                 by the distributed use of Quality Function Deployment
                 (QFD) to identify product features that meet customer
                 needs. By linking engineers, customers, and product
                 personnel from across the globe, CTSE redesigned the
                 QFD model to optimize the use of local and global
                 groups in defining product requirements. During one
                 year, three software products, including Automatic
                 Callback version 2.1, were defined using the
                 Distributed Quality Function Deployment (DQFD)
                 technique. Lessons learned from each interactive
                 session were applied to continuously refine the
                 approach to improving process. The critical follow-up
                 steps after the DQFD ultimately determine the success
                 or failure of the effort.",
  acknowledgement = ack-nhfb,
  affiliation =  "Software Eng. Technol. Center, Digital Equipment
                 Corp., Littleton, MA, USA",
  classcodes =   "C0310F (Software development management); C6110B
                 (Software engineering techniques); C7410F
                 (Communications)",
  classification = "C0310F (Software development management); C6110B
                 (Software engineering techniques); C7410F
                 (Communications)",
  corpsource =   "Software Eng. Technol. Center, Digital Equipment
                 Corp., Littleton, MA, USA",
  keywords =     "Automatic Callback; Corporate Telecommunications
                 Software; Corporate Telecommunications Software
                 Engineering; DEC computers; Deployment; Digital;
                 Distributed QFD; distributed QFD; Distributed Quality
                 Function Deployment; Engineering; global requirements;
                 Global requirements; Quality Function; Quality Function
                 Deployment; software engineering; software products;
                 Software products; software quality; telecommunications
                 computing",
  thesaurus =    "DEC computers; Software engineering; Software quality;
                 Telecommunications computing",
  treatment =    "P Practical",
}

@Article{Guerrieri:1993:DTW,
  author =       "Ernesto Guerrieri and Bruce J. Taylor",
  title =        "{DEC TP Workcenter}: {A} Software Process Case Study",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "4",
  pages =        "47--58",
  month =        "Fall",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n4/DEC_TP_WORKcenter_A_Software_01apr1994DTJC04P8.ps;
                 http://www.digital.com:80/info/DTJC04/DTJC04SC.TXT",
  abstract =     "DEC TP WORKcenter is Digital's object-based production
                 system development environment for Application Control
                 and Management System TP applications. Goals for the
                 DEC TP WORKcenter project were to meet customers'
                 requirements, to provide superior product quality, and
                 to maintain schedule predictability. Modern software
                 process techniques helped to achieve an appropriate
                 balance in resolving the inevitable conflicts between
                 project goals. A critical analysis of each software
                 process shows its effect on the engineering team, the
                 product, and the project schedule. Changes to the
                 process were implemented based on the team's experience
                 and quality metrics. Recommendations to other project
                 teams are offered based on the conclusions drawn from
                 the DEC TP WORKcenter project.",
  acknowledgement = ack-nhfb,
  affiliation =  "Production Syst. Group, Digital Equipment Corp.,
                 Littleton, MA, USA",
  classcodes =   "C0310F (Software development management); C6110B
                 (Software engineering techniques)",
  classification = "C0310F (Software development management); C6110B
                 (Software engineering techniques)",
  corpsource =   "Production Syst. Group, Digital Equipment Corp.,
                 Littleton, MA, USA",
  keywords =     "Application Control and Management; Application
                 Control and Management System TP; DEC computers; DEC TP
                 WORKcenter; development environment; Object-based;
                 object-based; Product quality; product quality;
                 production system; Production system development
                 environment; Project schedule; project schedule;
                 software engineering; software process techniques;
                 Software process techniques; software quality; System
                 TP",
  thesaurus =    "DEC computers; Software engineering; Software
                 quality",
  treatment =    "P Practical",
}

@Article{Davies:1993:SPI,
  author =       "Neil L. M. Davies and Margaret M. Dumont",
  title =        "{SEI}-based Process Improvement Efforts at {Digital}",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "4",
  pages =        "59--68",
  month =        "Fall",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n4/SEIbased_Process_Improvement_01apr1994DTJC05P8.ps;
                 http://www.digital.com:80/info/DTJC05/DTJC05SC.TXT",
  abstract =     "The Software Engineering Institute is chartered with
                 advancing the state-of-the practice of software
                 engineering to improve the quality of the systems that
                 depend on software. Digital has based its software
                 process improvement program on the Capability Maturity
                 Model and Software Process Assessment developed by the
                 SEI. As software organizations gain process maturity,
                 they produce higher-quality products. Case studies
                 report the experiences and learnings of two software
                 organizations at Digital that have introduced the SEI
                 framework and methods into their process improvement
                 efforts.",
  acknowledgement = ack-nhfb,
  affiliation =  "OpenVMS, Digital Equipment Corp., Littleton, MA, USA",
  classcodes =   "C0310F (Software development management); C6110B
                 (Software engineering techniques)",
  classification = "C0310F (Software development management); C6110B
                 (Software engineering techniques)",
  corpsource =   "OpenVMS, Digital Equipment Corp., Littleton, MA, USA",
  keywords =     "Capability Maturity Model; DEC computers; Digital; DP
                 management; engineering; quality; Quality; SEI;
                 software; Software engineering; software engineering;
                 Software Engineering Institute; Software organizations;
                 software organizations; Software Process Assessment;
                 Software process improvement program; software process
                 improvement program",
  thesaurus =    "DEC computers; DP management; Software engineering;
                 Software quality",
  treatment =    "A Application; P Practical",
}

@Article{Thomson:1993:AQO,
  author =       "Robert G. Thomson",
  title =        "Assessing the Quality of {OpenVMS AXP}: Software
                 Measurement Using Subjective Data",
  journal =      j-DEC-TECH-J,
  volume =       "5",
  number =       "4",
  pages =        "69--78",
  month =        "Fall",
  year =         "1993",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v5n4/Assessing_the_Quality_of_OpenV_01apr1994DTJC06P8.ps;
                 http://www.digital.com:80/info/DTJC06/DTJC06SC.TXT",
  abstract =     "In the absence of a well-defined development process
                 and a set of objective metrics, subjective data can be
                 used to assess the quality of a software release. This
                 assessment can identify and characterize development
                 risk, focus testing and validation efforts, and
                 indicate where and how process management should be
                 improved. The OpenVMS Engineering organization has
                 developed a questionnaire, a set of quality indicators,
                 and a data reduction methodology that implement such an
                 assessment. This assessment approach is flexible and
                 can be applied generally to the measurement of software
                 quality during the evolution of a repeatable
                 development process.",
  acknowledgement = ack-nhfb,
  affiliation =  "OpenVMS AXP Group, Digital Equipment Corp., Littleton,
                 MA, USA",
  classcodes =   "C6110B (Software engineering techniques); C0310F
                 (Software development management); C6150G (Diagnostic,
                 testing, debugging and evaluating systems)",
  classification = "C0310F (Software development management); C6110B
                 (Software engineering techniques); C6150G (Diagnostic,
                 testing, debugging and evaluating systems)",
  corpsource =   "OpenVMS AXP Group, Digital Equipment Corp., Littleton,
                 MA, USA",
  keywords =     "Data reduction methodology; data reduction
                 methodology; development process; Development process;
                 Objective metrics; objective metrics; openVMS AXP;
                 OpenVMS AXP; process management; Process management;
                 program testing; quality; software; Software
                 measurement; software measurement; Software quality;
                 software quality; Software testing; software testing;
                 subjective data; Subjective data",
  thesaurus =    "Program testing; Software quality",
  treatment =    "P Practical",
}

@Article{Anonymous:1994:EIa,
  author =       "Anonymous",
  title =        "Editors Introduction",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "1",
  pages =        "??--??",
  month =        "Winter",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Jan 04 06:22:45 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/sm-introduction.txt",
  acknowledgement = ack-nhfb,
}

@Article{Souza:1994:GSH,
  author =       "Robert J. Souza and P. G. Krishnakumar and C{\"u}neyt
                 M. {\"O}zveren and Robert J. Simcoe and Barry A.
                 Spinney and Robert E. Thomas and Robert J. Walsh",
  title =        "{GIGAswitch} System: {A} High-Performance
                 Packet-switching Platform",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "1",
  pages =        "9--22",
  month =        "Winter",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v6n1/GIGAswitch_System_A_Highperf_01jul1994DTJD01P8.ps;
                 http://www.digital.com:80/info/DTJD01/DTJD01SC.TXT",
  abstract =     "The GIGAswitch system is a high-performance
                 packet-switching platform built on a 36-port 100 Mb/s
                 crossbar switching fabric. The crossbar is data link
                 independent and is capable of making 6.25 million
                 connections per second. Digital's first GIGAswitch
                 system product uses 2-port FDDI line cards to construct
                 a 22-port IEEE 802.1d FDDI bridge. The FDDI bridge
                 implements distributed forwarding in hardware to yield
                 forwarding rates in excess of 200,000 packets per
                 second per port. The GIGAswitch system is highly
                 available and provides robust operation in the presence
                 of overload.",
  acknowledgement = ack-nhfb,
  classcodes =   "B6210L (Computer communications); B6260 (Optical links
                 and equipment); C5630 (Networking equipment); C5640
                 (Protocols)",
  classification = "B6210L (Computer communications); B6260 (Optical
                 links and equipment); C5630 (Networking equipment);
                 C5640 (Protocols)",
  keywords =     "100 Mbit/s; architecture; computer networks; Crossbar
                 switching; crossbar switching; FDDI; FDDI bridge;
                 GIGAswitch system; high-performance; High-performance;
                 packet switching; packet-switching; Packet-switching
                 platform; performance measurements; Performance
                 measurements; platform; switch; Switch architecture",
  numericalindex = "Bit rate 1.0E+08 bit/s",
  thesaurus =    "Computer networks; FDDI; Packet switching",
  treatment =    "P Practical",
}

@Article{Dimino:1994:PDR,
  author =       "Lucien A. Dimino and Rabah Mediouni and T. K.
                 Rengarajan and Michael S. Rubino and Peter M. Spiro",
  title =        "Performance of {DEC Rdb} Version 6.0 on {AXP}
                 Systems",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "1",
  pages =        "23--35",
  month =        "Winter",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v6n1/Performance_of_DEC_Rdb_Versio_01jul1994DTJD02P8.ps;
                 http://www.digital.com:80/info/DTJD02/DTJD02SC.TXT",
  abstract =     "The Alpha AXP family of processors provided a dramatic
                 increase in CPU speed. Even with slower processors,
                 many database applications were dominated by relatively
                 slow I/O rates. To maintain a balanced system, database
                 software must incorporate techniques that specifically
                 address the disparity between CPU speed and I/O
                 performance. The DEC Rdb version 6.0 database
                 management system contains shorter code paths, fewer
                 I/O operations, and reduced stall times. These
                 enhancements minimize the effect of the I/O bottleneck
                 and allow the AXP processor to run at its intended
                 higher speeds. Empirical performance results show a
                 marked improvement in I/O rates.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6160 (Database management systems (DBMS))",
  classification = "C6160 (Database management systems (DBMS))",
  keywords =     "Database management system; database management
                 system; database management systems; Database software;
                 database software; DEC computers; DEC Rdb; DEC Rdb
                 version 6.0; I/O bottleneck; I/O operations",
  thesaurus =    "Database management systems; DEC computers",
  treatment =    "P Practical",
}

@Article{Goleman:1994:IPI,
  author =       "William L. Goleman and Robert G. Thomson and Paul J.
                 Houlihan",
  title =        "Improving Process to Increase Productivity While
                 Assuring Quality: {A} Case Study of the Volume
                 Shadowing Port to {OpenVMS AXP}",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "1",
  pages =        "36--53",
  month =        "Winter",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v6n1/Improving_Process_to_Increase_01jul1994DTJD03P8.ps;
                 http://www.digital.com:80/info/DTJD03/DTJD03SC.TXT",
  abstract =     "The volume shadowing team achieved a high-quality,
                 accelerated delivery of volume shadowing on OpenVMS AXP
                 by applying techniques from academic and industry
                 literature to Digital's commercial setting. These
                 techniques were an assessment of the team process to
                 identify deficiencies, formal inspections to detect
                 most porting defects before testing, and principles of
                 experimental design in the testing to efficiently
                 isolate defects and assure quality. This paper
                 describes how a small team can adopt new practices and
                 improve product quality, independent of the larger
                 organization and demonstrates how this led to a more
                 enjoyable, productive, and predictable work
                 environment.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6150J (Operating systems); C6120 (File organisation);
                 C0310 (EDP management)",
  classification = "C0310 (EDP management); C6120 (File organisation);
                 C6150J (Operating systems)",
  keywords =     "Accelerated delivery; accelerated delivery; case
                 study; Case study; Commercial setting; commercial
                 setting; control; DEC; Experimental design;
                 experimental design; formal; Formal inspections;
                 inspections; new; New practices; OpenVMS AXP operating;
                 OpenVMS AXP operating system; operating systems
                 (computers); Porting defects; porting defects;
                 practices; Predictable work environment; predictable
                 work environment; product quality; Product quality;
                 project management; quality; Quality assurance; quality
                 assurance; redundancy; storage management; system; team
                 process; Team process; volume shadowing port; Volume
                 shadowing port",
  thesaurus =    "Operating systems [computers]; Project management;
                 Quality control; Redundancy; Storage management",
  treatment =    "P Practical",
}

@Article{Conroy:1994:EAA,
  author =       "David G. Conroy and Thomas E. Kopec and Joseph R.
                 Falcone",
  title =        "The Evolution of the {Alpha AXP PC}",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "1",
  pages =        "54--65",
  month =        "Winter",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v6n1/The_Evolution_of_the_Alpha_01jul1994DTJD04P8.ps;
                 http://www.digital.com:80/info/DTJD04/DTJD04SC.TXT",
  abstract =     "The DECpc AXP 150 personal computer is not only the
                 first in Digital's line of Alpha AXP PC products but
                 also the latest in a line of experimental low-cost
                 systems. This paper traces the evolution of these
                 systems, which began several years ago in Digital's
                 research and advanced development laboratories. The
                 authors reveal some of the reasoning behind the
                 engineering design decisions, point out ideas that
                 worked well, and acknowledge ideas that did not work
                 well and were discarded. Chief among the many lessons
                 learned is that combining Alpha AXP microprocessors and
                 industry-standard system components is within the
                 abilities of any competent digital design engineer.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5430 (Microcomputers); C5220 (Computer architecture);
                 C0310F (Software development management)",
  classification = "C0310F (Software development management); C5220
                 (Computer architecture); C5430 (Microcomputers)",
  keywords =     "Alpha AXP microprocessors; Alpha AXP PC; Alpha AXP PC
                 Products; computer architecture; DEC; DEC computers;
                 DECpc AXP 150 personal computer; Digital; digital
                 design; Digital design engineer; engineer; Engineering
                 design decisions; engineering design decisions;
                 Experimental low-cost systems; experimental low-cost
                 systems; industry-standard system components;
                 Industry-standard system components; microcomputers;
                 Products; standards; systems analysis",
  thesaurus =    "Computer architecture; DEC computers; Microcomputers;
                 Standards; Systems analysis",
  treatment =    "P Practical; R Product Review",
}

@Article{McKinney:1994:DDF,
  author =       "Dina L. McKinney and Masooma Bhaiwala and Kwong-Tak A.
                 Chui and Christopher L. Houghton and James R. Mullens
                 and Daniel L. Leibholz and Sanjay J. Patel and Delvan
                 A. Ramey and Mark B. Rosenbluth",
  title =        "{Digital}'s {DECchip} 21066: The First Cost-focused
                 {Alpha AXP} Chip",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "1",
  pages =        "66--77",
  month =        "Winter",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v6n1/Digitals_DECchip_21066_The_F_01jul1994DTJD05P8.ps;
                 http://www.digital.com:80/info/DTJD05/DTJD05SC.TXT",
  abstract =     "The DECchip 21066 microprocessor is the first Alpha
                 AXP microprocessor to target cost-focused system
                 applications and the second in a family of chips to
                 implement the Alpha AXP architecture. The chip is a
                 0.675-micrometer ($ \mu $ m), CMOS-based, superscalar,
                 superpipelined processor that uses dual instruction
                 issue. It incorporates a high level of system
                 integration to provide best-in-class system performance
                 for low-cost system applications. The DECchip 21066
                 microprocessor integrates on-chip, fully pipelined,
                 integer and floating-point processors, a high-bandwidth
                 memory controller, an industry-standard PCI I/O
                 controller, graphics-assisting hardware, internal
                 instruction and data caches, and an external cache
                 controller. Cost-saving packaging techniques and an
                 on-chip, analog phase-locked loop enable the chip to
                 meet the cost demands of personal computers and desktop
                 systems. This paper discusses the trade-offs and
                 results of the design, verification, and implementation
                 of the DECchip 21066 microprocessor.",
  acknowledgement = ack-nhfb,
  classcodes =   "B1265F (Microprocessors and microcomputers); C5130
                 (Microprocessor chips)",
  classification = "B1265F (Microprocessors and microcomputers); C5130
                 (Microprocessor chips)",
  keywords =     "Alpha AXP chip; Alpha AXP microprocessor;
                 Cost-focused; cost-focused; DEC computers; DECchip
                 21066; Design; design; dual instruction; Dual
                 instruction issue; issue; microprocessor chips;
                 superpipelined; Superpipelined; Superscalar;
                 superscalar; Verification; verification",
  thesaurus =    "DEC computers; Microprocessor chips",
  treatment =    "P Practical",
}

@Article{Anonymous:1994:EIb,
  author =       "Anonymous",
  title =        "Editor's Introduction",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "2",
  pages =        "??--??",
  month =        "Spring",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Jan 04 06:22:45 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v6n2-intro.txt",
  acknowledgement = ack-nhfb,
}

@Article{Gordon:1994:F,
  author =       "Scott A. Gordon",
  title =        "Foreword",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "2",
  pages =        "??--??",
  month =        "Spring",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Mon Jun 24 18:53:16 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v6n2-foreword.txt",
  acknowledgement = ack-nhfb,
}

@Article{Koeninger:1994:SMM,
  author =       "R. Kent Koeninger and Mark Furtney and Martin Walker",
  title =        "A Shared Memory {MPP} from {Cray Research}",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "2",
  pages =        "8--21",
  month =        "Spring",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v6n2/A_Shared_Memory_MPP_from_01oct1994DTJE01P8.ps;
                 http://www.digital.com:80/info/DTJE01/DTJE01SC.TXT",
  abstract =     "The CRAY T3D system is the first massively parallel
                 processor from Cray Research. The implementation
                 entailed the design of system software, hardware,
                 languages, and tools. A study of representative
                 applications influenced these designs. The paper
                 focuses on the programming model, the physically
                 distributed, logically shared memory interconnect, and
                 the integration of Digital's DECchip 2 1064 Alpha AXP
                 microprocessor in this interconnect. Additional topics
                 include latency hiding and synchronization hardware,
                 libraries, operating system, and tools.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5440 (Multiprocessor systems and techniques); C5220P
                 (Parallel architecture); C6110P (Parallel programming);
                 C6150J (Operating systems); C5310 (Storage system
                 design); C6120 (File organisation)",
  classification = "C5220P (Parallel architecture); C5310 (Storage
                 system design); C5440 (Multiprocessing systems); C6110P
                 (Parallel programming); C6120 (File organisation);
                 C6150J (Operating systems)",
  keywords =     "architecture; architectures; AXP microprocessor; Cray
                 computers; Cray Research; CRAY T3D system; Digital's
                 DECchip 21064 Alpha; Digital's DECchip 21064 Alpha AXP
                 microprocessor; distributed memory systems; Hardware;
                 hardware; languages; Languages; latency-hiding
                 hardware; Latency-hiding hardware; Libraries;
                 libraries; massively; Massively parallel processor;
                 memory; Operating system; operating system; operating
                 systems (computers); parallel; parallel machines;
                 parallel processor; parallel programming; physically
                 distributed logically; Physically distributed logically
                 shared memory interconnect; programming model;
                 Programming model; shared memory interconnect; shared
                 memory MPP; Shared memory MPP; shared memory systems;
                 synchronization; Synchronization hardware; System
                 software; system software; Tools; tools",
  thesaurus =    "Cray computers; Distributed memory systems; Memory
                 architecture; Operating systems [computers]; Parallel
                 architectures; Parallel machines; Parallel programming;
                 Shared memory systems",
  treatment =    "P Practical; R Product Review",
}

@Article{Couranz:1994:SAA,
  author =       "Robert Couranz",
  title =        "The {E$^2$COTS} system and {Alpha AXP} technology: the
                 new computer standard for military use",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "2",
  pages =        "22--33",
  month =        "Spring",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v6n2/The_E_01oct1994DTJE02P8.ps;
                 http://www.digital.com:80/info/DTJE02/DTJE02SC.TXT",
  abstract =     "The translation of Digital products applicable to
                 military application has been affected by the DoD's
                 need for lower cost products. Products developed for
                 military application must retain robust mechanical
                 characteristics; however, each product may be tailored
                 to meet government specifications such as mean time
                 between failure and temperature range. Design changes
                 for military use have had a beneficial second effect.
                 Militarized products may be readily modified to meet a
                 severe industrial environment that previously could
                 only be accomplished with commercial products in
                 special enclosures. As a result of the close
                 cooperation between Digital and Raytheon,
                 cost-effective, severe environment products can be
                 provided to the DoD and the industry.",
  acknowledgement = ack-nhfb,
  classcodes =   "C7150 (Military)",
  classification = "C7150 (Military computing)",
  keywords =     "Alpha AXP technology; computer; Computer standard;
                 cost products; Cost-effective severe environment
                 products; cost-effective severe environment products;
                 Design changes; design changes; Digital products; E/sup
                 2/COTS system; Failure; failure; government; Government
                 specifications; lower; Lower cost products; Militarized
                 products; militarized products; military computing;
                 military standards; Military use; military use;
                 Raytheon; Robust mechanical characteristics; robust
                 mechanical characteristics; Severe industrial
                 environment; severe industrial environment;
                 specifications; standard; Temperature range;
                 temperature range; Translation; translation",
  thesaurus =    "Military computing; Military standards",
  treatment =    "P Practical",
}

@Article{Levine:1994:VRK,
  author =       "Ronald D. Levine",
  title =        "Volume rendering with the {Kubota 3D} imaging and
                 graphics accelerator",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "2",
  pages =        "34--48",
  month =        "Spring",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v6n2/Volume_Rendering_with_the_Kubo_01oct1994DTJE03P8.ps;
                 http://www.digital.com:80/info/DTJE03/DTJE03SC.TXT",
  abstract =     "The Kubota 3D imaging and graphics accelerator, which
                 provides advanced graphics for Digital's DEC 3000 AXP
                 workstations, is the first desktop system to combine
                 three-dimensional imaging and graphics technologies,
                 and thus to fully support volume rendering. The power
                 of the Kubota parallel architecture enables interactive
                 volume rendering. The capability for combining volume
                 rendering with geometry-based rendering distinguishes
                 the Kubota system from more specialized volume
                 rendering systems and enhances its utility in medical,
                 seismic, and computational science applications. To
                 meet the massive storage, processing, and bandwidth
                 requirements associated with volume rendering, the
                 Kubota graphics architecture features a large
                 off-screen frame buffer memory, the parallel processing
                 power of up to 20 pixel engines and 6 geometric
                 transform engines, and wide, high-bandwidth data paths
                 throughout.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6130B (Graphics techniques); C5220P (Parallel
                 architecture); C4260 (Computational geometry); C5540
                 (Terminals and graphic displays); C5530 (Pattern
                 recognition and computer vision equipment)",
  classification = "C4260 (Computational geometry); C5220P (Parallel
                 architecture); C5530 (Pattern recognition and computer
                 vision equipment); C5540 (Terminals and graphic
                 displays); C6130B (Graphics techniques)",
  keywords =     "Advanced graphics; advanced graphics; architectures;
                 Bandwidth requirements; bandwidth requirements; buffer
                 memory; computational geometry; Computational science
                 applications; computational science applications;
                 computer graphic equipment; data; desktop system;
                 Desktop system; Digital's DEC 3000 AXP; Digital's DEC
                 3000 AXP workstations; geometric; Geometric transform
                 engines; Geometry-based rendering; geometry-based
                 rendering; image processing equipment; interactive
                 volume rendering; Interactive volume rendering; Kubota
                 3D imaging and graphics accelerator; large off-screen
                 frame; Large off-screen frame buffer memory; Medical
                 applications; medical applications; parallel; Parallel
                 architecture; parallel architecture; parallel
                 processing power; Parallel processing power;
                 processing; Processing requirements; rendering;
                 rendering (computer graphics); requirements; Seismic
                 applications; seismic applications; Storage
                 requirements; storage requirements; transform engines;
                 visualisation; volume; Volume rendering; Wide
                 high-bandwidth data paths; wide high-bandwidth data
                 paths; workstations",
  thesaurus =    "Computational geometry; Computer graphic equipment;
                 Data visualisation; Image processing equipment;
                 Parallel architectures; Rendering [computer graphics]",
  treatment =    "P Practical",
}

@Article{Nadkarni:1994:DDP,
  author =       "Samyojita A. Nadkarni and Walker Anderson and Lauren
                 M. Carlson and David Kravitz and Mitchell O. Norcross
                 and Thomas M. Wenners",
  title =        "Development of {Digital}'s {PCI} Chip Sets and
                 Evaluation Kit for the {DECchip} 21064 Microprocessor",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "2",
  pages =        "49--61",
  month =        "Spring",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v6n2/Development_of_Digitals_PCI_C_01oct1994DTJE04P8.ps;
                 http://www.digital.com:80/info/DTJE04/DTJE04SC.TXT",
  abstract =     "The DECchip 21071 and the DECchip 21072 chip sets were
                 designed to provide simple, competitive devices for
                 building cost-focused or high-performance PCI-based
                 systems using the DECchip 21064 family of Alpha AXP
                 microprocessors. The chip sets include data slices, a
                 bridge between the DECchip 21064 microprocessor and the
                 PCI local bus, and a secondary cache and memory
                 controller. The EB64+ evaluation kit, a companion
                 product, contains an example PC mother board that was
                 built using the DECchip 21064 microprocessor, the
                 DECchip 21072 chip set, and other off-the-shelf PC
                 components. The EB64+ kit provides hooks for system
                 designers to evaluate cost\slash performance
                 trade-offs. Either chip set, used with the EB64+
                 evaluation kit, enables system designers to develop
                 Alpha AXP PCs with minimal design and engineering
                 effort.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5130 (Microprocessor chips); C5470 (Performance
                 evaluation and testing)",
  classification = "C5130 (Microprocessor chips); C5470 (Performance
                 evaluation and testing)",
  keywords =     "Alpha AXP microprocessors; Data slices; data slices;
                 DEC computers; DECchip 21064; DECchip 21071; DECchip
                 21072; microprocessor chips; PCI chip sets; performance
                 evaluation",
  thesaurus =    "DEC computers; Microprocessor chips; Performance
                 evaluation",
  treatment =    "P Practical",
}

@Article{Cressman:1994:ADC,
  author =       "David C. Cressman",
  title =        "Analysis of Data Compression in the {DLT2000} Tape
                 Drive",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "2",
  pages =        "62--71",
  month =        "Spring",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v6n2/Analysis_of_Data_Compression_i_01oct1994DTJE05P8.ps;
                 http://www.digital.com:80/info/DTJE05/DTJE05SC.TXT",
  abstract =     "The DLT2000 magnetic tape drive is a state-of-the-art
                 storage product with a 1.25M-byte-per-second data
                 throughput rate and a 1.0G-byte capacity, without data
                 compression. To increase data capacity and throughput
                 rates, the DLT2000 implements a variant of the
                 Lempel--Ziv (LZ) data compression algorithm. An LZ
                 method was chosen over other methods, specifically over
                 the Improved Data Recording Capability (IDRC)
                 algorithm, after performance studies showed that the LZ
                 implementation has superior data throughput rates for
                 typical data, as well as superior capacity. This paper
                 outlines the two designs, presents the methodology and
                 the results of the performance testing, and analyzes
                 why the LZ implementation is faster, when the IDRC
                 hardware implementation had twice the bandwidth and was
                 expected to have faster throughput rates.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5320C (Storage on moving magnetic media)",
  classification = "C5320C (Storage on moving magnetic media)",
  keywords =     "art storage product; Bandwidth; bandwidth; capability
                 algorithm; Data capacity; data capacity; data
                 compression; Data compression; data recording; DLT2000
                 magnetic tape drive; hardware; Hardware implementation;
                 implementation; improved data recording; Improved data
                 recording capability algorithm; Lempel-; Lempel--Ziv
                 data compression algorithm; magnetic tape equipment;
                 magnetic tape storage; performance studies; Performance
                 studies; state-of-the-; State-of-the-art storage
                 product; throughput rates; Throughput rates; Ziv data
                 compression algorithm",
  thesaurus =    "Data compression; Data recording; Magnetic tape
                 equipment; Magnetic tape storage",
  treatment =    "P Practical",
}

@Article{Anonymous:1994:EIc,
  author =       "Anonymous",
  title =        "Editors Introduction",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "3",
  pages =        "??--??",
  month =        "Summer",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Mon Jun 24 18:53:16 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v6n3-introduction.txt",
  acknowledgement = ack-nhfb,
}

@Article{Holmes:1994:F,
  author =       "Steve Holmes",
  title =        "Foreword",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "3",
  pages =        "??--??",
  month =        "Summer",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Jan 04 06:22:45 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v6n3-foreword.txt",
  acknowledgement = ack-nhfb,
}

@Article{Hayes:1994:DAM,
  author =       "Fidelma M. Hayes",
  title =        "Design of the {AlphaServer} Multiprocessor Server
                 Systems",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "3",
  pages =        "8--19",
  month =        "Summer",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v6n3/Design_of_the_AlphaServer_Mult_01jan1995DTJF01P8.ps;
                 http://www.digital.com:80/info/DTJF01/DTJF01SC.TXT",
  abstract =     "Digital's AlphaServer multiprocessor systems are
                 high-performance servers that combine multiprocessing
                 technology with PC-style I/O subsystems. The system
                 architecture allows four processing nodes, four memory
                 nodes (up to a maximum of 2 GB), and two I/O nodes. All
                 nodes communicate through a system bus. The system bus
                 was designed to support multiple generations of Alpha
                 processor technology. The architecture can be
                 implemented in different ways, depending on the size of
                 the system packaging.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5440 (Multiprocessing systems); C5630 (Networking
                 equipment)",
  classification = "C5440 (Multiprocessing systems); C5630 (Networking
                 equipment)",
  keywords =     "Alpha processor technology; architecture; Digital's
                 AlphaServer multiprocessor systems; high-;
                 High-performance servers; multiprocessing systems;
                 network servers; packaging; PC-style I/O subsystems;
                 performance servers; system; System architecture;
                 system bus; System bus; System packaging",
  thesaurus =    "Multiprocessing systems; Network servers",
  treatment =    "P Practical",
}

@Article{Russo:1994:AS,
  author =       "Andrew P. Russo",
  title =        "The {AlphaServer} 2100 {I/O} Subsystem",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "3",
  pages =        "20--28",
  month =        "Summer",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v6n3/The_AlphaServer_2100_IO_Subsy_01jan1995DTJF02P8.ps;
                 http://www.digital.com:80/info/DTJF02/DTJF02SC.TXT",
  abstract =     "The AlphaServer 2100 I/O subsystem contains a
                 dual-level I/O structure that includes the high-powered
                 PCI local bus and the widely used EISA bus. The PCI bus
                 is connected to the server's multiprocessing system bus
                 through the custom-designed bridge chip. The EISA bus
                 supports eight general-purpose EISA/ISA connectors,
                 providing connections to plug-in, industry-standard
                 options. Data rate isolation, disconnected transaction,
                 and data buffer management techniques were used to
                 ensure bus efficiency in the I/O subsystem. Innovative
                 engineering designs accomplished the task of combining
                 Alpha CPUs and standard-system I/O devices.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5610S (System buses); C5440 (Multiprocessing
                 systems)",
  classification = "C5440 (Multiprocessing systems); C5610S (System
                 buses)",
  keywords =     "Alpha CPUs; AlphaServer 2100 I/O subsystem; bus; Data
                 buffer management techniques; data buffer management
                 techniques; data rate isolation; Data rate isolation;
                 disconnected transaction; Disconnected transaction;
                 dual-level I/O structure; Dual-level I/O structure;
                 EISA bus; High-powered PCI local bus; high-powered PCI
                 local bus; industry-standard options; Industry-standard
                 options; multiprocessing system; Multiprocessing system
                 bus; multiprocessing systems; standard-system I/O
                 devices; Standard-system I/O devices; system buses",
  thesaurus =    "Multiprocessing systems; System buses",
  treatment =    "P Practical",
}

@Article{Denham:1994:DOV,
  author =       "Jeffrey M. Denham and Paula Long and James A.
                 Woodward",
  title =        "{DEC OSF/1} Version 3.0 Symmetric Multiprocessing
                 Implementation",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "3",
  pages =        "29--43",
  month =        "Summer",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v6n3/DEC_OSF1_Symmetric_Multiproce_01jan1995DTJF03P8.ps;
                 http://www.digital.com:80/info/DTJF03/DTJF03SC.TXT",
  abstract =     "The primary goal for an operating system in a
                 symmetric multiprocessing (SMP) implementation is to
                 convert the additional computing power provided to the
                 system, as processors are added, into improved system
                 performance without compromising system quality. The
                 DEC OSF/1 version 3.0 operating system uses a number of
                 techniques to achieve this goal. The techniques include
                 algorithmic enhancements to improve parallelism within
                 the kernel and additional lock-based synchronization to
                 protect global system state. Synchronization primitives
                 include spin locks and blocking locks. An optional
                 locking hierarchy was imposed to detect latent
                 symmetric multiprocessor synchronization issues.
                 Enhancements to the kernel scheduler improve cache
                 usage by enabling soft affinity of threads to the
                 processor on which the thread last ran; a
                 load-balancing algorithm keeps the number of runnable
                 threads spread evenly across the available processors.
                 A highly scalable and stable SMP implementation
                 resulted from the project.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6150J (Operating systems); C5440 (Multiprocessing
                 systems); C6150N (Distributed systems software)",
  classification = "C5440 (Multiprocessing systems); C6150J (Operating
                 systems); C6150N (Distributed systems software)",
  keywords =     "blocking; Blocking locks; DEC OSF/1 version 3.0
                 symmetric multiprocessing; DEC OSF/1 version 3.0
                 symmetric multiprocessing implementation;
                 implementation; Kernel scheduler; kernel scheduler;
                 Load-balancing algorithm; load-balancing algorithm;
                 lock-based synchronization; Lock-based synchronization;
                 locks; multiprocessing programs; multiprocessing
                 systems; operating; operating system; Operating system;
                 quality; Spin locks; spin locks; synchronisation;
                 system; System performance; system performance; System
                 quality; systems (computers)",
  thesaurus =    "Multiprocessing programs; Multiprocessing systems;
                 Operating systems [computers]; Synchronisation",
  treatment =    "P Practical",
}

@Article{Kamath:1994:DHS,
  author =       "Chandrika Kamath and Roy Ho and Dwight P. Manley",
  title =        "{DXML}: {A} High-performance Scientific Subroutine
                 Library",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "3",
  pages =        "44--56",
  month =        "Summer",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v6n3/DXML_A_Highperformance_Scien_01jan1995DTJF04P8.ps;
                 http://www.digital.com:80/info/DTJF04/DTJF04SC.TXT",
  abstract =     "Mathematical subroutine libraries for science and
                 engineering applications are an important tool in
                 high-performance computing. By identifying and
                 optimizing frequently used, numerically intensive
                 operations, these libraries help in reducing the cost
                 of computation, enhancing portability, and improving
                 productivity. The Digital eXtended Math Library is a
                 set of public domain and Digital proprietary software
                 that has been optimized for high performance on Alpha
                 systems. In this paper, DXML and the issues related to
                 library software technology are described. Specific
                 examples illustrate how algorithms can be optimized to
                 take advantage of the architecture of Alpha systems.
                 Modern algorithms that effectively exploit the memory
                 hierarchy enable DXML routines to provide substantial
                 improvements in performance.",
  acknowledgement = ack-nhfb,
  classcodes =   "C7310 (Mathematics computing); C6115 (Programming
                 support); C6110B (Software engineering techniques)",
  classification = "C6110B (Software engineering techniques); C6115
                 (Programming support); C7310 (Mathematics computing)",
  keywords =     "Alpha systems; computing; Digital eXtended Math
                 Library; Digital proprietary software; DXML;
                 high-performance; High-performance computing;
                 high-performance scientific subroutine library;
                 High-performance scientific subroutine library;
                 mathematics computing; numerically intensive
                 operations; Numerically intensive operations;
                 portability; Portability; Public domain software;
                 public domain software; Science and engineering
                 applications; science and engineering applications;
                 software libraries",
  thesaurus =    "Mathematics computing; Software libraries",
  treatment =    "A Application; P Practical",
}

@Article{Kuhn:1994:KPD,
  author =       "Robert H. Kuhn and Bruce Leasure and Sanjiv M. Shah",
  title =        "The {KAP} Parallelizer for {DEC Fortran} and {DEC C}
                 Programs",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "3",
  pages =        "57--70",
  month =        "Summer",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v6n3/The_KAP_Parallelizer_for_DEC_01jan1995DTJF05P8.ps;
                 http://www.digital.com:80/info/DTJF05/DTJF05SC.TXT",
  abstract =     "The KAP preprocessor optimizes DEC Fortran and DEC C
                 programs to achieve their best performance on Digital
                 Alpha systems. One key optimization that KAP performs
                 is the parallelization of programs for Alpha shared
                 memory multiprocessors that use the new capabilities of
                 the DEC OSF/1 version 3.0 operating system with
                 DECthreads. The heart of the optimizer is a
                 sophisticated decision process that selects the best
                 loop to parallelize from the many loops in a program.
                 The preprocessor implements a robust data dependence
                 analysis to determine whether a loop is inherently,
                 serial or parallel. In engineering a high-quality
                 optimizer, the designers specified the KAP software
                 architecture as a sequence of modular optimization
                 passes. These passes are designed to restructure the
                 program to resolve many of the apparent serializations
                 that are artifacts of coding in Fortran or C. End users
                 can also annotate their DEC Fortran or DEC C programs
                 with directives or pragmas to guide KAP's decision
                 process. As an alternative to using KAP's automatic
                 parallelization capability, end users can explicitly
                 identify parallelism to KAP using the emerging
                 industry-standard X3H5 directives.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6150C (Compilers, interpreters and other processors);
                 C6150J (Operating systems); C6110B (Software
                 engineering techniques); C6140D (High level
                 languages)",
  classification = "C6110B (Software engineering techniques); C6140D
                 (High level languages); C6150C (Compilers, interpreters
                 and other processors); C6150J (Operating systems)",
  keywords =     "Alpha shared memory; Alpha shared memory
                 multiprocessors; C language; DEC C programs; DEC
                 Fortran; DEC OSF/1 version 3.0 operating system;
                 DECthreads; Digital Alpha systems; engineering;
                 FORTRAN; Industry-standard X3H5 directives;
                 industry-standard X3H5 directives; KAP; KAP
                 parallelizer; KAP preprocessor; modular; Modular
                 optimization passes; multiprocessing systems;
                 multiprocessors; operating; optimization passes;
                 preprocessor; program processors; robust data
                 dependence analysis; Robust data dependence analysis;
                 software; systems (computers)",
  thesaurus =    "C language; FORTRAN; Multiprocessing systems;
                 Operating systems [computers]; Program processors;
                 Software engineering",
  treatment =    "A Application; P Practical",
}

@Article{Anonymous:1994:EId,
  author =       "Anonymous",
  title =        "Editors Introduction",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "4",
  pages =        "??--??",
  month =        "Fall",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Jan 04 06:22:45 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v6n4int.txt",
  acknowledgement = ack-nhfb,
}

@Article{Sicola:1994:ADH,
  author =       "Stephen J. Sicola",
  title =        "The Architecture and Design of {HS-series StorageWorks
                 Array Controllers}",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "4",
  pages =        "5--25",
  month =        "Fall",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v6n4/The_Architecture_and_Design_o_01apr1995DTJG01P8.ps;
                 http://www.digital.com:80/info/DTJG01/DTJG01SC.TXT",
  abstract =     "The HS series of StorageWorks array controllers is a
                 new family of Digital products that includes models for
                 both open systems and systems that use Digital's
                 proprietary buses. The HS-series controllers combine
                 performance, availability, and reliability in total
                 storage subsystem solutions that use industry-standard
                 storage devices. The architecture and design of
                 StorageWorks array controllers represents a balance
                 between the market requirements and the available
                 technology. The engineering trade-offs led to an
                 innovative design that incorporates product features
                 such as a dual-active controller configuration,
                 write-back caching, Parity RAID technology, and SCSI-2
                 device handling.",
  acknowledgement = ack-nhfb,
  classcodes =   "B1265F (Microprocessors and microcomputers); B6210L
                 (Computer communications); C5130 (Microprocessor
                 chips); C5620 (Computer networks and techniques)",
  classification = "B1265F (Microprocessors and microcomputers); B6210L
                 (Computer communications); C5130 (Microprocessor
                 chips); C5620 (Computer networks and techniques)",
  keywords =     "Availability; availability; Dual-active controller
                 configuration; dual-active controller configuration;
                 handling; HS-series storageWorks array controllers;
                 microcontrollers; open systems; Open systems; open
                 systems; Parity RAID technology; Performance;
                 performance; reliability; Reliability; SCSI-2 device;
                 SCSI-2 device handling; subsystem solutions; total
                 storage; Total storage subsystem solutions; write-back
                 caching; Write-back caching",
  thesaurus =    "Microcontrollers; Open systems",
  treatment =    "A Application; P Practical",
}

@Article{Bussler:1994:PRW,
  author =       "Christoph J. Bu{\ss}ler",
  title =        "Policy Resolution in Workflow Management Systems",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "4",
  pages =        "26--49",
  month =        "Fall",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v6n4/Policy_Resolution_in_Workflow_01apr1995DTJG02P8.ps;
                 http://www.digital.com:80/info/DTJG02/DTJG02SC.TXT",
  abstract =     "One crucial function of a workflow management system
                 (WFMS) is to assign tasks to users who are eligible to
                 carry them out. Except in simple workflow scenarios,
                 roles such as secretary and manager are not a
                 sufficient basis for determining eligibility.
                 Additionally, WFMSs are deployed not only in group
                 settings by small companies but also worldwide by large
                 enterprises. Since local laws and business policies
                 have to be followed, task assignment policies for the
                 same task generally differ from country to country and,
                 therefore, must be specified locally. The Policy
                 Resolution Architecture (PRA) model provides more
                 generality and expressiveness than role models do and
                 at the same time supports the independent specification
                 of task assignment policies in different parts of an
                 enterprise. PRA can be used to model arbitrary
                 organization structures and to define realistic task
                 assignment (eligibility) rules by means of precisely
                 defined organizational policies. Thus, PRA provides
                 real-world organizations with a precise, simple means
                 of expressing their complex task assignment policies.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6150N (Distributed systems software); C5620 (Computer
                 networks and techniques)",
  classification = "C5620 (Computer networks and techniques); C6150N
                 (Distributed systems software)",
  keywords =     "enterprises; large; Large enterprises; model; network
                 operating systems; policy resolution; Policy
                 resolution; Policy Resolution Architecture; Policy
                 Resolution Architecture model; Task assignment; task
                 assignment; workflow management systems; Workflow
                 management systems",
  thesaurus =    "Network operating systems",
  treatment =    "A Application; P Practical",
}

@Article{Hoover:1994:DDW,
  author =       "Stewart V. Hoover and Gary L. Kratkiewicz",
  title =        "The design of {DECmodel} for {Windows}",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "4",
  pages =        "50--62",
  month =        "Fall",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v6n4/The_Design_of_DECmodel_for_01apr1995DTJG03P8.ps;
                 http://www.digital.com:80/info/DTJG03/DTJG03SC.TXT",
  abstract =     "The DECmodel for Windows software tool represents a
                 significant advance in the development of business
                 process models. The DECmodel tool allows rapid
                 development of models and graphical representations of
                 business processes by providing a laboratory
                 environment for testing processes before propagating
                 them into workflows. Such an approach can significantly
                 reduce the risk associated with large investments in
                 information technology. The DECmodel design
                 incorporates knowledge-based, simulation, and graphical
                 user interface technology on a PC plat form based on
                 the Microsoft Windows operating system. Unique to the
                 design is the manner in which it separates the model of
                 the business processes from the views or presentations
                 of the model.",
  acknowledgement = ack-nhfb,
  classcodes =   "C7100 (Business and administration); C6115
                 (Programming support); C0310 (EDP management)",
  classification = "C0310 (EDP management); C6115 (Programming support);
                 C7100 (Business and administration)",
  keywords =     "business process; Business process models; DECmodel
                 for Windows; DP management; Graphical representations;
                 graphical representations; Graphical user interface
                 technology; graphical user interface technology;
                 information systems; information technology;
                 Information technology; knowledge-based simulation;
                 Knowledge-based simulation; laboratory environment;
                 Laboratory environment; management; Microsoft;
                 Microsoft Windows operating system; models; PC
                 platform; software tool; Software tool; software tools;
                 Windows operating system",
  thesaurus =    "DP management; Information technology; Management
                 information systems; Software tools",
  treatment =    "A Application; P Practical",
}

@Article{Giokas:1994:DMU,
  author =       "Dennis G. Giokas and John C. Rokicki",
  title =        "The Design of {ManageWORKS}: {A} User Interface
                 Framework",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "4",
  pages =        "63--74",
  month =        "Fall",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v6n4/The_Design_of_ManageWORKS_A_01apr1995DTJG04P8.ps;
                 http://www.digital.com:80/info/DTJG04/DTJG04SC.TXT",
  abstract =     "The ManageWORKS Workgroup Administrator for Windows
                 software product is Digital's integration platform for
                 system and network management of heterogeneous local
                 area networks. The ManageWORKS product enables
                 multiple, heterogeneous network operating system and
                 network interconnect device management from a single PC
                 running under the Microsoft Windows operating system.
                 The ManageWORKS software is a user interface framework;
                 that is, the services it provides are primarily
                 targeted at the integration of the user interface
                 elements of management applications. It manifests the
                 organizational, navigational, and functional elements
                 of system and network management in a coherent whole.
                 Viewers, such as the hierarchical outline viewer and
                 the topological relationships viewer that are
                 components of the ManageWORKS software, provide the
                 organizational and navigational elements of the system.
                 Management applications developed by Digital and by
                 third parties through the ManageWORKS Software
                 Developer's Kit provide the functional elements to
                 manage network entities. This paper discusses the user
                 interface design that implements these three elements
                 and the software system design that supports the user
                 interface framework.",
  acknowledgement = ack-nhfb,
  classcodes =   "B6210C (Network management); B6210L (Computer
                 communications)C6150N (Distributed systems software);
                 C5620L (Local area networks); C6180 (User interfaces)",
  classification = "B6210C (Network management); B6210L (Computer
                 communications); C5620L (Local area networks); C6150N
                 (Distributed systems software); C6180 (User
                 interfaces)",
  keywords =     "computer network management; heterogeneous local area;
                 Heterogeneous local area networks; Integration
                 platform; integration platform; interconnect device
                 management; interface framework; LAN management; local
                 area networks; ManageWORKS; Microsoft Windows; network;
                 Network interconnect device management; network
                 management; Network management; network operating
                 system; Network operating system; networks; operating
                 systems; software product; user; User interface; user
                 interface; User interface framework; user interface
                 management systems; Windows; Windows software product",
  thesaurus =    "Computer network management; Local area networks;
                 Network operating systems; User interface management
                 systems",
  treatment =    "P Practical",
}

@Article{Johnson:1994:SOM,
  author =       "James E. Johnson",
  title =        "The Structure of the {OpenVMS Management Station}",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "4",
  pages =        "75--88",
  month =        "Fall",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v6n4/The_Structure_of_the_OpenVMS_01apr1995DTJG05P8.ps;
                 http://www.digital.com:80/info/DTJG05/DTJG05SC.TXT",
  abstract =     "The OpenVMS Management Station software provides a
                 robust client-server application between a PC running
                 the Microsoft Windows operating system and several
                 OpenVMS cluster systems. The initial version of the
                 OpenVMS Management Station software concentrated on
                 allowing customers to handle the system management
                 functionality associated with user account management.
                 To achieve these attributes, the OpenVMS Management
                 Station software uses the data-sharing aspects of
                 OpenVMS cluster systems, a communications design that
                 is secure and that scales well with additional target
                 systems, and a management display that is geared for
                 the simultaneous management of multiple similar
                 systems.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6150J (Operating systems); C6150N (Distributed
                 systems software)",
  classification = "C6150J (Operating systems); C6150N (Distributed
                 systems software)",
  keywords =     "(computers); Client-server application; client-server
                 application; client-server systems; Data-sharing;
                 data-sharing; DEC computers; Management display;
                 management display; OpenVMS cluster systems; OpenVMS
                 management station; operating systems; System
                 management; system management; target systems; Target
                 systems",
  thesaurus =    "Client-server systems; DEC computers; Operating
                 systems [computers]",
  treatment =    "P Practical",
}

@Article{Lawson:1994:ANO,
  author =       "John R. {Lawson, Jr.}",
  title =        "Automatic, Network-directed Operating System Software
                 Upgrades: {A} Platform-independent Approach",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "4",
  pages =        "89--100",
  month =        "Fall",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v6n4/Automatic_Networkdirected_Op_01apr1995DTJG06P8.ps;
                 http://www.digital.com:80/info/DTJG06/DTJG06SC.TXT",
  abstract =     "The initial system load (ISL) capability of Digital's
                 layered-product POLYCENTER Software Distribution
                 (formerly known as RSM) version 3.0 provides Open VMS
                 system managers with a network-directed tool for
                 performing automatic operating system software
                 upgrades. The design of the POLYCENTER Software
                 Distribution product integrates a number of new and
                 varied software architectures to perform the ISL. A
                 description of the POLYCENTER Software Distribution
                 implementation of the ISL for the Open VMS operating
                 system details the steps of the ISL process. The
                 software's modular ISL mechanism can be expanded for
                 use on other Digital and non-Digital operating systems
                 and hardware platforms.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6150J (Operating systems); C6110B (Software
                 engineering techniques)",
  classification = "C6110B (Software engineering techniques); C6150J
                 (Operating systems)",
  keywords =     "Digital; initial system load; Initial system load;
                 Network-directed operating system; network-directed
                 operating system; Network-directed tool;
                 network-directed tool; Open VMS system managers;
                 Operating system software upgrades; operating system
                 software upgrades; operating systems (computers);
                 POLYCENTER Software Distribution; software engineering;
                 Software upgrades; software upgrades",
  thesaurus =    "Operating systems [computers]; Software engineering",
  treatment =    "P Practical",
}

@Article{Blake:1995:EIa,
  author =       "Jane C. Blake",
  title =        "Editors Introduction",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "1",
  pages =        "3--4",
  month =        "Winter",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Mon Jun 24 18:53:16 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n1-00-intro.txt",
  acknowledgement = ack-nhfb,
}

@Article{Sites:1995:F,
  author =       "Richard L. Sites",
  title =        "Foreword",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "1",
  pages =        "5--6",
  month =        "Winter",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Tue Jan 16 17:30:22 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n1-00-foreword.txt.html",
  acknowledgement = ack-nhfb,
}

@Article{Pledereder:1995:DIO,
  author =       "Richard Pledereder and Vishu Krishnamurthy and Mayank
                 Gagnon and M. Vadodaria",
  title =        "{DB Integrator}: Open Middleware for Data Access",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "1",
  pages =        "7--22",
  month =        "Winter",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n1/DB_Integrator_Open_Middlewar_01jul1995DTJH01P8.ps;
                 http://www.digital.com:80/info/DTJH01/DTJH01SC.TXT",
  abstract =     "During the last few years, access to heterogeneous
                 data sources and integration of the disparate data has
                 emerged as one of the major areas for growth of
                 database management software. Digital's DB Integrator
                 provides robust data access by supporting heterogeneous
                 query optimization, location transparency, global
                 consistency, resolution of semantic differences, and
                 security checks. A global catalog provides location
                 transparency and operates as an autonomous metadata
                 repository. Global transactions are coordinated through
                 two-phase commit. Highly available horizontal
                 partitioned views support continuous distributed
                 processing in the presence of loss of connectivity. The
                 DB Integrator enables security checks without
                 interfering with the access controls specified in the
                 underlying data sources.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6160B (Distributed databases)",
  classification = "C6160B (Distributed databases)",
  keywords =     "Data access; data access; Database management
                 software; database management software; DB Integrato;
                 distributed databases; Global consistency; global
                 consistency; location transparency; Location
                 transparency; management; multidatabase; Multidatabase
                 management; open middleware; Open middleware; Query
                 optimization; query optimization; relational databases;
                 robust data access; Robust data access",
  thesaurus =    "Distributed databases; Relational databases",
  treatment =    "T Theoretical or Mathematical",
}

@Article{Baafi:1995:AOD,
  author =       "Robert K. Baafi and J. Ian Carrie and William B. Drury
                 and Oren L. Wiesler",
  title =        "{ACMSxp} Open Distributed Transaction Processing",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "1",
  pages =        "23--33",
  month =        "Winter",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n1/ACMSxp_Open_Distributed_Transa_01jul1995DTJH02P8.ps;
                 http://www.digital.com:80/info/DTJH02/DTJH02SC.TXT",
  abstract =     "Digital's ACMSxp portable transaction processing (TP)
                 monitor supports open TP standards and provides an
                 environment for the development, execution, and
                 administration of robust, distributed, client-server
                 applications. The ACMSxp TP monitor supports the
                 Structured Transaction Definition Language, a modular
                 language that simplifies the development of
                 transactional applications. ACMSxp software is layered
                 on the Open Software Foundation's Distributed Computing
                 Environment (DCE) and supports XA-compliant databases
                 and other resource managers by using the Encina toolkit
                 from Transarc Corporation or Digital's distributed
                 transaction manager (DECdtm) software. As a framework
                 for DCE-based applications, the ACMSxp TP monitor
                 simplifies application development, integrates system
                 administration, and provides the additional
                 capabilities of high availability, high performance,
                 fault tolerance, and data integrity.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6150N (Distributed systems software); C5470
                 (Performance evaluation and testing)",
  classification = "C5470 (Performance evaluation and testing); C6150N
                 (Distributed systems software)",
  keywords =     "ACMSxp; Client-server applications; client-server
                 applications; client-server systems; Data integrity;
                 data integrity; distributed processing; distributed
                 transaction processing; Distributed transaction
                 processing; fault; Fault tolerance; high; high
                 availability; High availability; High performance;
                 performance; portable; Portable transaction processing;
                 processing; supervisory programs; tolerance; tolerant
                 computing; transaction; transaction processing",
  thesaurus =    "Client-server systems; Distributed processing; Fault
                 tolerant computing; Supervisory programs; Transaction
                 processing",
  treatment =    "P Practical; R Product Review",
}

@Article{Depledge:1995:ODT,
  author =       "Norman G. Depledge and William A. Turner and Alexandra
                 Woog",
  title =        "An Open, Distributable, Three-tier Client-Server
                 Architecture with Transaction Semantics",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "1",
  pages =        "34--42",
  month =        "Winter",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n1/An_Open_Distributable_Three_01jul1995DTJH03P8.ps;
                 http://www.digital.com:80/info/DTJH03/DTJH03SC.TXT",
  abstract =     "This paper describes a distributable, three-tier
                 client-server architecture for heterogeneous,
                 multivendor environments based on the integration of
                 Digital's ObjectBroker and ACMSxp transaction
                 processing monitor products. ObjectBroker integration
                 software provides the flexibility to decouple the tight
                 association between desktop devices and specific legacy
                 systems. The ACMSxp transaction processing monitor
                 provides the transaction semantics, system management,
                 scalability, and high availability that
                 mission-critical production systems require. Combining
                 these technologies and products in a three-tier
                 architecture provides a strategic direction for the
                 development of new applications and allows for optimal
                 integration of legacy systems. The architecture
                 complies with industry standards, which facilitates
                 vendor independence and ensures the longevity of the
                 solution.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6150N (Distributed systems software); C6160 (Database
                 management systems (DBMS))",
  classification = "C6150N (Distributed systems software); C6160
                 (Database management systems (DBMS))",
  keywords =     "ACMSxp; client-server architecture; Client-server
                 architecture; client-server systems; Distributable;
                 distributable; Legacy systems; legacy systems;
                 Multivendor environments; multivendor environments;
                 ObjectBroker; open systems; semantics; transaction;
                 transaction processing; Transaction processing;
                 transaction processing; Transaction semantics",
  thesaurus =    "Client-server systems; Open systems; Transaction
                 processing",
  treatment =    "P Practical",
}

@Article{Fenwick:1995:ASH,
  author =       "David M. Fenwick and Denis J. Foley and William B.
                 Gist and Stephen R. VanDoren and Daniel Wissell",
  title =        "The {AlphaServer 8000 Series}: High-end Server
                 Platform Development",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "1",
  pages =        "43--65",
  month =        "Winter",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n1/The_AlphaServer_8000_Series_H_01jul1995DTJH04P8.ps;
                 http://www.digital.com:80/info/DTJH04/DTJH04SC.TXT",
  abstract =     "The AlphaServer 8400 and the AlphaServer 8200 are
                 Digital's newest high-end server products. Both servers
                 are based on the 300-MHz Alpha 21164 microprocessor and
                 on the AlphaServer 8000-series platform architecture.
                 The AlphaServer 8000 platform development team set
                 aggressive system data bandwidth and memory read
                 latency targets in order to achieve high-performance
                 goals. The low-latency criterion was factored into
                 design decisions made at each of the seven layers of
                 platform development. The combination of
                 industry-leading microprocessor technology and a system
                 platform focused on low latency has resulted in a
                 12-processor server implementation --- the AlphaServer
                 8400 --- capable of supercomputer levels of
                 performance.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5630 (Networking equipment); C6150N (Distributed
                 systems software)",
  classification = "C5630 (Networking equipment); C6150N (Distributed
                 systems software)",
  keywords =     "AlphaServer 8000; DEC computers; High-end server;
                 high-end server; Low-latency criterion; low-latency
                 criterion; network servers",
  thesaurus =    "DEC computers; Network servers",
  treatment =    "P Practical; R Product Review",
}

@Article{Basmaji:1995:DHC,
  author =       "Jean H. Basmaji and Kay R. Fisher and Frank W. Gatulis
                 and Herbert R. Kolk and James F. Rosencrans",
  title =        "{Digital}'s High-performance {CMOS ASIC}",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "1",
  pages =        "66--76",
  month =        "Winter",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n1/Digitals_Highperformance_CMO_01jul1995DTJH05SC.txt;
                 http://www.digital.com:80/info/DTJH05/DTJH05SC.TXT",
  abstract =     "A high-performance ASIC has been developed to serve as
                 the interface for the 10-ns bus in the new AlphaServer
                 8000 series server systems from Digital. The CMOS
                 standard-cell alternative (CSALT) technology provides a
                 timing-driven layout methodology together with a
                 correct-by-construction approach for managing the
                 complex device physics issues associated with
                 state-of-the-art CMOS processes. The timing-driven
                 layout is coupled with an automated standard-cell
                 design approach to bring the complete design process
                 directly to the logic designer.",
  acknowledgement = ack-nhfb,
  classcodes =   "B2570D (CMOS integrated circuits); B1130B
                 (Computer-aided circuit analysis and design); C5610S
                 (System buses); C7410D (Electronic engineering
                 computing); C5120 (Logic and switching circuits);
                 C5210B (Computer-aided logic design)",
  classification = "B1130B (Computer-aided circuit analysis and design);
                 B2570D (CMOS integrated circuits); C5120 (Logic and
                 switching circuits); C5210B (Computer-aided logic
                 design); C5610S (System buses); C7410D (Electronic
                 engineering computing)",
  keywords =     "10 Ns; 10 ns; AlphaServer 8000 series; application
                 specific integrated circuits; automated standard-cell
                 design; Automated standard-cell design; bus; Bus; CAD;
                 circuit layout; CMOS ASIC; CMOS integrated circuits;
                 computer interfaces; computers; DEC; Digital;
                 high-performance ASIC; High-performance ASIC;
                 interface; Interface; network servers; system buses;
                 Timing-driven layout; timing-driven layout",
  numericalindex = "Time 1.0E-08 s",
  thesaurus =    "Application specific integrated circuits; Circuit
                 layout CAD; CMOS integrated circuits; Computer
                 interfaces; DEC computers; Network servers; System
                 buses",
  treatment =    "P Practical",
}

@Article{Godiwala:1995:SPM,
  author =       "Nitin D. Godiwala and Barry A. Maskas",
  title =        "The Second-generation Processor Module for
                 {AlphaServer 2100 Systems}",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "1",
  pages =        "77--88",
  month =        "Winter",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n1/The_Secondgeneration_Processo_01jul1995DTJH06P8.ps;
                 http://www.digital.com:80/info/DTJH06/DTJH06SC.TXT",
  abstract =     "The second-generation KN470 processor module for
                 AlphaServer 2100 systems performs significantly better
                 than the first-generation KN460 module and was designed
                 to be swap-compatible as an upgrade. The KN470
                 processor module derives its performance improvements
                 from the enhanced architecture of Digital's new Alpha
                 21164 microprocessor, the synchronous design of the
                 third-level cache and system interface, the
                 implementation of a duplicate tag of the third-level
                 cache, and the implementation of a write-invalidate
                 cache coherence protocol for the multiprocessor system
                 bus. Additional design features such as read-miss
                 pipelining, system bus grant parking, hidden coherence
                 transactions to the duplicate tag, and Alpha 21164
                 microprocessor write transactions to the system bus
                 back-off and replay were combined to produce a higher
                 performance processor module. The scope of the project
                 required implementing functionality in system
                 components such as the memory, the backplane, the
                 system bus arbiter, and the I/O bridge, which shipped
                 one year ahead of the KN470 module.",
  acknowledgement = ack-nhfb,
  classcodes =   "B1265F (Microprocessors and microcomputers); C5130
                 (Microprocessor chips); C5630 (Networking equipment);
                 C5440 (Multiprocessing systems)",
  classification = "B1265F (Microprocessors and microcomputers); C5130
                 (Microprocessor chips); C5440 (Multiprocessing
                 systems); C5630 (Networking equipment)",
  keywords =     "Alpha 21164 microprocessor; AlphaServer 2100;
                 Backplane; backplane; cache; Cache coherence protocol;
                 coherence protocol; DEC computers; KN470; KN470
                 processor module; memory; Memory; microprocessor chips;
                 Multiprocessor system bus; multiprocessor system bus;
                 network servers; processor module; read-miss
                 pipelining; Read-miss pipelining; second-generation
                 processor module; Second-generation processor module;
                 System bus arbiter; system bus arbiter; system
                 interface; System interface; third-level; Third-level
                 cache",
  thesaurus =    "DEC computers; Microprocessor chips; Network servers",
  treatment =    "P Practical; R Product Review",
}

@Article{Zurawski:1995:DVA,
  author =       "John H. Zurawski and John E. Murray and Paul J.
                 Lemmon",
  title =        "The Design and Verification of the {AlphaStation} 600
                 5-series Workstation",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "1",
  pages =        "89--99",
  month =        "Winter",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n1/The_Design_and_Verification_o_01jul1995DTJH07P8.ps;
                 http://www.digital.com:80/info/DTJH07/DTJH07SC.TXT",
  abstract =     "The AlphaStation 600 5-series workstation is a
                 high-performance, uniprocessor design based on the
                 Alpha 21164 microprocessor and on the PCI bus. Six CMOS
                 ASICs provide high bandwidth, low-latency interconnects
                 between the CPU, the main memory, and the I/O
                 subsystem. The verification effort used directed,
                 pseudorandom testing on a VERILOG software model. A
                 hardware-based verification technique provided a test
                 throughput that resulted in a significant improvement
                 over software tests. This technique currently involves
                 the use of graphics cards to emulate generic DMA
                 devices. A PCI hardware demon is under development to
                 further enhance the capability of the hardware based
                 verification.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5430 (Microcomputers); C5130 (Microprocessor chips);
                 C5220 (Computer architecture)",
  classification = "C5130 (Microprocessor chips); C5220 (Computer
                 architecture); C5430 (Microcomputers)",
  keywords =     "Alpha 21164 microprocessor; AlphaStation 600 5-series
                 workstation; computer architecture; DEC computers;
                 Design; design; microprocessor chips; PCI bus; software
                 model; uniprocessor; Uniprocessor; verification;
                 Verification; VERILOG; VERILOG software model;
                 workstations",
  thesaurus =    "Computer architecture; DEC computers; Microprocessor
                 chips; Workstations",
  treatment =    "P Practical; R Product Review",
}

@Article{Bowhill:1995:CIS,
  author =       "William J. Bowhill and Shane L. Bell and Bradley J.
                 Benschneider and Andrew J. Black and Sharon M. Britton
                 and Ruben W. Castelino and Dale R. Donchin and John H.
                 Edmondson and Harry R. {Fair, III} and Paul E.
                 Gronowski and Anil K. Jain and Patricia L. Kroesen and
                 Marc E. Lamere and Bruce J. Loughlin and Shekhar Mehta
                 and Robert O. Mueller and Ronald P. Preston and
                 Sribalan Santhanam and Timothy A. Shedd and Michael J.
                 Smith and Stephen C. Thierauf",
  title =        "Circuit Implementation of a {300-MHz} 64-bit
                 Second-generation {CMOS Alpha CPU}",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "1",
  pages =        "100--118",
  month =        "Winter",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n1/Circuit_Implementation_of_a_30_01jul1995DTJH08P8.ps;
                 http://www.digital.com:80/info/DTJH08/DTJH08SC.TXT",
  abstract =     "A 300-MHz, custom 64-bit VLSI, second generation Alpha
                 CPU chip has been developed. The chip was designed in a
                 0.5-$ \mu $ m CMOS technology using four levels of
                 metal. The die size is 16.5 mm by 18.1 mm, contains 9.3
                 million transistors, operates at 3.3 V, and supports
                 3.3-V\slash 5.0-V interfaces. Power dissipation is 50W.
                 It contains an 8-KB instruction cache; an 8-KB data
                 cache; and a 96-KB unified second-level cache. The chip
                 can issue four instructions per cycle and delivers
                 1,200 mips/600 MFLOPS (peak). Several noteworthy
                 circuit and implementation techniques were used to
                 attain the target operating frequency. This paper
                 focuses on the circuit implementation of the Alpha
                 21164 CPU. Some of the significant circuit design
                 challenges encountered during the project are
                 discussed. The paper begins with an introductory
                 overview of the chip microarchitecture. It continues
                 with a description of the floorplan and the physical
                 layout of the chip. The next section discusses the
                 clock distribution and latch design. This is followed
                 by an overview of the circuit design strategy and some
                 specific circuit design examples. The paper concludes
                 with information about design (physical and electrical)
                 verification and CAD tools.",
  acknowledgement = ack-nhfb,
  classcodes =   "B1265F (Microprocessors and microcomputers); B1130
                 (General circuit analysis and synthesis methods); C5130
                 (Microprocessor chips); C7410D (Electronic engineering
                 computing)",
  classification = "B1130 (General circuit analysis and synthesis
                 methods); B1265F (Microprocessors and microcomputers);
                 C5130 (Microprocessor chips); C7410D (Electronic
                 engineering computing)",
  keywords =     "1200 MIPS; 300 MHz; 600; 600 MFLOPS; 64 Bit; 64 bit;
                 Alpha 21164 CPU; Chip microarchitecture; chip
                 microarchitecture; circuit design; Circuit design;
                 Clock distribution; clock distribution; CMOS Alpha CPU;
                 Floorplan; floorplan; integrated circuit layout; Latch
                 design; latch design; layout; MFLOPS; microprocessor
                 chips; physical; Physical layout; second-generation;
                 Second-generation; VLSI",
  numericalindex = "Frequency 3.0E+08 Hz; Computer speed 6.0E+08 FLOPS;
                 Computer execution rate 1.2E+09 IPS; Word length
                 6.4E+01 bit",
  thesaurus =    "Integrated circuit layout; Microprocessor chips",
  treatment =    "P Practical; R Product Review",
}

@Article{Edmondson:1995:IOA,
  author =       "John H. Edmondson and Paul I. Rubinfeld and Peter J.
                 Bannon and Bradley J. Benschneider and Debra Bernstein
                 and Ruben W. Castelino and Elizabeth M. Cooper and
                 Daniel E. Dever and Dale R. Donchin Timothy C. Fischer
                 and Anil K. Jain and Shekhar Mehta and Jeanne E. Meyer
                 and Ronald P. Preston and Vidya Rajagopalan and
                 Chandrasekhara Somanathan and Scott A. Taylor and
                 Gilbert M. Wolrich",
  title =        "Internal Organization of the {Alpha} 21164, a
                 300-{MHz} 64-bit Quad-issue {CMOS RISC}
                 Microprocessor",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "1",
  pages =        "119--135",
  month =        "Winter",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n1/Internal_Organization_of_the_A_01jul1995DTJH09P8.ps;
                 http://www.digital.com:80/info/DTJH09/DTJH09SC.TXT",
  abstract =     "A new CMOS microprocessor, the Alpha 21164, reaches
                 1,200 mips\slash 600 MFLOPS (peak performance). This
                 new implementation of the Alpha architecture achieves
                 SPECint92\slash SPECfp92 performance of 345\slash 505
                 (estimated). At these performance levels, the Alpha
                 21164 has delivered the highest performance of any
                 commercially available microprocessor in the world as
                 of January 1995. It contains a quad-issue, superscalar
                 instruction unit; two 64-bit integer execution
                 pipelines; two 64-bit floating-point execution
                 pipelines; and a high-performance memory subsystem with
                 multiprocessor-coherent write-back caches.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5130 (Microprocessor chips); C5220 (Computer
                 architecture)",
  classification = "C5130 (Microprocessor chips); C5220 (Computer
                 architecture)",
  keywords =     "1200; 1200 MIPS; 300 MHz; 600 MFLOPS; 64 Bit; 64 bit;
                 Alpha 21164; Alpha architecture; computer architecture;
                 DEC computers; floating-; Floating-point execution
                 pipelines; instruction unit; integer execution
                 pipelines; Integer execution pipelines; internal
                 organization; Internal organization; microprocessor;
                 microprocessor chips; MIPS; point execution pipelines;
                 quad-issue; Quad-issue; quad-issue CMOS RISC;
                 Quad-issue CMOS RISC microprocessor; reduced
                 instruction set computing; superscalar; Superscalar
                 instruction unit",
  numericalindex = "Frequency 3.0E+08 Hz; Word length 6.4E+01 bit;
                 Computer speed 6.0E+08 FLOPS; Computer execution rate
                 1.2E+09 IPS",
  thesaurus =    "Computer architecture; DEC computers; Microprocessor
                 chips; Reduced instruction set computing",
  treatment =    "P Practical; R Product Review",
}

@Article{Kantrowitz:1995:FVM,
  author =       "Michael Kantrowitz and Lisa M. Noack",
  title =        "Functional Verification of a Multiple-issue,
                 Pipelined, Superscalar {Alpha} Processor --- the
                 {Alpha} 21164 {CPU} Chip",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "1",
  pages =        "136--144",
  month =        "Winter",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n1/Functional_Verification_of_a_M_01jul1995DTJH10P8.ps;
                 http://www.digital.com:80/info/DTJH10/DTJH10SC.TXT",
  abstract =     "Digital's Alpha 21164 processor is a complex
                 quad-issue, pipelined, superscalar implementation of
                 the Alpha architecture. Functional verification was
                 performed on the logic design and the PALcode
                 interface. The simulation-based verification effort
                 used implementation-directed, pseudorandom exercisers,
                 supplemented with implementation-specific,
                 hand-generated tests. Extensive coverage analysis was
                 performed to direct the verification effort. Only eight
                 logical bugs, all unobtrusive, were detected in the
                 first prototype design, and multiple operating systems
                 were booted with these chips in a prototype system. All
                 bugs were corrected before any 21164-based systems were
                 shipped to customers.",
  acknowledgement = ack-nhfb,
  classcodes =   "B1265B (Logic circuits); B1265F (Microprocessors and
                 microcomputers); C5210 (Logic design methods); C5130
                 (Microprocessor chips); C6110F (Formal methods)",
  classification = "B1265B (Logic circuits); B1265F (Microprocessors and
                 microcomputers); C5130 (Microprocessor chips); C5210
                 (Logic design methods); C6110F (Formal methods)",
  keywords =     "Alpha 21164 CPU chip; Alpha processor; design; formal
                 verification; logic; Logic design; logic design; logic
                 testing; microprocessor chips; PALcode interface;
                 Pseudorandom exercisers; pseudorandom exercisers;
                 Verification; verification",
  thesaurus =    "Formal verification; Logic design; Logic testing;
                 Microprocessor chips",
  treatment =    "P Practical",
}

@Article{Anonymous:1995:EI,
  author =       "Anonymous",
  title =        "Editors Introduction",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "2",
  pages =        "??--??",
  month =        "Spring",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Mon Jun 24 18:53:17 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n2-00-intro.txt",
  acknowledgement = ack-nhfb,
}

@Article{Patel:1995:F,
  author =       "Mahendra R. Patel",
  title =        "Foreword",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "2",
  pages =        "??--??",
  month =        "Spring",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Jan 04 06:22:45 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n2_01_02_intro_fore.txt",
  acknowledgement = ack-nhfb,
}

@Article{Hart:1995:DFB,
  author =       "Richard O. Hart and Glenn Lupton",
  title =        "{DEC FUSE}: Building a Graphical Software Development
                 Environment from {UNIX} Tools",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "2",
  pages =        "5--19",
  month =        "Spring",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "Compendex database;
                 http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n2/DEC_FUSE_Building_a_Graphica_02oct1995DTJI01P8.ps;
                 http://www.digital.com:80/info/DTJI01/DTJI01AH.HTM;
                 http://www.digital.com:80/info/DTJI01/DTJI01P8.PS;
                 http://www.digital.com:80/info/DTJI01/DTJI01PF.PDF;
                 http://www.digital.com:80/info/DTJI01/DTJI01SC.TXT",
  abstract =     "DEC FUSE is an integrated programming environment for
                 UNIX systems. It is an evolution of the FIELD
                 environment developed at Brown University. To take
                 advantage of the features of workstations developed
                 during the 1980s, these environments were designed to
                 provide graphical user interfaces for commands commonly
                 used by UNIX software developers. DEC FUSE uses two
                 methods to create an environment from smaller and
                 simpler software components. These methods are sending
                 messages between components and layering graphical
                 interfaces on top of UNIX commands. DEC FUSE uses these
                 methods to create an easy-to-use, integrated
                 environment with more features than its individual
                 components.",
  acknowledgement = ack-nhfb,
  affiliation =  "DEC FUSE",
  classcodes =   "C6180G (Graphical user interfaces); C6130B (Graphics
                 techniques); C6150J (Operating systems); C6115
                 (Programming support)",
  classification = "722.2; 723.1; 723.5; C6115 (Programming support);
                 C6130B (Graphics techniques); C6150J (Operating
                 systems); C6180G (Graphical user interfaces)",
  journalabr =   "Digital Tech J",
  keywords =     "Character cell video terminals; Commands; commands;
                 Computer aided software engineering; Computer
                 programming; Computer software; Computer workstations;
                 DEC FUSE; environment; environments; FIELD; FIELD
                 environment; Graphical software development
                 environment; graphical software development
                 environment; Graphical user interfaces; graphical user
                 interfaces; Hard copy devices, DEC FUSE; Integrated
                 programming environment; integrated programming
                 environment; Integrated programming environment;
                 integrated software; programming; tools; UNIX; Unix;
                 UNIX; UNIX tools; X window system",
  thesaurus =    "Graphical user interfaces; Integrated software;
                 Programming environments; Unix",
  treatment =    "A Application; P Practical",
}

@Article{Zaremba:1995:ADV,
  author =       "Donald A. Zaremba",
  title =        "Adding a Data Visualization Tool to {DEC FUSE}",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "2",
  pages =        "20--33",
  month =        "Spring",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "Compendex database;
                 http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n2/Adding_a_Data_Visualization_To_02oct1995DTJI02P8.ps;
                 http://www.digital.com:80/info/DTJI02/DTJI02AH.HTM;
                 http://www.digital.com:80/info/DTJI02/DTJI02P8.PS;
                 http://www.digital.com:80/info/DTJI02/DTJI02PF.PDF;
                 http://www.digital.com:80/info/DTJI02/DTJI02SC.TXT",
  abstract =     "Digital's Data Visualizer tool uses condensed file
                 views to display thousands of lines of source code.
                 These displays can include the output of many other
                 tools. As part of the DEC FUSE programming environment,
                 the tool helps software developers by providing
                 capabilities for displaying large bodies of text with
                 associated events or statistics. The Data Visualizer
                 tool combines the results of other tools into a single
                 display, keeps track of work items, and scales up to
                 support large software projects.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital's Unix Development Environment Group",
  classcodes =   "C6180G (Graphical user interfaces); C6130B (Graphics
                 techniques); C6115 (Programming support)",
  classification = "722.2; 723.1; 723.2; 723.5; 921; 922.2; C6115
                 (Programming support); C6130B (Graphics techniques);
                 C6180G (Graphical user interfaces)",
  journalabr =   "Digital Tech J",
  keywords =     "Codes (symbols); Computer aided software engineering;
                 Computer programming; Computer software; Condensed file
                 views; condensed file views; Context, Data
                 visualization tool; data visualisation; data
                 visualization tool; Data visualizer tool; DEC FUSE; DEC
                 FUSE programming environment; environments; Graphic
                 methods; graphical user interfaces; large software;
                 Large software projects; Problem solving; programming;
                 programming environment; projects; Software developers;
                 software developers; software tools; Statistics; User
                 interfaces",
  thesaurus =    "Data visualisation; Graphical user interfaces;
                 Programming environments; Software tools",
  treatment =    "P Practical",
}

@Article{Newcomer:1995:MIA,
  author =       "Eric A. Newcomer",
  title =        "Multivendor Integration Architecture: Standards,
                 Compliance Testing, and Applications",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "2",
  pages =        "34--46",
  month =        "Spring",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "Compendex database;
                 http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n2/Multivendor_Integration_Archit_02oct1995DTJI03P8.ps;
                 http://www.digital.com:80/info/DTJI03/DTJI03AH.HTM;
                 http://www.digital.com:80/info/DTJI03/DTJI03P8.PS;
                 http://www.digital.com:80/info/DTJI03/DTJI03PF.PDF;
                 http://www.digital.com:80/info/DTJI03/DTJI03SC.TXT",
  abstract =     "The Multivendor Integration Architecture (MIA) is a
                 user-driven initiative that addresses the practical
                 application of open systems software standards to
                 business requirements. This paper provides historical
                 background and context for this standardization effort
                 and describes Digital's contributions to the effort,
                 particularly in the area of distributed transaction
                 processing. Digital complied with the MIA
                 specifications, integrated compliant products into a
                 complete platform, and delivered a large application on
                 the platform.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp",
  classcodes =   "B6210L (Computer communications); C6150N (Distributed
                 systems software); C5620 (Computer networks and
                 techniques)",
  classification = "718.1; 718.2; 722.2; 722.4; 723; 902.2; B6210L
                 (Computer communications); C5620 (Computer networks and
                 techniques); C6150N (Distributed systems software)",
  journalabr =   "Digital Tech J",
  keywords =     "business; Business requirements; Competition;
                 compliance; Compliance testing; compliant products;
                 Computer software; Computer testing; Distributed
                 computer systems; distributed transaction processing;
                 Distributed transaction processing; Distributed
                 transaction processing, Multivendor integration
                 architecture; integrated; Integrated compliant
                 products; multivendor integration architecture;
                 Multivendor integration architecture; open systems;
                 Open systems software standards; open systems software
                 standards; requirements; software standards;
                 Specifications; standardisation; Standards; standards;
                 Standards; Telegraph; Telephone; testing; User
                 interfaces",
  thesaurus =    "Open systems; Software standards; Standardisation",
  treatment =    "P Practical",
}

@Article{Kirkley:1995:IAD,
  author =       "James R. Kirkley and William G. Nichols",
  title =        "Integrating Applications with {Digital}'s
                 Framework-based Environment",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "2",
  pages =        "47--55",
  month =        "Spring",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "Compendex database;
                 http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n2/Integrating_Applications_with_02oct1995DTJI04P8.ps;
                 http://www.digital.com:80/info/DTJI04/DTJI04AH.HTM;
                 http://www.digital.com:80/info/DTJI04/DTJI04P8.PS;
                 http://www.digital.com:80/info/DTJI04/DTJI04PF.PDF;
                 http://www.digital.com:80/info/DTJI04/DTJI04SC.TXT",
  abstract =     "Digital has developed the Framework-based Environment
                 (FBE) to address the integration and interoperability
                 needs of manufacturing and other business systems. FBE
                 consists of a method for integrating existing
                 applications, frameworks of industry models, and tools
                 that use Digital's CORBA-compliant ObjectBroker
                 integration software to manage the exchange of
                 information between cooperating servers on the network.
                 Using these products, Digital Consulting and its
                 partner systems integrators provide FBE application
                 integration services to large organizations.",
  acknowledgement = ack-nhfb,
  affiliation =  "Applied Objects Group",
  classcodes =   "C6115 (Programming support); C6150N (Distributed
                 systems software)",
  classification = "723; 723.1; 723.5; 911.2; C6115 (Programming
                 support); C6150N (Distributed systems software)",
  journalabr =   "Digital Tech J",
  keywords =     "Computer networks; Computer simulation; Computer
                 software; CORBA compliant object broker integration
                 software; CORBA-compliant ObjectBroker integration;
                 CORBA-compliant ObjectBroker integration software; Cost
                 effectiveness; Digital's framework-based environment;
                 Framework based environment; integrated software;
                 integration; Integration; interoperability;
                 Interoperability; Large organizations; large
                 organizations; Object modelling technique, Digital's
                 framework-based environment; Object oriented
                 programming; open systems; partner systems integrators;
                 Partner systems integrators; programming environments;
                 software; Software engineering",
  thesaurus =    "Integrated software; Open systems; Programming
                 environments",
  treatment =    "P Practical",
}

@Article{Tallman:1995:PGA,
  author =       "Owen H. Tallman",
  title =        "{Project Gabriel}: Automated Software Deployment in a
                 Large Commercial Network",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "2",
  pages =        "56--70",
  month =        "Spring",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n2/Project_Gabriel_Automated_Sof_02oct1995DTJI05P8.ps;
                 http://www.digital.com:80/info/DTJI05/DTJI05AH.HTM;
                 http://www.digital.com:80/info/DTJI05/DTJI05P8.PS;
                 http://www.digital.com:80/info/DTJI05/DTJI05PF.PDF;
                 http://www.digital.com:80/info/DTJI05/DTJI05SC.TXT",
  abstract =     "Digital entered into an agreement with a major French
                 bank to develop an automated software deployment
                 facility, i.e., to provide centralized control of
                 software installations and upgrades for a large network
                 of computer systems. Independently, Digital had
                 developed a set of models designed to guide the design
                 of solutions to this type of complex management
                 problem. The bank project team, which had considerable
                 experience building distributed system management
                 applications, was able to take advantage of these
                 models. The result was a versatile, scalable
                 application for distributed software deployment,
                 validation of the models, and a clearer sense of the
                 usefulness of such models to complex application
                 problems.",
  acknowledgement = ack-nhfb,
  affiliation =  "NetLinks Technol. Inc., Nashua, NH, USA",
  classcodes =   "B6210L (Computer communications); C6155 (Computer
                 communications software); C5620 (Computer networks and
                 techniques)",
  classification = "B6210L (Computer communications); C5620 (Computer
                 networks and techniques); C6155 (Computer
                 communications software)",
  corpsource =   "NetLinks Technol. Inc., Nashua, NH, USA",
  keywords =     "application problems; applications; Automated software
                 deployment; automated software deployment; Centralized
                 control; centralized control; commercial network;
                 complex; Complex application problems; computer
                 communications software; computer networks; Distributed
                 software deployment; distributed software deployment;
                 distributed system management; Distributed system
                 management applications; French bank; large; Large
                 commercial network; Project Gabriel; software
                 installations; Software installations",
  thesaurus =    "Computer communications software; Computer networks",
  treatment =    "A Application; P Practical",
}

@Article{Blake:1995:EIb,
  author =       "Jane C. Blake",
  title =        "Editor's Introduction",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "3",
  pages =        "2--2",
  month =        "Fall",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Tue Jan 16 17:33:11 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ000/v7n1-00-intro.pdf",
  acknowledgement = ack-nhfb,
}

@Article{Bonney:1995:F,
  author =       "Jean C. Bonney",
  title =        "Foreword",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "3",
  pages =        "3--4",
  month =        "Fall",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Mon Jun 24 18:53:17 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJJ00/v7n3_01_02_intro_fore.txt",
  acknowledgement = ack-nhfb,
}

@Article{Harris:1995:CHP,
  author =       "Jonathan Harris and John A. Bircsak and M. Regina
                 Bolduc and Jill Ann Diewald and Israel Gale and Neil W.
                 Johnson and Shin Lee and C. Alexander Nelson and Carl
                 D. Offner",
  title =        "Compiling {High Performance Fortran} for
                 Distributed-memory Systems",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "3",
  pages =        "5--23",
  month =        "Fall",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "Compendex database;
                 http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n3/Compiling_High_Performance_For_02jan1996DTJJ01P8.ps;
                 http://www.digital.com:80/info/DTJJ01/DTJJ01AH.HTM;
                 http://www.digital.com:80/info/DTJJ01/DTJJ01P8.PS;
                 http://www.digital.com:80/info/DTJJ01/DTJJ01PF.PDF;
                 http://www.digital.com:80/info/DTJJ01/DTJJ01SC.TXT",
  abstract =     "Digital's DEC Fortran 90 compiler implements most of
                 High Performance Fortran version 1.1, a language for
                 writing parallel programs. The compiler generates code
                 for distributed-memory machines consisting of
                 interconnected work-stations or servers powered by
                 Digital's Alpha microprocessors. The DEC Fortran 90
                 compiler efficiently implements the features of Fortran
                 90 and HPF that support parallelism. HPF programs
                 compiled with Digital's compiler yield performance that
                 scales linearly or even superlinearly on significant
                 applications on both distributed-memory and
                 shared-memory architectures.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6150C (Compilers, interpreters and other processors);
                 C6140D (High level languages); C5440 (Multiprocessing
                 systems); C6110P (Parallel programming)",
  classification = "722.4; 723.1; 723.1.1; 723.5",
  journalabr =   "Digital Tech J",
  keywords =     "Alpha microprocessors; Codes (symbols); Computer
                 architecture; Computer workstations; Data storage
                 equipment; Digital's; Digital's DEC Fortran 90
                 compiler; Distributed computer systems; distributed
                 memory; Distributed memory systems; distributed memory
                 systems; FORTRAN; FORTRAN (programming language); High
                 Performance Fortran; High Performance Fortran
                 compiling; interconnected workstations; Interconnection
                 networks; Microcomputers; parallel; Parallel processing
                 systems; parallel programming; Parallel Programs;
                 Performance; program compilers; Program compilers;
                 programs; servers; shared memory systems; Shared-memory
                 architectures; shared-memory architectures; systems",
  treatment =    "A Application; P Practical",
}

@Article{Benson:1995:DDP,
  author =       "Edward G. Benson and David C. P. LaFrance-Linden and
                 Richard A. Warren and Santa Wiryaman",
  title =        "Design of {Digital}'s {Parallel Software
                 Environment}",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "3",
  pages =        "24--38",
  month =        "Fall",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n3/Design_of_Digitals_Parallel_S_02jan1996DTJJ02P8.ps;
                 http://www.digital.com:80/info/DTJJ02/DTJJ02AH.HTM;
                 http://www.digital.com:80/info/DTJJ02/DTJJ02P8.PS;
                 http://www.digital.com:80/info/DTJJ02/DTJJ02PF.PDF;
                 http://www.digital.com:80/info/DTJJ02/DTJJ02SC.TXT",
  abstract =     "Digital's Parallel Software Environment was designed
                 to support the development and execution of scalable
                 parallel applications on clusters (farms) of
                 distributed- and shared-memory Alpha processors running
                 the Digital UNIX operating system. PSE supports the
                 parallel execution of High Performance Fortran
                 applications with message-passing libraries that meet
                 the low-latency and high-bandwidth communication
                 requirements of efficient parallel computing. It
                 provides system management tools to create clusters for
                 distributed parallel processing and development tools
                 to debug and profile HPF programs. An extended version
                 of dbx allows HPF-distributed arrays to be viewed, and
                 a parallel profiler supports both program counter and
                 interval sampling. PSE also supplies generic facilities
                 required by other parallel languages and systems.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6115 (Programming support); C4240P (Parallel
                 programming and algorithm theory); C6110P (Parallel
                 programming); C6140D (High level languages); C6150J
                 (Operating systems)",
  classification = "716.1; 722.1; 722.4; 723.1; 723.1.1; 723.5",
  journalabr =   "Digital Tech J",
  keywords =     "applications; Bandwidth; clusters; Computer aided
                 software engineering; Computer software; Data storage
                 equipment; Digital UNIX operating; Digital's parallel
                 software environment; Distributed Alpha processors;
                 Distributed computer systems; distributed-memory Alpha
                 processors; FORTRAN; FORTRAN (programming language);
                 High Performance Fortran; interval sampling; languages;
                 Message passing libraries; message-passing libraries;
                 parallel; Parallel execution; parallel languages;
                 parallel processing; Parallel processing systems;
                 parallel programming; Parallel software environment;
                 profiler; program counter; Program debugging;
                 programming environments; scalable parallel; Shared
                 memory processors; shared-memory Alpha processors;
                 system; system management tools; Telecommunication;
                 Unix",
  treatment =    "A Application; P Practical",
}

@Article{Stonebraker:1995:OSP,
  author =       "Michael Stonebraker",
  title =        "An Overview of the {Sequoia} 2000 Project",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "3",
  pages =        "39--49",
  month =        "Fall",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n3/An_Overview_of_the_Sequoia_02jan1996DTJJ03P8.ps;
                 http://www.digital.com:80/info/DTJJ03/DTJJ03AH.HTM;
                 http://www.digital.com:80/info/DTJJ03/DTJJ03P8.PS;
                 http://www.digital.com:80/info/DTJJ03/DTJJ03PF.PDF;
                 http://www.digital.com:80/info/DTJJ03/DTJJ03SC.TXT",
  abstract =     "The Sequoia 2000 project is the joint effort of
                 computer scientists, earth scientists, government
                 agencies, and industry partners to build a better
                 computing environment for global change researchers.
                 The objectives of this widely distributed project are
                 to support high-performance I/O on terabyte data sets,
                 to put all data in a database management system, and to
                 provide improved visualization tools and high-speed
                 networking. The participants developed a four-level
                 architecture to meet these objectives. Chief among the
                 lessons learned is that the Sequoia 2000 system must be
                 considered an end-to-end solution, with all pieces of
                 the architecture working together. This paper describes
                 the Sequoia 2000 project and its implementation efforts
                 during the first three years. The research was
                 sponsored by Digital Equipment Corporation.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6160 (Database management systems (DBMS)); C6130B
                 (Graphics techniques)",
  classification = "722.4; 723.1; 723.2; 901.1; 912.2",
  journalabr =   "Digital Tech J",
  keywords =     "Computer architecture; Computer science; computer
                 scientists; Computer systems; Data structures; data
                 visualisation; database management system; database
                 management systems; Database systems; earth scientists;
                 Four level architecture; four-level architecture;
                 global change; Global change researchers; Government
                 agencies; High speed networking; high-performance I/O;
                 high-speed; industry partners; Input output programs;
                 networking; Professional aspects; Project management;
                 researchers; Sequoia 2000 project; Societies and
                 institutions; Terabyte data sets; terabyte data sets;
                 visualization tools",
  treatment =    "P Practical",
}

@Article{Larson:1995:SER,
  author =       "Ray R. Larson and Christian Plaunt and Allison G.
                 Woodruff and Marti Hearst",
  title =        "The {Sequoia} 2000 Electronic Repository",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "3",
  pages =        "50--65",
  month =        "Fall",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "Compendex database;
                 http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n3/The_Sequoia_2000_Electronic_Re_02jan1996DTJJ04P8.ps;
                 http://www.digital.com:80/info/DTJJ04/DTJJ04AH.HTM;
                 http://www.digital.com:80/info/DTJJ04/DTJJ04P8.PS;
                 http://www.digital.com:80/info/DTJJ04/DTJJ04PF.PDF;
                 http://www.digital.com:80/info/DTJJ04/DTJJ04SC.TXT",
  abstract =     "A major effort in the Sequoia 2000 project was to
                 build a very large database of earth science
                 information. Without providing the means for scientists
                 to efficiently and effectively locate required
                 information and to browse its contents, however, this
                 vast database would rapidly become unmanageable and
                 eventually unusable. The Sequoia 2000 Electronic
                 Repository addresses these problems through indexing
                 and retrieval software that is incorporated into the
                 POSTGRES database management system. The Electronic
                 Repository effort involved the design of probabilistic
                 indexing and retrieval for text documents in POSTGRES,
                 and the development of algorithms for automatic
                 georeferencing of text documents and segmentation of
                 full texts into topically coherent segments for
                 improved retrieval. Various graphical interfaces
                 support these retrieval features.",
  acknowledgement = ack-nhfb,
  classcodes =   "A9365 (Data and information; acquisition, processing,
                 storage and dissemination in geophysics); C7340
                 (Geophysics computing); C7240 (Information analysis and
                 indexing); C7250R (Information retrieval techniques);
                 C6160Z (Other DBMS); C6130B (Graphics techniques);
                 C6180G (Graphical user interfaces); C6160S (Spatial and
                 pictorial databases); C7840 (Geography and cartography
                 computing)",
  classification = "722.1; 722.2; 723.3; 903.1; 903.3; 912.2",
  journalabr =   "Digital Tech J",
  keywords =     "Algorithms; automatic georeferencing; Computer
                 software; Data storage equipment; Database systems;
                 earth science information; Electronic repository; full;
                 geographic information systems; Georeferencing; Global
                 change researcher; graphical; Graphical user
                 interfaces; graphical user interfaces; indexing;
                 Indexing (of information); information retrieval;
                 Information retrieval; Information retrieval systems;
                 interfaces; Large-scale storage system; POSTGRES;
                 Project management; retrieval software; Searching;
                 Sequoia 2000; Sequoia 2000 electronic repository;
                 Sharing; text documents; texts segmentation; Textual
                 documents; topically coherent segments; very large
                 database; very large databases",
  treatment =    "A Application; P Practical",
}

@Article{Kochevar:1995:TSP,
  author =       "Peter D. Kochevar and Leonard R. Wanger",
  title =        "{Tecate}: {A} Software Platform for Browsing and
                 Visualizing Data from Networked Data Sources",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "3",
  pages =        "66--83",
  month =        "Fall",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n3/Tecate_A_Software_Platform_fo_02jan1996DTJJ05P8.ps;
                 http://www.digital.com:80/info/DTJJ05/DTJJ05AH.HTM;
                 http://www.digital.com:80/info/DTJJ05/DTJJ05P8.PS;
                 http://www.digital.com:80/info/DTJJ05/DTJJ05PF.PDF;
                 http://www.digital.com:80/info/DTJJ05/DTJJ05SC.TXT",
  abstract =     "Tecate is a new infrastructure on which applications
                 can be constructed that allow end users to browse for
                 and then visualize data within networked data sources.
                 This software platform capitalizes on the architectural
                 strengths of current scientific visualization systems,
                 network browsers like Netscape, database management
                 system front ends, and virtual reality systems.
                 Applications layered on top of Tecate are able to
                 browse for information in databases managed by database
                 management systems and for information contained in the
                 World Wide Web. In addition, Tecate dynamically crafts
                 user interfaces and interactive visualizations of
                 selected data sets with the aid of an intelligent
                 system. This system automatically maps many kinds of
                 data sets into a virtual world that can be explored
                 directly by end users. In describing these virtual
                 worlds, Tecate uses an interpretive language that is
                 also capable of performing arbitrary computations and
                 mediating communications among different processes.",
  acknowledgement = ack-nhfb,
  classcodes =   "C7250N (Front end systems for online searching);
                 C6130B (Graphics techniques); C6180 (User interfaces);
                 C6160 (Database management systems (DBMS)); C6155
                 (Computer communications software)",
  classification = "722.2; 722.4; 723.2; 723.3; 723.5; 903.3",
  journalabr =   "Digital Tech J",
  keywords =     "Artificial intelligence; Browsing; browsing; Computer
                 aided software engineering; Data sources; Data
                 structures; data visualisation; Data visualization;
                 data visualization; database management system front;
                 database management systems; Database systems; ends;
                 front-ends; Information retrieval; Information
                 retrieval systems; Intelligent system; intelligent
                 system; Interactive computer systems; Interactive
                 visualization; interactive visualizations; interfaces;
                 Interpretive language; interpretive language; Netscape;
                 network browsers; networked data sources; online;
                 scientific visualization systems; software platform;
                 Tecate; user; user interfaces; User interfaces; virtual
                 reality; Virtual reality; virtual reality systems;
                 World Wide Web",
  treatment =    "A Application; P Practical",
}

@Article{Pasquale:1995:HPN,
  author =       "Joseph Pasquale and Eric W. Anderson and Kevin Fall
                 and Jonathan S. Kay",
  title =        "High-performance {I/O} and Networking Software in
                 {Sequoia 2000}",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "3",
  pages =        "84--96",
  month =        "Fall",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "Compendex database;
                 http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n3/Highperformance_IO_and_Netwo_02jan1996DTJJ06P8.ps;
                 http://www.digital.com:80/info/DTJJ06/DTJJ06AH.HTM;
                 http://www.digital.com:80/info/DTJJ06/DTJJ06P8.PS;
                 http://www.digital.com:80/info/DTJJ06/DTJJ06PF.PDF;
                 http://www.digital.com:80/info/DTJJ06/DTJJ06SC.TXT",
  abstract =     "The Sequoia 2000 project requires a high-speed network
                 and I/O software for the support of global change
                 research. In addition, Sequoia distributed applications
                 require the efficient movement of very large objects,
                 from tens to hundreds of megabytes in size. The network
                 architecture incorporates new designs and
                 implementations of operating system I/O software. New
                 methods provide significant performance improvements
                 for transfers among devices and processes and between
                 the two. These techniques reduce or eliminate costly
                 memory accesses, avoid unnecessary processing, and
                 bypass system overheads to improve throughput and
                 reduce latency.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5440 (Multiprocessing systems); C7340 (Geophysics
                 computing)C5620 (Computer networks and techniques)",
  classification = "722.3; 722.4; 723.1; 723.2; 723.5; 912.2",
  journalabr =   "Digital Tech J",
  keywords =     "Computer aided software engineering; computer
                 networks; Computer operating systems; Computer
                 software; Data acquisition; Data transfer; DEC
                 computers; Distributed computer systems; geophysics
                 computing; global change research; High performance I/O
                 software; High speed network; high-speed network; I/O;
                 Input output programs; latency; multiprocessing
                 systems; network architecture; Network protocols;
                 networking software; performance improvements; Project
                 management; Sequoia 2000; software; Systems analysis;
                 throughput; Wide area networks",
  treatment =    "P Practical",
}

@Article{Blake:1996:EIa,
  author =       "Jane C. Blake",
  title =        "Editor's Introduction",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "4",
  pages =        "??--??",
  month =        mar,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sat May 04 17:06:29 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJK00/v7n4-intro.htm",
  acknowledgement = ack-nhfb,
}

@Article{Ulichney:1996:F,
  author =       "Robert Ulichney",
  title =        "Foreword",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "4",
  pages =        "??--??",
  month =        mar,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sat May 04 13:42:51 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJK00/v7n4-fore.htm",
  acknowledgement = ack-nhfb,
}

@Article{Hallahan:1996:DST,
  author =       "William I. Hallahan",
  title =        "{DECtalk} Software: Text-to-Speech Technology and
                 Implementation",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "4",
  pages =        "5--19",
  month =        mar,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n4/DECtalk_Software_TexttoSpee_20apr1996DTJK01P8.ps;
                 http://www.digital.com:80/info/DTJK01;
                 http://www.digital.com:80/info/DTJK01/DTJK01AH.HTM;
                 http://www.digital.com:80/info/DTJK01/DTJK01P8.PS;
                 http://www.digital.com:80/info/DTJK01/DTJK01PF.PDF;
                 http://www.digital.com:80/info/DTJK01/DTJK01SC.TXT",
  abstract =     "DECtalk is a mature text-to-speech synthesis
                 technology that Digital has sold as a series of
                 hardware products for more than ten years. Originally
                 developed by Digital's Assistive Technology Group (ATG)
                 as an alternative to a character-cell terminal and for
                 telephony applications, today DECtalk also provides
                 visually handicapped people access to information.
                 DECtalk uses a digital formant synthesizer to simulate
                 the human vocal tract. Before the advent of the Alpha
                 processor, the computational demands of this
                 synthesizer placed an extreme load on a workstation.
                 DECtalk Software has an application programming
                 interface (API) that is supported on multiple platforms
                 and multiple operating systems. This paper describes
                 the various text-to-speech technologies, the DECtalk
                 Software architecture, and the API. The paper also
                 reports our experience in porting the DECtalk code base
                 from the previous hardware platform.",
  acknowledgement = ack-nhfb,
  classcodes =   "B6130 (Speech analysis and processing techniques);
                 B6210D (Telephony); B7520H (Aids for the handicapped);
                 C5260S (Speech processing techniques); C5585 (Speech
                 recognition and synthesis equipment); C6150E (General
                 utility programs); C6110B (Software engineering
                 techniques); C7410F (Communications computing); C7850
                 (Computer assistance for persons with handicaps)",
  keywords =     "aids; Alpha processor; application program interfaces;
                 application programming interface; Assistive Technology
                 Group; computational demands; DEC computers; DECtalk
                 code base porting; DECtalk Software; Digital Equipment
                 Corporation; digital formant synthesizer; handicapped;
                 hardware; human vocal; information access; operating
                 systems; platforms; software architecture; software
                 engineering; software packages; speech; synthesis;
                 telecommunication computing; telephony; telephony
                 applications; text-to-speech synthesis technology;
                 tract simulation; visually handicapped people",
  treatment =    "P Practical",
}

@Article{Correll:1996:JFV,
  author =       "Kenneth W. Correll and Robert A. Ulichney",
  title =        "The {J300} Family of Video and Audio Adapters:
                 Architecture and Hardware Design",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "4",
  pages =        "20--33",
  month =        mar,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n4/The_J300_Family_of_Video_20apr1996DTJK02P8.ps;
                 http://www.digital.com:80/info/DTJK02;
                 http://www.digital.com:80/info/DTJK02/DTJK02AH.HTM;
                 http://www.digital.com:80/info/DTJK02/DTJK02P8.PS;
                 http://www.digital.com:80/info/DTJK02/DTJK02PF.PDF;
                 http://www.digital.com:80/info/DTJK02/DTJK02SC.TXT",
  abstract =     "The J300 family of video and audio adapters provides a
                 feature-rich set of hardware options for Alpha-based
                 workstations. Unlike earlier attempts to integrate
                 full-motion digital video with general-purpose computer
                 systems, the architecture and design of J300 adapters
                 exploit fast system and I/O buses to allow video data
                 to be treated like any other data type used by the
                 system, independent of the graphics subsystem. This
                 paper describes the architecture used in J300 products,
                 the video and audio features supported, and some key
                 aspects of the hard ware design. In particular, the
                 paper describes a simple yet versatile
                 color-map-friendly rendering system that generates
                 high-quality 8-bit image data.",
  acknowledgement = ack-nhfb,
  classcodes =   "B6140C (Optical information, image and video signal
                 processing); B6430 (Television equipment, systems and
                 applications); B6450 (Audio equipment and systems);
                 C5260 (Digital signal processing); C5540 (Terminals and
                 graphic displays); C5220 (Computer architecture)",
  keywords =     "adaptive signal processing; audio adapters; audio
                 signals; audio-visual; color-map-friendly rendering
                 system; computer architecture; computer graphic
                 equipment; DEC Alpha-based workstations; DEC computers;
                 feature-rich; full-; graphics subsystem; hardware
                 design; hardware options set; high-quality 8-bit; I/O
                 buses; image data; J300 adapters; motion digital video;
                 peripheral interfaces; rendering (computer graphics);
                 signal processing; signal processing equipment; system
                 architecture; system buses; systems; video; video
                 adapters; video data; workstations",
  treatment =    "P Practical",
}

@Article{Bahl:1996:JFV,
  author =       "Paramvir Bahl",
  title =        "The {J300} Family of Video and Audio Adapters:
                 Software Architecture",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "4",
  pages =        "34--51",
  month =        mar,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n4/The_J300_Family_of_Video_20apr1996DTJK03P8.ps;
                 http://www.digital.com:80/info/DTJK03;
                 http://www.digital.com:80/info/DTJK03/DTJK03AH.HTM;
                 http://www.digital.com:80/info/DTJK03/DTJK03P8.PS;
                 http://www.digital.com:80/info/DTJK03/DTJK03PF.PDF;
                 http://www.digital.com:80/info/DTJK03/DTJK03SC.TXT",
  abstract =     "The J300 family of video and audio products is a
                 feature-rich set of multimedia hardware adapters
                 developed by Digital for its Alpha workstations. This
                 paper describes the design and implementation of the
                 J300 software architecture, focusing on the Sound \&
                 Motion J300 product. The software approach taken was to
                 consider the hardware as two separate devices: the J300
                 audio subsystem and the J300 video subsystem. Libraries
                 corresponding to the two subsystems provide application
                 programming interfaces that offer flexible control of
                 the hardware while supporting a client-server model for
                 multimedia applications. The design places special
                 emphasis on performance by favoring an asynchronous I/O
                 programming model implemented through an innovative use
                 of queues. The kernel-mode device driver is portable
                 across devices because it requires minimal knowledge of
                 the hardware. The overall design aims at easing
                 application programming while extracting real-time
                 performance from a non-real-time operating system. The
                 software architecture has been successfully implemented
                 over multiple platforms, including those based on the
                 OpenVMS, Microsoft Windows NT, and Digital UNIX
                 operating systems, and is the foundation on which
                 software for Digital's current video capture,
                 compression, and rendering hardware adapters exists.",
  acknowledgement = ack-nhfb,
  classcodes =   "B6140C (Optical information, image and video signal
                 processing); B6430 (Television equipment, systems and
                 applications); B7220 (Signal processing and
                 conditioning equipment and techniques); B6450 (Audio
                 equipment and systems); C5260 (Digital signal
                 processing); C6110B (Software engineering techniques);
                 C6130M (Multimedia); C5540 (Terminals and graphic
                 displays)",
  keywords =     "(computer graphics); adaptive signal processing;
                 application program interfaces; application programming
                 interfaces; architecture; asynchronous I/O programming
                 model; audio adapters; audio signals; audio-visual
                 systems; client-server model; computer graphic;
                 computing; data compression; DEC Alpha workstations;
                 DEC computers; device drivers; Digital; driver;
                 engineering; equipment; feature-rich hardware options
                 set; flexible hardware control; hardware adapters; J300
                 adapters; J300 audio subsystem; J300 product; J300
                 video subsystem; Microsoft Windows NT; multimedia;
                 OpenVMS; operating systems; operating systems
                 (computers); portable kernel-mode device; queues;
                 real-time performance; rendering; signal processing
                 equipment; software; software libraries; Sound and
                 Motion; UNIX; video adapters; video capture; video
                 signal processing; workstations",
  treatment =    "P Practical",
}

@Article{Bahl:1996:SOC,
  author =       "Paramvir Bahl and Paul S. Gauthier and Robert A.
                 Ulichney",
  title =        "Software-only Compression, Rendering, and Playback of
                 Digital Video",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "4",
  pages =        "52--75",
  month =        mar,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n4/Softwareonly_Compression_Ren_20apr1996DTJK04P8.ps;
                 http://www.digital.com:80/info/DTJK04;
                 http://www.digital.com:80/info/DTJK04/DTJK04AH.HTM;
                 http://www.digital.com:80/info/DTJK04/DTJK04P8.PS;
                 http://www.digital.com:80/info/DTJK04/DTJK04PF.PDF;
                 http://www.digital.com:80/info/DTJK04/DTJK04SC.TXT",
  abstract =     "Software-only digital video involves the compression,
                 decompression, rendering, and display of digital video
                 on general-purpose computers without specialized
                 hardware. Today's faster processors are making
                 software-only video an attractive, low-cost alternative
                 to hardware solutions that rely on specialized
                 compression boards and graphics accelerators. This
                 paper describes the building blocks behind popular ISO,
                 ITU-T, and industry-standard compression schemes, along
                 with some novel algorithms for fast video rendering and
                 presentation. A platform-independent software
                 architecture that organizes the functionality of
                 compressors and renderers into a unifying software
                 inter face is presented. This architecture has been
                 successfully implemented on the Digital UNIX, the
                 OpenVMS, and Microsoft's Windows NT operating systems.
                 To maximize the performance of codecs and renderers,
                 issues pertaining to flow control, optimal use of
                 available resources, and optimizations at the
                 algorithmic, operating-system, and processor levels are
                 considered. The performance of these codecs on Alpha
                 systems is evaluated, and the ensuing results validate
                 the potential of software-only solutions. Finally, this
                 paper provides a brief description of some sample
                 applications built on top of the software architecture,
                 including an innovative video screen saver and a
                 software VCR capable of playing multiple, compressed
                 bit streams.",
  acknowledgement = ack-nhfb,
  classcodes =   "B6140C (Optical information, image and video signal
                 processing); B6220M (Speech and video codecs); B6430H
                 (Video recording); C5260 (Digital signal processing);
                 C7410F (Communications computing)",
  keywords =     "(computer graphics); Alpha systems; available
                 resources optimal use; codecs; computers; computing;
                 data compression; data decompression; Digital UNIX;
                 fast video; flow control; general-purpose;
                 industry-standard compression schemes; ISO; ITU-T;
                 low-cost alternative; Microsoft Windows; multiple
                 compressed bit streams; NT; OpenVMS; operating systems;
                 operating systems (computers); performance
                 maximization; platform-independent software
                 architecture; playback; rendering; software
                 engineering; software interface; software VCR;
                 software-only digital video; telecommunication;
                 unifying; video codecs; video presentation; video
                 screen saver; video signal processing",
  treatment =    "P Practical",
}

@Article{Seiler:1996:IVR,
  author =       "Larry D. Seiler and Robert A. Ulichney",
  title =        "Integrating Video Rendering into Graphics Accelerator
                 Chips",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "4",
  pages =        "76--88",
  month =        mar,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n4/Integrating_Video_Rendering_in_20apr1996DTJK05P8.ps;
                 http://www.digital.com:80/info/DTJK05;
                 http://www.digital.com:80/info/DTJK05/DTJK05AH.HTM;
                 http://www.digital.com:80/info/DTJK05/DTJK05P8.PS;
                 http://www.digital.com:80/info/DTJK05/DTJK05PF.PDF;
                 http://www.digital.com:80/info/DTJK05/DTJK05SC.TXT",
  abstract =     "The fusion of multimedia and traditional computer
                 graphics has long been predicted but has been slow to
                 happen. The delay is due to many factors, including
                 their dramatically different data type and bandwidth
                 requirements. Digital has designed a pair of related
                 graphics accelerator chips that integrate video
                 rendering primitives with two-dimensional and
                 three-dimensional synthetic graphics primitives. The
                 chips perform one-dimensional filtering and scaling on
                 either YUV or RGB source data. One implementation
                 dithers YUV source data down to 256 colors. The other
                 converts YUV to 24-bit RGB, which is then optionally
                 dithered. Both chips leave image decompression to the
                 CPU. The result is significantly faster frame rates at
                 higher video quality, especially for displaying
                 enlarged images. The paper compares the implementation
                 cost of various design alternatives and presents
                 performance comparisons with software image
                 rendering.",
  acknowledgement = ack-nhfb,
  classcodes =   "B6140C (Optical information, image and video signal
                 processing); B6220F (ISDN and multimedia terminal
                 equipment); B1265F (Microprocessors and
                 microcomputers); C5135 (Digital signal processing
                 chips); C6130B (Graphics techniques); C5540 (Terminals
                 and graphic displays); C6130M (Multimedia); C5260
                 (Digital signal processing)",
  keywords =     "1D filtering; 1D scaling; bandwidth requirements;
                 colour graphics; computer graphic equipment; data
                 conversion; data types; DEC; DEC computers; design
                 alternatives; digital signal processing chips;
                 dithering; enlarged; frame rates; graphics accelerator
                 chips; image decompression; image display;
                 implementation costs; multimedia; multimedia systems;
                 performance comparisons; rendering (computer graphics);
                 RGB source data; software image rendering; source data;
                 synthetic graphics primitives; video quality; video
                 rendering primitives; video signal processing; YUV",
  treatment =    "P Practical",
}

@Article{Cohen:1996:TDD,
  author =       "Lawrence S. Cohen and John H. Williams",
  title =        "Technical Description of the {DECsafe Available Server
                 Environment}",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "4",
  pages =        "89--100",
  month =        mar,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n4/Technical_Description_of_the_D_20apr1996DTJK06P8.ps;
                 http://www.digital.com:80/info/DTJK06;
                 http://www.digital.com:80/info/DTJK06/DTJK06AH.HTM;
                 http://www.digital.com:80/info/DTJK06/DTJK06P8.PS;
                 http://www.digital.com:80/info/DTJK06/DTJK06PF.PDF;
                 http://www.digital.com:80/info/DTJK06/DTJK06SC.TXT",
  abstract =     "The DECsafe Available Server Environment (ASE) was
                 designed to satisfy the high-availability requirements
                 of mission-critical applications running on the Digital
                 UNIX operating system. By supplying failure detection
                 and failover procedures for redundant hardware and
                 software subsystems, ASE provides services that can
                 tolerate a single point of failure. In addition, ASE
                 supports standard SCSI hardware in shared storage
                 configurations. ASE uses several mechanisms to maintain
                 continuous operation and to prevent data corruption
                 resulting from network partitions.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5630 (Networking equipment); C6130S (Data security);
                 C5470 (Performance evaluation and testing)",
  keywords =     "applications; configurations; continuous operation
                 maintenance; corruption prevention; data; DEC
                 computers; DECsafe Available Server Environment;
                 detection procedures; Digital UNIX operating system;
                 failover procedures; failure; fault tolerant computing;
                 fault-; hardware failure; hardware subsystems;
                 high-availability requirements; mission-critical;
                 network partitions; network servers; peripheral
                 interfaces; redundancy; redundant; redundant software
                 subsystems; relocation; safety-critical software; SCSI
                 hardware; service; shared storage; technical
                 description; tolerant services; Unix",
  treatment =    "P Practical",
}

@Article{Palmer:1996:PDA,
  author =       "Michael Palmer and Jeffrey M. Russo",
  title =        "{Parasight}: Debugging and Analyzing Real-time
                 Applications under {Digital UNIX}",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "4",
  pages =        "101--108",
  month =        mar,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n4/Parasight_Debugging_and_Analy_20apr1996DTJK07P8.ps;
                 http://www.digital.com:80/info/DTJK07;
                 http://www.digital.com:80/info/DTJK07/DTJK07AH.HTM;
                 http://www.digital.com:80/info/DTJK07/DTJK07P8.PS;
                 http://www.digital.com:80/info/DTJK07/DTJK07PF.PDF;
                 http://www.digital.com:80/info/DTJK07/DTJK07SC.TXT",
  abstract =     "Conventional UNIX debug and analysis tools, with their
                 static debugging model and low resolution-sampling
                 profiling techniques, are not effective in dealing with
                 real-time applications. Encore Computer Corporation has
                 developed Parasight, a set of debug and analysis tools
                 for real-time applications. The Parasight tool set can
                 debug running programs, debug multiple programs,
                 constantly monitor local and global variables, and
                 perform on-the-fly execution analysis. Thus, Parasight
                 provides much improved debug and analysis capabilities,
                 which application developers can use on both static and
                 dynamic applications. Parasight can be used on any of
                 Digital's Alpha platforms running under the Digital
                 UNIX operating system.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6150G (Diagnostic, testing, debugging and evaluating
                 systems); C6115 (Programming support); C6150J
                 (Operating systems)",
  corpsource =   "Encore Comput. Corp., Marlborough, MA, USA",
  keywords =     "application development; applications; debugging
                 tools; DEC Alpha platforms; DEC computers; Digital UNIX
                 operating; dynamic applications; Encore Computer
                 Corporation; fly execution analysis; global variables
                 monitoring; local; multiple program debugging; on-the-;
                 Parasight; program analysis tools; program debugging;
                 real-time applications; real-time systems; running;
                 software packages; software tools; static; system;
                 system monitoring; Unix; variables monitoring",
  treatment =    "P Practical",
}

@Article{Blake:1996:EIb,
  author =       "Jane C. Blake",
  title =        "Editor's Introduction",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "1",
  pages =        "??--??",
  month =        may,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sun Jun 23 10:06:51 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com/.i/info/DTJL00/v8n1-intro.htm",
  acknowledgement = ack-nhfb,
}

@Article{Harbert:1996:F,
  author =       "Don Harbert",
  title =        "Foreword",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "1",
  pages =        "??--??",
  month =        may,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sun Jun 23 10:06:51 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com/.i/info/DTJL00/v8n1-fore.htm",
  acknowledgement = ack-nhfb,
}

@Article{Cardoza:1996:DTM,
  author =       "Wayne M. Cardoza and Frederick S. Glover and William
                 E. {Snaman, Jr.}",
  title =        "Design of the {TruCluster} Multicomputer System for
                 the {Digital UNIX} Environment",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "1",
  pages =        "5--17",
  month =        may,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v8n1/Design_of_the_TruCluster_Multi_04jun1996DTJL01P8.ps;
                 http://www.digital.com:80/info/DTJL01/DTJL01.HTM;
                 http://www.digital.com:80/info/DTJL01/DTJL01AH.HTM;
                 http://www.digital.com:80/info/DTJL01/DTJL01P8.PS;
                 http://www.digital.com:80/info/DTJL01/DTJL01PF.PDF;
                 http://www.digital.com:80/info/DTJL01/DTJL01SC.TXT",
  abstract =     "The TruCluster product from Digital provides an
                 available and scalable multicomputer system for the
                 UNIX environment. Although it was designed for
                 general-purpose computing, the first implementation is
                 directed at the needs of large database applications.
                 Services such as distributed locking, failover
                 management, and remote storage access are layered on a
                 high-speed cluster interconnect. The initial
                 implementation uses the MEMORY CHANNEL, an extremely
                 reliable, high-performance interconnect specially
                 designed by Digital for the cluster system.",
  acknowledgement = ack-nhfb,
  classcodes =   "C5440 (Multiprocessing systems); C6150J (Operating
                 systems); C6115 (Programming support); C6160 (Database
                 management systems (DBMS))",
  keywords =     "database management systems; Digital UNIX environment;
                 distributed locking; failover; high-; large database
                 applications; management; MEMORY CHANNEL;
                 multiprocessing systems; performance interconnect;
                 remote storage access; TruCluster multicomputer system;
                 Unix",
  treatment =    "A Application; P Practical",
}

@Article{Wilson:1996:DBO,
  author =       "Linda S. Wilson and Craig A. Neth and Michael J.
                 Rickabaugh",
  title =        "Delivering Binary Object Modification Tools for
                 Program Analysis and Optimization",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "1",
  pages =        "19--31 (or 18--31??)",
  month =        may,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v8n1/Delivering_Binary_Object_Modif_04jun1996DTJL02P8.ps;
                 http://www.digital.com:80/info/DTJL02/DTJL02.HTM;
                 http://www.digital.com:80/info/DTJL02/DTJL02AH.HTM;
                 http://www.digital.com:80/info/DTJL02/DTJL02P8.PS;
                 http://www.digital.com:80/info/DTJL02/DTJL02PF.PDF;
                 http://www.digital.com:80/info/DTJL02/DTJL02SC.TXT",
  abstract =     "Digital has developed two binary object modification
                 tools for program analysis and optimization on the
                 Digital UNIX version 4.0 operating system for the Alpha
                 platform. The technology originated from research
                 performed at Digital's Western Research Laboratory. The
                 OM object modification tool is a transformation tool
                 that focuses on postlink optimizations. OM can apply
                 powerful intermodule and interlanguage optimizations,
                 even to routines in system libraries. Atom, an analysis
                 tool with object modification, provides a flexible
                 framework for customizing the transformation process to
                 analyze a program. With Atom, compilation system
                 changes are not needed to create both simple and
                 sophisticated tools to directly diagnose or debug
                 application-specific performance problems. The linker
                 and loader are enhanced to support Atom. The
                 optimizations OM performs can be driven from
                 performance data generated with the Atom-based pixie
                 tool. Applying OM and Atom to commercial applications
                 provided performance improvements of up to 15
                 percent.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6150G (Diagnostic, testing, debugging and evaluating
                 systems); C6150J (Operating systems); C6150C
                 (Compilers, interpreters and other processors); C6115
                 (Programming support)",
  corpsource =   "Nebraska Univ., Lincoln, NE, USA",
  keywords =     "Alpha platform; application-specific performance;
                 Atom; binary object modification tools; compilation
                 system; Digital UNIX version 4.0 operating system;
                 optimization; postlink optimizations; problems;
                 program; program analysis; program compilers; program
                 debugging; transformation tool; Unix",
  treatment =    "A Application; P Practical",
}

@Article{Freitas:1996:DEV,
  author =       "John T. Freitas and James G. Peterson and Scot A.
                 Aurenz and Charles P. Guldenschuh and Paul J. Ranauro",
  title =        "Design of {eXcursion} Version 2 for {Windows},
                 {Windows NT}, and {Windows} 95",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "1",
  pages =        "32--45",
  month =        may,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v8n1/Design_of_eXcursion_Version_2_04jun1996DTJL03P8.ps;
                 http://www.digital.com:80/info/DTJL03/DTJL03.HTM;
                 http://www.digital.com:80/info/DTJL03/DTJL03AH.HTM;
                 http://www.digital.com:80/info/DTJL03/DTJL03P8.PS;
                 http://www.digital.com:80/info/DTJL03/DTJL03PF.PDF;
                 http://www.digital.com:80/info/DTJL03/DTJL03SC.TXT",
  abstract =     "Version 2 of the eXcursion product is a complete
                 rewrite of the successful Windows-based X server
                 software package. Based on release 6 of the X Window
                 System version 11 protocol, the new product runs on
                 Microsoft's Windows, Windows NT, and Windows 95
                 operating systems. The X server is one of several
                 components that compose this package. The other
                 components are X Image Extension, the control panel
                 (which constitutes the user interface for product
                 configuration), the error logger, the application
                 launcher, and the setup program. An interprocess
                 communication facility enables the eXcursion components
                 to communicate in a uniform fashion under all three
                 operating systems. A unique server design using
                 object-oriented programming techniques integrates the X
                 graphics context with the Windows device context into a
                 combined state management facility. The resulting
                 implementation maximized graphics performance while
                 conserving Windows resources, which are in limited
                 supply under the 16-bit version of the Windows
                 operating system. The control panel was coded
                 completely in the C++ programming language, thus making
                 full use of the Microsoft Foundation Class library to
                 minimize development time and to ensure consistency
                 with the Windows user interface paradigm.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6150J (Operating systems); C6180G (Graphical user
                 interfaces); C6130B (Graphics techniques); C6110J
                 (Object-oriented programming); C5640 (Protocols); C6155
                 (Computer communications software)",
  corpsource =   "Northeastern Univ., Boston, MA, USA",
  keywords =     "application; C++ programming language; control panel;
                 error logger; eXcursion version 2; facility; graphical
                 user interfaces; interface; interface paradigm;
                 interprocess communication; launcher; management
                 facility; network servers; object-oriented;
                 object-oriented programming techniques; operating
                 systems (computers); product configuration;
                 programming; protocols; setup program; state; user;
                 version 11 protocol; Windows; Windows 95; Windows NT;
                 Windows user; Windows-based X server software package;
                 X Image Extension; X Window System",
  treatment =    "P Practical",
}

@Article{Olson:1996:IMD,
  author =       "Margaret Olson and Laura E. Holly and Colin Strutt",
  title =        "Integrating Multiple Directory Services",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "1",
  pages =        "46--58",
  month =        may,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v8n1/Integrating_Multiple_Director_04jun1996DTJL04P8.ps;
                 http://www.digital.com:80/info/DTJL04/DTJL04.HTM;
                 http://www.digital.com:80/info/DTJL04/DTJL04AH.HTM;
                 http://www.digital.com:80/info/DTJL04/DTJL04P8.PS;
                 http://www.digital.com:80/info/DTJL04/DTJL04PF.PDF;
                 http://www.digital.com:80/info/DTJL04/DTJL04SC.TXT",
  abstract =     "The Integrated Directory Services (IDS) infrastructure
                 implements a directory-service-independent interface.
                 The IDS infrastructure is used by applications that
                 store and retrieve information about resources in
                 environments with either multiple directory services or
                 one of several directory services. The IDS interface
                 isolates users and application writers from the unique
                 requirements of different directory services by
                 providing a view of a single, logical directory service
                 through a simple federation mechanism. To retrieve
                 resources from the logical directory, IDS determines
                 its physical location and converts the resource from a
                 directory-specific to a canonical format. Extensible
                 schema tables represent the canonical format for each
                 resource and allow IDS to represent resources created
                 using both the IDS interfaces and the
                 directory-specific interfaces.",
  acknowledgement = ack-nhfb,
  classcodes =   "C7250 (Information storage and retrieval)",
  corpsource =   "Wellesley Coll., MA, USA",
  keywords =     "directory service; directory-service-;
                 directory-specific interfaces; independent interface;
                 information retrieval systems; logical; multiple
                 directory services; multiple directory services
                 integration",
  treatment =    "P Practical",
}

@Article{Rosenbaum:1996:DCD,
  author =       "Richard L. Rosenbaum and Stanley I. Goldfarb",
  title =        "Design of the Common Directory Interface for
                 {DECnet\slash OSI}",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "1",
  pages =        "59--72 (or 59--67??)",
  month =        may,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v8n1/Design_of_the_Common_Director_04jun1996DTJL05P8.ps;
                 http://www.digital.com:80/info/DTJL05/DTJL05.HTM;
                 http://www.digital.com:80/info/DTJL05/DTJL05AH.HTM;
                 http://www.digital.com:80/info/DTJL05/DTJL05P8.PS;
                 http://www.digital.com:80/info/DTJL05/DTJL05PF.PDF;
                 http://www.digital.com:80/info/DTJL05/DTJL05SC.TXT",
  abstract =     "Digital has developed the Common Directory Interface
                 (CDI) as the means by which DECnet\slash OSI can now
                 access and manage node name and address information in
                 multiple directory services. CDI comprises libraries
                 for node name-to-address translation and a tool set for
                 managing and migrating node information among different
                 directory services. The Common Directory Registration
                 API is layered on top of a set of directory service
                 wrapper routines to provide an extensible mechanism for
                 adding new directory services. CDI gives customers
                 greater flexibility in choosing a directory service and
                 supports the new multiprotocol capabilities in
                 DECnet\slash OSI, which support the open systems
                 interconnection (OSI) standards.",
  acknowledgement = ack-nhfb,
  classcodes =   "B6150M (Protocols); B6210L (Computer communications);
                 C5640 (Protocols); C5620 (Computer networks and
                 techniques)",
  corpsource =   "State Univ. of New York, Stony Brook, NY, USA",
  keywords =     "address; API; common directory interface; DECnet/OSI;
                 directory; information; libraries; multiple directory
                 services; multiprotocol capabilities; name-to-address
                 translation; node; node name; open; open systems;
                 protocols; service wrapper routines t; standards;
                 systems interconnection standards; tool set",
  treatment =    "P Practical",
}

@Article{Blake:1996:EIc,
  author =       "Jane C. Blake",
  title =        "Editor's Introduction",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "2",
  pages =        "??--??",
  month =        oct,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Wed Dec 04 16:08:54 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/DTJM00/v8n2-intro.htm",
  acknowledgement = ack-nhfb,
}

@Article{Marcello:1996:F,
  author =       "Rich Marcello",
  title =        "Foreword",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "2",
  pages =        "??--??",
  month =        oct,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Wed Dec 04 16:08:54 1996",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/DTJM00/v8n2-fore.htm",
  acknowledgement = ack-nhfb,
}

@Article{Johnson:1996:OSF,
  author =       "James E. Johnson and William A. Laing",
  title =        "Overview of the {Spiralog File System}",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "2",
  pages =        "5--14",
  month =        oct,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJM01/DTJM01AH.HTM;
                 http://www.digital.com:80/info/DTJM01/DTJM01HM.HTM;
                 http://www.digital.com:80/info/DTJM01/DTJM01P8.PS;
                 http://www.digital.com:80/info/DTJM01/DTJM01PF.PDF;
                 http://www.digital.com:80/info/DTJM01/DTJM01SC.TXT",
  abstract =     "The OpenVMS Alpha environment requires a file system
                 that supports its full 64-bit capabilities. The
                 Spiralog file system was developed to increase the
                 capabilities of Digital's Files-11 file system for
                 OpenVMS. It incorporates ideas from a log-structured
                 file system and an ordered write-back model. The
                 Spiralog file system provides improvements in data
                 availability, scaling of the amount of storage easily
                 managed, support for very large volume sizes, support
                 for applications that are either write-operation or
                 file-system-operation intensive, and support for
                 heterogeneous file system client types. The Spiralog
                 technology, which matches or exceeds the reliability
                 and device independence of the Files-11 system, was
                 then integrated into the OpenVMS operating system.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6120 (File organisation); C6150N (Distributed systems
                 software)",
  keywords =     "64-bit; capabilities; data availability; Digital's
                 Files-11 file system; file organisation; file servers;
                 file system; heterogeneous file system client types;
                 log-structured; network operating systems; OpenVMS
                 Alpha environment; ordered write-back model; Spiralog
                 file system",
  treatment =    "P Practical",
}

@Article{Whitaker:1996:DSS,
  author =       "Christian Whitaker and J. Stuart Bayley and Rod D. W.
                 Widdowson",
  title =        "Design of the Server for the {Spiralog File System}",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "2",
  pages =        "15--31",
  month =        oct,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJM02/DTJM02AH.HTM;
                 http://www.digital.com:80/info/DTJM02/DTJM02HM.HTM;
                 http://www.digital.com:80/info/DTJM02/DTJM02P8.PS;
                 http://www.digital.com:80/info/DTJM02/DTJM02PF.PDF;
                 http://www.digital.com:80/info/DTJM02/DTJM02SC.TXT",
  abstract =     "The Spiralog file system uses a log-structured,
                 on-disk format inspired by the Sprite log-structured
                 file system (LFS) from the University of California,
                 Berkeley. Log-structured file systems promise a number
                 of performance and functional benefits over
                 conventional, update-in-place file systems, such as the
                 Files-11 file system developed for the OpenVMS
                 operating system or the FFS file system on the UNIX
                 operating system. The Spiralog server combines
                 log-structured technology with more traditional B-tree
                 technology to provide a general server abstraction. The
                 B-tree mapping mechanism uses write-ahead logging to
                 give stability and recoverability guarantees. By
                 combining write-ahead logging with a log-structured,
                 on-disk format, the Spiralog server merges file system
                 data and recovery log records into a single, sequential
                 write stream.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6120 (File organisation); C6150N (Distributed systems
                 software)",
  keywords =     "B-tree; B-tree technology; file organisation; file
                 servers; file system; functional benefits;
                 log-structured; mapping mechanism; network operating
                 systems; on-disk format; recoverability; sequential
                 write stream; server; Spiralog file system; stability;
                 systems; tree data structures; UNIX operating system;
                 update-in-place file; write-ahead logging",
  treatment =    "P Practical",
}

@Article{Green:1996:DFO,
  author =       "Russell J. Green and Alasdair C. Baird and J.
                 Christopher Davies",
  title =        "Designing a Fast, On-line Backup System for a
                 Log-structured File System",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "2",
  pages =        "32--45",
  month =        oct,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJM03/DTJM03AH.HTM;
                 http://www.digital.com:80/info/DTJM03/DTJM03HM.HTM;
                 http://www.digital.com:80/info/DTJM03/DTJM03P8.PS;
                 http://www.digital.com:80/info/DTJM03/DTJM03PF.PDF;
                 http://www.digital.com:80/info/DTJM03/DTJM03SC.TXT",
  abstract =     "The Spiralog file system for the OpenVMS operating
                 system incorporates a new technical approach to backing
                 up data. The fast, low-impact backup can be used to
                 create consistent copies of the file system while
                 applications are actively modifying data. The Spiralog
                 backup uses the log-structured file system to solve the
                 backup problem. The physical on-disk structure allows
                 data to be saved at near-maximum device throughput with
                 little processing of data. The backup system achieves
                 this level of performance without compromising
                 functionality such as incremental backup or fast,
                 selective restore.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6120 (File organisation); C6150N (Distributed systems
                 software)",
  keywords =     "data structures; file system; functionality;
                 incremental backup; log-structured file system;
                 near-maximum device throughput; network operating
                 systems; online backup system; OpenVMS operating
                 system; physical on-disk; selective restore; Spiralog;
                 structure",
  treatment =    "P Practical",
}

@Article{Howell:1996:ISF,
  author =       "Mark A. Howell and Julian M. Palmer",
  title =        "Integrating the {Spiralog File System} into the
                 {OpenVMS} Operating System",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "2",
  pages =        "46--56",
  month =        oct,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJM04/DTJM04AH.HTM;
                 http://www.digital.com:80/info/DTJM04/DTJM04HM.HTM;
                 http://www.digital.com:80/info/DTJM04/DTJM04P8.PS;
                 http://www.digital.com:80/info/DTJM04/DTJM04PF.PDF;
                 http://www.digital.com:80/info/DTJM04/DTJM04SC.TXT",
  abstract =     "Digital's Spiralog file system is a log-structured
                 file system that makes extensive use of write-back
                 caching. Its technology is substantially different from
                 that of the traditional OpenVMS file system, known as
                 Files-11. The integration of the Spiralog file system
                 into the OpenVMS environment had to ensure that
                 existing applications ran unchanged and at the same
                 time had to expose the benefits of the new file system.
                 Application compatibility was attained through an
                 emulation of the existing Files-11 file system
                 interface. The Spiralog file system provides an ordered
                 write-behind cache that allows applications to control
                 write order through the barrier primitive. This form of
                 caching gives the benefits of write-back caching and
                 protects data integrity.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6120 (File organisation); C6150N (Distributed systems
                 software); C6130S (Data security)",
  corpsource =   "OpenVMS Eng. Group, Livingston, UK",
  keywords =     "application compatibility; behind cache; cache
                 storage; caching; data integrity; Files-11; log-;
                 network operating systems; OpenVMS file; OpenVMS
                 operating system; ordered write-; Spiralog file system;
                 storage management; structured file system; system;
                 write-back caching",
  treatment =    "P Practical",
}

@Article{Harvey:1996:EOA,
  author =       "Michael S. Harvey and Leonard S. Szubowicz",
  title =        "Extending {OpenVMS} for 64-bit Addressable Virtual
                 Memory",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "2",
  pages =        "57--71",
  month =        oct,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJM05/DTJM05AH.HTM;
                 http://www.digital.com:80/info/DTJM05/DTJM05HM.HTM;
                 http://www.digital.com:80/info/DTJM05/DTJM05P8.PS;
                 http://www.digital.com:80/info/DTJM05/DTJM05PF.PDF;
                 http://www.digital.com:80/info/DTJM05/DTJM05SC.TXT",
  abstract =     "The OpenVMS operating system recently extended its
                 32-bit virtual address space to exploit the Alpha
                 processor's 64-bit virtual addressing capacity while
                 ensuring binary compatibility for 32- bit nonprivileged
                 programs. This 64-bit technology is now available both
                 to OpenVMS users and to the operating system itself.
                 Extending the virtual address space is a fundamental
                 evolutionary step for the OpenVMS operating system,
                 which has existed within the bounds of a 32-bit address
                 space for nearly 20 years. We chose an asymmetric
                 division of virtual address extension that allocates
                 the majority of the address space to applications by
                 minimizing the address space devoted to the kernel.
                 Significant scaling issues arose with respect to the
                 kernel that dictated a different approach to page table
                 residency within the OpenVMS address space. The paper
                 discusses key scaling issues, their solutions, and the
                 resulting layout of the 64-bit virtual address space.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6120 (File organisation); C6150N (Distributed systems
                 software)",
  keywords =     "64-bit addressable virtual memory; binary;
                 compatibility; network operating systems; OpenVMS
                 extension; OpenVMS operating system; page table
                 residency; scaling issues; virtual address extension;
                 virtual address space; virtual storage",
  treatment =    "P Practical",
}

@Article{Benson:1996:OMP,
  author =       "Thomas R. Benson and Karen L. Noel and Richard E.
                 Peterson",
  title =        "The {OpenVMS} Mixed Pointer Size Environment",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "2",
  pages =        "72--82",
  month =        oct,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJM06/DTJM06AH.HTM;
                 http://www.digital.com:80/info/DTJM06/DTJM06HM.HTM;
                 http://www.digital.com:80/info/DTJM06/DTJM06P8.PS;
                 http://www.digital.com:80/info/DTJM06/DTJM06PF.PDF;
                 http://www.digital.com:80/info/DTJM06/DTJM06SC.TXT",
  abstract =     "A central goal in the implementation of 64-bit
                 addressing on the OpenVMS operating system was to
                 provide upward- compatible support for applications
                 that use the existing 32- bit address space. Another
                 guiding principle was that mixed pointer sizes are
                 likely to be the rule rather than the exception for
                 applications that use 64-bit address space. These
                 factors drove several key design decisions in the
                 OpenVMS Calling Standard and programming interfaces,
                 the DEC C language support, and the system services
                 support. For example, self-identifying 64-bit
                 descriptors were designed to ease development when
                 mixed pointer sizes are used. DEC C support makes it
                 easy to mix pointer sizes and to recompile for uniform
                 32- or 64-bit pointer sizes. OpenVMS system services
                 remain fully upward compatible, with new services
                 defined only where required or to enhance the usability
                 of the huge 64-bit address space. This paper describes
                 the approaches taken to support the mixed pointer size
                 environment in these areas. The issues and rationale
                 behind these OpenVMS and DEC C solutions are presented
                 to encourage others who provide library interfaces to
                 use a consistent programming interface approach.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6150N (Distributed systems software); C6120 (File
                 organisation); C5620 (Computer networks and
                 techniques)",
  keywords =     "64 bit; 64-bit addressing; 64-bit descriptors; Calling
                 Standard; data structures; DEC C language; DEC C
                 solutions; interfaces; library; mixed; network
                 operating systems; open systems; OpenVMS; OpenVMS mixed
                 pointer size environment; OpenVMS operating system;
                 pointer size environment; programming interface;
                 programming interfaces; support; system services
                 support; upward-compatible support",
  treatment =    "P Practical",
}

@Article{Smith:1996:APS,
  author =       "Duane A. Smith",
  title =        "Adding 64-bit Pointer Support to a 32-bit Run-time
                 Library",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "2",
  pages =        "83--95 (or 83--93??)",
  month =        oct,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJM07/DTJM07AH.HTM;
                 http://www.digital.com:80/info/DTJM07/DTJM07HM.HTM;
                 http://www.digital.com:80/info/DTJM07/DTJM07P8.PS;
                 http://www.digital.com:80/info/DTJM07/DTJM07PF.PDF;
                 http://www.digital.com:80/info/DTJM07/DTJM07SC.TXT",
  abstract =     "A key component of delivering 64-bit addressing on the
                 OpenVMS Alpha operating system, version 7.0, is an
                 enhanced C run-time library that allows application
                 programmers to allocate and utilize 64-bit virtual
                 memory from their C programs. This C run-time library
                 includes modified programming interfaces and additional
                 new interfaces yet ensures upward compatibility for
                 existing applications. The same run-time library
                 supports applications that use only 32- bit addresses,
                 only 64-bit addresses, or a combination of both. Source
                 code changes are not required to utilize 64-bit
                 addresses, although recompilation is necessary. The new
                 techniques used to analyze and modify the interfaces
                 are not specific to the C run-time library and can
                 serve as a guide for engineers who are enhancing their
                 programming interfaces to support 64-bit pointers.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6120 (File organisation); C6150N (Distributed systems
                 software)",
  keywords =     "32 bit; 32-bit run-time library; 64 bit; 64-bit
                 addressing; 64-bit pointer; application; data
                 structures; interfaces; libraries; modified
                 programming; network operating systems; OpenVMS Alpha
                 operating system; programmers; software; version 7.0;
                 virtual memory; virtual storage",
  treatment =    "P Practical",
}

@Article{Lawton:1996:BHM,
  author =       "James V. Lawton and John J. Brosnan and Morgan P.
                 Doyle and Seosamh D. {\'O}Riord{\'a}in and Timothy G.
                 Reddin",
  title =        "Building a high-performance message-passing system for
                 {MEMORY CHANNEL} clusters",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "2",
  pages =        "96--116",
  month =        oct,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJM08/DTJM08AH.HTM;
                 http://www.digital.com:80/info/DTJM08/DTJM08HM.HTM;
                 http://www.digital.com:80/info/DTJM08/DTJM08P8.PS;
                 http://www.digital.com:80/info/DTJM08/DTJM08PF.PDF;
                 http://www.digital.com:80/info/DTJM08/DTJM08SC.TXT",
  abstract =     "The new MEMORY CHANNEL for PCI cluster interconnect
                 technology developed by Digital (based on technology
                 from Encore Computer Corporation) dramatically reduces
                 the overhead involved in intermachine communication.
                 Digital has designed a software system, the TruCluster
                 MEMORY CHANNEL Software version 1.4 product, that
                 provides fast user-level access to the MEMORY CHANNEL
                 network and can be used to implement a form of
                 distributed shared memory. Using this product, Digital
                 has built a low-level message- passing system that
                 reduces the communications latency in a MEMORY CHANNEL
                 cluster to less than 10 microseconds. This system can,
                 in turn, be used to easily build the communications
                 libraries that programmers use to parallelize
                 scientific codes. Digital has demonstrated the
                 successful use of this message-passing system by
                 developing implementations of two of the most popular
                 of these libraries, Parallel Virtual Machine (PVM) and
                 Message Passing Interface (MPI).",
  acknowledgement = ack-nhfb,
  classcodes =   "C5220P (Parallel architecture); C6120 (File
                 organisation); C6150N (Distributed systems software)",
  keywords =     "access; clusters; communications latency;
                 communications libraries; Computer Corporation;
                 distributed shared memory; Encore; high-performance
                 message-passing system; intermachine communication;
                 Machine; MEMORY CHANNEL; message passing; Message
                 Passing Interface; Parallel Virtual; PCI cluster
                 interconnect technology; scientific codes; software;
                 storage management; system; TruCluster MEMORY CHANNEL
                 Software; user-level",
  treatment =    "P Practical",
}

@Article{Rozmovits:1996:DUI,
  author =       "Bernard A. Rozmovits",
  title =        "The Design of User Interfaces for Digital Speech
                 Recognition Software",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "2",
  pages =        "117--126",
  month =        oct,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJM09/DTJM09AH.HTM;
                 http://www.digital.com:80/info/DTJM09/DTJM09HM.HTM;
                 http://www.digital.com:80/info/DTJM09/DTJM09P8.PS;
                 http://www.digital.com:80/info/DTJM09/DTJM09PF.PDF;
                 http://www.digital.com:80/info/DTJM09/DTJM09SC.TXT",
  abstract =     "Digital Speech Recognition Software (DSRS) adds a new
                 mode of interaction between people and computers ---
                 speech. DSRS is a command and control application
                 integrated with the UNIX desktop environment. It
                 accepts user commands spoken into a microphone and
                 converts them into keystrokes. The project goal for
                 DSRS was to provide an easy-to-learn and easy-to-use
                 computer-user interface that would be a powerful
                 productivity tool. Making DSRS simple and natural to
                 use was a challenging engineering problem in user
                 interface design. Also challenging was the development
                 of the part of the interface that communicates with the
                 desktop and applications. DSRS designers had to solve
                 timing-induced problems associated with entering
                 keystrokes into applications at a rate much higher than
                 that at which people type. The DSRS project clarifies
                 the need to continue the development of improved speech
                 integration with applications as speech recognition and
                 text-to-speech technologies become a standard part of
                 the modern desktop computer.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6180N (Natural language processing); C1250C (Speech
                 recognition)",
  keywords =     "command and control application; digital speech
                 recognition software; engineering problem; integration;
                 interfaces; keystrokes; microphone; natural language
                 interfaces; speech; speech recognition; text-to-speech
                 technologies; timing-induced problems; UNIX desktop
                 environment; user; user commands; user interface
                 design; user interfaces design",
  treatment =    "P Practical",
}

@Article{Blake:1996:EId,
  author =       "Jane C. Blake",
  title =        "Editor's Introduction",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "3",
  pages =        "??--??",
  month =        "????",
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Oct 17 19:42:47 MDT 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com/info/DTJN00/v8n3-intro.htm",
  acknowledgement = ack-nhfb,
}

@Article{Nemeth:1996:F,
  author =       "Alan G. Nemeth",
  title =        "Foreword",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "3",
  pages =        "??--??",
  month =        "????",
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Oct 17 19:42:47 MDT 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com/info/DTJN00/v8n3-fore.htm",
  acknowledgement = ack-nhfb,
}

@Article{Harrington:1996:IPV,
  author =       "Daniel T. Harrington and James P. Bound and John J.
                 McCann and Matt Thomas",
  title =        "{Internet Protocol} version 6 and the {Digital UNIX}
                 implementation experience",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "3",
  pages =        "5--22",
  month =        dec,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v8n3/Internet_Protocol_Version_6_an_07jan1997DTJN01P8.ps;
                 http://www.digital.com:80/info/DTJN01/DTJN01AH.HTM;
                 http://www.digital.com:80/info/DTJN01/DTJN01HM.HTM;
                 http://www.digital.com:80/info/DTJN01/DTJN01P8.PS;
                 http://www.digital.com:80/info/DTJN01/DTJN01PF.PDF;
                 http://www.digital.com:80/info/DTJN01/DTJN01SC.TXT",
  acknowledgement = ack-nhfb,
  classcodes =   "B6150M (Protocols); B6210L (Computer communications);
                 B6150E (Multiple access communication); C5640
                 (Protocols); C5620W (Other computer networks)",
  keywords =     "Digital UNIX platform; Internet; Internet Protocol
                 version 6; multi-access systems; network layer
                 protocol; Protocol next generation; router; table size;
                 TCP/IP architecture; technical feasibility; transport
                 protocols",
  treatment =    "P Practical",
}

@Article{Burnet:1996:PCP,
  author =       "Maxwell M. Burnet and Robert M. Supnik",
  title =        "Preserving computing's past: restoration and
                 simulation",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "3",
  pages =        "23--38",
  month =        dec,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Sat Jul 16 18:53:33 2005",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v8n3/Preserving_Computings_Past_R_07jan1997DTJN02P8.ps;
                 http://artematrix.org/archive/computer/restoration.simulation.htm;
                 http://www.digital.com:80/info/DTJN02/DTJN02AH.HTM;
                 http://www.digital.com:80/info/DTJN02/DTJN02HM.HTM;
                 http://www.digital.com:80/info/DTJN02/DTJN02P8.PS;
                 http://www.digital.com:80/info/DTJN02/DTJN02PF.PDF;
                 http://www.digital.com:80/info/DTJN02/DTJN02SC.TXT",
  abstract =     "Restoration and simulation are two techniques for
                 preserving computing systems of historical interest. In
                 computer restoration, historical systems are returned
                 to working condition through repair of broken
                 electrical and mechanical subsystems, if necessary
                 substituting current parts for the original ones. In
                 computer simulation, historical systems are re-created
                 as software programs on current computer systems. In
                 each case, the operating environment of the original
                 system is presented to a modern user for inspection or
                 analysis. This differs with computer conservation,
                 which preserves historical systems in their current
                 state, usually one of disrepair. The authors argue that
                 an understanding of computing's past is vital to
                 understanding its future, and thus that restoration,
                 rather than just conservation, of historic systems is
                 an important activity for computer technologists.",
  acknowledgement = ack-nhfb,
  classcodes =   "C0200 (General computer topics); C7430 (Computer
                 engineering)",
  keywords =     "computer restoration; computer simulation; computing's
                 past; digital computers; historical interest; history;
                 machines; maintenance engineering; virtual; working
                 condition",
  treatment =    "P Practical",
}

@Article{Celmaster:1996:MFR,
  author =       "William N. Celmaster",
  title =        "Modern {Fortran} revived as the language of scientific
                 parallel computing",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "3",
  pages =        "39--45",
  month =        dec,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v8n3/Modern_Fortran_Revived_as_the_07jan1997DTJN03P8.ps;
                 http://www.digital.com:80/info/DTJN03/DTJN03AH.HTM;
                 http://www.digital.com:80/info/DTJN03/DTJN03HM.HTM;
                 http://www.digital.com:80/info/DTJN03/DTJN03P8.PS;
                 http://www.digital.com:80/info/DTJN03/DTJN03PF.PDF;
                 http://www.digital.com:80/info/DTJN03/DTJN03SC.TXT",
  acknowledgement = ack-nhfb,
  classcodes =   "C6140D (High level languages); C5440 (Multiprocessing
                 systems); C6150N (Distributed systems software); C5220P
                 (Parallel architecture)",
  keywords =     "architecture-specific; architecture-specific codes;
                 data parallel algorithms; distributed memory systems;
                 distributed-memory parallelism; FORTRAN; Fortran 90;
                 High Performance Fortran; large analytic codes;
                 optimizations; parallel algorithms;
                 program-multiple-data algorithms; scientific parallel
                 computing; shared memory systems; shared-memory
                 parallelism; single-",
  treatment =    "P Practical",
}

@Article{Piantedosi:1996:PMT,
  author =       "Judith A. Piantedosi and Archana S. Sathaye and D.
                 John Shakshober",
  title =        "Performance measurement of {TruCluster} systems under
                 the {TPC-C} benchmark",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "3",
  pages =        "46--57",
  month =        dec,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v8n3/Performance_Measurement_of_Tru_07jan1997DTJN04P8.ps;
                 http://www.digital.com:80/info/DTJN04/DTJN04AH.HTM;
                 http://www.digital.com:80/info/DTJN04/DTJN04HM.HTM;
                 http://www.digital.com:80/info/DTJN04/DTJN04P8.PS;
                 http://www.digital.com:80/info/DTJN04/DTJN04PF.PDF;
                 http://www.digital.com:80/info/DTJN04/DTJN04SC.TXT",
  acknowledgement = ack-nhfb,
  classcodes =   "C5440 (Multiprocessing systems); C5470 (Performance
                 evaluation and testing)",
  keywords =     "AlphaServer 8400 5/350; benchmark; Corporation;
                 database applications; Digital Equipment Corporation;
                 distributed lock manager; distributed raw disk service;
                 MEMORY CHANNEL interconnect; Oracle; parallel
                 processing; Parallel Server database; performance
                 evaluation; performance measurement; TPC-C; TruCluster
                 systems; UNIX servers",
  treatment =    "A Application; P Practical",
}

@Article{Kawaf:1996:PAU,
  author =       "Tareef Kawaf and D. John Shakshober and David C.
                 Stanley",
  title =        "Performance analysis using very large memory on the
                 64-bit {AlphaServer} system",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "3",
  pages =        "58--65",
  month =        dec,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v8n3/Performance_Analysis_Using_Ver_07jan1997DTJN05P8.ps;
                 http://www.digital.com:80/info/DTJN05/DTJN05AH.HTM;
                 http://www.digital.com:80/info/DTJN05/DTJN05HM.HTM;
                 http://www.digital.com:80/info/DTJN05/DTJN05P8.PS;
                 http://www.digital.com:80/info/DTJN05/DTJN05PF.PDF;
                 http://www.digital.com:80/info/DTJN05/DTJN05SC.TXT",
  acknowledgement = ack-nhfb,
  classcodes =   "C5440 (Multiprocessing systems); C5470 (Performance
                 evaluation and testing); C1180 (Optimisation
                 techniques); C5630 (Networking equipment)",
  keywords =     "64-bit AlphaServer; Alpha 21164; AlphaServer 8400
                 multiprocessor system; database technology;
                 microprocessor; multiprocessing systems; network
                 servers; optimisation; optimization techniques;
                 performance analysis; performance evaluation; scaling;
                 symmetric multiprocessing systems; system; very large
                 memory",
  treatment =    "A Application; P Practical",
}

@Article{Chiu:1996:BCS,
  author =       "Dah Ming Chiu and David M. Griffin",
  title =        "Building collaboration software for the {Internet}",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "3",
  pages =        "66--74",
  month =        dec,
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v8n3/Building_Collaboration_Softwar_07jan1997DTJN06P8.ps;
                 http://www.digital.com:80/info/DTJN06/DTJN06AH.HTM;
                 http://www.digital.com:80/info/DTJN06/DTJN06HM.HTM;
                 http://www.digital.com:80/info/DTJN06/DTJN06P8.PS;
                 http://www.digital.com:80/info/DTJN06/DTJN06PF.PDF;
                 http://www.digital.com:80/info/DTJN06/DTJN06SC.TXT",
  acknowledgement = ack-nhfb,
  classcodes =   "C7100 (Business and administration); C7210
                 (Information services and centres); C5620W (Other
                 computer networks); C6130G (Groupware)",
  keywords =     "access; AltaVista Forum; built-in database; calendar
                 applications; capability; collaboration software;
                 control; document sharing; groupware; indexing;
                 information systems; Internet; network computing;
                 public domain; search; shared; software; version 2.0
                 software; World Wide Web",
  treatment =    "A Application; P Practical",
}

@Article{Cvetanovic:1996:APC,
  author =       "Zarka Cvetanovic and Darrel D. Donaldson",
  title =        "{AlphaServer} 4100 Performance Characterization",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "4",
  pages =        "3--??",
  month =        "????",
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Oct 17 19:42:47 MDT 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJO01/DTJO01AH.HTM;
                 http://www.digital.com:80/info/DTJO01/DTJO01HM.HTM;
                 http://www.digital.com:80/info/DTJO01/DTJO01P8.PS;
                 http://www.digital.com:80/info/DTJO01/DTJO01PF.PDF;
                 http://www.digital.com:80/info/DTJO01/DTJO01SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Steinman:1996:ACP,
  author =       "Maurice B. Steinman and George J. Harris and Andrej
                 Kocev and Virginia C. Lamere and Roger D. Pannell",
  title =        "The {AlphaServer} 4100 Cached Processor Module
                 Architecture and Design",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "4",
  pages =        "21--??",
  month =        "????",
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Oct 17 19:42:47 MDT 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJO02/DTJO02AH.HTM;
                 http://www.digital.com:80/info/DTJO02/DTJO02HM.HTM;
                 http://www.digital.com:80/info/DTJO02/DTJO02P8.PS;
                 http://www.digital.com:80/info/DTJO02/DTJO02PF.PDF;
                 http://www.digital.com:80/info/DTJO02/DTJO02SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Dame:1996:ALC,
  author =       "Roger A. Dame",
  title =        "The {AlphaServer} 4100 Low-cost Clock Distribution
                 System",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "4",
  pages =        "38--??",
  month =        "????",
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Oct 17 19:42:47 MDT 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJO03/DTJO03AH.HTM;
                 http://www.digital.com:80/info/DTJO03/DTJO03HM.HTM;
                 http://www.digital.com:80/info/DTJO03/DTJO03P8.PS;
                 http://www.digital.com:80/info/DTJO03/DTJO03PF.PDF;
                 http://www.digital.com:80/info/DTJO03/DTJO03SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Herdeg:1996:DIA,
  author =       "Glenn A. Herdeg",
  title =        "Design and Implementation of the {AlphaServer} 4100
                 {CPU} and Memory Architecture",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "4",
  pages =        "48--??",
  month =        "????",
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Oct 17 19:42:47 MDT 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJO04/DTJO04AH.HTM;
                 http://www.digital.com:80/info/DTJO04/DTJO04HM.HTM;
                 http://www.digital.com:80/info/DTJO04/DTJO04P8.PS;
                 http://www.digital.com:80/info/DTJO04/DTJO04PF.PDF;
                 http://www.digital.com:80/info/DTJO04/DTJO04SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Duncan:1996:HPI,
  author =       "Samuel H. Duncan and Craig D. Keefer and Thomas A.
                 McLaughlin",
  title =        "High Performance {I/O} Design in the {AlphaServer}
                 4100 Symmetric Multiprocessing System",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "4",
  pages =        "61--??",
  month =        "????",
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Oct 17 19:42:47 MDT 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJO05/DTJO05AH.HTM;
                 http://www.digital.com:80/info/DTJO05/DTJO05HM.HTM;
                 http://www.digital.com:80/info/DTJO05/DTJO05P8.PS;
                 http://www.digital.com:80/info/DTJO05/DTJO05PF.PDF;
                 http://www.digital.com:80/info/DTJO05/DTJO05SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Gokhale:1996:DOO,
  author =       "Vipin V. Gokhale",
  title =        "Design of the 64-bit Option for the {Oracle7}
                 Relational Database Management System",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "4",
  pages =        "76--??",
  month =        "????",
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Oct 17 19:42:47 MDT 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJO06/DTJO06AH.HTM;
                 http://www.digital.com:80/info/DTJO06/DTJO06HM.HTM;
                 http://www.digital.com:80/info/DTJO06/DTJO06P8.PS;
                 http://www.digital.com:80/info/DTJO06/DTJO06PF.PDF;
                 http://www.digital.com:80/info/DTJO06/DTJO06SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Rengarajan:1996:VCS,
  author =       "T. K. Rengarajan and Maxwell Berenson and Ganesan
                 Gopal and Bruce McCready and Sapan Panigrahi and
                 Srikant Subramaniam and Marc B. Sugiyama",
  title =        "{VLM} Capabilities of the {Sybase System 11 SQL}
                 Server",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "4",
  pages =        "83--??",
  month =        "????",
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Oct 17 19:42:47 MDT 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJO07/DTJO07AH.HTM;
                 http://www.digital.com:80/info/DTJO07/DTJO07HM.HTM;
                 http://www.digital.com:80/info/DTJO07/DTJO07P8.PS;
                 http://www.digital.com:80/info/DTJO07/DTJO07PF.PDF;
                 http://www.digital.com:80/info/DTJO07/DTJO07SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Hunter:1996:MEA,
  author =       "David P. Hunter and Eric B. Betts",
  title =        "Measured Effects of Adding Byte and Word Instructions
                 to the {Alpha} Architecture",
  journal =      j-DEC-TECH-J,
  volume =       "8",
  number =       "4",
  pages =        "89--??",
  month =        "????",
  year =         "1996",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Oct 17 19:42:47 MDT 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJO08/DTJO08AH.HTM;
                 http://www.digital.com:80/info/DTJO08/DTJO08HM.HTM;
                 http://www.digital.com:80/info/DTJO08/DTJO08P8.PS;
                 http://www.digital.com:80/info/DTJO08/DTJO08PF.PDF;
                 http://www.digital.com:80/info/DTJO08/DTJO08SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Hookway:1997:DFC,
  author =       "R. J. Hookway and M. A. Herdeg",
  title =        "{DIGITAL FX!32}: Combining Emulation and Binary
                 Translation",
  journal =      j-DEC-TECH-J,
  volume =       "9",
  number =       "1",
  pages =        "3--??",
  month =        "????",
  year =         "1997",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Oct 17 19:42:47 MDT 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJP01/DTJP01AH.HTM;
                 http://www.digital.com:80/info/DTJP01/DTJP01HM.HTM;
                 http://www.digital.com:80/info/DTJP01/DTJP01P8.PS;
                 http://www.digital.com:80/info/DTJP01/DTJP01PF.PDF;
                 http://www.digital.com:80/info/DTJP01/DTJP01SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Treggiari:1997:DFM,
  author =       "L. P. Treggiari",
  title =        "Development of the {Fortran Module Wizard} within
                 {DIGITAL Visual Fortran}",
  journal =      j-DEC-TECH-J,
  volume =       "9",
  number =       "1",
  pages =        "13--??",
  month =        "????",
  year =         "1997",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Oct 17 19:42:47 MDT 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJP02/DTJP02AH.HTM;
                 http://www.digital.com:80/info/DTJP02/DTJP02HM.HTM;
                 http://www.digital.com:80/info/DTJP02/DTJP02P8.PS;
                 http://www.digital.com:80/info/DTJP02/DTJP02PF.PDF;
                 http://www.digital.com:80/info/DTJP02/DTJP02SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Fillo:1997:AIM,
  author =       "M. Fillo and R. B. Gillett",
  title =        "Architecture and Implementation of {MEMORY CHANNEL
                 2}",
  journal =      j-DEC-TECH-J,
  volume =       "9",
  number =       "1",
  pages =        "27--??",
  month =        "????",
  year =         "1997",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Oct 17 19:42:47 MDT 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJP03/DTJP03AH.HTM;
                 http://www.digital.com:80/info/DTJP03/DTJP03HM.HTM;
                 http://www.digital.com:80/info/DTJP03/DTJP03P8.PS;
                 http://www.digital.com:80/info/DTJP03/DTJP03PF.PDF;
                 http://www.digital.com:80/info/DTJP03/DTJP03SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Parodi:1997:IOD,
  author =       "J. H. Parodi and F. W. Burgher",
  title =        "Integrating {ObjectBroker} and {DCE} Security",
  journal =      j-DEC-TECH-J,
  volume =       "9",
  number =       "1",
  pages =        "42--??",
  month =        "????",
  year =         "1997",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Oct 17 19:42:47 MDT 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJP04/DTJP04AH.HTM;
                 http://www.digital.com:80/info/DTJP04/DTJP04HM.HTM;
                 http://www.digital.com:80/info/DTJP04/DTJP04P8.PS;
                 http://www.digital.com:80/info/DTJP04/DTJP04PF.PDF;
                 http://www.digital.com:80/info/DTJP04/DTJP04SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Montanaro:1997:CRM,
  author =       "James Montanaro and Richard T. Witek and Krishna Anne
                 and Andrew J. Black and Elizabeth M. Cooper and Daniel
                 W. Dobberpuhl and Paul M. Donahue and Jim Eno and
                 Gregory W. Hoeppner and David Kruckemyer and Thomas H.
                 Lee and Peter C. M. Lin and Liam Madden and Daniel
                 Murray and Mark H. Pearce and Sribalan Santhanam and
                 Kathryn J. Snyder and Ray Stephany and Stephen C.
                 Thierauf",
  title =        "A {160-MHz}, 32-b, {0.5-W CMOS RISC} Microprocessor",
  journal =      j-DEC-TECH-J,
  volume =       "9",
  number =       "1",
  pages =        "49--??",
  month =        "????",
  year =         "1997",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Oct 17 19:42:47 MDT 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJP05/DTJP05AH.HTM;
                 http://www.digital.com:80/info/DTJP05/DTJP05HM.HTM;
                 http://www.digital.com:80/info/DTJP05/DTJP05P8.PS;
                 http://www.digital.com:80/info/DTJP05/DTJP05PF.PDF;
                 http://www.digital.com:80/info/DTJP05/DTJP05SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Blake:1997:EI,
  author =       "Jane C. Blake",
  title =        "Editor's Introduction",
  journal =      j-DEC-TECH-J,
  volume =       "9",
  number =       "2",
  pages =        "??--??",
  month =        "????",
  year =         "1997",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Oct 17 19:42:47 MDT 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJQ00/v9n2-intro.htm",
  acknowledgement = ack-nhfb,
}

@Article{Alden:1997:ATU,
  author =       "Kenneth F. Alden and Edward P. Wobber",
  title =        "The {AltaVista} Tunnel: Using the {Internet} to Extend
                 Corporate Networks",
  journal =      j-DEC-TECH-J,
  volume =       "9",
  number =       "2",
  pages =        "5--??",
  month =        "????",
  year =         "1997",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Nov 05 15:38:20 1998",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJQ01/DTJQ01AH.HTM;
                 http://www.digital.com:80/info/DTJQ01/DTJQ01HM.HTM;
                 http://www.digital.com:80/info/DTJQ01/DTJQ01P8.PS;
                 http://www.digital.com:80/info/DTJQ01/DTJQ01PF.PDF;
                 http://www.digital.com:80/info/DTJQ01/DTJQ01SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Smith:1997:PPN,
  author =       "J. Mark Smith and Sean G. Doherty and Oliver J. Leahy
                 and Dermot M. Tynan",
  title =        "Protecting a Private Network: The {AltaVista}
                 Firewall",
  journal =      j-DEC-TECH-J,
  volume =       "9",
  number =       "2",
  pages =        "17--??",
  month =        "????",
  year =         "1997",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Oct 17 19:42:47 MDT 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJQ02/DTJQ02AH.HTM;
                 http://www.digital.com:80/info/DTJQ02/DTJQ02HM.HTM;
                 http://www.digital.com:80/info/DTJQ02/DTJQ02P8.PS;
                 http://www.digital.com:80/info/DTJQ02/DTJQ02PF.PDF;
                 http://www.digital.com:80/info/DTJQ02/DTJQ02SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Shipman:1997:DIS,
  author =       "Nick Shipman",
  title =        "Developing {Internet} Software: {AltaVista} Mail",
  journal =      j-DEC-TECH-J,
  volume =       "9",
  number =       "2",
  pages =        "23--??",
  month =        "????",
  year =         "1997",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Oct 17 19:42:47 MDT 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJQ03/DTJQ03AH.HTM;
                 http://www.digital.com:80/info/DTJQ03/DTJQ03HM.HTM;
                 http://www.digital.com:80/info/DTJQ03/DTJQ03P8.PS;
                 http://www.digital.com:80/info/DTJQ03/DTJQ03PF.PDF;
                 http://www.digital.com:80/info/DTJQ03/DTJQ03SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Weiss:1997:DPW,
  author =       "Kenneth M. Weiss and Kenneth A. House",
  title =        "{DIGITAL Personal Workstations}: The Design of
                 High-performance, Low-cost {Alpha} Systems",
  journal =      j-DEC-TECH-J,
  volume =       "9",
  number =       "2",
  pages =        "45--??",
  month =        "????",
  year =         "1997",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Oct 17 19:42:47 MDT 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJQ04/DTJQ04AH.HTM;
                 http://www.digital.com:80/info/DTJQ04/DTJQ04HM.HTM;
                 http://www.digital.com:80/info/DTJQ04/DTJQ04P8.PS;
                 http://www.digital.com:80/info/DTJQ04/DTJQ04PF.PDF;
                 http://www.digital.com:80/info/DTJQ04/DTJQ04SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Schumann:1997:DMC,
  author =       "Reinhard C. Schumann",
  title =        "Design of the {21174 Memory Controller} for {DIGITAL
                 Personal Workstations}",
  journal =      j-DEC-TECH-J,
  volume =       "9",
  number =       "2",
  pages =        "57--??",
  month =        "????",
  year =         "1997",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Oct 17 19:42:47 MDT 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJQ05/DTJQ05AH.HTM;
                 http://www.digital.com:80/info/DTJQ05/DTJQ05HM.HTM;
                 http://www.digital.com:80/info/DTJQ05/DTJQ05P8.PS;
                 http://www.digital.com:80/info/DTJQ05/DTJQ05PF.PDF;
                 http://www.digital.com:80/info/DTJQ05/DTJQ05SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Anonymous:1998:EI,
  author =       "Anonymous",
  title =        "{Editor}'s Introduction",
  journal =      j-DEC-TECH-J,
  volume =       "9",
  number =       "3",
  pages =        "??--??",
  month =        "????",
  year =         "1998",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Oct 17 19:42:47 MDT 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJR00/v9n3-intro.htm",
  acknowledgement = ack-nhfb,
}

@Article{Lary:1998:F,
  author =       "Richard Lary",
  title =        "Foreword",
  journal =      j-DEC-TECH-J,
  volume =       "9",
  number =       "3",
  pages =        "??--??",
  month =        "????",
  year =         "1998",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Oct 17 19:42:47 MDT 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJR00/v9n3-fore.htm",
  acknowledgement = ack-nhfb,
}

@Article{Ham:1998:RAB,
  author =       "William E. Ham",
  title =        "Recent Advances in Basic Physical Technology for
                 Parallel {SCSI}: {UltraSCSI}, Expanders, Interconnect,
                 and Hot Plugging",
  journal =      j-DEC-TECH-J,
  volume =       "9",
  number =       "3",
  pages =        "6--??",
  month =        "????",
  year =         "1998",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Oct 17 19:42:47 MDT 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJR01/DTJR01AH.HTM;
                 http://www.digital.com:80/info/DTJR01/DTJR01HM.HTM;
                 http://www.digital.com:80/info/DTJR01/DTJR01P8.PS;
                 http://www.digital.com:80/info/DTJR01/DTJR01PF.PDF;
                 http://www.digital.com:80/info/DTJR01/DTJR01SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Higginson:1998:DRC,
  author =       "Peter L. Higginson and Michael C. Shand",
  title =        "Development of Router Clusters to Provide Fast
                 Failover in {IP} Networks",
  journal =      j-DEC-TECH-J,
  volume =       "9",
  number =       "3",
  pages =        "32--??",
  month =        "????",
  year =         "1998",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Oct 17 19:42:47 MDT 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJR02/DTJR02AH.HTM;
                 http://www.digital.com:80/info/DTJR02/DTJR02HM.HTM;
                 http://www.digital.com:80/info/DTJR02/DTJR02P8.PS;
                 http://www.digital.com:80/info/DTJR02/DTJR02SC.TXT;
                 http://www.digital.com:80/info/DTJR02/DTJR02PF.PDF",
  acknowledgement = ack-nhfb,
}

@Article{Palmer:1998:SDC,
  author =       "Lawrence G. Palmer and Ricky S. Palmer",
  title =        "Shared Desktop: {A} Collaborative Tool for Sharing
                 {3-D} Applications among Different Window Systems",
  journal =      j-DEC-TECH-J,
  volume =       "9",
  number =       "3",
  pages =        "42--??",
  month =        "????",
  year =         "1998",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Oct 17 19:42:47 MDT 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJR03/DTJR03AH.HTM;
                 http://www.digital.com:80/info/DTJR03/DTJR03HM.HTM;
                 http://www.digital.com:80/info/DTJR03/DTJR03P8.PS;
                 http://www.digital.com:80/info/DTJR03/DTJR03PF.PDF;
                 http://www.digital.com:80/info/DTJR03/DTJR03SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{LaFrance-Linden:1998:CDH,
  author =       "David C. P. LaFrance-Linden",
  title =        "Challenges in Designing an {HPF} Debugger",
  journal =      j-DEC-TECH-J,
  volume =       "9",
  number =       "3",
  pages =        "50--??",
  month =        "????",
  year =         "1998",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Fri Oct 17 19:42:47 MDT 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJR04/DTJR04AH.HTM;
                 http://www.digital.com:80/info/DTJR04/DTJR04HM.HTM;
                 http://www.digital.com:80/info/DTJR04/DTJR04P8.PS;
                 http://www.digital.com:80/info/DTJR04/DTJR04PF.PDF;
                 http://www.digital.com:80/info/DTJR04/DTJR04SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Cohn:1998:OAE,
  author =       "R. S. Cohn and D. W. Goodwin and P. G. Lowney",
  title =        "Optimizing {Alpha} Executables on {Windows NT} with
                 {Spike}",
  journal =      j-DEC-TECH-J,
  volume =       "9",
  number =       "4",
  pages =        "3--??",
  month =        "????",
  year =         "1998",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Nov 5 15:34:11 MST 1998",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJS01/DTJS01AH.HTM;
                 http://www.digital.com:80/info/DTJS01/DTJS01HM.HTM;
                 http://www.digital.com:80/info/DTJS01/DTJS01P8.PS;
                 http://www.digital.com:80/info/DTJS01/DTJS01PF.PDF;
                 http://www.digital.com:80/info/DTJS01/DTJS01SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Balle:1998:AMA,
  author =       "Simon M. Balle and Susanne C. {Steely, Jr.}",
  title =        "Analyzing Memory Access Patterns of Programs on
                 {Alpha}-based Architectures",
  journal =      j-DEC-TECH-J,
  volume =       "9",
  number =       "4",
  pages =        "21--32",
  month =        "????",
  year =         "1998",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Nov 5 15:34:11 MST 1998",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJS02/DTJS02AH.HTM;
                 http://www.digital.com:80/info/DTJS02/DTJS02HM.HTM;
                 http://www.digital.com:80/info/DTJS02/DTJS02P8.PS;
                 http://www.digital.com:80/info/DTJS02/DTJS02PF.PDF;
                 http://www.digital.com:80/info/DTJS02/DTJS02SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Notel:1998:OAV,
  author =       "Karen L. Notel and Nitin Y. Karkhanis",
  title =        "{OpenVMS Alpha} 64-bit Very Large Memory Design",
  journal =      j-DEC-TECH-J,
  volume =       "9",
  number =       "4",
  pages =        "33--48",
  month =        "????",
  year =         "1998",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Nov 5 15:34:11 MST 1998",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJS03/DTJS03AH.HTM;
                 http://www.digital.com:80/info/DTJS03/DTJS03HM.HTM;
                 http://www.digital.com:80/info/DTJS03/DTJS03P8.PS;
                 http://www.digital.com:80/info/DTJS03/DTJS03PF.PDF;
                 http://www.digital.com:80/info/DTJS03/DTJS03SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Lipchak:1998:PHG,
  author =       "Benjamin N. Lipchak and Thomas Frisinger and Karen L.
                 Bircsak and Keith L. Comeford and Michael I.
                 Rosenblum",
  title =        "{PowerStorm 4DT}: {A} High-performance Graphics
                 Software Architecture",
  journal =      j-DEC-TECH-J,
  volume =       "9",
  number =       "4",
  pages =        "49--60",
  month =        "????",
  year =         "1998",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Nov 5 15:34:11 MST 1998",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJS04/DTJS04AH.HTM;
                 http://www.digital.com:80/info/DTJS04/DTJS04HM.HTM;
                 http://www.digital.com:80/info/DTJS04/DTJS04P8.PS;
                 http://www.digital.com:80/info/DTJS04/DTJS04PF.PDF;
                 http://www.digital.com:80/info/DTJS04/DTJS04SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Walsh:1998:DFA,
  author =       "Robert J. Walsh",
  title =        "{DART}: Fast Application-level Networking via
                 Data-copy Avoidance",
  journal =      j-DEC-TECH-J,
  volume =       "9",
  number =       "4",
  pages =        "61--75",
  month =        "????",
  year =         "1998",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Nov 5 15:34:11 MST 1998",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJS05/DTJS05AH.HTM;
                 http://www.digital.com:80/info/DTJS05/DTJS05HM.HTM;
                 http://www.digital.com:80/info/DTJS05/DTJS05P8.PS;
                 http://www.digital.com:80/info/DTJS05/DTJS05PF.PDF;
                 http://www.digital.com:80/info/DTJS05/DTJS05SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Morgan:1998:I,
  author =       "C. Robert Morgan",
  title =        "Introduction",
  journal =      j-DEC-TECH-J,
  volume =       "10",
  number =       "1",
  pages =        "??--??",
  month =        "????",
  year =         "1998",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Tue Mar 16 07:25:08 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJT00/v10n1-intro.htm",
  acknowledgement = ack-nhfb,
}

@Article{Blake:1998:F,
  author =       "William C. Blake",
  title =        "Foreword",
  journal =      j-DEC-TECH-J,
  volume =       "10",
  number =       "1",
  pages =        "??--??",
  month =        "????",
  year =         "1998",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Tue Mar 16 07:25:08 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJT00/v10n1-fore.htm",
  acknowledgement = ack-nhfb,
}

@Article{Casmira:1998:TCW,
  author =       "Jason P. Casmira and David P. Hunter and David R.
                 Kaeli",
  title =        "Tracing and Characterization of {Windows NT}-based
                 System Workloads",
  journal =      j-DEC-TECH-J,
  volume =       "10",
  number =       "1",
  pages =        "6--21",
  month =        "????",
  year =         "1998",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Tue Mar 16 07:25:08 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJT01/DTJT01HM.HTM;
                 http://www.digital.com:80/info/DTJT01/DTJT01P8.PS;
                 http://www.digital.com:80/info/DTJT01/DTJT01PF.PDF;
                 http://www.digital.com:80/info/DTJT01/DTJT01SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Itzkowitz:1998:ATI,
  author =       "Avrum E. Itzkowitz and Lois D. Foltan",
  title =        "Automatic Template Instantiation in {DIGITAL C++}",
  journal =      j-DEC-TECH-J,
  volume =       "10",
  number =       "1",
  pages =        "22--31",
  month =        "????",
  year =         "1998",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Tue Mar 16 07:25:08 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJT02/DTJT02HM.HTM;
                 http://www.digital.com:80/info/DTJT02/DTJT02P8.PS;
                 http://www.digital.com:80/info/DTJT02/DTJT02PF.PDF;
                 http://www.digital.com:80/info/DTJT02/DTJT02SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Rotithor:1998:MAC,
  author =       "Hemant G. Rotithor and Kevin W. Harris and Mark W.
                 Davis",
  title =        "Measurement and Analysis of {C} and {C++}
                 Performance",
  journal =      j-DEC-TECH-J,
  volume =       "10",
  number =       "1",
  pages =        "32--47",
  month =        "????",
  year =         "1998",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Tue Mar 16 07:25:08 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJT03/DTJT03HM.HTM;
                 http://www.digital.com:80/info/DTJT03/DTJT03P8.PS;
                 http://www.digital.com:80/info/DTJT03/DTJT03PF.PDF;
                 http://www.digital.com:80/info/DTJT03/DTJT03SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Reinig:1998:AAD,
  author =       "August G. Reinig",
  title =        "Alias Analysis in the {DEC C} and {DIGITAL C++}
                 Compilers",
  journal =      j-DEC-TECH-J,
  volume =       "10",
  number =       "1",
  pages =        "48--57",
  month =        "????",
  year =         "1998",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Tue Mar 16 07:25:08 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJT04/DTJT04HM.HTM;
                 http://www.digital.com:80/info/DTJT04/DTJT04P8.PS;
                 http://www.digital.com:80/info/DTJT04/DTJT04PF.PDF;
                 http://www.digital.com:80/info/DTJT04/DTJT04SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Sweany:1998:COS,
  author =       "Philip H. Sweany and Steven M. Carr and Brett L.
                 Huber",
  title =        "Compiler Optimization for Superscalar Systems: Global
                 Instruction Scheduling without Copies",
  journal =      j-DEC-TECH-J,
  volume =       "10",
  number =       "1",
  pages =        "58--70",
  month =        "????",
  year =         "1998",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Tue Mar 16 07:25:08 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJT05/DTJT05HM.HTM;
                 http://www.digital.com:80/info/DTJT05/DTJT05P8.PS;
                 http://www.digital.com:80/info/DTJT05/DTJT05PF.PDF;
                 http://www.digital.com:80/info/DTJT05/DTJT05SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Hall:1998:MMP,
  author =       "Mary W. Hall and Jennifer M. Anderson and Saman P.
                 Amarasinghe and Brian R. Murphy and Shih-Wei Liao and
                 Eduoard Bugnion and Monica S. Lam",
  title =        "Maximizing Multiprocessor Performance with the {SUIF}
                 Compiler",
  journal =      j-DEC-TECH-J,
  volume =       "10",
  number =       "1",
  pages =        "71--80",
  month =        "????",
  year =         "1998",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Tue Mar 16 07:25:08 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJT06/DTJT06HM.HTM;
                 http://www.digital.com:80/info/DTJT06/DTJT06P8.PS;
                 http://www.digital.com:80/info/DTJT06/DTJT06PF.PDF;
                 http://www.digital.com:80/info/DTJT06/DTJT06SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Brender:1998:DOC,
  author =       "Ronald F. Brender and Jeffrey E. Nelson and Mark E.
                 Arsenault",
  title =        "Debugging Optimized Code: Concepts and Implementation
                 on {DIGITAL Alpha} Systems",
  journal =      j-DEC-TECH-J,
  volume =       "10",
  number =       "1",
  pages =        "81--99",
  month =        "????",
  year =         "1998",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Tue Mar 16 07:25:08 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJT07/DTJT07HM.HTM;
                 http://www.digital.com:80/info/DTJT07/DTJT07P8.PS;
                 http://www.digital.com:80/info/DTJT07/DTJT07PF.PDF;
                 http://www.digital.com:80/info/DTJT07/DTJT07SC.TXT",
  acknowledgement = ack-nhfb,
}

@Article{Brender:1998:ABD,
  author =       "Ronald F. Brender",
  title =        "An Annotated Bibliography on Debugging Optimized
                 Code",
  journal =      j-DEC-TECH-J,
  volume =       "10",
  number =       "1",
  pages =        "??--??",
  month =        "????",
  year =         "1998",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Tue Mar 16 07:25:08 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJT07/DTJT07BIHM.HTM",
  acknowledgement = ack-nhfb,
}

@Article{McKeeman:1998:DTS,
  author =       "William M. McKeeman",
  title =        "Differential Testing for Software",
  journal =      j-DEC-TECH-J,
  volume =       "10",
  number =       "1",
  pages =        "100--107",
  month =        "????",
  year =         "1998",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Tue Mar 16 07:25:08 1999",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "http://www.digital.com:80/info/DTJT08/DTJT08HM.HTM;
                 http://www.digital.com:80/info/DTJT08/DTJT08P8.PS;
                 http://www.digital.com:80/info/DTJT08/DTJT08PF.PDF;
                 http://www.digital.com:80/info/DTJT08/DTJT08SC.TXT",
  acknowledgement = ack-nhfb,
}