name: Ron Sercely establishment: Convex Computer Corporation email: sercely@convex.com telephone: 214.497.4667 date sent: 29/Nov/95 date benchmarked (DD/MMM/YY): 29/Nov/95 benchmark suite and revision: Parkbench message passing library and revision: PVM 3.3.10.2 (to be released Dec '95) benchmark: synch1 problem size (if applicable): number of nodes: 4 file number if one of a group: manufacturer: Convex model number: Exemplar 1200 cpu: HP-PA/RISC 7200 cpu speed (MHz): 120Mhz fpu: integrated primary cache: 250kbytes secondary cache: none other cache: none memory: 512M disk and connection: SCSI interconnect type: shared memory switching: none other hardware: none operating system and version: SPP-UX 3.2 (to be released Dec ' 95) compilers, libraries and versions: Convex FORTRAN, vs 9.3 /usr/convex/cc/cc: 6.3 compiler switches: -O2 (full optimization) additional tuning parameters: other software: additional comments: PARKBENCH Version 1.0 *** UNOFFICIAL release test package *** This run was with unmodified code PVM_ARCH = CSPP PVMBUFSIZE=1000000 ================================================= === === === GENESIS / PARKBENCH Parallel Benchmarks === === === === SYNCH1 === === === === Program: Barrier Syncronisation Rate === === Version: PVM3 + Fortran 77 === === Author: Roger W. Hockney === === === ================================================= ----------------------------------- SYNCH1: Global Synch - Barrier Rate ----------------------------------- Result Summary -------------- Number of processors (nodes) = 4 Time per barrier = 1.240E+03 us Barrier Rate = 8.066E-04 Mbarr/s -----------------------------------