%T Introduction to Burroughs Scientific Processor

%I Goodyear Aerospace
%T STARAN APPLE Programming Manual
%R GER-1583B
%D September 1974

%T Distributed Processing Workshop, Part I, Sessions 0, 1, 2
%J Computer Architecture News, (SIGARCH)
%I ACM
%V 5
%N 5
%D December 1976
%P 10-28
%X Good dialogue between researchers studying multiprocessors and networks.
Workshop was at Brown U, sponsored by DOD and NSF.
Systems covered include: C.mmp, Cm*, HXDP, MININET, NSW, ICOPS, DCS,
and a number of smaller systems internal to the organizations that produced
them. Follow up was in CAN v5, #6, Feb. 1977.

%T Distributed Processing Workshop Transcript, Part II, Sessions 3, 4, and 5
%J Computer Architecture News (SIGARCH)
%I ACM
%V 5
%N 6
%D February 1977
%P 8-24
%X Well covered interaction between researchers doing distributed processing
from multiprocessors to networks.  Part I was in CAN, v5, #5, Dec. 1976.

%I Scientific American
%T Special issue on microelectronics
%J Scientific American
%V 237
%N 3
%P 62-245
%D September 1977

%T Array Processors Give Computers `Number Crunching' Power
%J Digital Design
%V 8
%N 7
%D July 1978
%P 84-85

%T Array processor does shape recognition
%J Electronic Design
%V 26
%N 18
%D September 1 1978
%P 146

%T Programmable Array Processors Offer New Options
%V Digital Design
%V 9
%N 7
%D July 1979
%P 70-74

%T Parallel processing architecture and parallel algorithms for NATO
conference
%I NATO Advanced Studies Institute
%B New Advances in Distributed Computer Systems
%C BONAS, France
%D June 1981

%T A file server for a network of low cost personal microcomputers
%J Software-Pract. & Exper. (GB)
%V 12
%N 11
%P 1051-1068
%O 10 REFS
Treatment PRACTICAL
%D 1982
%K computer networks operating systems protocols
computer networks OS file server low cost personal microcomputers
file store local area network communication protocol interface code simple
%X This paper describes a file server which was specifically designed to
be the file store for a number of personal microcomputers attached to
a local area network. In particular these personal machines (clients)
have a very limited amount of memory with which to interface to the
file server. The filing system supports an hierarchical directory
structure with a simple capability-like protection mechanism. Both
the operations and communication protocol supported by the file
server are chosen to make a client computer's interface code simple
Special attention is given to speeding up certain frequently used
processor-bound operations. Various aspects of the implementation are
discussed, together with some suggested improvements

%I Queen Elizabeth College (QEC)
%T Title unknown
%J \fRSubmitted for\fP International Conferences on Electron Image Processing
%C York
%D July 1982

%T CONVEX Architecture Handbook
%R Document No. 080-000120-000
%I CONVEX Computer Corporation
%V Version 1.0
%D 1984

%T SIGCOMM 84 Tutorials and Symposium on Communications, Archiectures
and Protocols
%J Comput. Commun. Rev. (USA)
%V 14
%N 2
%C Montreal, Quebec, Canada
%D 6-8 June 1984
Treatment APPLICATIONS, PRACTICAL
%K computer networks network topology protocols
Universe Network protocol design multicasting specification
verification local area networks network topology satellites performance
%X The following topics were dealt with: the Universe Network; protocol
design methodologies; multicasting; protocol specification and
verification; local area networks; network topology and protocol
testing; satellites performance. 37 papers were presented, of which
36 are published in full in the present proceedings and one as
abstract only. Abstracts of individual papers can be found under the
relevant classification codes in this or other issues

%T Proceedings of the IEEE INFOCOM 84
%C San Francisco, CA, USA
%I IEEE Comput. Soc. Press, (IEEE Cat. No. 84CH2012-3), ISBN: 0-8186-0530-8
%D 9-12 April 1984
%K protocols reliability telecommunication networks
LAN medium access units computer network reliability flow
congestion control multiaccess protocols distributed control algorithms
high performance LAN architectures LAN performance evaluation
distributed database systems integrated services networks CCITT activities
routing packet switched networks formal methods communication protocols
packet radio networks computer communication systems
%X The following topics are dealt with: design of LAN medium access
units; computer network reliability; flow and congestion control;
multiaccess protocols; distributed control algorithms;
high-performance LAN architectures; LAN performance evaluation;
distributed database systems; performance of integrated services
networks; CCITT activities; routing in packet-switched networks;
formal methods for communication protocols; packet radio networks;
and design of computer communication systems. 48 papers were
presented, all of which are published in full in the present
proceedings. Abstracts of individual papers can be found under the
relevant classification codes in this or other issues

%T Caltech Concurrent Computation Project Programmer's Manual
%D August 1984
%I California Institute of Technology
%C Pasadena, CA
%K Caltech Cosmic Cube, hypercube, C^3P, NNCP

%T Caltech Concurrent Computation Project - List of memos/ papers
%R Hm 0
%D Currently 1984
%I California Institute of Technology
%C Pasadena, CA
%K Caltech Cosmic Cube, hypercube, C^3P

%T A Model for the Basic Block Protocol of the Cambridge Ring
%J IEEE-TSE
%V SE-11
%N 1
%P 130-135 
%D January 1985

%A E. G. Coffman, Jr. (ed.)
%T Computer and Job-Shop Scheduling
%I John Wiley and Sons
%C New York
%D 1976

%A Curtis Abbott
%T Intervention Schedules for Real-Time Programming
%J IEEE Transactions on Software Engineering
%V SE-10
%N 3
%D May 1984
%P 268-274
%K Concurrency, multiprogramming, nonpreemptive scheduling,
parallel programming, programming models, real-time programming,
real-time systems, systems implementation

%A N. A. Abel
%A P. B. Budnik
%A et al.
%T TRANQUIL: A Language for an Array Processing Computer
%J Conf. Proc. 1969 SJCC
%P 57-73
%V 35
%I AFIPS Press
%D 1969

%A Harold Abelson
%T Lower Bounds on Information Transfer in Distributed Computations
%J Symposium on Foundations of Computer Science
%D October 1978
%P 151-158
%X Also, see the JACM paper of same title, v 27, #2, April 1980, pp 384-392.

%T Lower Bounds on Information Transfer in Distributed Computations
%A Harold Abelson
%J Journal of the Association for Computing Machinery
%V 27
%N 2
%D April 1980
%P 384-392
%X Aargh! Very mathematical treatment.
Also published in the Symp. on Foundations of Computer Science, Oct 1978.

%A Oliver Aberth
%T A Multiple Computer Linkage
%J IEEE Transactions on Computers
%V C-18
%N 12
%D December 1969
%P 1132-1134
%K digital computer, memory unit positioner, multiple computer system,
shared memory, switched memory units
Short notes, logical design

%A M. Abida
%A J. M. Andrade
%T Update Consistency and Parallelism in Distributed Databases
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 180-187
%K
%O Distributed databases

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T On conflict-Free Permutations in Multi-Stage Interconnection Networks
%A Mohammad A. Abidi
%A Dharma P. Agrawal
%P 159
%O Interconnection Networks
%X Summary only.

%A Jacob A. Abraham
%A Daniel P. Siewiorek
%T An Algorithm for the Accurate Reliability Evaluation of Triple Modular
Redundancy Networks
%J IEEE Transactions on Computers
%V C-23
%N 7
%D July 1974
%P 682-692
%K Coherent system, N-tuple modular redundancy, reliability modeling,
serial cell, triple modular redundancy (TMR).
Special issue on fault tolerant computing

%A S. M. Abraham
%A Y. K. Dalal
%T Techniques for decentralized management of distributed systems
%J Compcon Spring '80. VLSI: new architectural horizons
%P 430-437
%D 25-28 Feb. 1980
%C San Francisco,CA, USA
%I IEEE, New York, USA
xvi+504 pp.
%O 19 Refs.
treatment: applic, general,review
%K e.d.p. management multiprocessing systems
decentralized management distributed systems loosely coupled system
%X Considers techniques for dealing with dynamic reconfiguration that allow
a distributed system to be managed in a decentralized fashion at reasonable
cost. In particular, how binding strategies impact the degree to which the
system can automatically cope with dynamic reconfiguration is discussed.

%A Seth Abraham
%A D. D. Gajski
%T A communication algorithm for a wafer scale integrated multiprocessor
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 147-154
%K VLSI, WSI, routing algorithms, tree flooding,
%O fault tolerance
%X A proposal for communications between processing elements.  A 16x16
processor is simulated.

%A Marshall Abrams
%A Ira W. Cotton, eds.
%T Computer Networks: A Tutorial (4th edition)
%I IEEE
%D 1984
%X This IEEE tutorial's papers are either enumerated or of such low-level
content as to be uninteresting to most: e.g. a paper on what a modem is...
It also lacks some significant papers such as the original Ethernet paper.

%A S. Abramsky
%T Reasoning About Concurrent Systems
%B Distributed Computing - Part V Modelling and Verification
%E Fred B. Chambers
%E David A. Duce
%E Gillian P. Jones
%I Academic Press
%S APIC Studies in Data Processing
%V 20
%D 1984
%P 307-319

%A Samson Abramsky
%A Richard Bornat
%T Pascal-m: a Language for Loosely Coupled Distributed Systems
%E Y. Paker
%E J.-P. Jerjus
%B Distributed Computing Systems (Synchronization, Control and Communication)
%I Academic Press
%D 1983
%P 163-189
%K Pascal-m, [mail box].

%A N. Abramson
%T The Aloha system
%B Computer-Communication Networks
%E N. Abramson
%E Frank Kuo
%I Prentice-Hall
%C Englewood Cliffs, New Jersey
%D 1973
%P 501-518

%A N. Abramson
%A Frank Kuo
%T Computer-Communication Networks
%I Prentice-Hall
%C Englewood Cliffs, New Jersey
%D 1973

%T Vectorization of a Penalty Function Algorithm for Well Scheduling
%A I. Absar
%J CYBER 200 Applications Seminar
%R NASA Conference Publication 2295
%D October 1983
%E J. Patrick Gary, Compiler
%I NASA Goddard Space Flight Center
%C Greenbelt, Maryland
%P 363-370

%T On Input/Output Speed-Up in Tightly-Coupled Multiprocessors
%A Walid Abu-Sufah
%A Harlan Husmann
%A David Kuck
%I University of Illinois
%C Urbana-Champaign, IL
%R UIUCDCS-R-84-1182
%D August 1984

%A Walid Abu-Sufah
%A Alex Y. Kwok
%T Performance Prediction Tools for Cedar: A Multiprocessor Supercomputer
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K Multiprocessor Performance, Cedar performance prediction package (CPPP),
Parafrase, Tcedar, Cedar simulator CSIM,
%C Boston, MA
%P 406-413

%A A. S. Acampora
%A M. G. Hluchyj
%A C. D. Tsao
%T A centralized-bus architecture for local area networks
%J IEEE International Conference on Communications: Integrating
Communication for World Progress (ICC '83)
%C Boston, MA, USA
%P 932-938
%V 2
%O 13 Refs
Treatment APPLICATIONS, PRACTICAL.
%D 19-22 June 1983.
%K communication networks computer networks data communication systems.
circuit switching data communication networks centralized bus architecture
local area networks
access protocol real time synchronous data voice administration
maintenance bus contention packet switching remote concentrators
optical fibers.
%X A local area network architecture based upon a centrally located
short bus is described. This architecture enjoys several distinct
advantages relative to bus architectures of a distributed nature.
Among these are the ability to operate the short bus at high data
rates and traffic loads, independent of the geographical separation
among interconnected devices, a simple media access protocol that
permits the integration of widely disparate traffic types, including
real-time synchronous data and voice, and centralized administration
and maintenance. The bus contention mechanism results in a flexible
distributed scheduling of packets that not only provides low
contention delay under heavy traffic load conditions, but also
permits the integration of circuit-and packet-switching features on
a common bus. Traffic is collected by a system of geographically
distributed remote concentrators that interconnect with the centrally
located short bus by means of high capacity point-to-point links such
as optical fibers. With its modular construction, the centralized-bus
architecture provides necessary flexibility to serve new needs and
take advantage of new technologies.

%A A. S. Acampora
%A M. G. Hluchyj
%A C. D. Tsao
%T Performance of a centralized-bus local area network
%J Local Networks. Distributed Office and Factory Systems. Proceedings
of Localnet '83
%C New York, USA
%I Online Publications, Pinner, England xii+524
%P 159-169
%O 7 Refs
Treatment PRACTICAL.
%D 27-29 June 1983
%K computer networks data communication systems packet switching.
centralized bus local area network performance media access scheme
packet transmissions packet switching.
%X The performance of the media access scheme employed by a
centralized-bus local area network is examined. This scheme, owing to
the short centralized bus, achieves a perfect scheduling of packet
transmissions. That is, there are neither destructive collisions nor
periods when the bus is idle with packets awaiting transmission.
Furthermore, the scheduling of packet transmission is both
distributed and flexible, allowing for multiple priority classes,
round-robin-like scheduling within a priority class, and even
integrated circuit-and packet switching. Performance comparisons are
made with respect to other popular contention schemes. The results
clearly show the superior performance of the proposed bus contention
scheme.

%A W. B. Ackerman
%T A Structure Memory for Data Flow Computers
%I Laboratory for Computer Science, MIT
%R TR-186
%C Cambridge, MA
%D August 1977

%A W. B. Ackerman
%T Data Flow Languages
%J AFIPS Proc. of the NCC
%V 48
%P 1087-1095
%I AFIPS Press
%D 1979
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%A W. B. Ackerman
%T Data flow languages
%J Computer
%V 15
%N 2
%D February 1982
%P 15-25
%K Recommended,
%X Very good summary of data flow, and changes made to
traditional languages to accommodate parallelism [e.g. outlawing side-effects]

%A William B. Ackerman
%T A Structure Processing Facility for Data Flow Computers
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 166-172
%K Algorithms: memory management, packet communication, tree structures,
%O Data Flow
%X Paper that proposed the SELECT and APPEND instructions and their
semantic implementation.  Memory management is performed: creation,
allocation, and collection.

%A William B. Ackerman
%A Jack B. Dennis
%T VAL \(em A Value Oriented Algorithmic Language
%R MIT Laboratory for Computer Science Tech. Report TR-218
%C MIT, Cambridge, MA
%D June 1979

%A William Beekley Ackerman
%T Efficient Implementation of Applicative Languages
%R MIT/LCS/TR-323, PhD thesis
%I MIT
%C Cambridge, MA
%D April 1984
%K applicative programming, parallel computation, optimizing compilers,
data flow computation

%Q ACM
%T Coping with the Imprecision of the Real World: An Interview with
Lofti A. Zadeh
%J Communications of the ACM
%V 27
%N 4
%D April 1984
%P 304-311
%K Fuzzy logic, AI
%X Indirectly references supercomputers and multiprocessors.
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984, pp. 602-609.

%A T. L. Adam
%A K. M. Chandy
%A J. Dickson
%T A Comparison of List Schedules for Parallel Processing Systems
%J Communications of the ACM
%V 17
%N 12
%D December 1974
%P 685-690

%A J. M. Adamo
%T PASCAL + CSP, Merging PASCAL and CSP in a parallel processing
oriented language
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 542-547
%K
%O High Level Languages for Distributed Processing

%A C. G. Adams
%T The array processor \(em an answer in search of a scientist's question
%J Proc. Soc. Photooptical Instrumentation Engineers
%V 149
%D 1978
%P 140-144

%A D. A. Adams
%T A computation model with data flow sequencing
%R Tech. Rep. CS 117
%I Computer Science Dept., Stanford Univ.
%C Stanford, CA
%D December 1968

%A Duane A. Adams
%E L. C. Hobbs
%E D. J. Theis
%E J. Trimble
%E H. Titus
%E I. Highberg
%T A Model for Parallel Computation
%B Parallel Processor Systems, Technologies, and Applications
%I Spartan Books
%C New York, NY
%D 1970
%P 311-333
%O Programming and software techniques

%A E. J. Adams
%A C. W. Lillie
%A D. H. Vines, Jr.
%T A Dataflow Methodology for Processing Distributed Queries
%J Computer Software and Applications Conference (COMPSAC80)
%I IEEE
%D October 1980
%P 281-287
%O Distributed systems

%T On the Number of Permutations Performable by the Augmented Data
Manipulator Network
%A George B. Adams, III
%A Howard Jay Siegel
%J IEEE Transactions on Computers
%V C-31
%N 4
%D April 1982
%P 270-277
%K Augmented Data Manipulator (ADM) network, Generalized Cube network,
parallel processing, PASM, permutation network, SIMD machines
Interconnection networks

%A George B. Adams, III
%A Howard Jay Siegel
%T The Extra Stage Cube: A Fault-Tolerant Interconnection Network for
Supersystems
%J IEEE Transactions on Computers
%V C-31
%N 5
%D May 1982
%P 443-454
%K Distributed processing, Extra Stage Cube, fault tolerance,
Generalized Cube, indirect binary n-cube, interconnection network,
omega, parallel processing, PASM, PUMPS, shuffle-exchange, supersystems
Special issue on supersystems
%X
Reproduced in the 1984 tutorial: "Interconnection Networks for parallel
and distributed processing" by Wu and Feng.

%A George B. Adams, III
%A Howard Jay Siegel
%T Modifications to improve the fault tolerance of the extra stage cube
interconnection network
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 169-173
%K multistaged network, single fault, two faults
%O fault tolerance

%A George B. Adams, III
%A Howard Jay Siegel
%T A survey of fault-tolerant multistage networks and comparison to the
extra stage cube
%J Seventeenth Hawaii Conference on System Sciences
%D January 1984
%P 268-277
%K Recommended,

%A George B. Adams
%A Robert L. Brown
%A Peter J. Denning
%T Report on an Evaluation Study of Data Flow Computation
%I RIACS, NASA Ames Research Center
%C Moffett Field, CA
%R RIACS TR 85.2
%D April 1985
%K VAL, CFD, AI, numeric supercomputing

%A L. Adams
%T Iterative Algorithms for Large Sparse Linear Systems on Parallel
Computers
%I University of Virginia
%R PhD thesis, (see also NASA CR-166027, Langley Research Center)
%D 1982

%A L. Adams
%A J. Ortega
%T A multi-color SOR method for parallel computation
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 53-56
%K
U of Va, Cyber 203/205, and NASA LaRC FEM
%O Numerical algorithms

%A L. Adams
%A R. G. Voigt
%T A methodology for exploiting parallelism in the finite element process
%r ICASE Report No. 83-33
%d September 9, 1983
%J Proceedings of the NATO Advanced Research Workshop on High Speed
Computation
%I NATO ASI Series
%V F7
%D June 1983
%C Julich, West Germany

%A L. Adams
%A R. G. Voigt
%T Design, development and use of the finite element machine
%r ICASE Report 83-56
%d October 21, 1983
%J Proceedings of the Conference on Large Scale Scientific Computations
%C University of Wisconsin, Madison, WI
%D May 1983
%I Academic Press

%A L. Adams
%A H. Jordan
%T Is SOR Color-Blind?
%I NASA Langley Research Center
%R ICASE Report No. 84-14
%D 1984

%A L. Adams
%T M-step Preconditioned Conjugate Gradient Methods
%J SIAM J. Sci. Stat. Comp.
%D 1985
%X To appear

%A Loyce Adams
%T An m-step preconditioned conjugate gradient method for parallel computation
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 36-43
%K
Cyber 203/205, FEM, ICASE
numerical algorithms

%A Loyce Adams
%A Thomas W. Crockett
%T Modeling Algorithm Execution Time on Processor Arrays
%J Computer
%I IEEE
%V 17
%N 7
%D July 1984
%P 38-43
%K Finite Element Machine (FEM), conjugate gradient method,
Hardware-software interface: effect on performance

%A T. A. Adams
%A K. A. Smith
%T The manipulation of raster-based topographic data on a parallel
processor
%C Durham
%I DAP Support Unit

%A T. A. Adams
%T A Raster Alternative for Ordnance Survey Digital Data
%I Univ. of Durhan
%J British Cartographic Society Special Publication
%V 1
%D 1982

%A Ikram E. Adbou
%T A pipeline machine for image processing applications
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 255-257
%K
images and speech

%A Y. Afek
%A E. Gafni
%T Election and Traversal in Unidirectional Networks
%J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing
%I ACM
%D August 1984

%A T. Agerwala
%A B. Lint
%T Communication in Parallel Algorithms for Boolean Matrix Multiplication
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 146-153
%O SIMD Architectures

%A T. Agerwala
%A B. Lint
%T Communication Issues in Parallel Algorithms and Systems
%J Computer Software and Applications Conference (COMPSAC78)
%I IEEE
%D November 1978
%P 583-588
%O communications issues in parallel and distributed systems

%A T. Agerwala
%A Arvind
%T Data Flow Systems
%J Computer
%V 15
%N 2
%P 10-13
%D 1982
%X Guest editor's introduction to the special issue on data flow systems.

%A T. K. Agerwala
%A K. M. Chandy
%A D. E. Lang
%T A Modeling Approach and Design Tool for Pipelined Central Processors
%J Proceedings of 6th Annual Symposium on Computer Architecture
%D 1979
%K University of Texas at Austin
%P 122-129

%A A. K. Agrawal
%A V. V. Vadakan
%T Jet Propulsion Local Area Network (JPLAN)
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 360-368
%K
%O Local Area Networks Applications

%A D. P. Agrawal
%A T. Feng
%A C. Wu
%T A Survey of Communication Processor Systems
%J Computer Software and Applications Conference (COMPSAC78)
%I IEEE
%D November 1978
%P 668-673
%O communication processes

%A D. P. Agrawal
%A S. C. Kim
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T On Non-equivalent Multistage Interconnection Networks
%P 234-237
%O Interconnection Networks

%A D. P. Agrawal
%T A Pipelined Pseudoparallel System Architecture for Motion Analysis
%J Proceedings of 8th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 9
%N 3
%D May 1981
%P 21-36
%O Architecture

%A D. P. Agrawal
%A B. K. Agrawal
%A G. C. Pathak
%T Graceful Fault tolerance in large networks of microcomputers
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 158-162
%K
%O Design of Fault Tolerant Systems

%A Dharma P. Agrawal
%T Testing and Fault Tolerance of Multistage Interconnection Networks
%J Computer
%I IEEE
%V 15
%N 4
%D April 1982
%P 41-53
%X
Reproduced in the 1984 tutorial: "Interconnection Networks for parallel
and distributed processing" by Wu and Feng.

%A Dharma P. Agrawal
%T Graphic theoretical analysis and design of multistage interconnection
networks
%J IEEE Transactions on Computers
%V C-32
%N 7
%D July 1983
%P 637-648
%K
Benes network, buddy property, conflict-free permutations, graph modeling,
multistage interconnection networks, number of passes, permutability,
single-stage network, topological equivalence.

%A Dharma P. Agrawal
%A Ja-Song Leu
%T Dynamic Accessibility Testing and Path Length Optimization of Multistage
Interconnection Networks
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 266-277
%K Adjacency matrix, average distance, connectivity, distance matrix,
dynamic full access capability, graph model, multiple passes,
multistage interconnection networks, reachability matrix, simulation,
single-stage interconnection networks, stuck-in-faults, switching element
%O Interconnection networks
%X
Reproduced in the 1984 tutorial: \fIInterconnection Network for parallel
and distributed processing\fP by Wu and Feng.

%T Parallel Sorting on the B-Hive Machine
%A Dharma P. Agrawal
%A Ja-Song Leu
%A Cai Tao Nie
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 862-864
%K Sorting

%T Dynamic Accessibility Testing and Path Length Optimization of
Multistage Interconnection Networks
%A Dharma P. Agrawal
%A Ja-Song Leu
%I IEEE Computer Society
%R
%D March 1985
%K Adjacency matrix, average distance, connectivity, dynamic full access
capability, graph model, multistage interconnection networks,
reachability matrix, stuck-at faults.

%T A Pipelined Pseudoparallel System Architecture for Real-Time Dynamic
Scene Analysis
%A Dharma P. Agrawal
%A Ramesh Jain
%J IEEE Transactions on Computers
%V C-31
%N 10
%D October
%P 952-962
%K Algorithmic steps, distributed control, dynamic scene analysis,
interconnection networks, interprocessor communication, pipelining,
problem partitioning, pseudoparallelism, real-time computation,
SIMD and MIMD,
Special issue on computer architecture for pattern analysis and image
database management

%T LSI/VLSI encapsulations considerations of token passing LANs
%A O. P. Agrawal
%B Wescon 83. Electronic Show and Convention
%C San Francisco, CA, USA
%D 8-11 Nov. 1983
%P 23/5/1-8
%O 0 REFS. Treatment PRACTICAL
%K data communication equipment local area networks standards
large scale integration VLSI
LSI VLSI encapsulations token passing LANs
standardization data communication office automation factory control
logical area networks standard bus ring

%T RAFT: A Recursive Algorithm for Fault Tolerance
%A Prathima Agrawal
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 814-821
%K Fault Tolerance and Reliability

%A Rakesh Agrawal
%A David W. Dewitt
%T Whither Hundreds of Processors in a Database Machine?
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 6.21-6.32
%O Database computers

%A Vishwani D. Agrawal
%T Comments on "An Approach to Highly Integrated Computer-Maintained
Cellular Arrays"
%J IEEE Transactions on Computers
%V C-28
%N 9
%D September 1979
%P 691-693
%K Cellular arrays, faults in logic arrays, percolation process,
programmable logic, random processes
Correspondence

%A Mustaque Ahamad
%A Arthur J. Bernstein
%T Multicast Communication in UNIX 4.BSD
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Interprocess communication, sockets, datagrams,
%P 80-87

%A M. Ahamod
%A A. J. Bernstein
%T An Application of Name Based Addressing to Low Level Distributed Algorithms
%J IEEE-TSE
%V SE-11
%N 1
%P 59-66 
%D January 1985

%A Ragnar Ahlberg
%A Bertil Gustafsson
%T A Note on Parallel Algorithms for Partial Differential Equations
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 93-98
%D 1984
%K Buneman, FACR(L), FFT, multigrid methods

%A A. M. Ahmed
%A Y. K. Abaas
%T Design and construction of an array processor
%J Microprocessors and Microsystems
%V 4
%N 3
%D April 1980
%P 83-88

%A H. Ahmed
%A J. Delosme
%A M. Mort
%T Highly Concurrent Computing Structures for Matrix Arithmetic and Signal
Processing
%J Computer
%V 15
%N 1
%P 65-82
%D January 1982
%X Special issue on highly parallel systems.

%A Sudhir R. Ahuga
%A Charles S. Roberts
%T An Associative/Parallel Processor for Partial Match Retrieval Using
Superimposed Codes
%J Proceedings of 7th Annual Symposium on Computer Architecture
%C La Baule, France
%D May 1980
%P 218-227
%K Recommended, Bell Laboratories

%A Mohan L. Ahuja
%A J. C. Browne
%A A. Silberschatz
%T Optimal throughput scheduling for distributed concurrent execution in
data base systems
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 251-254
%K two phase locking, transaction processing,
%O databases

%A S. R. Ahuja
%A J. R. Jump
%T A modular vector processing unit
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 220
%K
%O Multiple-microprocessors

%A S. R. Ahuja
%A J. R. Jump
%T A modular memory scheme for array processing
%J Proc. 4th Ann. Symp. Computer Architecture
%D 1977
%P 90-94

%A Sudhir R. Ahuja
%A Abhaya Asthana
%T A Multi-microprocessor architecture with hardware support for
communication and scheduling
%J Symposium on Architectural Support for Programming Languages and
Operating Systems, Computer Architecture News
%V 10
%N 2
%C Palo Alto, CA
%D March 1982
%P 205-210
%K Ring-bus
%O system support

%A H. Aisa
%A others
%T SPIRIT: A New Relational Database Computer Employing Functional-Distributed
Multi-Microprocessor Configuration
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 757-771
%O Distributed data bases processing and control

%A H. Aiso
%A K. Sakamura
%A T. Ichikawa
%T A Multi-Microprocessor Architecture for Associative Processing of Image
Data
%E Morio Onoe
%E Kendall Preston, Jr.
%E Azriel Rosenfeld
%B Real-Time/Parallel Computing: Image Analysis
%I Plenum Press
%C New York, NY
%D 1981
%P 203-217
%K ARES, SIMD, MIMD
%X Other descriptions of ARES can be founds in the 1977 and 1978 NCC
AFIPS Proc.

%T A Rectangular Logic Array
%A Sheldon B. Akers, Jr.
%J IEEE Transactions on Computers
%V C-21
%N 8
%D August 1972
%P 848-857
%K Cellular logic, combinational logic, logic arrays, symmetric functions,
universal logic elements,
Cellular logic

%T Evaluation of the Dedicated Hardware in FACOM Alpha
%A Haruo Akimoto
%A Sinichi Shimizu
%A Akio Shinagawa
%A Akira Hattori
%A Hiromu Hayashi
%J Digest of Papers, Compcon85 Thirtieth IEEE Computer society
International Conference
%I IEEE Computer Society
%D February 25-28, 1985
%P 366-369

%A D. G. Akl
%A D. T. Barnard
%A R. J. Doran
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Simulation and Analysis in Deriving Time and Storage Requirements
for a Parallel Alpha-Beta Algorithm
%P 231-234
%O Nonnumerical Algorithms and Applications

%T Optimal Parallel Algorithms for Computing Convex Hulls and for Sorting
%A S. G. Akl
%J Computing
%V 33
%N 1
%D 1984
%I Springer-Verlag

%T An Optimal Algorithm for Parallel Selection
%A S. G. Akl
%J Information Processing Letters
%V 19
%P 47-50
%D July 1984
%I North-Holland

%T An Adaptive and Cost-Optimal Parallel Algorithm for Minimum Spanning
Trees
%A Selim G. Akl
%I Dept. of Computing and Information Science, Queen's University
%C Kingston, Canada - Ontario
%R TR-85-164
%D December 1984

%A D. Al-Dabass
%A D. Rutherford
%T Simulation Techniques for Microprocessor-Based Parallel Architecture
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 125-131
%K simulation of hardware and software

%A D. Al-Dabass
%T Hardware aspects of array and pipeline processors for control applications
%J Computing Surveys, Reference Report
%V pt. 3
%D 1979
%P 2-13

%A R. Aleliunas
%T Randomized Parallel Communication
%T Language Constructs and Support Systems for Distributed Computing
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 60-72

%A P. Alexander
%T Array processors in image analysis applications
%J Proc. New Concepts Symp. and Workshop Detection and Identification
of Explosives
%D 1978
%P 365-370

%A P. Alexander
%T The array processor as an intelligent simulation co-processor
%J Proc. Summer Computer Simulation Conference
%D 1979
%P 2-13

%A P. Alexander
%T Array processors
%J Machine Design
%V 51
%N 19
%D August 1979
%P 87-92

%A P. Alexander
%T Enhancing ease of use of array processors through software design
%J Industrial Research/Development
%V 22
%N 5
%D May 1980
%P 111-114

%A Peter T. Alexander
%A Richard O. Parker
%T A comparison of a parallel and serial implementation of a large real time
problem
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 180-186
%K
%O PEPE

%A William Alexander
%A Richard Brice
%T Performance Modeling in the Design Process
%J National Computer Conference \(em Proceedings
%I AFIPS
%V 51
%D 1982
%P 257-262
%K LANL

%A M. Alford
%T Requirements for Distributed Data Processing Design
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 1-14
%O Design and requirements specification methodology

%A H. S. Alkhatib
%T The EENET: a broadband local area network
%J Interfaces Comput. (Switzerland)
%V 2
%N 4
%P 321-343
%O 99 REFS. Treatment PRACTICAL
%D Nov. 1984
%K local area networks broadband networks protocols
EENET broadband local area network real time applications formal specifications
simulation model protocols

%A S. J. Allan
%A A. E. Oldehoeft
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Loop Decomposition in the Translation of Sequential Languages to
Data Flow Languages
%P 139-140
%O

%A S. J. Allan
%A R. R. Oldehoeft
%T A stream definition for Von Neumann multiprocessors
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 303-306
%K
CoStU, HEP, VAL, SISAL,
expressing parallelism

%A Stephen J. Allan
%A Arthur E. Oldehoeft
%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T A Flow Analysis Procedure for the Translation of High Level Languages
to a Data Flow Language
%P 26-34
%O Languages and Translations

%T A Flow Analysis Procedure for the Translation of High-Level Languages
to a Data Flow Language
%A Stephen J. Allan
%A Arthur E. Oldehoeft
%J IEEE Transactions on Computers
%V C-29
%N 9
%D September 1980
%P 826-831
%K Data flow analysis, data flow computers, code generation, language
translation, parallel processing
%O Special issue on Parallel Processing

%A Stephen J. Allan
%A R. R. Oldehoeft
%T HEP SISAL: Parallel Functional Programming
%E Janusz S. Kowalik
%B Parallel MIMD Computation: HEP Supercomputer and Its Applications
%I MIT Press
%C Cambridge, MA
%D 1985
%P 123-150
%K Programming and languages, dataflow, VAL,
%X Short syntax of SISAL language.

%A R. W. Allard
%A K. A. Wolf
%A R. A. Temlin
%T Some Effects of the 6600 Computer on Language Structures
%J Comm. ACM
%V 7
%N ?
%P 112-119
%D 1964

%A J. E. Allchin
%T A suite of robust algorithms for maintaining replicated data using
weak consistency conditions
%J Proceedings Third Symposium on Reliability in Distributed Software
and Database Systems
%C Clearwater Beach, FL, USA
%P 47-56
%O 16 REFS. Treatment PRACTICAL
%I IEEE Comput. Soc. Press ISBN: 0-8186-0501-4
Silver Spring, MD, USA, p: viii+195
%D 17-19 Oct. 1983
%K data handling database management systems operating systems
distributed replicated data serial consistency data storage operating systems
real time systems mail systems naming servers appointment calendars
file dictionaries operating system load tables routing
distributed process control systems
message traffic overhead
%X A suite of decentralized robust algorithms for maintaining
distributed replicated data is presented. The algorithms do not
necessarily achieve serial consistency, but they are adequate for
many simple data storage problems in operating systems and real-time
systems. Applications which appear well suited to the suite include
mail systems, naming servers, appointment calendars, certain types of
file dictionaries, operating system load tables (e.g. routing), and
device state in distributed process control systems. The algorithms
assume an unreliable network and tolerate node failures, network
partitions, lost, duplicate, and out-of-order messages. High
availability and rapid response time are achieved by the algorithms,
which use resolution tables to state the outcome of information
conflicts caused by concurrent actions or unreliable nodes and
communication. Each algorithm is oriented toward different
application requirements and provides different degrees of message
traffic overhead and availability

%A Edward B. Allen
%A Arvid G. Larson
%T FORTRAN Extension Design Concepts for Associative Processing
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 186
%K
%O languages
%X Summary only.

%A J. Allen
%T Computer architecture for signal processing
%J Proc. IEEE
%V 63
%N 4
%D April 1975
%P 624-633

%A J. R. Allen
%A K. Kennedy
%T PFC: A Program to Convert FORTRAN to Parallel Form
%R MASC Technical Report 82-6
%I Dept. of Math. Sciences, Rice University
%D March 1982

%A James F. Allen
%T A Plan-Based Approach to Speech Act Recognition
%R Technical Report 131/79, PhD thesis
%I Department of Computer Science, University of Toronto
%C Toronto, Canada

%A John R. Allen
%A Ken Kennedy
%T PFC: A Program to Convert Fortran to Parallel Form
%J Proceedings of the IBM Conference on Parallel Computers and Scientific
Computations
%C Rome
%D 1982
%X
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%A John R. Allen
%A Ken Kennedy
%T Automatic Loop Interchange
%J Proc. SIGPLAN '84 Symposium on Compiler Construction, SIGPLAN Notices
%I ACM
%V 19
%N 6
%D June 1984
%P 233-246
%K vector processor, loop modification, parallel FORTRAN converter (PFC),
vectorization
%X Describes a tool for changing loops around of use in vector and
array computers.  The mechanism is fairly simple and is used to take advantage
of those codes which do not loop with efficiency [IBM sponsered this research].

%A John R. Allen
%A Ken Kennedy
%T A parallel programming environment
%J IEEE Software
%V 2
%N 4
%P 21-29
%D July 1985
%K automatic vectorization, synchronization, R^n project, parallel FORTRAN,
issue on complex parallel systems,
%X Automated techniques will not entirely free the programmer from thinking
about parallelism but will uncover natural parallelism in loops and
generate appropriate synchronization primitives to exploit that parallelism.

%A G. T. Almes
%A A. P. Black
%A E. D. Lazowska
%A J. D. Noe
%T The Eden System: A Technical Review
%J IEEE-TSE
%V SE-11
%N 1
%P 43-58 
%D January 1985

%A Guy T. Almes
%A Edward D. Lazowska
%T The Behavior of Ethernet-Like Computer Communications Networks
%J Proceedings of the 7th Symposium on Operating Systems Principles
%D December 1979
%P 66-81
%O Local Networks

%A David M. Alpern
%T A Simultaneous Pascal to Parallel Control Flow Compiler
%I MIT
%R BS thesis
%C Cambridge, MA
%D May 1983
%K
Concert project, simultaneous Pascal (SP)

%A P. A. Alsberg
%A C. R. Mills
%T The Structure of the ILLIAC IV Operating System
%J Proceedings of the 2nd Symposium on Operating Systems Principles
Operating Systems Review
%D October 1969
%P 92-96
%O system and techniques

%A M. Amamiya
%A N. Takahashi
%A others
%T An operating system kernel mechanism for the poly-processor system PPS-R
%J AFIPS Proc. of the NCC
%V 49
%D 1980
%P 147-156
%K Poly-Processor System R

%A M. Amamiya
%A R. Hasegawa
%A H. Mikami
%T List processing and data flow machine
%R Lecture note series, No. 436
%I Research Institute for Mathematical Sciences, Kyoto, Univ.
%C Japan
%D September 1980

%A Makoto Amamiya
%A Ryuzo Hasegawa
%A Osamu Nakamura
%A Hirohide Mikami
%T A List-Processing-Oriented Data Flow Machine Architecture
%J National Computer Conference \(em Proceedings
%I AFIPS
%V 51
%D 1982
%P 143-151
%K VALID

%A J. F. Amann
%T Applications of an array processor to data analysis in medium energy physics
%J IEEE Trans. Nuclear Science
%V NS-26
%N 4
%D August 1979
%P 4567-4568

%A H. Amano
%A T. Yoshida
%A H. Aiso
%T (SM)^2: Sparse Matrix Solving Machine
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%D 1983
%V 11
%N 3
%P 213-221
%O Performance evaluation of scientific computers

%A Hideharu Amano
%A Taisuke Boku
%A Tomohiro Kudoh
%A Hideo Aiso
%T (SM)^2-II: A New Version of the Sparse Matrix Solving Machine
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K Special Purpose Parallel Processors, Receiver Selected Multicast (RSM),
DLOPS data driven local operating system, contention analysis, MIMD
%C Boston, MA
%P 100-107

%A G. M. Amdahl
%A G. S. Blaauw
%A F. P. Brooks, Jr.
%T Architecture of the IBM System/360
%J IBM Journal of Research and Development
%D April 1974
%P 87-101

%A Gene M. Amdahl
%T Validity of the single processor approach to achieving large scale computing
capabilities
%J AFIPS Proc. of the SJCC
%V 31
%D 1967
%P 483-485

%A W. Ameling
%T The Development and Application of Digital Differential Analyzers
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 31-38

%A W. Ameling
%A H. Weber
%A S. Hoener
%T Parallel Processor Solutions for a Certain Class of Optimization Strategies
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 243-246
%K SMS 101,
parallel numerical algorithms

%A W. Ameling
%A S. Hoener
%A W. Roehder
%T Interconnection Structures for Parallel Systems
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 297-300
%K multi-processors and parallel computers
%X A simple look at multiplexing and bus structures.  It does not look at
cross bars or more sophisticated interconnections.

%T A Measurement Center for the NBS Local Area Computer Network
%A Paul D. Amer
%J IEEE Transactions on Computers
%V C-31
%N 8
%D August 1982
%P 723-729
%K Broadcast network, CSMA/CD, local network, measurement, multiple access
channel, performance evaluation
Distributed computing

%A Hany Ammar
%A Ruey-wen Liu
%T Hierarchical models for parallel processing systems using
generalized stochastic Petri nets
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 123-125
%O performance modeling

%A B. T. An
%A E. Gelenbe
%T Near Optimal Behavior of the Packet Switch Broadcast Channel
%J Computer Software and Applications Conference (COMPSAC78)
%I IEEE
%D November 1978
%P 728-733
%O distributed processing

%A A. L. Ananda
%A B. Srinivasan
%T An extensive bibliography on computer networks
%J Comput. Commun. Rev. (USA)
%V 13,14
%N 1,5
%P 78-98
%O 478 REFS
Treatment BIBLIOGRAPHY/LITERATURE SURVEY, GENERAL OR REVIEW
%D January 1984
%K computer networks reviews
data communication computer networks bibliography
%X One of the prime problems faced by the researchers and designers in a
rapidly expanding area is the complete awareness of the work carried
out by other researchers. The problem is compounded when technology
itself changes rapidly. This precisely is the case in the area of
data communication and computer networks. The compilation of this
bibliography attempts to collect various research papers that are
published in this area. In order to keep the collection within the
manageable proportions, only prominent, pioneering and historical
works appeared in well known journals which are easily available to
the researchers and implementers are reported. It is likely that
there might have been some omissions because of the selective nature
of the reference, but it does not imply that they are by no means
unimportant, one can hope that a complete compilation will be
available in the near future.
A crude copy was posted to the Usenet in August 1985.  We are trying to
integrate it into this file.

%A Mark S. Anastas
%A Russell F. Vaughan
%T Parallel Transition Machines
%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%P 76-85
%O Models and Analysis of Parallel Computation

%A D. A. Anderson
%T Operating Systems
%J Computer
%I IEEE
%V 14
%N 6
%D June 1981
%P 69-82
%X A survey, simpler than Computing Surveys articles.
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A D. W. Anderson
%A F. J. Sparacio
%A R. M. Tomasulo
%T The IBM System/360 Model 91:  Machine Philosophy and Instruction
Handling
%J IBM Journal of Research and Development
%V 11
%N 1
%D January 1967
%P 8-24

%A G. A. Anderson
%T Multiple Match resolvers:  A New Design Method
%J IEEE Transactions on computers
%D Dec. 1974
%P 1317-1320

%A George A Anderson
%A Richard Y. Kain
%T A content-addressed memory designed for data base applications
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 191-195
%K
%O STARAN and related topics

%A George A. Anderson
%T Interconnecting a distributed processor system for avionics
%J Proc. 1st Ann. Symp. on Computer Architecture
%D 1973

%A George A. Anderson
%A E. Douglas Jensen
%T Computer Interconnection: Taxonomy, Characteristics and Examples
%J Computing Surveys
%V 7
%N 4
%D December 1975
%P 197-213
%K distributed processing, distributed computers, multiprocessors,
multicomputer bus structures, computer networks
CR categories: 3.81, 4.32, 6.20
%X This paper presents a taxonomy for computer connections.
The taxonomy is based on interprocessor message handling and
hardware interconnection topology and hence makes ten basic
architectures.  The dimensions include: 1) transfer strategy
(direct or indirect), 2) transfer control method (centralized
or decentralized routing), 3) transfer path structure (shared or
dedicated) which result in structures from loops and stars
to complete interconnect.
Text reproduced with the permission of Prentice-Hall \(co 1980.
Reprinted in "Tutorial: Distributed Processing," IEEE,
compiled by Burt H. Liebowitz and John H. Carson, 1981, 3rd edition.

%A George L. Anderson
%A K. Bartlett
%T Hardware allocation of data system resources
%J Computer Design
%V 13
%N 7
%D July 1974
%P 89-97
%K multiprocessor architectures and operating systems.
%X Describes a multiprocessor architecture in which a set of microprocessors
are initially treated as a pool of resources and dynamically assigned specific
hardware functions as the need arises.  The concept of functional partitioning
exists here, but the assignment of functions to processors is on a temporary
rather than permanent basis.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Thomas Lee Anderson
%T The Design of a Multiprocessor Development System
%R MIT/LCS/TR-279
%I MIT, Cambridge, MA 02139
%D September 1982
%K
multiprocessor systems, segmented computer buses, parallel processing,
computer architecture

%T A Multiprocessing Approach to Compile-Time Symbol Resolution
%A F. Andre
%A J. P. Banatre
%A J. P. Routeau
%J ACM Transactions on Programming Languages and Systems
%V 3
%N 1
%D January 1981
%P 11-23
%K Multiprocessing, compilation, control structures, parallelism, events,
processes, nondeterminism
CR Categories: 4.12, 4.22, 4.32

%A F. Andre
%A D. Herman
%A J. P. Verjus
%T Synchronization of Parallel Programs
%I MIT Press
%D 1985

%A F. Andre
%A D. Herman
%A J. P. Verjus
%T Synchronization of Parallel Programs
%I The MIT Press
%D 1985

%A J. -P. Andre
%A J. -C. Petit
%T GALAXIE: A Reconfigurable Network of Processors with Distributed Control
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 86-94
%K
%O Architecture

%A G. Andreoni
%A V. Saletti
%T Direct connection of a mainframe to a packet switched network
by use of a microprocessor based protocol converter: the performance aspect
%Z CREI-Politecnico di Milano, Italy
%J Int. J. Mini & Microcomput. (USA)
%V 5
%N 3
%P 40-43
%O 5 REFS. Treatment PRACTICAL
%D 1983
%K computer networks computer interfaces protocols packet switching
data communication equipment convertors
packet switched network microprocessor based protocol converter performance
Sperry Univac 1100/80 mainframe
X.25 network link level hardware interface bit oriented protocols
sublayering Z80 processor SIO 2 LSI chip throughput
Euronet communication
%X The way in which a specific problem of connecting a large Sperry
Univac 1100/80 mainframe to an X.25 network has been solved by means
of a microprocessor based device is described. The problem arises at
the link level, because the hardware interface available does not
have the capability of handling bit-oriented protocols. After a
general description, the paper first shows how the problem can be
properly handled, from the architectural point of view, with a
sublayering of the said level. Then a brief description of the
functionalities in the microprocessor device is given, followed by
an overview of the implementation based on an Z80 processor and an
SIO-2 LSI chip. Finally, the paper reports some considerations on
the modalities for the insertion of this device, in order to
minimise the impact on the throughput of the mainframe. Some figures
of the performances achieved with the host connected to the node of
Euronet in Rome by means of this device are reported. The conclusion
underlines how microprocessor devices can help in solving, in a
cheap and effective way, communication problems otherwise very
difficult to manage

%A Steinar Andresen
%T The Looping Algorithm Extended to Base 2^t: Rearrangeable Switching Networks
%J IEEE Transactions on Communications
%V COM-25
%N 10
%D October 1977
%P 1057-1063
%X
Reproduced in the 1984 tutorial: "Interconnection Networks for parallel
and distributed processing" by Wu and Feng.

%A A. Andrews
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Parallel Processing of the Kalman Filter
%P 216-220
%O Special-Purpose Processors

%A G. R. Andrews
%A J. R. McGraw
%T Language features for parallel processing and resource control
%J Proc. Conf. on Design and Implementation of Programming Languages
%C Ithaca, N.Y.
%D October 1976
%K theoretical results
%X Describes requirements that a language for parallel processing should meet.
A set of language features for designing processes, and the interactions
between them.  Also presents language features to control the use of
resources in a parallel processing environment.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A G. R. Andrews
%A D. P. Dobkin
%A P. J. Downey
%T Active data structures
%J 5th International Conference on Software Engineering
%C San Diego, CA, USA
%D 9-12 March 1981
%P 354-362
%O 46 REFS. Treatment PRACTICAL
%I IEEE. New York, USA, 1981, xv+472
%K data structures distributed processing
data structures passive software objects microprocessor technology
file directory system distributed processing

%A G. R. Andrews
%T Parallel programs: Proofs, principles, and practice
%J Comm. ACM
%V 24
%N 3
%D March 1981
%P 140-146

%A G. R. Andrews
%T Distributed programming languages
%I Computer Science Department, Arizona University
%D 1982
%R 82-13

%T The distributed programming language SR-mechanisms, design and
implementation
%A G. R. Andrews
%J Software-Pract. & Exper. (GB)
%V 12
%N 8
%P 719-753
%O 36 REFS. Treatment PRACTICAL
%D Aug. 1982
%K parallel processing distributed processing high level languages
high level languages distributed programming language SR software
parallel resources operations input statements
separate compilation type abstraction dynamic communication links arrays
procedures

%A G. R. Andrews
%A D. P. Dobkin
%A P. J. Downey
%T Distributed Allocation with Pools of Servers
%T Language Constructs and Support Systems for Distributed Computing
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 73-83

%A G. R. Andrews
%A G. M. Levin
%T On-the-fly Deadlock Prevention
%T Language Constructs and Support Systems for Distributed Computing
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%r U. of Arizona Tech. Report
%d February 1982
%I ACM
%C Ottawa, Canada
%D August 1982
%P 165-172

%A Gregory R. Andrews
%T Synchronizing Resources
%J ACM Transactions on Programming Languages and Systems
%V 3
%N 4
%D October 1981
%P 405-430
%K Parallel Programming, processes, synchronization, process
communication, monitors, distributed processing, programming languages,
operating systems, databases
CR Categories: 4.20, 4.22, 4.32, 4.35

%A Gregory R. Andrews
%A Fred B. Schneider
%T Concepts and Notations for Concurrent Programming
%J Computing Surveys
%V 15
%N 1
%P 3-43
%O 133 REFS. Treatment BIBLIOGRAPHIC SURVEY, PRACTICAL
%D March 1983
%i University of Arizona, Tucson
%r CS Dept. TR 82-12
%d Sept. 1982. (To appear in \fIComputing Surveys.\fP)
%K Recommended,
parallel processing programming
OS parallel processing concurrent programming language notations
processes communication synchronization primitives

%A H. Anlauff
%T Design of a Hierarchical Multiprocessor System for Multi-Level Parallel
Computation
%E W. Handler
%B Computer Architecture
%P 223-265
%I Springer-Verlag
%D 1976

%A M. Annaratone
%A M. G. Sami
%T Software Testing Techniques for Universal Building Blocks of
Multimicrosystems
%J National Computer Conference \(em Proceedings
%I AFIPS
%V 51
%D 1982
%P 117-124

%A S. R. Anstead
%A J. L. Baer
%T Concurrent Accesses of B*-tress in a Paging Environment
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 235-237
%O Data Base Machines

%A Robert N. Anthony
%T Planning and Control Systems: A framework for analysis
%I Division of Research, Harvard Business School, Harvard University
%D 1965

%A Dan Antonsson
%A Bjorn Gudmundsson
%A Tomas Hedblom
%A Bjorn Kruse
%A Arne Linge
%A Peter Lord
%A Tomas Ohlsson
%T PICAP - A System Approach to Image Processing
%J IEEE Transactions on Computers
%V C-31
%N 10
%D October 1982
%P 997-1000
%K Computer architecture, image processing, multiprocessor system,
parallel processing, picture processing,
Special issue on computer architecture for pattern analysis and image
database management

%A M. Aoki
%A G. Estrin
%A R. Mandell
%T Analysis of computing-load assignment in a multi-processor computer
%J AFIPS Proc. of the FJCC
%V 24
%D 1963
%P 147-160

%A Alberto Apostolico
%A Alberto Negro
%T Systolic Algorithms for String Manipulations
%J IEEE Transactions on Computers
%V C-33
%N 4
%D April 1984
%P 361-364
%K Parallel computation, pattern matching, repetitions in a string,
statistics of a string, systolic architectures,
Correspondence,

%A T. K. Apostolopoulos
%A E. N. Protonotarios
%T Queueing analysis of buffered slotted multiple access protocols
%J Comput. Commun. (GB)
%V 8
%N 1
%P 9-21
%O 13 REFS. Treatment APPLICATIONS, THEORETICAL
%D Feb. 1985
%K protocols multi access systems queueing theory
infinite buffer capacity queueing analysis
buffered slotted multiple access protocols URN protocol
ALOHA protocol random TDMA finite buffer capacity user process
M/G/1 queueing system packet delay distribution

%A C. M. Applewhite
%T Distributed Computer Architecture for the Discrete Address Beacon
System
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 480-489
%O Applications of distributed computing to radar systems

%A H. L. Applewhite
%A others
%T MMBC Software Structures and Implementation
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 725-735
%O Application of distributed computing to modular missile-borne computers

%T A Proof System for Communicating Sequential Processes
%A Krzysztof R. Apt
%A Nissim Francez
%A Willem P. De Roever
%J ACM Transactions on Programming Languages and Systems
%V 2
%N 3
%D July 1980
%P 359-385
%K Hoare-style proof rules, partial correctness, global invariant,
cooperating proofs, CSP, communicating processes, concurrency, absence
of deadlock, blocking
CR Categories: 4.32, 5.24

%T Staged Circuit Switching
%A Mauricio Arango
%A Hussein Badr
%A David Gelernter
%J IEEE Transactions on Computers
%V C-34
%N 2
%D February 1985
%P 174-180
%K Communication architectures, communication protocols, network
computers, network operating systems, reconfigurable networks
%O Correspondence

%A James Archibald
%A Jean-Loup Baer
%T An Economical Solution to the Cache Coherence Problem
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%D June 1984
%K caches in multiprocessors
%P 355-362

%A B. W. Arden
%A A. D. Berenbaum
%T A multi-microprocessor computer system architecture
%J Proc. 5th Symp. on Operating Systems Principles
\(em ACM Operating Systems Review
%V 9
%N 5
%C Austin, Texas
%D November 1975
%P 114-121
%K multiprocessor architectures and operating systems
%X Describes the design of a multiprocessor built with microprocessors and
discusses the issues involved in building a distributed operating system for
such a machine.  The assignment of system processes to processors and the
hierarchical connection scheme used to minimize interconnection
requirements are of special interest.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A B. W. Arden
%A R. Ginosar
%T MP/C: A Multiprocessor/Computer Architecture
%J Proceedings of 8th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 9
%N 3
%D May 1981
%P 3-20
%O Architecture

%A Bruce W. Arden
%A Hikyu Lee
%T Analysis of a chordal ring network
%J Proc. Workshop on Interconnection Networks for Parallel and Distributed
Processing
%I Purdue University
%D April 1980
%P 93-100
%K Chordal Ring, regular networks, message-passing,
multi-microcomputer systems, distributed routing

%A Bruce W. Arden
%A Hikyu Lee
%T Analysis of Chordal Ring Network
%J IEEE Transactions on Computers
%V C-30
%N 4
%D April 1981
%P 291-295
%K Chordal Ring, distributed routing, message-passing,
multi(micro)computer system, regular networks
%O Correspondence
%X
Reproduced in the 1984 tutorial: \fI Interconnection Networks for parallel
and distributed processing\fP by Wu and Feng.

%A Bruce W. Arden
%A Hikyu Lee
%T A Regular Network for Multicomputer Systems
%J IEEE Transactions on Computers
%V C-31
%N 1
%D January 1982
%P 60-69
%K Moore bound, multicomputer system, multitree structured (MTS) graph,
regular,
recommended,
Multicomputer systems
%X
Reproduced in the 1984 tutorial: "Interconnection Networks for parallel
and distributed processing" by Wu and Feng.

%A Bruce W. Arden
%A Ran Ginosar
%T MP/C: A Multiprocessor/Computer Architecture
%J IEEE Transactions on Computers
%V C-31
%N 5
%D May 1982
%P 455-473
%K Computer architecture, multicomputers, multiprocessors, supersystems,
switched bus, tree-structured computer
Special issue on supersystems

%A Bruce W. Arden
%A Ran Ginosar
%T A multi-microcomputer interconnector
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 353-355
%K Serializing Star Chip (SSC), VLSI,
%O computer networks
%X This interconnector is presented as a VLSI alterative to cross bar
switches.  The is no real analysis comparing this switch to other
switching schema.  No failure analysis either.

%A J. Arlat
%A W. C. Carter
%T Implementation and Evaluation of a (b,k)-Adjacent Error-Correcting/Detecting
Scheme for Supercomputer Systems
%J IBM Journal of Research and Development
%V 28
%N 2
%D March 1984
%P 159-169
%K Omega network

%A Cedric V.W. Armstrong
%A Eli T. Fathi
%T A Fault-tolerant Multimicroprocessor-based Computer System for Space-based
Signal Processing
%J Micro
%I IEEE
%V 4
%N 6
%D Dec. 1984
%P 54-65
%K fasp multiprocessor interconnection network

%A J. R. Armstrong
%A F. G. Gray
%T Fault Diagnosis in a Boolean n Cube Array of Microprocessors
%J IEEE Transactions on Computers
%V C-30
%N 8
%D August 1981
%P 587-590
%K Array, diagnosability, faults, fault tolerance, microprocessor, network
%O correspondence
%X
Reproduced in the 1984 tutorial: \fI Interconnection Networks for parallel
and distributed processing\fP by Wu and Feng.

%A S. V. W. Armstrong
%A N. A. Brans
%A H. M. Ahmed
%T An Adaptive Multimicroprocessor Array Computing Structure for Radar
Signal Processing Applications
%J Proceedings of 6th Annual Symposium on Computer Architecture
%D 1979
%K University of Ottawa, I. P. Sharp Associates Ltd, Miller
Communications Systems Ltd.
%P 68-74

%A W. W. Armstrong
%A A. S. Mohamed
%T A Mixed-Flow Query Processing Strategy for a Multiprocessor Database
Machine
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Distributed Query Processing
%P 292-299

%A C. Arnold
%A M. Parr
%A M. Dewe
%T An Efficient Parallel Algorithm for the Solution of Large Sparse Linear
Matrix Equations
%J IEEE Transactions on Computers
%V C-32
%P 265-273
%D 1983
%X Must find keywords and write a short annotation.

%A Clifford N. Arnold
%T Performance evaluation of three automatic vectorizer packages
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 235-242
%K
CDC, CYBER 203/205, LLNL kernels,
%O Large-scale scientific processing

%A Clifford N. Arnold
%T Vector optimization on the CYBER 205
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 530-536
%K
CDC, pipelining
%X
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%A Clifford N. Arnold
%T Machine Independent Techniques for Scientific Supercomputing
%J Digest of Papers COMPCON, Spring 84
%I IEEE
%D Feb. 1984
%P 74-83
%K Supercomputing, parallelism, vector processing, memory partitioning,
hierarchical memory, multiprocessing,
Super scientific computers
%X A plea for programs to use machine independent techniques for
programming (Programming for long-range portability).
Memory partitioning is given as an example.

%A J. S. Arnold
%A D. P. Casey
%A R. H. McKinstry
%T Design of tightly-coupled multiprocessing programming
%J IBM Systems Journal
%V 13
%N 1
%D 1974
%P 60-87

%A R. G. Arnold
%A E. W. Page
%T A hierarchical restructurable multi-microprocessor architecture
%J Proceedings of the 3rd Annual Symposium on Computer Architecture
%C Clearwater, Florida
%D January 1976
%P 40-45
%K multiprocessor architectures and operating systems,
multi-microprocessors
%X This multiprocessor system was built with bit-slice processors.  It allows
dynamic restructuring of the system to permit longer word lengths as well as
reorganization into isolated groups of cooperating processors.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A R. G. Arnold
%A others
%T MMBC Architecture
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 707-724
%O Application of distributed computing to modular missile-borne computers

%A Robert G. Arnold
%A Robert O. Berg
%A James W. Thomas
%T A Modular Approach to Real-Time Supersystems
%J IEEE Transactions on Computers
%V C-31
%N 5
%D May 1982
%P 385-398
%K Architectural building blocks, architecture optimization, data driven
software structure, distributed computing, example system sizing,
expandable, high performance, high throughput, memory/processor
tradeoff, real-time embedded computers,
Special issue on supersystems

%A N. Arnot
%A G. Wilkinson
%A R. Burge
%T Applications of the ICL DAP for two-dimensional Image Processing
%I Queen Elizabeth College (QEC)
%C London
%J Proceedings of Chester Conference

%A E. Arthurs
%A B. W. Stuck
%T A Performance Analysis of Single versus Multiple Processors
%J Computer Software and Applications Conference (COMPSAC79)
%I IEEE
%D November 1979
%P 788
%K Bell Labs
%O

%A Yeshayahu Artsy
%A Hung-Yang Chang
%A Raphael Finkel
%T Charlotte: Design and Implementation of A Distributed Kernal
%I University of Wisconsin-Madison
%R Computer Sciences Technical Report #554
%D August 1984

%A Arvind
%A K. Pingali
%T Safe Data-Driven Evaluation
%I Functional Languages and Architectures Group, Laboratory for Computer
Science, MIT
%C Cambridge, MA

%A Arvind
%A K. P. Gostelow
%T A new interpreter for dataflow and its implications
%R Tech. Rep. 72
%I Dept. of Information and Computer Science, Univ. of California
%C Irvine, CA
%D October 1975

%A Arvind
%A K. P. Gostelow
%T A Computer Capable of Exchanging Processors for Time
%J Information Processing 77: Proceedings of the IFIP Congress 77
%P 849-853
%D August 1977

%A Arvind
%A K. P. Gostelow
%T Some Relationships Between Asynchronous Interpreters of a Dataflow
Language
%B Formal Descriptions of Programming Concepts: Proceedings of the IFIP
Working Conference
%E E. J. Neuhold
%D August 1977
%P 95-119

%A Arvind
%A K. P. Gostelow
%A W. Plouffe
%T Indeterminacy, Monitors and Dataflow
%J Proceedings of the Sixth ACM Symposium on Operating System Principles,
Operating Systems Review
%V 11
%N 5
%D November 1977
%P 159-169

%A Arvind
%A K. P. Gostelow
%A W. Plouffe
%T An Asynchronous Programming Language and Computing Machine
%R 114a
%I University of California
%C Irvine, CA
%D 1978

%A Arvind
%A K. P. Gostelow
%T Dataflow Computer Architecture: Research and Goals
%I Dept. of Information and Computer Science, Univ. of California
%C Irvine, CA
%R TR-113
%D February 1978

%A Arvind
%A R. Bryant
%T Parallel Computers for Partial Differential Equations Simulation
%J Proc. Scientific Computer Information Exchange Meeting
%C Livermore, CA
%D 1979
%P 94-102

%A Arvind
%A R. E. Bryant
%T Design Considerations for a Partial Differential Equation Machine
%J Scientific Computer Information Exchange Meeting
%P 92-102
%D September 1979

%A Arvind
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Decomposing a Program for Multiple Processor Systems
%P 7-14
%O Software and Languages

%A Arvind
%A V. Kathail
%A K. Pingali
%T A Processing Element for a Large Multiple Processor Dataflow Machine
%J Proceedings IEEE International Conference on Circuits and Computers
%I IEEE
%V 2
%P 601-605
%D October 1980

%A Arvind
%A R. E. Thomas
%T I-Structures: An Efficient Data Type for Functional Languages
%I Laboratory for Computer Science
%R TM-178
%C Cambridge, MA
%D September 1980

%A Arvind
%A V. Kathail
%T A Multiple Processor Data Flow Machine that Supports Generalized
Procedures
%J Proceedings of 8th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 9
%N 3
%D May 1981
%P 291-302
%O data flow machines

%A Arvind
%A K. P. Gostelow
%T The U-interpreter
%J Computer
%V 15
%N 2
%D February 1982
%P 42-49
%X Special issue on data flow computation.

%A Arvind
%A Robert A. Iannucci
%T A Critique of Multiprocessing von Neumann Style
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%D June 1983
%V 11
%N 3
%P 426-436
%r Computation Structures Group Memo 226
%i Laboratory for Computer Science, MIT
%d April 1982
%K caches, cahce choerence, data flow, multiported memories, multiprocessors,
packet communication, von Neuman architecture
%X A thoughtful article for those unfamiliar with the problem of general
control flow multiprocessing.
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%A Arvind
%A Robert A. Iannucci
%T Two Fundamental Issues in Multiprocessing: The Dataflow Solution
%R MIT/LCS/TM-241
%I MIT
%C Cambridge, MA 02139
%D September 1983

%A Arvind
%A Vinod Kathail
%A Keshav Pingali
%T Sharing Computation in Functional Language Implementations
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 5.1-5.12
%O Reduction language architectures

%A S. Arya
%A D. Calahan
%T Optimal Scheduling of Assembly Language Kernels for Vector Processors
%J 19th Allerton Conference on Communications, Control, and Computers
%I University of Illinois
%D 1981

%A Siamak Arya
%T Optimal Instruction Scheduling for a Class of Vector Processors:
An Integer Programming Approach
%R CRL-TR-19-83
%I Univ. of MI, Computing Research Lab.
%C Ann Arbor, MI
%D April 1983

%A R. A. Aschenbrenner
%A M. J. Flynn
%A G. A. Robinson
%T Intrinsic Multiprocessing
%J Proc. AFIPS 1967 Spring Joint Computer Conference
%I AFIPS Press
%D 1967
%P 81-86

%A E. A. Ashcroft
%A W. W. Wadge
%T Lucid, a Nonprocedural Language with Iteration
%J Communications of the ACM
%V 20
%N 7
%P 613-641
%D August 1978

%T Distributed Discrete Event Simulation using Dataflow
%A V. Ashok
%A R. Costello
%A P. Sadayappan
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 503-510
%K Data Flow
gate-level simulation, data-flow, distributed processing,
discrete event simulation,

%A S. Askew
%A F. Walkden
%T On The Design and Implementation of a Package for Solving a Class of
Partial Differential Equations
%B Supercomputers and Parallel Computation
%E D. Paddon
%I Clarendon Press
%C Oxford
%D 1984
%P 107-114

%A S. L. Askew
%A F. Walkden
%T On Programming Parallel Computers to Solve Engineering Fluid Dynamics
Problems
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 279-285
%D 1984
%K DAP,

%A S. L. Askew
%A F. Walkden
%T On the Design and Implementation of a Package for Solving a Class
of Partial Differential Equations on the ICL Distributed Array Processor
%E D. J. Paddon
%B Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford, England
%D 1984
%P 107-114
%K Explicit solvers, computational fluid dynamics, PDEPACA, DAP,

%A D. Aspinall
%T Architecture
%B Distributed Computing - Part IV Closely-Coupled Systems
%E Fred B. Chambers
%E David A. Duce
%E Gillian P. Jones
%I Academic Press
%S APIC Studies in Data Processing
%V 20
%D 1984
%P 219-229
%K shared memory, transputer, test and set,

%A D. Aspinall
%T Cyba-M
%B Distributed Computing - Part IV Closely-Coupled Systems
%E Fred B. Chambers
%E David A. Duce
%E Gillian P. Jones
%I Academic Press
%S APIC Studies in Data Processing
%V 20
%D 1984
%P 267-276

%T Design and Control of a Three-Stage Switch Matrix in the Presence of
Fan-Out
%A Abhaya Asthana
%J IEEE Transactions on Computers
%V C-27
%N 10
%D October 1978
%P 886-895
%K Blocked state, conflicts, conflict transfer, input, middle blocks,
move operation, output, full and maximal assignments,
3-stage connection network,
Automatic switching of analog computation

%T Finding Euler Tours in Parallel
%A Mikhail Atallah
%A Uzi Vishkin
%I Purdue University
%D May 1984

%A Mikhail J. Atallah
%T Finding Euler Tours in Parallel
%I Purdue University
%R TR-440

%T Efficient Parallel Solutions to Geomentric Problems
%A Mikhail J. Atallah
%A Michael T. Goodrich
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 411-417
%K Numeric Computing
parallel algorithms, computational geometry, convex hull problem,
closest pair problem,

%T A Generalized Dictionary Machine for VLSI
%A Mikhail J. Atallah
%A S. Rao Kosaraju
%J IEEE Transactions on Computers
%V C-34
%N 2
%D February 1985
%P 151-155
%K Dictionary operations, parallel processing, pipelining, tree machine,
VLSI
%O Parallel Processing

%A W. Athas
%A D. Briscoe
%A R. Sjogren
%A C. Steele
%T HyperFITH: An Implementation of FITH on an Instance of a Hypercube
%r Hm36
%I California Institute of Technology
%C Pasadena, CA
%D 1983
%K Caltech Cosmic Cube, hypercube, C^3P

%A William C. Athas, Jr.
%T A VLSI Combinator Reduction Engine
%I California Institute of Technology
%R 5086:TR-83
%D June 8, 1983
%K pipelining, systolic arrays,

%T Site Initialization, Recovery, and Backup in a Distributed Database
System
%A Rony Attar
%A Philip A. Bernstein
%A Nathan Goodman
%I IEEE Transactions on Software Engineering
%V SE-10
%N 6
%D November 1984
%K Distributed database systems, fault recovery, site initialization,
Databases

%A C. Attiya
%A D. Dolev
%A J. Gill
%T Asynchronous Byzantine Consensus
%J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing
%I ACM
%D August 1984

%A J. William Atwood
%T Concurrency in Operating Systems
%J Computer
%V 9
%N 10
%P 18-26
%D October 1976
%X Examples of OSes include CDC 6000/Kronos and IBM 370/OS. A dated paper
needless to say.
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.
Reprinted in "Tutorial: Distributed Processing," IEEE,
compiled by Burt H. Liebowitz and John H. Carson, 1981, 3rd edition.

%A Auerbach
%T Associative Memory Investigations Substructuring, Searching and Data
Organizations
%R AF 30 (602)4309
%I Auerbach
%D May 1968

%A Auerbach
%T Guide to International Computer Systems Architecture
%A Philadelphia, PA
%I Auerbach
%D 1976

%A A. Avizienis
%T Architecture of Fault-Tolerant Computing Systems
%J 1975 International Symposium on Fault-Tolerant Computing
%D January 1975

%A A. Avizienis
%A M. Evcegovac
%A T. Lang
%A P. Sylvain
%A A. Thomasian
%T An Investigation of Fault-Tolerant Architectures for Large Scale
Numerical Computing
%E D. Kuck
%E D. Lawrie
%E A. Sameh, (Ed.)
%B High Speed Computer and Algorithm Organization
%I Academic Press
%C New York
%P 159-183
%D 1977

%A A. Avizienis
%T Fault \(em tolerance: the survival attribute of digital systems
%J Proceedings of the IEEE
%V 66
%N 10
%D October 1978
%P 1109-1125
%X This is Avizienis' paper to the Special issue on the same topic.

%A A. Avizienis, ed.
%T Fault Tolerant Digital Systems
%J Proceedings of the IEEE
%V 66
%N 10
%D October 1978
%P 1107-1268
%X This covers the entire spacial issue.

%A Algirdas Avizienis
%T Fault-Tolerant Systems
%J IEEE Transactions on Computers
%V C-25
%N 12
%D December 1976
%P 1304-1312
%K Fault classification, fault tolerance, fault-tolerant computer design,
redundancy techniques, reliability modeling, reliable computing,
25th Anniversary Issue

%A Algirdas Avizienis
%A John P. J. Kelly
%T Fault-Tolerance by Design Diversity: Concepts and Experiments
%J Computer
%I IEEE
%V 17
%N 8
%D August 1984
%P 67-80
%K Special issue on fault-tolerant computers

%A B. Awerbuch
%A Y. Shiloach
%T New connectivity and MSF algorithms for ultracomputer and PRAM
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 175-179
%K
Ultracomputers (UC)
non-numerical algorithms

%A B. Awerbuch
%A S. Even
%T Efficient and Reliable Broadcast is Achievable in an Eventually
Connected Network
%J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing
%I ACM
%D August 1984

%A Axelrod, Robert
%A William D. Hamilton
%T The Evolution of Cooperation
%J Science
%V 211
%D March 1981
%P 1390-1396
%X Wonderful game-theory analysis of Prisoner's dilemma-- discussion of
strategy's viability, stability and robustness--TIT for TAT strategy;
biology observations at end of paper not that useful.

%A T. S. Axelrod
%A P. F. Dubois
%A P. G. Eltgroth
%T A simulation for MIMD performance prediction \*- application to the S-1
MkIIa multiprocessor
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 350-358
%K
Cray-1, simulation/operating systems

%T Comparing the Performance of Parallel Computers
%A Timothy S. Axelrod
%J Digest of Papers, Compcon85 Thirtieth IEEE Computer society
International Conference
%I IEEE Computer Society
%D February 25-28, 1985
%P 398-401

%A O. Axelsson
%T A Survey of Vectorizable Preconditioning Methods for Large Scale Finite
Element Matrix Problems
%I Center for Numerical Analysis
%R CNA-190
%C University of Texas at Austin
%D 1984

%A J. M. Ayache
%A J. P. Courtiat
%A M. Diaz
%T Self-Checking software in distributed systems
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 163-170
%K
%O Design of Fault Tolerant Systems

%T A Two-Level Microprogrammed Multiprocessor Computer with Nonnumeric
Functions
%A Takanobu Baba
%A Ken Ishikawa
%A Kenzo Okuda
%J IEEE Transactions on Computers
%V C-31
%N 12
%D December 1982
%P 1142-1156
%K Database system, emulation, firmware, multiprocessor, nonnumeric
processing, parallel processing, symbol manipulation, two-level
microprogramming,
Computer architecture

%A Takanobu Baba
%A Katsuhiro Yamazaki
%A Nobuyuki Hashimoto
%A Hiroyuki Kanai
%A Kenzo Okuda
%A Kazuhiko Hashimoto
%T Hierarchical micro-architectures for a two-level microprogrammed
multiprocessor computer
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 478-485
%K
Utsumomiya U, Japan, MUlti NAnoProgrammed machine (MUNAP), 4 CPU
computer architectures

%T Streets of Byzantium: Network Architectures for Fast Reliable
Broadcasts
%A Ozalp Babaoglu
%A Rogerio Drummond
%J IEEE Transactions on Software Engineering
%V SE-11
%N 6
%I IEEE Computer Society
%D June 1985
%O Special Issue on Reliability in Distributed Software and Database
Systems
%P 546-554
%K Byzantine agreement, distributed computing, Ethernet, fault-tolerance,
network partitions

%A R. G. Babb, II
%T Programming the HEP with Large-Grain Dataflow Techniques
%E Janusz S. Kowalik
%B Parallel MIMD Computation: HEP Supercomputer and Its Applications
%I MIT Press
%C Cambridge, MA
%D 1985
%P 203-227
%K Programming and languages, parallel HEP FORTRAN, parallel programming,
%X Good introduction to the problems of parallel programming.
Has a good parallel triangular solver example.

%A Robert G. Babb, II
%T Parallel Processing with Large Large Data Flow Techniques
%J Computer
%I IEEE
%V 17
%N 7
%D July 1984
%P 55-61
%K Denelcor HEP,
Hardware-software interface: effect on performance

%A I. Babuska
%A W. Rheinboldt
%T Computational Aspects of Finite Element Analysis
%E J. Rice
%B Mathematical Software III
%I Academic Press
%C New York
%D 1977
%P 223-253
%X Remove?

%A F. Baccelli
%A T. Fleury
%T Analyse Syntaxique en Environnement Parallele
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 412-422
%K
%O Distributed Systems in Specific Applications

%A Maurice J. Bach
%A Steven J. Buroff
%T Multiprocessor UNIX Systems
%J AT&T Bell Laboratories Technical Journal
%V 63
%N 8, part II
%D October 1984
%P 1733-1749
%K Semaphore, IBM, 3B20, fault-tolerant processing, critical sections
%X A look at the principal issues of moving UNIX to multiprocessor (typically
dual processor) systems.  The issues center around System V implementation
of portable semaphores, device drivers and specific instances of IBM and
3B processors.  Performance is mentioned, but several open issues are left
unresolved.

%A R. J. R. Back
%A H. Mannila
%T A Refinement of Kahn's Semantics to Handle Non-Determinism and
Communications
%T Language Constructs and Support Systems for Distributed Computing
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 111-120

%A R. J. R. Back
%A R. Kurki-Suonio
%T Serializability in Distributed Systems with Handshaking
%R CMU-CS-85-109
%I CS Dept. Carnegie Mellon University
%D 1985

%A J. Backus
%T Can programming be liberated from the von Neumann style?
A functional style and its algebra of programs
%J Comm. ACM
%V 16
%N 8
%D August 1978
%P 613-641
%K Recommended

%A Jean Bacon
%T An Approach to Distribute Software Systems
%J Operating Systems Review
%I ACM SIGOPS
%V 15
%N 3
%D October 1981
%P 62-74
%K ISO model
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A D. Z. Badal
%A M. T. Gehl
%T On deadlock detection in distributed computing systems
%B Proceedings of IEEE INFOCOM 83
%C San Diego, CA, USA
%O 8 REFS
Treatment PRACTICAL
%I IEEE, New York, USA, p: xvii+618 ISBN: 0-8186-0006-3
%D 18-21 April 1983
%P 36-45
%K multiprogramming distributed processing
multiprogramming deadlock detection distributed computing systems
%X With the advent of distributed computing systems, the problem of
deadlock, which has been essentially solved for centralised computing
systems, has reappeared. Existing centralised deadlock detection
techniques are either too expensive or do not work correctly in
distributed computing systems. Although several algorithms have been
developed specifically for distributed systems, the majority of them
have also been shown to be inefficient or incorrect. A new algorithm
is proposed which is more efficient than any existing distributed
deadlock detection algorithm

%A J.-L. Baer
%T Supercomputers
%B Computer Systems Architecture
%I Computer Science Press
%C Los Alamitos, CA
%D 1980

%A J. L. Baer
%A D. P. Bovet
%T Compilation of Arithmetic Expressions for Parallel Computations
%J Proc. IFIP Congress
%P 340-346
%I North-Holland
%D 1968

%A J. L. Baer
%A E. C. Russell
%T Preparation and Evaluation of Computer Programs for Parallel Processing
Systems
%E L. C. Hobbs
%E others
%B Parallel Processor Systems, Technologies and Applications
%P 375-416
%I Spartan Books
%D 1970

%A J. L. Baer
%T Large Scale Systems
%B Computer Science
%E A. F. Cardenas?
%E L. Presser
%E M. A. Marin
%I Wiley-Interscience
%D 1972

%A J. L. Baer
%T Modelling for parallel computation: a case study
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 13-22
%K
%O Sequential-parallel transformation and modeling

%A J. L. Baer
%T A Survey of Some Theoretical Aspects of Multiprocessing
%J Computing Surveys
%V 5
%N 1
%D March 1973
%P 31-80
%K multiprocessing, mutual exclusion, semaphores, automatic detection of
parallelism, graph models, Petri nets, flow graph schemata, scheduling,
array processors, pipe-line computers
CR categories: 6.0, 8.1, 4.32, 5.24

%A J. L. Baer
%A C. Ellis
%T Compilation in Distributed Function Systems
%J Compcon 76
%P 31-34
%I IEEE
%D 1976

%A J. L. Baer
%T Software Control and Program Design Issues for Alterable Architectures
%J Computer Software and Applications Conference (COMPSAC78)
%I IEEE
%D November 1978
%P 769-774
%O software techniques for reconfigurable and dynamic architecture

%A J. L. Baer
%T Computer Systems Architecture
%I Computer Science Press
%C Rockville, MD
%D 1980

%T Parallel Tag-Distribution Sort
%A J. L. Baer
%A S. C. Kwan
%A G. Zick
%A T. Snyder
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 854-861
%K Sorting

%A J. L. Baer
%A S. C. Kwan
%A G. Zick
%A T. Snyder
%T Parallel Tag-Distribution Sort
%I Dept of Computer Science, University of Washington
%R 85-01-03
%D January 1985

%A Jean-Loup Baer
%T Multiprocessing systems
%J IEEE Transactions on Computers
%V C-25
%N 12
%D December 1976
%P 1271-1277
%K Array processors, control, multiprocessors, pipeline computers,
synchronization of concurrent processes, tight and loose coupling,
25th Anniversary Issue, miscellaneous topics in multiprocessing
%X Examines and classifies array processors and multiprocessors according
to the tightness of coupling between individual processors.  Discusses
software enhancements needed to exploit the potential of multiprocessor
systems.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Jean-Loup Baer
%A Hung-Chang Du
%A Richard E. Ladner
%T Binary search in a multiprocessing environment
%J IEEE Transactions on Computers
%V C-32
%N 7
%D July 1983
%P 667-677
%K
binary search, memory interference, multiprocessor systems, SIMD architectures

%A Jean-Loup Baer
%T Computer Architecture
%J Computer
%I IEEE
%V 17
%N 10
%D October 1984
%P 77-87

%A Jean-Loup E. Baer
%A Gerald Estrin
%T Bounds for Maximum Parallelism in a Bilogic Graph Model of Computations
%J IEEE Transactions on Computers
%V C-18
%N 11
%D November 1969
%P 1012-1014
%K Boolean matrices, directed graphs, models of computations,
parallel processing, precedence matrix
IEEE Computer Group conf.

%A Jean Loup Baer
%T Whither a Taxonomy of Computer Systems
%R TR 82-10-01
%I University of Washington, CS Dept.
%C Seattle, WA
%D October 1982

%A R. Bagrodia
%A K. M. Chandy
%T A Micro-Kernel for Distributed Applications
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Distributed Programming, CMAY,
%P 140-149
%X CMAY is a FORTRAN based language.  Its has entities like Simula classes.
Messages are passed over UTexas, Austin's VAX750 net of 5 machines.

%A A. Bahrs
%T Operational Patterns: An extensible model of an extensible language
%B International Symposium on Theoretical Programming
%E A. Ershov
%E V. A. Nepomnishy
%S Lecture Notes in Computer Science
%V 5
%I Springer-Verlag
%D August 1972
%P 217-246

%A F. Baiardi
%A A. Fantechi
%A A. Tomasi
%A M. Vanneschi
%T Distributed implementation of nested communicating sequential
processes and termination
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 383-387
%K MuTEAM multimicroprocessor, CSP, nested parallel commands, inter-process
communication (IPC),
%O languages

%A F. R. Bailey
%T Computational limits on scientific applications
%J Spring 1978 Compcon
%I IEEE
%D 1978
%P 301-303

%A Gerard G. Baille
%A Jean P. Schoellkopf
%T Evaluation of a Polish Form Expression on a FI-FO Queue: A New Approach
Towards the Realization of a High Level "Pipeline" Computer
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 200
%K
%O compiling techniques
%X Summary only.

%A W. L. Bain, Jr.
%A S. R. Ahuja
%T Performance Analysis of High-Speed Digital Buses for Multiprocessing
Systems
%J Proceedings of 8th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 9
%N 3
%D May 1981
%P 107-134
%O performance analysis

%A William L. Bain, Jr.
%A J. Robert Jump
%T Hardware Scheduling Strategies for Systems with Many Processors
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 184-187
%O SULING
%X Summary only.

%A D. J. Baker
%A A. Ephremides
%T A Distributed Algorithm for Organizing Mobile Radio Telecommunication
Networks
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 476-483
%K
%O Local Area Networks and Applications

%A J. W. Bakker
%A J. I. de Zucker
%T Processes and the denotational semantics of concurrency
%I Mathematisch Centrum
%D 1982
%R IW 209/82

%A W. Balazinski
%A E. Macha
%T A Real-Time Method of Determination of Probable Direction of Fatigue
Crack Propagation in Materials
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 319-324
%K application of hybrid computer systems

%A D. L. Baldauf
%T Experiences with an operational associative processor
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 270-271
%K
%O RADCAP - the RADC associative processor

%A E. Ball
%A J. Feldman
%A J. Low
%A R. Rashid
%A P. Rovner
%T RIG, Rochester's Intelligent Gateway: System Overview
%J IEEE Transactions on Software Engineering
%V SE-2
%N 4
%D December 1976
%P 321-328
%X Reproduced in Tutorial on Local Computer Networks
Thurber,K.J., and Freeman,H.A., (Eds.), (1981).

%A J. R. Ball
%A R. C. Bollinger
%A others
%T On the use of the SOLOMON parallel processing computer
%J AFIPS Proc. of the FJCC
%V 22
%D Dec. 1962
%P 137-146

%A W. F. Ballhaus, Jr.
%T Computational Aerodynamics and Supercomputers
%J Digest of Papers COMPCON, Spring 84
%I IEEE
%D Feb. 1984
%P 3-14
%K Numerical supercomputers
%X The requirements of computation fluid dynamics are covered from the
physicists stand point and an introduction to the Numerical Aerodynamic
Simulator Project (NAS).

%A D. M. Balston
%T A High-Level Language for Constructing Image Processing Commands
%B Languages and Architectures for Image Processing
%E M. J. B. Duff
%E S. Levialdi
%I Academic Press
%C New York, NY
%D 1981
%P 99-116
%K IFL

%A R. Balter
%A P. Berard
%A P. Decitre
%T Why Control of the Concurrency Level in DIstributed Systems is More
Fundamental than Deadlock Management
%T Language Constructs and Support Systems for Distributed Computing
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 183-193

%A J. P. Banatre
%A J. P. Routeau
%A L. Trilling
%T An event driven compiling technique
%J Communications of the ACM
%V 22
%N 1
%D January 1979
%P 34-42

%A J. P. Banatre
%A M. Banatre
%A P. Quinton
%T Constructing parallel programs and their termination proof
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 224-225
%K
IRISA France
%O Non-numeric algorithms

%A Jean-Pierre Banatre
%T Co-operation Schemes for Parallel Programming
%E Y. Paker
%E J.-P. Jerjus
%B Distributed Computing Systems (Synchronization, Control and Communication)
%I Academic Press
%D 1983
%P 149-160

%A Jean-Pierre Banatre
%T A Cooperation Scheme and Its Application to Clock Resynchronization in
Distributed Systems
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 381-389
%D 1984
%K process cooperation, proximity relationship, process termination,
logical ordering of events, fuzzy time, clock desynchronization,
programming languages, enchere (french),

%A M. Banatre
%A G. Lapalme
%T ENCHERE: A Distributed Auction Bidding System
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 833-839
%K
%O Message Oriented Mechanisms

%A Tadaaki Bandoh
%A Yukio Kawamoto
%T Design considerations in multi-minicomputer performance
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 219
%K
%O Multiple-microprocessors
%X Summary only.

%A S. Bandyopadhyay
%A S. Basu
%A A. K. Choudhury
%T A Cellular Permuter Array
%J IEEE Transactions on Computers
%V C-21
%N 10
%D October 1972
%P 1116-1119
%K Cellular array, ordering of variables, permutation network, selector
cell

%A U. Banergjee
%A D. Gajski
%A D. Kuck
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Array Machine Control Units for Loops Containing IFs
%P 28-36
%O Architecture

%A Jayanta Banerjee
%A David K. Hsiao
%A Krishnamurthi Kannan
%T DBC - A Database computer for Very Large Databases
%J IEEE Transactions on Computers
%V C-28
%N 6
%D June 1979
%P 414-429
%K Clustering mechanism, computer architecture, content-addressable memory,
database computer, logic-per-track, mass memory, security enforcement,
structure memory, tracks-in-parallel read-out,
Special issue on database machines

%A Prithviraj Banerjee
%A Jacob A. Abraham
%T Fault-secure Algorithms for Multiprocessor Systems
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%D June 1984
%P 279-287
%K multiprocessor issues

%A R. Banerjee
%T Fast network design
%B NETWORKS India 84. International Symposium on Data Communication
and Computer Networks
%C Madras, India
%D Oct. 1984
%P 7-14
%O 11 REFS. Treatment PRACTICAL
%E H. N. Mahabala
%E K. B. Lakshmanan
%E S. Srinivasan
%I Comput. Soc. India, IFIP, UNESCO
%K local area networks
LAN communication needs fast microprocessors intelligent peripherals
bandwidth requirements voice video facsimile
design implementation Cambridge Fast Ring CFR
high speed LAN Cambridge Ring 100 Mbit/s VLSI

%A Utpal Banerjee
%A Daniel D. Gajski
%T Fast execution of Loops with IF Statements
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%D June 1984
%P 126-132
%K control unit issues

%T Fast Execution of Loops with IF Statements
%A Utpal Banerjee
%A Daniel D. Gajski
%J IEEE Transactions on Computers
%V C-33
%N 11
%D November 1984
%P 1030-1032
%K Array processors, automatic vectorization, Boolean recurrence,
loops with IF statements, multiprocessors, parallel processing,
Correspondence

%A Utrpal Banerjee
%A Shyh-Ching Chen
%A David J. Kuck
%A Ross A. Towle
%T Time and Parallel Processor Bounds for FORTRAN-like Loops
%J IEEE Transactions on Computers
%V C-28
%N 9
%P 660-670
%D September 1979
%K Recommended,
Analysis of programs, data dependence, Fortran-like loops, parallel
computation, processor bounds, program speedup, recurrence relations,
time bounds,
Parallel processing

%A S. Y. Bang
%A P. A. Ng
%A P. K. Blackwell
%T Protocol Validation by Synthesizing Communicating Systems Behaviors
%J Computer Software and Applications Conference (COMPSAC80)
%I IEEE
%D October 1980
%P 348-354
%O Distributed systems

%A J. S. Banino
%A others
%T Synchronization for Distributed Systems Using a Single Broadcast
Channel
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 330-338
%O Specification and Design of Communication Systems

%A J. S. Banino
%A J. C. Fabre
%T Distributed coupled actors: A Chorus proposal for reliability
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 128-134
%K
%O Distributed operating systems

%A J. S. Banino
%A J. C. Fabre
%A M. Guillemont
%A C. Morisset
%A M. Rozier
%T Some Fault-Tolerant Aspects of the CHORUS Distributed System
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Software Approach to Fault tolerance, SM 90, INRIA,
%P 430-437

%A Jean-Serge Banino
%T Architecture of the CHORUS Distributed System
%E Y. Paker
%E J.-P. Jerjus
%B Distributed Computing Systems (Synchronization, Control and Communication)
%I Academic Press
%D 1983
%P 251-264
%K Actor based system

%A R. Bank
%A A. Sherman
%T Algorithmic Aspects of the Multi-Level Solution of Finite Element
Equations
%I Center for Numerical Analysis
%R CNA-144
%C University of Texas at Austin
%D 1978
%X Remove?

%A R. Bank
%A T. Dupont
%T An Optimal Order Process for Solving Elliptic Finite Element Equations
%J Math. Comp.
%V 36
%P 35-51
%D 1981
%X Remove?

%A H. Bantelmann
%A H. Kalis
%A A. Montag
%T MIMUS \(em A Flexible Multiprocessor Systems
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 173-177
%K MIMUS (MIcroprocessor based MUltiprocessor System),
industrial and industrial like projects

%A Iftikhar A. Baqai
%A Tomas Lang
%T Reliability aspects of the ILLIAC IV computer
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 123-131
%K
%O Reliability

%A Ilan Bar-On
%A Uzi Vishkin
%T Optimal Parallel Generation of a Computation Tree Form
%r ULTRACOMPUTER NOTE #61, TR #90
%d October 1983
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 490-495
%K NYU Ultracomputer,
%O combinatorial algorithms

%T A System Approach to Mapping a Karhunen-Loeve Transform into a Systolic
Array
%A H. Barad
%A D. I. Moldovan
%Z EE, Dept. USC
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 48-55
%K Problem Mapping and Scheduling

%A A. B. Barak
%T Dynamic Process control for distributed computing
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 36-40
%K
%O Scheduling and control in distributed operating systems

%A D. Barbara
%A H. Garcie-Molina
%T How Expensive is Data Replication? An Example
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE New York, USA, P: xix+901
%P 263-268
%D October 1982
%O 11 Refs
Treatment PRACTICAL.
%K database management systems distributed processing file organisation.
data replication cost distributed computing system average response time
hardware costs performance queueing delays conflicts
concurrency control deadlock avoidance two phase commit protocol
writing of logs.
Replicated Databases
%X A case study illustrates the cost of replicating data in a
distributed computing system. The authors study the average response
time of transactions and hardware costs under three configurations:
one processor, one database copy; one processor, two database copies;
and two processors, two database copies. The performance results are
obtained using detailed simulations which take into account factors
such as the computing, input-output and transmission times involved
in processing transactions; the queueing delays; the conflicts among
transactions; the concurrency control mechanism (with deadlock
avoidance); and the two phase commit protocol and writing of logs.

%A G. Barber
%T Supporting organizational problem solving with a workstation
%I A.I. Lab, M.I.T.
%D 1982
%R Memo 681

%A Anthony J. Barbera
%A M. L. Fitzgerald
%A James S. Albus
%A Leonard S. Haynes
%T A Language Independent Superstructure for Implementing Real-Times Control
Systems
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 7.28-7.39
%O High level language architecture evaluation

%A G. Barigazzi
%A A. Ciuffoletti
%A L. Strigini
%T A Distributed algorithm for post-failure load redistribution
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 71-76
%K
%O Fault Tolerance Methods

%A L. L. Barinka
%A K. W. Neves
%A P. G. Tuttle
%T Performance of Some Vectorized Mathematical Software
%I Babcock & Wilcox Co.
%R Report NPGD-TM-361
%D April 1976
%K Gauss LU decomposition, CDC 7600, Cray-1, TI ASC,
%X Study took the LLL SUB/STACKLIB package for the CDC7600 and modified
it to better exploit the pipeline capability of that machine.

%T A Highly Optimized Vectorized Code for Monte Carlo Simulations of SU(3)
Lattice Gauge Theories
%A D. Barkai
%A K. Moriarty
%A C. Rebbi
%J CYBER 200 Applications Seminar
%R NASA Conference Publication 2295
%D October 1983
%E J. Patrick Gary, Compiler
%I NASA Goddard Space Flight Center
%C Greenbelt, Maryland
%P 119-144

%T Vectorized Multigrid Poisson Solver for the CDC CYBER 205
%A D. Barkai
%A A. Brandt
%J CYBER 200 Applications Seminar
%R NASA Conference Publication 2295
%D October 1983
%E J. Patrick Gary, Compiler
%I NASA Goddard Space Flight Center
%C Greenbelt, Maryland
%P 299-311

%A D. Barkai
%A K. J. M. Moriarty
%A C. Rebbi
%T A highly optimized vectorized code for Monte Carlo simulations of
SU(3) lattice gauge theories
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 101-108
%K Cyber 205, performance analysis, application
%O numeric computation

%A D. Barkai
%A K. Moriarty
%A C. Rebbi
%T A Modified Conjugate Gradient Solver for Very Large Systems
%E R. Numich
%B Proceedings of the Supercomputer Applications Symposium October 31 -
November 1, 1984
%I Purdue University
%D 1985
%K Cyber 205

%T A Modified Conjugate Gradient Solver for Very Large Systems
%A D. Barkai
%A K. J. M. Moriaty
%A C. Rebbi
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 284-290
%K Numeric Processing

%A K. E. Barker
%A T. P. Keenan
%T Local area network security
%J Canadian Information Processing Society Session 84 Proceedings. 1984:
Images of Fear, Images of Hope
%C Calgary, Alta., Canada
%I Canadian Inf. Processing Soc., Toronto, Ont., Canada, xvi+513
%P 489-499
%O 25 Refs
Treatment PRACTICAL.
%D 9-11 May 1984
%K computer networks security of data.
distributed computation security computer industry local area network
security template authentication integrity.
%X Recent trends toward distributed computation have given rise to
concerns about security within the computer industry. This paper
provides a possible solution to the problem in the environment of a
local area network (LAN). Security issues are discussed and a
security template is developed that can be overlaid on a LAM. The
template should provide for secrecy, authentication, integrity and
availability while maintaining the flexibility necessary to take the
fullest advantage of the distributed environment.

%A J. Barlow
%A I. Ipsen
%T Parallel Scaled Givens Rotations for the Solution of Linear Least
Squares Problems
%I Yale University Dept. of Computer Science
%R YALEU/DCS/RR-310
%D 1984

%A R. Barlow
%A D. Evans
%T Synchronous and Asynchronous Iterative Parallel Algorithms for Linear
Systems
%J Comput. J.
%V 25
%P 56-60
%D 1982

%A R. Barlow
%A D. Evans
%A J. Shanehchi
%T Sparse Matrix Vector Multiplication on the DAP
%E D. Paddon
%B Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford
%D 1984
%P 147-155

%A R. H. Barlow
%A D. J. Evans
%A J. Shanechi
%T Synchronous parallel versions of the power method
%I Loughborough

%A R.H. Barlow
%A D.J. Evans
%A J. Shanehci
%T Comparative study of the exploitation of different levels of parallelism
on different parallel architectures
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 34-40
%K
Cray-1, DAP, 4 processor TI 990/10
Loughborough U of Tech, UK
%O Numerical algorithms

%A R. H. Barlow
%A D. J. Evans
%A J. Shanehchi
%T Sparse Matrix Vector Multiplication on the DAP
%E D. J. Paddon
%B Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford, England
%D 1984
%P 147-155
%K SIMD,

%A J. A. Barnden
%T Nonsequentiality and Concrete Activity Phases in Discrete-Event
Simulation Languages
%J ACM Transactions on Programming Languages and Systems
%V 3
%N 3
%D July 1981
%P 293-317
%K Discrete-event simulation, simulation languages, transition systems,
simultaneous events, event scheduling, nonsequentiality, concurrency,
determinacy, histories, guarded commands, parallel programs
CR Categories: 4.22, 4.35, 56.29, 8.1

%A G. H. Barnes
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Design and Validation of a Connection Network for Many-Processor
Multiprocessor Systems
%P 79-80
%O Interconnections

%A George H. Barnes
%A Richard M. Brown
%A Maso Kato
%A David J. Kuck
%A Daniel L. Slotnick
%A Richard A. Stokes
%T The ILLIAC IV Computer
%J IEEE Transactions on Computers
%V C-17
%N 8
%D August 1968
%P 746-757
%K Recommended,
array, computer structures, look-ahead, machine language, parallel processing,
speed, thin-film memory
%X This was the original paper on the ILLIAC IV when it was proposed as
a 256 processing element machine, a follow on to the SOLOMON.  It was a
very ambitious design.

%A George H. Barnes
%A Stephen F. Lundstrom
%T Design and Validation of a Connection Network for Many-Processor
Multiprocessor Systems
%J Computer
%I IEEE
%V 14
%N 12
%D December 1981
%P 31-41
%X
Reproduced in the 1984 tutorial: \fI Interconnection Networks for parallel
and distributed processing\fP by Wu and Feng.

%T How Much is Control Knowledge Worth?: A Primitive Example
%A Jeffrey A. Barnett
%I USC/Information Sciences Institute
%D June 1982
%X ISI Working Paper; very simple results, not developed much.

%A T. P. Barnwell, III
%A S. Gaglio
%A R. M. Price
%T A multi-microprocessor architecture for digital signal processing
%J Proceedings of the International Conference on Parallel Processing
%C Bellaire, Michigan
%D August 1978
%P 115-121
%K multiprocessor architectures and operating systems,
special purpose architectures
%X Describes the architecture of a multiprocessor dedicated to signal
processing tasks and discusses techniques for generating efficient code
for certain algorithms used in digital signal processing.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A T. P. Barnwell, III
%A S. Gaglio
%A C. J. M. Hodges
%T Efficient implementation of one and two dimensional digital signal
processing algorithms on a multi-processor architecture
%J IEEE Int. Conf. on Acoustics, Speech, and Signal Processing
%C Washington, D.C.
%D April 1979
%P 698-701
%K multiprocessor applications
%X Describes the efficient implementation of certain digital signal processing
algorithms on a multiprocessor architecture specifically designed for such
applications.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A T. P. Barnwell, III
%A C. J. M. Hodges
%T Optimal implementation of signal flow graphs on synchronous multiprocessors
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 90-95
%K
Georgia Tech
%O Numerical algorithms

%A Avron Barr
%A Edward A. Feigenbaum, eds.
%T The Handbook of Artificial Intelligence
%I William Kaufmann, Inc. (USA) and
Pitman, London, England, xiv+409 pp. isbn 0 273 08540 9 (GB)
%D 1982
%V 2
%O treatment: practical, theoretical
%D 1982
%K artificial intelligence formal languages formal logic grammars
text generation artificial intelligence ai research search
computer problem solving techniques search space problem reduction
minimax methods
knowledge computer programs semantic networks production systems
natural languages grammars parsing techniques spoken language
%X The book is 1 of a 3 volume work on artificial intelligence, it
contains five chapters, as well as an index and bibliography. The first
chapter discusses the goals of ai research, the history of the field, and
the current active areas of research. Chapters two and three cover the key
concept of 'search', computer problem-solving techniques, search-space and
problem reduction algorithms, heuristic search and minimax methods,
computer implementations of search techniques, techniques for representing
knowledge in computer programs, basic representation paradigms in ai,
mathematical knowledge, semantic networks, production systems, frames, etc.
Chapter four describes ai research on 'natural languages': grammars and
parsing techniques that have been employed in ai programs, programs that
translate from one language to another, methods for 'generating' text to
express what the computer wants to say. Finally, chapter five discusses the
design of programs that understand spoken language.

%A Arthur L. Barrett
%T Process-construction for a parallel-sequential computer architecture
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 179
%K
%O PEPE
%X This is only a summary.

%A J. Barry
%A M. A. O. Bryant
%A P. Polishuk
%T Proceedings of the Papers Presented at the Eighth International Fibre
Optic Communications and Local Area Networks Exposition in the USA
%C Las Vegas, NV, USA
%I Information Gatekeepers, Boston, MA, USA, p: xiii+366
%D 17-21 Sept. 1984
%K local area networks optical communication optical fibres optical links
optical fibres optical links LANs optical cables
military applications high speed LANs CATV applications factory applications
telephone applications local distribution networks
%X The following topics were dealt with: optical fibres; optical links;
LANs; optical cables; military applications; high speed LANs; CATV
applications; factory applications; telephone applications and local
distribution networks

%A J. F. Bartlett
%T A 'Non-stop' Operating System
%J 11th Hawaii Conf. on System Sciences
%P 103-117
%D 1978

%A Joel Bartlett
%T A NonStop (TM) Kernel
%J Proceedings of the 8th Symposium on Operating Systems Principles,
Operating Systems Review
%V 15
%N 5
%D December 1981
%P 22-29
%K Message passing, process pairs, fault-tolerance
%O systems

%A Joel F. Bartlett
%T The Tandem 16: a "nonstop" operating system
%E D. P. Siewiorek
%E C. G. Bell
%E A. Newell
%B Computer Structures: Principles and Examples
%I McGraw-Hill
%D 1982
%P 480-485

%A P. D. Bartoli
%A H. V. Bertine
%A F. M. Burg
%A D. E. Carlson
%A K. D. Ho
%A L. M. Smith
%A T. B. Steel, Jr.
%A F. E. Weber
%A C. E. Young
%T The X-series recommendations for public data networks (1981-4)
%J J. Telecommun. Networks (USA)
%V 3
%N 3
%P 159-193
%D Fall 1984
%O 0 REFS
Treatment APPLICATIONS, GENERAL OR REVIEW
%K computer networks data communication systems
X series recommendations public data networks standardization
data communications
packet switching Open Systems Interconnection ISDN message handling
SG VII
%X The start of the 1980s have witnessed significant advances in the
standardization of important elements of data communications. The
International Telegraph and Telephone Consultative Committee (CCITT),
through the work of Study Group (SG) VII which is responsible for
developing Recommendations for Data Communication Networks, has
advanced existing work to a more mature level (e.g. in the areas of
packet-switching and Open Systems Interconnection (OSI)); and
undertaken work in new areas (e.g. Integrated Services Digital
Network (ISDN) and message handling). The authors review the
accomplishments of SG VII during the just completed 1981-4 study
period

%A V. R. Basili
%A J. C. Knight
%T A Language Design for Vector Machines
%J SIGPLAN Notices
%V 10
%P 39-53
%D 1975

%A J-L. Basille
%A S. Castan
%A M. Al Rozz
%T Parallel Architectures adapted to Image Processing, and their Limits
%E M. J. B. Duff
%B Computing Structures for Image Processing
%I Academic Press
%D 1983
%P 31-42

%A J. L. Basille
%A S. Castan
%A J. Y. Latil
%T Systeme Multiprocessor Adapte au Traitement d'Images
%B Languages and Architectures for Image Processing
%E M. J. B. Duff
%E S. Levialdi
%I Academic Press
%C New York, NY
%D 1981
%P 205-213
%K SY.MP.A.T.I.
%X Don't worry this paper is in English!

%A Jean-Luc Basille
%A Serge Castan
%A Bernard Delres
%A Jean-Yves Latil
%T Typical Propagation Algorithm on the Line-Processor SY.MP.A.T.I.: The Region
Labelling
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 99-110

%A F. Baskett
%A A. J. Smith
%T Interference in multiprocessor computer systems with interleaved memory
%J Comm. ACM
%V 19
%N 6
%D June 1976
%P 327-334
%K performance
%X Investigates the effects of memory interference in multiprocessor systems
and derives an analytical model to describe this.  Simulation results validate
this model.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A F. Baskett
%A J. H. Howard
%A J. Monague
%T Task Communication in DEMOS
%J Proceedings of the 6th Symposium on Operating Systems Principles
%I ACM
%D November 1977
%P 2-7
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%A H. B. Baskin
%A B. R. Borgerson
%A R. Roberts
%T PRIME A Modular Architecture for Terminal-Oriented Systems
%J Proceedings AFIPS Spring Joint Computer Conference
%D 1972
%P 431-437

%A M. Bataille
%T The GAMMA 60 - The Computer that was Ahead of Its Time
%J Computer Architecture News (SIGARCH)
%I ACM
%V 1
%N 2
%D April 1972
%P 10-15
%X This paper is a reprint from Honeywell Computer Journal v5, n3, p 99-105,
(1971).

%A K. Batcher
%T STARAN series E
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 140-
%K
%O Associative processors

%A K. E. Batcher
%T STARAN Parallel Processor System Hardware
%J Proceedings AFIPS National Computer Conference
%D 1974
%P 405-410
%K Required
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%A K. E. Batcher
%T Multi-Dimensional Access Solid State Memory
%R US Patent 3800289
%D March 1974

%A K. E. Batcher
%T Elementary Functions in the MPP PE
%R GER-16627
%I Goodyear Aerospace
%D December 1978
%K Massively Parallel Processor

%A K. E. Batcher
%T Nearest Neighbor Binary Rotation in the MPP
%R GER-16639
%I Goodyear Aerospace
%D January 1979
%K Massively Parallel Processor

%A K. E. Batcher
%A E. E. Eddey
%A R. O. Faiss
%A P. A. Gilmore
%T SAR Processing on the MPP
%R NASA-CR-166726 (N82-11801/9)
%D August 1981
%K Massively Parallel Processor

%A K. E. Batcher
%T The Massively Parallel Processor (MPP)
%J Digest of Papers, Compcon85 Thirtieth IEEE Computer society
International Conference
%I IEEE Computer Society
%D February 25-28, 1985
%P 21-24

%A Ken E. Batcher
%T MPP: a supersystem for satellite image processing
%J AFIPS Proc. of the NCC
%V 51
%D May 1982
%P 185-191

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T MPP \(em A Massively Parallel Processor
%A Kenneth Batcher
%P 249
%O Array Processors
%X Summary only.

%A Kenneth E. Batcher
%T Sorting Networks and Their Applications
%J Conference Proceedings of the 1968 Spring Joint Computer Conference
%V 32
%P 307-314
%I AFIPS Press
%D May 1968
%X
Reproduced in the 1984 tutorial: \fIInterconnection Network for parallel
and distributed processing\fP by Wu and Feng.

%A Kenneth E. Batcher
%T STARAN/RADCAP hardware architecture
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 147-152
%K
%O RADCAP

%A Kenneth E. Batcher
%T The Multi-Dimensional Access Memory in STARAN
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 167
%K
%O Memory organizations
%X Summary only.

%A Kenneth E. Batcher
%T The Flip Network in STARAN
%r GER-16344
%J Proceedings of the 1976 International Conference on Parallel Processing
%C Long Beach, California
%D August 1976
%I IEEE
%P 65-71
%K System architecture and organization
%X
Reproduced in the 1984 tutorial: \fIInterconnection Network for parallel
and distributed processing\fP by Wu and Feng.

%A Kenneth E. Batcher
%T The Multidimensional Access Memory in STARAN
%J IEEE Transactions on Computers
%V C-26
%P 174-177
%D February 1977
%K Associative processoring, corner-turning memories,
multidimensional access (MDA) memories, parallel processing,
solid-state memories,
correspondence, special issue on parallel processors and processing

%A Kenneth E. Batcher
%T The Massively Parallel Processor System
%J Proceedings of the 2nd AIAA Computers in Aerospace Conference
%D October 1979
%P 93-97
%K MPP

%A Kenneth E. Batcher
%T Architecture of a Massively Parallel Processor
%J Proceedings 7th Annual Symposium on Computer Architecture
%D May 1980
%C La Baule, France
%P 168-173

%A Kenneth E. Batcher
%T Design of a Massively Parallel Processor
%J IEEE Transactions on Computers
%V C-29
%N 9
%D September 1980
%P 836-840
%K Recommended, MPP
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%A Kenneth E. Batcher
%T Bit-Serial Parallel Processing Systems
%J IEEE Transactions on Computers
%V C-31
%N 5
%D May 1982
%P 377-384
%K Airborne processors, bit-serial processors, custom VLSI chips, image
processing, multidimensional access, parallel processors, radar processing,
Special issue on supersystems

%A Kenneth E. Batcher
%T The MPP Staging Memory
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 496-498
%O memory systems
%X The MPP staging memory is probably the most important new component
to SIMD type architectures recently implemented.

%A J. A. Bate
%A Jon C. Muzio
%T Three Cell Structures for Ternary Cellular Arrays
%J IEEE Transactions on Computers
%V C-26
%N 12
%D December 1977
%P 1191-1202
%K Cellular arrays, combinational switching functions, ternary full adder,
ternary logic, universal arrays,
Special section on microprogramming

%A P. Bates
%A J. C. Wileden
%T An approach to high-level debugging of distributed systems
%B SIGPLAN Not. (USA), ACM SIGSOFT/SIGPLAN Software Engineering
Symposium on High-Level Debugging
%V 18
%N 8
%C Pacific Grove, CA, USA
%P 107-111
%O 6 REFS
Treatment PRACTICAL
%D 20-23 March 1983
%K distributed processing program debugging
high level debugging distributed systems behavioral abstraction
Event Definition Language
%X The authors consider the Behavioral Abstraction (BA) approach to
high-level debugging of distributed systems. They discuss behavioral
abstraction and the Event Definition Language that is the basis for a
debugging tool implementing this approach. They address one of the
fundamental issues arising in actually providing debugging aid
through the BA approach, that of recognizing the occurrence of
abstracted behaviors. They conclude the paper with an assessment of
present status and outstanding problems

%A Peter C. Bates
%A Jack C. Wileden
%A Victor R. Lesser
%T A language to support debugging in distributed system
%R Technical Report 81-7
%I Department of Computer and Information Science, University of Massachusetts
%C Amherst, Massachusetts
%D April 1981

%A Ramachendra P. Batni
%A Charles R. Kime
%T A Module-level Testing Approach for Combinational Networks
%J IEEE Transactions on Computers
%V C-25
%N 6
%D June 1976
%P 594-604
%K B-transformation, combinational networks, effective blocking technique,
fault detection tests, module-level testing,
Special issue on fault tolerant computing

%A C. A. Batterman
%T A Distributed Facilities Management System
%J Computer Software and Applications Conference (COMPSAC79)
%I IEEE
%D November 1979
%P 553-557
%O distributed systems

%A G. Baudet
%T Iterative Methods for Asynchronous Multiprocessors
%E D. Kuck
%E D. Lawrie
%E A. Sameh
%B High Speed Computer and Algorithm Organization
%I Academic Press
%C New York
%P 309-310
%D 1977

%A Gerard Baudet
%A David Stevenson
%T Optimal Sorting Algorithms for Parallel Computers
%J IEEE Transactions on Computers
%V C-27
%N 1
%D January 1978
%P 84-87
%K Comparison/exchange, optimal speed-up ration, parallel algorithms,
parallel computers, sorting algorithms,
Correspondence

%A Gerard M. Baudet
%T Asynchronous iterative methods for multiprocessors
%J Journal of the ACM
%V 25
%N 2
%D April 1978
%P 226-244
%K Chaotic relaxation
multiprocessor applications
%X Presents techniques for exploiting the parallelism of multiprocessing
systems in solving a set of equations.  An interesting feature of the
algorithms described is that they do not require synchronization among
the cooperating processes working on the problem.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Gerard M. Baudet
%T The Design and Analysis of Algorithms for Asynchronous Multiprocessors
%R CMU-CS-78-116, Ph.D. thesis
%C Carnegie-Mellon University, Pittsburgh, PA
%D April 1978
%K Chaotic relaxation

%A L. H. Bauer
%T Implementation of data manipulating functions on the STARAN associative
processor
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 209-227
%K
%O RADCAP - the RADC associative processor

%A A. Baum
%A D. Senzig
%T Hardware considerations in a microcomputer multiprocessor system
%J Computer Technology to Reach the People-Digest of Papers \(em
COMPCON Spring 75
%C San Francisco, California
%D February 1975
%P 27-30
%K multiprocessor architectures and operating systems
%X A multiprocessor architecture suitable for LSI implementation is described.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Alan Bawden
%T CL1 Manual
%I MIT AI Lab
%R Working paper 254 (not for citation, internal use only)
%D Sept. 1983
%K LISP, parallelism, Connection Machine

%A Alan Bawden
%T A Programming Language for Massively Parallel Computers
%R MS Thesis
%I MIT
%D Sept. 1984
%K CL1, Connection machine, CGL, connection graph language, LISP
%X CL1 attempts to remove the concept of pointers (hazardous in a parallel
environment) and replace them with SIMD connections.

%A Alan Bawden
%A Philip E. Agre
%T What a Parallel Programming Language has to Let You Say
%R AI Memo 796
%I MIT AI Lab
%D Sept. 1984
%K CL1, Connection Machine, CGL, connection graph language, LISP,
coding cliches,

%A R. Bayer
%A M. Schkolnick
%T Concurrency of Operations on B-trees
%J Acta Informatica
%V 9
%D 1977
%P 1-22
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%T Parallelism and Recovery in Database Systems
%A R. Bayer
%A H. Heller
%A A. Reisner
%J ACM Transactions on Database Systems
%V 5
%N 2
%D June 1980
%P 139-156
%K Synchronization, consistency, transaction, recovery, integrity, two
phase locking, deadlock, concurrency
CR Categories: 4.32, 4.33

%A A. Bayliss
%A E. Turkel
%T Dynamics acoustics for the STAR-100
%r ICASE Report No. 79-6
%d March 7, 1979
%J Proceedings of the 3rd IMACS International Symposium on Computer
Methods for Partial Differential Equations
%D June 1979
%C Bethlehem , PA

%A Gary D. Beals
%T Extending Microprocessor Architectures
%J Byte
%V 10
%N 5
%D May 1985
%P 185-198
%O Special issue on multiprocessing

%A J. K. Beard
%T Optimization of Digital Signal Processors Using Array Processor and CCD
Technology
%J Conference Record, IEEE Int'l Conference on Acoustics, Speech and
Signal Processing
%D 1979
%P 857-858

%A R. Beardsworth
%T On the Application of Array Processors to Symbol Manipulation
%I Leeds University
%D 1982

%A M. Danielle Beaudry
%T Performance-Related Reliability Measures for Computing Systems
%J IEEE Transactions on Computers
%V C-27
%N 6
%D June 1978
%P 540-547
%K Computer performance, computer reliability, graceful degradation,
Systems: Design, analysis, and fault diagnosis

%A Hal B. Becker
%T Network Security in Distributed Data Processing
%J Data Communications
%I McGraw-Hill
%V 6
%D August 1977
%P 33-39
%X Very low level discussion.
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A H. Beeck
%T Parallel Algorithms for Linear Equations with Not Sharply Defined Data
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 257-261
%K parallel numerical algorithms

%A Stafford Beer
%T Platform for Change
%I Wiley
%D corrected reprint 1978

%A Stafford Beer
%T The Heart of Enterprise
%I Wiley
%D 1979

%A Stafford Beer
%T Brain of the Firm
%I Wiley
%D second edition 1981

%A John Beetem
%A Monty Denneau
%A Don Weingarten
%T The GF11 Supercomputer
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K Special Purpose Parallel Processors, IBM
%C Boston, MA
%P 108-115
%X 576 processors, modified SIMD, 2 MB memory per processor at 20 MFLOPS.
Memphis Switch, 50 ns.

%A G. Behie
%A P. Forsyth
%T Incomplete Factorization Methods for Fully Implicit Simulation of
Enhanced Oil Recovery
%J SIAM J. Sci. Stat. Comput.
%V 5
%P 543-561
%D 1984
%X Remove?

%A E. T. Beiner
%A P. P. Treis
%T A diagnostic system (X.25 protocol tester)
%J Avtom. & Vychisl. Tekh. (USSR)
%V 17
%N 4
%P 91-92
%O 0 REFS
Treatment PRACTICAL
%D 1983
%K network analysers packet switching program debugging program testing
protocols standards
network analyser protocol testing protocol debugging X.25
program package software implementations SM 4 computer
%X The structure and functional capabilities of a program package for
testing and debugging software implementations of the second-and
third-layer protocols of the X.25 standard are described. The
programs are intended for the SM-4 computer, equipped with a remote
synchronous data-transmission adapter

%A B. Beizer
%T The Architecture and Engineering of Digital Computer Complexes
%V 1,2
%I Plenum Press
%C New York
%D 1971

%A A. A. Belal
%T Multi-Dimensional FFT by One and Two Dimensional Array Processing
%J Proceedings IEEE Int'l Symposium on Circuits and Systems
%D 1978
%P 662-663

%A Geneva G. Belford
%T Setting Clocks Back in a Distributed Computing System
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 612-616
%O Distributed data bases applications and techniques

%A C. G. Bell
%A A. Newell
%T Computer Structures:  Reading and Examples
%I McGraw-Hill
%C New York
%D 1971

%A C. G. Bell
%A P. Freeman
%T "C.ai \(em a computer architecture for AI research
%J AFIPS Proc. of the FJCC
%V 41
%D 1972
%P 779-790

%A C. G. Bell
%A A. Kotok
%A T. N. Hasting
%A R. Hill
%T The Evolution of the DECSYSTEM 10
%J Communications of the ACM
%D January 1978
%V 21
%N 1
%P 44-63

%A C. Gordon Bell
%A Robert C. Chen
%A Samuel H. Fuller
%A John Grason
%A Satish Rege
%A Daniel P. Siewiorek
%T The architecture and applications of computer modules: a set of components
for digital systems design
%J Compcon 73
%I IEEE
%D 1973
%P 177-180

%A C. Gordon Bell
%T Multis: A New Class of Computer Multiprocessor Computers
%J Science
%V 228
%N 4698
%D 26 April 1985
%P 462-467
%K Multiple microprocessors, LSI
%X Special issue on computers and research. Paper does not adequately cover
the software issue.

%A D. H. Bell
%A et al.
%T Parallel Programming -- A Bibliography
%I Wiley-Heydon Co.
%D 1983
%X This published bibliography consists of 348 entries excluding:
conference proceedings, certain major journals such as CACM and JACM.
It is annotated and tends to contain articles out of the mainstream.
More as I learn about it.

%A C. Bellon
%A G. Saucier
%T Protection Against External Errors in A Dedicated System:
Test , Rollback and Recovery
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 374-383
%O Distributed Computing, Reliability and Fault Tolerance

%A Erik De\ Benedictis
%T NNCP/Homogeneous Machine Main Processor Board
%r Hm26
%R 5058:DF:82
%I California Institute of Technology
%C Pasadena, CA
%D December 1982
%K Caltech Cosmic Cube, hypercube, C^3P

%A Erik P. De\ Benedictis
%T An Embedded Concurrent Language
%r Hm22
%R 4781
%I California Institute of Technology
%C Pasadena, CA
%D August 1982
%K Caltech Cosmic Cube, hypercube, C^3P

%A Erik P. De\ Benedictis
%A Chuck Seitz
%T Homogeneous Machine Technical Plan
%r Hm21
%R 4705
%I California Institute of Technology
%C Pasadena, CA
%D January 1982
%K Caltech Cosmic Cube, hypercube, C^3P
%X Preliminary 1024 node plan.

%A Erik P. De\ Benedictis
%T The Fabrication of Pc Boards at Caltech
%R Hm 14
%I California Institute of Technology
%C Pasadena, CA
%D October 1982
%K Caltech Cosmic Cube, hypercube, C^3P

%A Erik P. De\ Benedictis
%T The Caltech NNCP Project
%r Hm 16
%R 5041:df:82
%I California Institute of Technology
%C Pasadena, CA
%D October 1982
%K Caltech Cosmic Cube, hypercube, C^3P

%A V. Benes
%T Mathematical Theory of Connecting Networks and Telephone Traffic
%I Academic Press
%C NYC, NY
%D 1965

%A V. E. Benes
%T Heuristic Remarks and Mathematical Problems Regarding the Theory of
Connecting Systems
%J Bell System Technical Journal
%V 41
%N 4
%D July 1962
%P 1201-1247

%A V. E. Benes
%T Algebraic and Topological Properties of Connecting Networks
%J Bell System Technical Journal
%V 41
%N 4
%D July 1962
%P 1249-1273

%A V. E. Benes
%T On Rearrangeable Three-Stage Connecting Networks
%J Bell System Technical Journal
%V 41
%N 5
%D September 1962
%P 1481-1492
%X
Reproduced in the 1984 tutorial: \fIInterconnection Networks for parallel
and distributed processing\fP by Wu and Feng.

%A V. E. Benes
%T Optimal Rearrangeable Multistage Connecting Networks
%J Bell System Technical Journal
%V 43
%N 4 (Part 2)
%D July 1964
%P 1641-1656

%A V. E. Benes
%T Algebraic and Topological Properties of Connecting Networks
%J Bell System Technical Journal
%V 43
%N 4 (Part 2)
%D July 1964
%P 1619-1640

%A E. Benhamou
%T Integrated Software Design for Z-Net, A Local Microcomputer Network
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 397-403
%K
%O distributed Systems in Specific Applications

%A David A. Bennett
%A C. A. Landauer
%T Automatic Integration of Missile Element Radar
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 507-513
%O Applications of distributed computing to radar systems

%A K. H. Bennett
%T Communications
%B Distributed Computing - Part III Loosely-Coupled Systems
%E Fred B. Chambers
%E David A. Duce
%E Gillian P. Jones
%I Academic Press
%S APIC Studies in Data Processing
%V 20
%D 1984
%P 147-160
%K standards, Cambridge Ring,

%A K. H. Bennett
%T Distributed Filestores
%B Distributed Computing - Part III Loosely-Coupled Systems
%E Fred B. Chambers
%E David A. Duce
%E Gillian P. Jones
%I Academic Press
%S APIC Studies in Data Processing
%V 20
%D 1984
%P 161-178
%K KUDOS, Newcastle, UNIX United, Cambridge Ring,

%A K. H. Bennett
%T Mechanisms for Distributed Control
%B Distributed Computing - Part III Loosely-Coupled Systems
%E Fred B. Chambers
%E David A. Duce
%E Gillian P. Jones
%I Academic Press
%S APIC Studies in Data Processing
%V 20
%D 1984
%P 179-192
%K transactions, atomic, Newcastle, UNIX United, locking,

%T Counting Paths: Nondeterminism as Linear Algebra
%A David B. Benson
%I IEEE Transactions on Software Engineering
%V SE-10
%N 6
%D November 1984
%K Convergent iterative programs, deterministic divergence,
nondeterministic divergence, nondeterministic programs,
nonnegative matrices, semirings,
Theory

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T A Tree Machine for Searching Problems
%A Jon Louis Bentley
%A H. T. Kung
%P 257-266
%O Searching

%A Jon Louis Bentley
%A Charles E. Leiserson
%T Space-Efficient Graph Layouts for VLSI
%J Workshop on Interconnection Networks for Parallel and Distributed
Processing
%D April 1980
%I IEEE
%P 29-30

%A H. Berendsen
%A W. van\ Gunsteren
%A J. Postma
%T Molecular Dynamics on CRAY, CYBER and DAP
%B Proceedings of the NATO Workshop on High Speed Computations
%E J. Kowalik
%S NATO ASI Series
%V F-7
%I Springer-Verlag
%P 425-438
%D 1984

%A H. K. Berg
%A M. G. Smith
%T A Distributed System Experimentation Facility
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 324-329
%K
%O Distributed Computing Testbeds

%A R. O. Berg
%A K. J. Thurber
%A A Multiplexed I/O System for Real Time Computers
%J Computer Design
%D May 1971
%P 99-103

%A R. O. Berg
%A et al.
%T PEPE \(em An Overview of Architecture, Operation and Implementation
%J Proceedings IEEE National Electronics Conference
%D September 1972
%P 312-317

%A R. O. Berg
%A L. L. Kinney
%T A Digital Signal Processor
%J IEEE Computer Society International Conference
%C New York
%D September 1972
%P 45-48

%A M. Berger
%A J. Oliger
%A G. Rodrigue
%T Predictor-Connector Methods for the Solution of Time Dependent
Parabolic Problems on Parallel Processors
%B Elliptic Problem Solvers
%E M. Schultz
%I Academic Press
%C New York
%P 197-202
%D 1981

%T A Partitioning Strategy for PDES Across Multiprocessors
%A Marsha J. Berger
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 166-170
%K Operating System Problems

%A Ph. Berger
%A P. Brouaye
%A J.C. Syre
%T A mesh coloring method for efficient MIMD processing in finite element
problems
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 41-46
%K
ONERA, Toulouse (France)
%O Numerical algorithms

%T A Parallel Implementation of the Fast Fourier Transform Algorithm
%A G. D. Bergland
%J IEEE Transactions on Computers
%V C-21
%N 4
%D April 1972
%P 366-370
%K Cooley-Tukey algorithm, discrete Fourier transform,
fast Fourier transform, Good's prime factor algorithm,
real-time spectrum analysis, rightly parallel computing,
special-purpose computer,
Hardware and systems

%A Eric J. Berglund
%A David R. Cheriton
%T Amaze: A Distributed Multi-Player Game Program using the Distributed V
Kernel
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 248-253
%O Special applications

%A Eric J. Berglund
%A David R. Cheriton
%T Amaze: a multiplayer computer game
%J IEEE Software
%V 2
%N 3
%P 30-39
%D MAY 1985
%X Amaze relies solely on the V kernel for point-to-point communication.
The game's techniques could work in a general class of distributed applications

%A R. G. Berglund
%T Comparing network architectures
%J Datamation
%D February 1978
%P 78-85

%A K. J. Berkling
%T Reduction Languages for Reduction Machines
%J Proceedings of 2nd Annual Symposium on Computer Architecture
%D 1975
%K Gessellschaft fur Mathematik and Datenverarbeitung
%C Bonn, West Germany
%P 133-140

%A Klaus J. Berkling
%T A Computing Machine Based on Tree Structures
%J IEEE Transactions on Computers
%V C-20
%N 4
%D April 1971
%P 404-418
%K Compiling, control structure, lambda calculus,
language-directed computer design, list processing, parallelism,
system architecture, tree addressing, tree structures, tree traversal
Switching theory

%A S. Y. Berkovich
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T An Outline of the Computer System with Associative Pipelining
%P 47-48
%O Architecture

%A S. Y. Berkovich
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Modelling of Large-Scale Markov Chains with Associative Pipelining
%P 131-132
%O Associative Processors and Processing

%A F. Berman
%A F. T. Leighton
%A L. Snyder
%T Optimal Tile Salvage
%I CS Dept., Purdue Univ.
%C West Layfayette, IN
%D 1982?

%A Francine Berman
%A Lawrence Snyder
%T On mapping parallel algorithms into parallel architectures
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 307-309
%K CHiP, topological variation, cardinal variation,
%O theory

%T Prep-P: A Mapping Preprocessor for CHiP Computers
%A Francine Berman
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 731-733
%K Problem Mapping Techniques

%A G. Bernard
%T A Non-Persistent CSMA-Abort Access Protocol for a Local Computer Network
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 369-376
%K
%O Local Area Networks Applications

%A R. Bernhard
%T Computing at the speed limit
%J IEEE Spectrum
%V 19
%N 7
%D July 1982
%P 26-31
%K Introduction
%X A survey of high speed computing projects including the CHiP, TRAC,
data flow machines, etc..

%A A. J. Bernstein
%T Analysis of Programs for Parallel Processing
%J IEEE Transactions on Electronic Computers
%V EC-15
%P 757-763
%D October 1966
%X In searching for this paper be warned that IEEE TOCs was renamed
from IEEE TOEC.

%A A. J. Bernstein
%T A Loosely Coupled Distributed System for Reliably Storing Data
%I Computer Science Dept., SUNY
%C Stony Brook, Long Island, NY 11794
%D September 1983

%A A. J. Bernstein
%A G. T. Wuu
%T Non-Serializable Maintenance of System-Level Data in an Unreliable
Distributed Environment
%J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing
%I ACM
%D August 1984

%A Arthur Bernstein
%A Paul H. Harter, Jr.
%T Proving Real-Time Properties of Programs with Temporal Logic
%J Proceedings of the 8th Symposium on Operating Systems Principles,
Operating Systems Review
%V 15
%N 5
%D December 1981
%P 1-11
%O verifying system properties

%A Herbert J. Bernstein
%A Max Goldstein
%T RINSE \(em What follows WASHCLOTH
%R ULTRACOMPUTER NOTE #47
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D 1983

%A P. A. Bernstein
%A N. Goodman
%T Approaches to concurrency control in distributed data base systems
%B Proc. Nat. Computer Conf.
%I AFIPS Press
%C Montvale, New Jersey
%D 1979
%P 813-820

%A P.A. Bernstein
%A D.W. Shipman
%A W.S. Wong
%T Formal Aspects of Serializability in Database Concurrency Control
%J IEEE Transactions on Software Engineering
%V SE-5
%D may 1979
%P 203-215

%A P. A. Bernstein
%A N. Goodman
%T Concurrency Control in Distributed Database Systems
%J ACM Computing Surveys
%D June 1981
%P 185-222

%A P. A. Bernstein
%A N. Goodman
%T Concurrency Control Algorithms for Multiversion Database Systems
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 209-215

%T The Correctness of Concurrency Control Mechanisms in a System for
Distributed Databases (SDD-1)
%A Philip A. Bernstein
%A David W. Shipman
%J ACM Transactions on Database Systems
%V 5
%N 1
%D March 1980
%P 52-68
%K Distributed database system, correctness of concurrency control,
serializability theory, conflict graph
CR Categories: 4.32, 4.33, 5.24

%T Concurrency Control in a System for Distributed Databases (SDD-1)
%A Philip A. Bernstein
%A David W. Shipman
%A James B. Rothnie, Jr.
%J ACM Transactions on Database Systems
%V 5
%N 1
%D March 1980
%P 18-51
%K Distributed database system, concurrency control, serializability,
time-stamps, synchronization, conflict graph
CR Categories: 4.32, 4.33

%T Query Processing in a System for Distributed Databases (SDD-1)
%A Philip A. Bernstein
%A Nathan Goodman
%A Eugene Wong
%A Christopher L. Reeve
%A James B. Rothnie, Jr.
%J ACM Transactions on Database Systems
%V 6
%N 4
%D December 1981
%P 602-625
%K Distributed databases, relational databases, query processing, query
optimization, semijoins
CR Categories: 3.70, 4.33

%A Ulrike Bernutat-Buchmann
%A Dietmar Rudolph
%A Karl-Heinz ScholBer
%T Parallel Computing I Eine Bibliographie
%I Rechenzentrum und Ruhr-Universitat Bochum
%D September 1983
%O ISSN: 0723-2187
%X An extremely large printed bibliography on the subject.  It is probably
in a machine readable form.  It has over 5000 entries, many in European
languages.  Should try to merge it with this list.  It does not appear
to have annotations, does have a cross reference list, does have keywords
but they are not printed.

%A Ulrike Bernutat-Buchmann
%A Jost Krieger
%T A Note on Parallel Algorithms for Partial Differential Equations
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 99-105
%D 1984
%K Cyber 205,

%A P. B. Berra
%T Recent developments in data base and information retrieval hardware
and architecture
%J COMPSAC
%D November 1978
%P 698-703

%A P. Bruce Berra
%A Ashok K. Singhania
%T The Feasibility of Using Associative Processor in Change Detection
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 241
%K STARAN
%O algorithms and applications
%X Summary only.

%A P. Bruce Berra
%A Ashok K. Singhania
%T Some Timing Figures for Inverting Large Matrices Using the STARAN
Associative Processor
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 243
%K
%O algorithms and applications
%X Summary only.

%A P. Bruce Berra
%T Associative Processors and Data Base Management
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 39-48
%X Taped presentation transcript.

%A P. Bruce Berra
%A Ellen Oliver
%T The Role of Associative Array Procesors in Data Base Machine Architectures
%J Computer
%I IEEE
%V 12
%N 3
%P 53-61
%D March 1979
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%A T. A. Berson
%A R. K. Bauer
%T Local network cryptosystem architecture
%B Local Networks. Distributed Office and Factory Systems. Proceedings
of Localnet '83
%C New York, USA
%I Online Publications, Pinner, England xii+524
%P 459-471
%O 12 Refs
Treatment PRACTICAL.
%D 27-29 June 1983
%K computer networks cryptography data communication systems.
broadband local area network key distribution centres data encryption
end to end cryptosystem protocol
%X This paper describes the end-to-end cryptosystem features of a
commercially available broadband local network. The principles of
operation of the network are described. The key distribution protocol
is a session layer function which uses secret master keys and one or
more key distribution centers. A stream cipher based upon DES is used
at the transport layer for encryption of data.

%A F. Bertera
%A A. Boccalatte
%A M. DiManzco
%T A fault-tolerant approach to processor synchronization in a
multi-microprocessor environment
%J Proc. Conf. Microprocessors and Microprogramming
%C Amsterdam, Netherlands
%K reliability and error recovery
%X Considers the problem of software synchronization in the presence of
hardware failure in a multiprocessor system.  Describe a fault-tolerant
synchronization technique for critical applications.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A G. Berthelot
%T Checking Liveness of Petri-Nets
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 217-220
%K Petri nets and related topics

%A Maria Bertocchi
%A Adriana Gnudi
%T A Parallel Directives Expansion Method in a Multimicroprocessor
Operating System Environment
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 391-396
%D 1984
%K cobegin, coend,

%A M. Berzins
%A T. F. Buckley
%A P. M. Dew
%T Systolic Matrix Iterative Algorithms
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 483-488
%D 1984

%A M. Berzins
%A T. F. Buckley
%A P. M. Dew
%T Path Pascal Simulation of Multiprocessor Lattice Architectures
for Numerical Computation
%E D. J. Paddon
%B Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford, England
%D 1984
%P 25-33

%A M. Berzins
%A T. Buckley
%A P. Dew
%T Path Pascal Simulation of Multiprocessor Lattice Architectures for
Numerical Computations
%E D. Paddon
%B Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford
%D 1984
%P 25-33

%A A. T. Berztiss
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Iterators and Concurrency
%P 168-169
%O

%A E. Best
%A B. Randell
%T A Formal Model of Atomicity in Asynchronous Systems
%J Acta Informatica
%V 16
%D 1981
%P 93-124

%A C. Betourne
%A M. Filali
%A G. Padiou
%A A. Sayah
%T Distributed Control through Task Migration via Abstract Networks
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Distributed Control Algorithms, Ada, Clones, commuications, TASKs,
%P 532-538

%A J. Bezivin
%A H. Imbert
%T Adapting a Simulation Language to a Distributed Environment
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 596-604
%K
%O Distributed Simulation

%A Dileep P. Bhandarkar
%T Analysis of Memory Interference in Multiprocessors
%J IEEE Transactions on Computers
%V C-24
%N 9
%D September 1975
%P 897-908
%K Analytic models, Markov chains, memory interference, multiprocessors,
performance measurement, simulation,
Memory systems

%A Dileep P. Bhandarkar
%T Some Performance Issues in Multiprocessor System Design
%J IEEE Transactions on Computers
%V C-26
%N 5
%D May 1977
%P 506-511
%K memory interference, memory interleaving, multiprocessors, performance
Correspondence, performance
%X Uses analytic and simulation models to study the effects of alternative
multiprocessor designs on performance. Paper presents guidelines for designing
multiprocessor systems.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A B. Bhargava
%T Performance Evaluation of the Optimistic Approach to Distributed Database
Systems and Its Comparison to Locking
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 508-517
%K
%O Deadlock Detection

%T Simulation of Large Networks of Processors by Smaller Ones
%A S. K. Bhaskar
%A Azriel Rosenfeld
%I Computer Vision Laboratory, Center for Automation Research, University
of Maryland
%R CAR-TR-63, CS-TR-1401
%D May 1984
%K Parallel processing, multiprocessing, processor networks,
interprocessor communication

%A K. V. S. Bhat
%T Fault Diagnosis in Hypercube Connected Array of Processors
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 318-322
%K
%O Network Topology

%A D. Bhatt
%A D. R. Smith
%T Communications in a hierarchical multicomputer
%J Proc. Fall 1979 Compcon
%I IEEE
%D 1979
%P 374-379

%A D. Bhatt
%A M. Schroeder
%T A comprehensive Approach to Instrumentation for Experimentation in
a Distributed Computing Environment
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 330-340
%K
%O Distributed Computing Testbeds

%A D. Bhatt
%A T. Chan
%A W. Heimerdinger
%T Bus performance experiments on a real-time distributed computer
system
%J Proceedings of the Real-Time Systems Symposium
%C Arlington, VA. USA
%D 6-8 Dec. 1983
%P 41-50
%O 9 REFS. Treatment EXPERIMENTAL
%I IEEE Comput. Soc. Press. Silver Spring, MD, USA, x+289,
Std Book No.0 8186 0511 1
%K distributed processing real time systems test facilities instrumentation
computer testing computer interfaces
bus performance experiments real time distributed computer
Honeywell Experimental Distributed Processor global data bus allocation scheme
instrumentation facilities distributed computer testbed

%A Devesh Bhatt
%A P. Sadayappan
%A Richard B. Kieburtz
%A David R. Smith
%T An Operating System Kernel for a Hierarchical Multicomputer
%J Proc. of 21st IEEE COMPCON
%D Fall 1980
%P 655-672
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A P. C. P. Bhatt
%T A parallel algorithm to generate all sink trees for directory routing
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 425-430
%O algorithms

%T How To Assemble Tree Machines
%A Sandeep N. Bhatt
%A Charles E. Leiserson
%I Massachusetts Institute Of Technology
%R MIT/LCS/TM-255
%D March 1984

%A V. Bhavsar
%A J. Isaac
%T Design and Analysis of Parallel Algorithms for Monte Carlo Techniques
%J Proc. 10th IMACS World Congress on Systems Simulation and Scientific
Computation
%V 1
%I IMACS
%P 323-325
%D 1982

%A V. Bhavsar
%A U. Gujar
%T VLSI Algorithms for Monte Carlo Solutions of Partial Differential
Equations
%E R. Vichnevetsky
%E R. Stepleman
%B Advances in Computer Methods for Partial Differential Equations,
Proc. of the Fifth IMACS International Symposium
%V V
%I Lehigh University
%D June 1984
%P 268-276

%A L. Bhuyan
%A D. P. Agrawal
%T A General Class of Processor Interconnection Strategies
%J Proceedings of 9th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 10
%N 3
%D April 1982
%P 90-100

%A L. N. Bhuyan
%A D. P. Agrawal
%T VLSI Performance of Multistage Interconnection Network Using 4 * 4
Switches
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 606-613
%K
%O Network Evaluation

%A Laxmi N. Bhuyan
%A Dharma P. Agrawal
%T Applications of SIMD Computers to Signal Processing
%J National Computer Conference \(em Proceedings
%I AFIPS
%V 51
%D 1982
%P 135-142

%A Laxmi N. Bhuyan
%A Dharma P. Agrawal
%T Design and performance of a general class of interconnection networks
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 2-9
%K
U of Manitoba and NCSU
%O Interconnection networks

%A Laxmi N. Bhuyan
%A C. W. Lee
%T An interference analysis of interconnection networks
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 2-9
%K crossbars, delta networks, omega networks
multistage network performance

%A Laxmi N. Bhuyan
%A Dharma P. Agrawal
%T Design and Performance of Generalized Interconnection Networks
%J IEEE Transactions on Computers
%V C-32
%N 12
%D December 1983
%P 1081-1090
%K Bandwidth, cost factor, generalized shuffle, m-shuffle, mixed radix number
system, multistage interconnection networks (MINs), network optimization,
permutation and combination, probabilities of acceptance.
Generalized shuffle network (GSN).

%A Laxmi N. Bhuyan
%A Dharma P. Agrawal
%T Generalized Hypercube and Hyberbus Structures for a Computer Network
%J IEEE Transactions on Computers
%V C-33
%N 4
%D April 1984
%P 323-333
%K Distributed computers, hyperbus structures, hypercube structures,
local area networks, multistage interconnection networks, parallel computers,
topological optimization,
Interconnection networks

%A Laxmi N. Bhuyan
%T A combinatorial analysis of multibus multiprocessors
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 225-227
%K interconnection networks,
%O queueing analysis

%A Laxmi N. Bhuyan
%T On the Performance of Loosely Coupled Multiprocessors
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%D June 1984
%P 256-262
%K multiprocessor issues
%X The bulk of this paper is an analysis of cross-bar versus Omega networks.

%T An Analysis of Processor-Memory Interconnection Networks
%A Laxmi N. Bhuyan
%I IEEE Computer Society
%R
%D March 1985
%K Bandwidth, crossbar switches, favorite memories, multistage
interconnection networks, multiprocessor performance.

%A Ronald Bianchini
%A Ronald Bianchini, Jr.
%T Wireability of an Ultracomputer
%R DOE/ER/03077-77
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D October 1982

%A L. Bic
%T Protection and Security in a Dataflow System
%I Dept. of Information and Computer Science, Univ. of California
%R TR 126
%C Irvine, CA
%D October 1978

%A L. Bic
%A R. L. Hartmann
%A J. Todhunter
%T The Active Graph Database Machine
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 178-186
%K
%O Database Machines

%A Lubomir Bic
%T Execution of Logic Programs on a Dataflow Architecture
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%D June 1984
%P 290-296

%A Lubomir Bic
%T Data-Driven Logic: A Basic Model
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 1.20-1.25
%O Data flow machines

%A Joachim Bieber
%A S. Florek
%T A Performance Tool for Design and Installation Support of Distributed
Data Base Systems
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 440-447
%O data base computers

%T Parallel Dynamic Storage Allocation
%A Bruce M. Bigler
%A Stephen J. Allan
%A R. R. Oldehoeft
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 272-275
%K Memory Management

%A J. le Bihan
%A C. Esculier
%A G. le Lann
%A W. Litwin
%A G. Gardarin
%A S. Sedillot
%A L. Treille
%T SIRIUS: a french nationwide project on distributed data bases
%Z INRIA-SIRIUS, le Chesnay, France
%J Very large data bases. Proceedings of the sixth international conference
%P 75-85
%D 1-3 Oct. 1980
%C Montreal, Canada
%I IEEE, New York, USA
ix+435 pp.
%O 81 Refs.
treatment: applic
%K database management systems distributed processing
sirius distributed data bases inria data base management systems
%X Presents sirius, a french nationwide pilot project on distributed data
bases initiated by inria (institut national de recherche en informatique et
automatique) in june 1976. The project sirius is a collaborative projective
involving people from universities, research centres, industry and 'end
users'. It is aimed at the development of, and the experimentation with
techniques and methodologies which permit the definition, realization and
exploitation of distributive data base management systems. The authors
describe the original objectives, organization and achievements of the
project. They give also a listing of the principal technical documents
produced by the project participants.

%A A. Y. Bilal
%A O. I. El-Dessouki
%T An optimization technique for parallel processing in a generalized
multiprocessor computer network
%J Proc. Symp. for Computers, Electronics, and Control
%C Alberta, Canada
%D May 1974
%K scheduling
%X Presents a heuristic branch and bound technique for obtaining the optimal
schedule in a multiprocessor system having processors of varying
speeds.  Describes and evaluate alternative heuristics to be used in this
algorithm.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Gianfranco Bilardi
%A Franco P. Preparata
%T An Architecture for Biotonic Sorting with Optimal VLSI Performance
%J IEEE Transactions on Computers
%V C-33
%N 7
%D July 1984
%P 646-651
%K area-time tradeoff, biotonic sorting, cube-connected cycles,
optimal algorithms, parallel computation, VLSI complexity,
sorting

%T A Minimum Area VLSI Network for O(log n) Time Sorting
%A Gianfranco Bilardi
%A Franco P. Preparata
%I IEEE Computer Society
%R ISSN 0018-9340
%D April 1985
%K Area-time tradeoff, bitonic merging, combination sorting,
cube-connected cycles, mesh, optimal algorithms, orthogonal trees,
parallel computation.

%A A. Bilgory
%A D. D. Gajski
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T An Algorithm for Efficient Layouts of Parallel Suffix Solutions
%P 245-252
%O VLSI Architectures

%A G. N. Billerbeck
%T Specification, Evaluation and Selection of a Host/Array System
%J Digest of Papers, COMPCON Fall 77
%D 1977
%P 58-63

%A D. Bini
%T Parallel Solution of Certain Toeplifz Linear Systems
%J SIAM J. Comp.
%V 13
%P 368-476
%D 1984

%A R. M. Bird
%A et al.
%T Study of Associative Processing Techniques
%J National Technical Information Service
%R AD376572
%D September 1966

%A Richard M. Bird
%T An Associative Memory Parallel Deltic Realization for Active Sonar Signal
Processing
%E L. C. Hobbs
%E D. J. Theis
%E Joel Trimble
%E Harold Titus
%E Ivar Highberg
%B Parallel Processor Systems, Technologies and Applications
%I Spartan Books
%C New York, New York
%D 1970
%P 107-129
%K Applications

%A S. Biringen
%T Simulation of Late Transition in Plane Channel Flow
%J Proceedings of the Third International conference on Numerical Methods
in Laminar and Turbulent Flow
%D August 1983
%C Seattle, WA
%X Remove?

%A S. Biringen
%T A Numerical Simulation of Transition in Plane Channel Flow
%I AIAA
%R Paper No. 83-47
%C Reno, NV
%D January 1983
%X Should this and the following paper by the same author be here?
%X Remove?

%A G. Birkhoff
%A A. Schoenstadt, (Ed.)
%T Elliptic Problem Solvers
%I Academic Press
%C New York
%D 1984

%A D. A. Birkner
%T High Speed Array Processor Using Serial Techniques
%J Conf. Record, WESCON 1979
%R paper no. 7/3

%T Implementing Fault-Tolerant Distributed Objects
%A Kenneth P. Birman
%A Thomas A. Joseph
%A Thomas Raeuchle
%A Amr El Abbadi
%J IEEE Transactions on Software Engineering
%V SE-11
%N 6
%I IEEE Computer Society
%D June 1985
%O Special Issue on Reliability in Distributed Software and Database
Systems
%P 502-508
%K Abstract data types, availability, checkpoint/restart, concurrency,
consistency, distributed databases, distributed systems,
fault-tolerance, recovery, reliability

%A Andrew D. Birrell
%A Roy Levin
%A Roger M. Needham
%T Grapevine: an Excercise in Distributed Computing (Summary)
%J Proceedings of the 8th Symposium on Operating Systems Principles,
Operating Systems Review
%V 15
%N 5
%D December 1981
%P 178-179
%O user-oriented systems

%A Andrew D. Birrell
%A Bruce Jay Nelson
%T Implementing Remote Procedure Calls (abstract)
%J Proceedings of the 9th Symposium on Operating Systems Principles,
Operating Systems Review
%V 17
%N 5
%D October 1983
%P 3
%K Xerox PARC, RPC
%O communication

%A P. Birzele
%A H. Thinschmidt
%T A Local Distributed Microcomputer Network Based on an Optical Bus
System with Decentralized Communication Control
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 497-501
%K
%O Local Area Networks and Applications

%A R. Bisiani
%A H. Mauersberg
%T Software development for task-oriented multiprocessor structures
%J Fall 1979 Compcon
%I IEEE
%D 1979
%P 20-27

%T A Multiprocessor Implementation of CSP
%A J. Biskeborn
%I University of Colorado
%D 1983
%R Computer Science Department Report

%A Dina Bitton
%A David J. DeWitt
%A David K. Hsaio
%A Jaishankar Menon
%T A Taxonomy of Parallel Sorting
%J ACM Computing Surveys
%V 16
%N 3
%P 287-318 
%D September 1984
%K Categories and Subject Descriptors: B.3 [Hardware]: Memory Structures;
B.4 [Hardware]: Input/Output and Data Communications;
B.7.1 [Integrated Circuits]: Types and Design Styles;
F.2.2 [Analysis of Algorithms and Problem Complexity]:
Nonnumerical Algorithms and Problems
General Terms: Algorithms
Additional Key Words and Phrases: Block sorting, bubble memory,
external sorting, hardware sorters, internal sorting, limited parallelism,
merging, parallel sorting, sorting networks

%A Andrew P. Black
%T An Asymmetric Stream Communication System
%J Proceedings of the 9th Symposium on Operating Systems Principles,
Operating Systems Review
%V 17
%N 5
%D October 1983
%P 3-10
%K Univ. of Wash., Eden
%O communication

%A W. Black
%A J. F. Harris
%A T. Clement
%T A Generalized Support Package for Image Acquisition
%B Languages and Architectures for Image Processing
%E M. J. B. Duff
%E S. Levialdi
%I Academic Press
%C New York, NY
%D 1981
%P 117-123

%A G. Blair
%A D. Hutchison
%A D. Shepherd
%T Implementation of a local network operating system
%B Local Networks. Strategy and Systems. Localnet '83 (Europe)
%C London, England
%P 387-398
%O 11 REFS
Treatment PRACTICAL
%I Online Publications, Northwood Hills, Middx., USA, p: x+535
%D 8-10 March 1983
%K operating systems computer networks
computer networks local network operating system Strathclyde University Mimas
UNIX resource sharing ISO network model
%X Distributed operating systems are currently a very demanding and
important area of research. At Strathclyde University, interests are
in one particular class of distributed operating systems, namely
network operating systems. An experimental system is being developed
called the Mimas network operating system. This system is homogeneous
in that it links and unifies a number of computers all running the
UNIX operating system. The design criteria for this system are
resource sharing, high availability and ease of extensibility. It is
argued that the ISO network model is of limited use in the design of
such a system and an alternative model, the Mimas model, is
presented. Implementation details are given for the different layers
in the system

%A G. S. Blair
%T A performance study of the Cambridge Ring
%J Comput. Networks (Netherlands)
%V 6
%N 1
%P 13-20
%D 1982
%O 12 Refs.
Treatment PRACTICAL.
%K computer networks packet switching.
performance study Cambridge Ring bandwidth simulation techniques
mini packets expected delay.
%X The Cambridge Digital Communication Ring, in its present state of
development, is rather wasteful of bandwidth. The author
investigates, by the use of simulation techniques, the turning of
system parameters, namely the number of mini-packets and size of
mini-packets, to minimise the expected delay of messages. The results
bring to light criteria for deciding on the number of mini-packets in
the system and also demonstrate that significant improvements in
performance can be achieved by increasing the number of data bytes
from the present two, the optimum value depending on the nature of
the workload.

%A G. S. Blair
%A D. Hutchison
%A W. D. Shepherd
%T MIMAS-A Network Operating System for Strathnet
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE, New York, USA, xix+901
%P 212-217
%O 25 Refs
Treatment PRACTICAL.
%K operating systems distributed processing computer networks.
MIMAS network operating system Strathnet
distributed systems Strathclyde University bottom up
layered approach Ethernet like local area network
interprocess communication service port PDP 11s UNIX.
%X Recent technological advances and developments in user requirements
have led to the recognition of a new branch of Computer Science, that
of distributed systems. A great deal of research is required before
their potential benefits can be fully realised. At Strathclyde
University, research into distributed systems has followed a bottom-
up layered approach. The first stage was the design of an Ethernet-
like local area network called Strathnet. This was followed by the
development of an interprocess communication service employing the
notion of a port which provides a testbed for experimentation into
distributed operating systems design. The distributed operating
system will primarily integrate a number of departmental PDP-11s
running the UNIX operating system and will reside in a series of
layers above the UNIX kernel. The main design criteria for the system
are ease of incremental growth, high availability and reliability.
This paper outlines the design of the MIMAS network operating system.

%A G. S. Blair
%A J. A. Mariani
%A W. D. Shepherd
%T A practical extension to UNIX for interprocess communication
%J Software-Pract. & Exper. (GB)
%V 13
%N 1
%P 45-58
%D 1983
%O 17 Refs.
Treatment PRACTICAL.
%K operating systems computer networks distributed processing.
local area networks datagrams client/server model UNIX
operating system interprocess communication structure.
%X This paper presents a solution to the problem of extending a current
generation operating system, UNIX for a network environment by
providing an interprocess communication service. Particular emphasis
is placed on the problems imposed by the operating system structure
and how they were overcome in the design.

%A C. Blakely
%T PEPE Application to BMD systems
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 193-
%K
%O Parallel array processors

%A R. Blumberg
%T Access protocols for a X.25 local area network.
%J Proceedings COMPCON 83 Fall: Delivering Computer Power to End Users.
Twenty-Seventh IEEE Computer Society International Conference
%C Arlington, VA, USA
%I IEEE Computer Soc. Press, IEEE
Silver Spring, MD, USA x+548 ISBN: 0-8186-0492-1
%P 13-19
%O 3 Refs
Treatment APPLICATIONS, PRACTICAL.
%D 25-29 Sept. 1983
%K computer networks packet switching protocols.
X.25 local area network access protocols CCITT X.25 packet transport service
network administration D bit maximum packet size packet level addressing
fast select.
%X Some of the issues which were encountered in developing the access
protocols for a local area network are considered. CCITT X.25 is
employed as the packet transport service, and a network access
protocol is added for purposes of network administration. Advantage
was taken of the inherent flexibility of the X.25 packet level to
emphasize system performance objectives. Packet level issues covered
are: D-bit, maximum packet size, packet level addressing, and fast
select.

%A M. Blumenfeld
%T Preconditioning Conjugate Gradient Methods on Vector Computers
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 107-113
%D 1984
%K block Toeplitz matrices
%X An extension of a preconditioning method by Johnson, Micchelli and Paul
[1983].

%A J. C. Boarder
%T Graphical Programming for Parallel Processing Systems
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 467-474
%K
%O Languages Constructs & Semantics of Parallel Programming

%A M. Boari
%A S. Crespi Reghizzi
%A A. Dapra
%A A. Natali
%T MML: A programming line for multiple-microprocessors systems
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 680-688
%K
%O Software Transportability

%A Maurelio Boari
%A Stefano Crespi-Reghizzi
%A Alberto Dapra .\"ascente
%A Francesco Maderna
%A Antonio Natali
%T Multiple-Microprocessor Programming Techniques: MML, a New Set of Tools
%J Computer
%V 17
%N 1
%D January 1984
%P 47-59
%K Software, Multiple-Micro Programming Line (MML), programming environment,
debugging

%A G. V. Bochmann
%T Communication protocols and error recovery procedures
%J Proceedings of the ACM SIGCOMM/SIGOPS INTERPROCESS Interprocess
Communications Workshop
%C Santa Monica, Calif., USA
%D 24-25 March 1975
%P 45-50
%O 9 REFS. Treatment THEORETICAL
%I ACM. New York, USA, 1975, viii+101
%K computer networks error detection data communication systems
operating systems fault tolerant computing
error recovery procedures data transmission interacting processes
communication protocols

%A G. V. Bochmann
%T Finite state description of communication protocols
%J Comput. Networks (Netherlands)
%V 2
%N 4-5
%P 361-372
%O 16 REFS. Treatment Applications, General
%D Sept.-Oct. 1978
%K computer networks
direct coupling empty medium abstraction protocol finite state description

%A G. V. Bochmann
%T Architecture of Distributed Computer Systems
%B Lecture Notes in Computer Science 77
%I Springer-Verlag
%D 1979

%A G. V. Bochmann
%T Higher-level protocols are not necessarily end-to-end
%J Comput. Commun. Rev. (USA), SIGCOMM '83 Symposium on Communications
Architectures & Protocols
%V 13
%N 2
%C Austin, TX, USA
%P 10-11
%O 0 Refs
%D 8-9 March 1983
%K protocols standards
end to end protocols Transport Layer Application Layer communication
computer networks OSI distributed computing system gateway
local area network Reference Model higher level protocols
concatenation property
%X The higher-level communication protocols in computer networks, such
as those belonging to the OSI Transport through to Application
Layers, are usually considered to have an end-to-end significance;
that is, the entities executing the protocol reside at the two
respective ends of the connection, close to the users. An Open System
may be, in particular, a distributed computing system which presents
to its environment, for example through a gateway, the protocol
behaviour defined by OSI. In this case the Open System would use
internally, possibly over a local area network, specific protocols
which may or may not be structured according to the OSI Reference
Model, but which are different from the protocols defined for OSI. In
this case the OSI higher-level protocols would be executed between
the entities in the environment of the Open System and the gateway of
the Open System, which is not end-to-end. The purpose of this paper
is to point out that this situation can be considered normal provided
that the OSI services have a 'concatenation property'

%A G. V. Bochmann
%T Structured specification of communicating systems
%J IEEE Trans. Comput. (USA)
%V C-32
%N 2
%P 120-133
%O 34 REFS. Treatment THEORETICAL
%D Feb. 1983
%K distributed processing multiprocessing systems computer networks
structured specification methods proof rules design parallel processing
specification language computer networks multiprocessing systems
distributed systems
communicating processes rendezvous interactions ports verification rules
stepwise refinement hardware interface consistency

%T Multi-Grid Oriented Computer Architecture
%A A. Bode
%A G. Fritsch
%A W. Handler
%A W. Henning
%A F. Hofmann
%A J. Volkert
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 89-95
%K Parallel Architectures

%T Distributed Data Processing Rationale: The Program Planning Point of View
%A W. E. Boebert
%I Honeywell Systems and Research Center
%R 77SRC66
%D September 1977

%A W. E. Boebert
%A W. R. Franta
%A E. D. Jensen
%A R. Y. Kain
%T Design Issues in a Distributed Executive
%J Compsac 78
%P 254-258
%I IEEE
%D 1978
%K distributed processing

%A W. E. Boebert
%A W. R. Franta
%A E. D. Jensen
%A R. Y. Kain
%T Kernel Primitives of the HXDP Executive
%J Computer Software and Applications Conference (COMPSAC78)
%P 595-599
%I IEEE
%D November 1978
%K communications issues in parallel and distributed systems

%A D. R. Boggs
%A R. M. Metcalfe
%T Ethernet: packet transport for distributed computing
%J Proceedings of Spring Compcon 78
%C San Francisco, CA, USA 28
%D March 1978
%P 152
%O 1 REFS. Treatment General
%I IEEE. New York, USA, 1978, xvii+367
%K packet switching computer networks data communication systems
Ethernet packet transport distributed computing coaxial cable
computer networks

%A D. R. Boggs
%A J. F. Shoch
%A E. A. Taft
%A R. M. Metcalfe
%T PUP: an internetwork architecture
%Z Palo Alto Res. Center, Xerox Corp., Palo Alto,CA, USA
%J IEEE Trans. Commun. (USA)
%V COM-28
%N 4
%P 612-624
%D April 1980
%O 32 Refs.
treatment: practical,theoretical
%K communication networks data communication systems
pup internet packet format parc universal packet protocols
internetwork datagram computer network data communication system
%X PUP is the name of an internet packet format (parc universal packet), a
hierarchy of protocols, and a style of internetwork communication. The
fundamental abstraction is an end-to-end media-independent internetwork
datagram. Higher levels of functionality are achieved by end-to-end
protocols that are strictly a matter of agreement among the communicating
end processes. This report explores important design issues, sets forth
principles that have guided the pup design, discusses the present
implementation in moderate detail, and summarizes experience with an
operational internetwork. This work serves as the basis for a functioning
internetwork system that provides service to about 1000 computers, on 25
networks of 5 different types, using 20 internetwork gateways.

%T Hardware and Software Enhancement of the Manchester Dataflow Machine
%A A. P. W. Bohm
%A J. R. Gurd
%A J. Sargeant
%J Digest of Papers, Compcon85 Thirtieth IEEE Computer society
International Conference
%I IEEE Computer Society
%D February 25-28, 1985
%P 420-423

%A J. F. Bohme
%T Fast Signal Detection by Process Computers
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 179-182
%K CPSI MAP array processors, SONAR,
industrial and industrial like projects

%A J. Boisseau
%A M. Enselme
%A D. Guinraud
%A P. Leed
%T Potential Assessment of a Parallel Structure for the Solution of
Partial Differential Equations
%J Rech. Aerosp.
%D 1982

%A A. Bojanczyk
%A R. Brent
%A H. Kung
%T Numerically Stable Solution of Dense Systems of Linear Equations Using
Mesh-Connected Processors
%J SIAM J. Sci. Stat. Comput.
%V 5
%P 95-104
%D 1984

%A S. Bokhari
%A M. Hussaini
%A S. Orszag
%T Fast Orthogonal Derivatives on the STAR
%J Comp. Math. Applications
%V 8
%P 367-377
%D 1982

%A S. Bokhari
%A M. Y. Hussaini
%A J. J. Lambiotte, Jr.
%A S. A. Orszag
%T Navier-Stokes solution of the CYBER-203 by a pseudospectral technique
%r ICASE Report No. 81-12
%d March 27, 1982
%J Second IMACS International Symposium on Parallel Computation
%D November 1982
%C Newark, Delaware

%A S. H. Bokhari
%T Dual processor scheduling with dynamic reassignment
%J IEEE Trans. on Software Engineering
%V SE-5
%N 4
%D July 1979
%P 341-349
%K scheduling
%X Discusses the use of network flow algorithms in the optimal assignment
of program subtasks to processors in a dual-processor environment.  An
extension of earlier work by Stone, this approach differs from Stone's in
that modules are dynamically rather than statically assigned.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A S. H. Bokhari
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T MAS:  An Algorithm for Finding Maximum in an Array Processor with a
Global Bus
%P 302-303
%O

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T On the Mapping Problem
%A Shahid H. Bokhari
%P 239-248
%O Array Processors

%A Shahid H. Bokhari
%T On the Mapping Problem
%J IEEE Transactions on Computers
%V C-30
%N 3
%D March 1981
%P 207-214
%K Adjaceny matrices, array processing, assignment, computer networks,
distributed processors, finite element machine (FEM),
graph isomorphism, heuristic algorithm, mapping problem, pairwise interchange
%X
Reproduced in the 1984 tutorial: \fI Interconnection Networks for parallel
and distributed processing\fP by Wu and Feng.

%A Shahid H. Bokhari
%A A. D. Raza
%T Augmenting computer networks
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 338-345
%O computer networks

%A Shahid H. Bokhari
%T Finding maximum on an array processor with a global bus
%r ICASE Report No. 82-27
%d September 16, 1982
%J IEEE Transactions on Computers
%V C-33
%N 2
%D February 1984
%O Parallel processing
%K Array processors, global bus, interconnection structures, maximum,
networks, parallel processing, two-phase algorithm

%A D. Boley
%A B. Buzbee
%A S. Parter
%T On Block Relaxation Techniques
%I University of Wisconsin, Mathematics Center
%R No. 1860
%D 1978

%A D. Boley
%T Vectorization of Block Relaxation Techniques: Some Numerical
Experiments
%J Proc. 1978 LASL Workshop on Vector and Parallel Processors
%C Los Alamos, NM
%D 1978

%A D. Bolus
%A H. Fallour
%A J. L. Grange
%A J. Le Bihan
%A J. Radureau
%A I. Valet
%T Computer protocols and applications using satellite networks: the NADIR
project
%J J. Telecommun. Networks (USA)
%V 3
%N 3
%P 233-250
%O 43 REFS. Treatment APPLICATIONS
%D Fall 1984
%K protocols computer networks data communication systems
satellite relay systems computer protocols satellite networks
NADIR project satellite network simulator
experiment management system computer laboratory
satellite communication infrastructure satellite transmission characteristics
broadcast transmission local area networks
distributed data base management systems

%A J. G. Bonar
%A S. P. Levitan
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Real-Time LISP Using Content Addressable Memory
%P 112-119
%O Associative Processors and Processing

%A Alan H. Bond
%T The Use of Programmable Broadcast Array Architecture For Computer
Vision
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 287-292
%D 1984
%K DAP, AI,

%A Alan H. Bond
%T Self-Broadcasting Arrays-A new Computer Architecture Suitable for Easy
Fabrication
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 489-494
%D 1984
%K DAP,

%T A Vectorization of the Hess-McDonnel-Douglas Potential Flow Program
NUED for the STAR-100 Computer
%A L. Boney
%A R. Smith
%I NASA Langley Research Center
%R TM-78816
%D 1979

%A D. Book, (Ed.)
%T Finite Difference Techniques for Vectorized Fluid Dynamics Calculation
%I Springer-Verlag
%C New York
%D 1981

%T On Uniquely Decipherable Codes with Two Codewords
%A Ronald V. Book
%A Sai Choi Kwan
%J IEEE Transactions on Computers
%V C-29
%N 4
%D April 1980
%P 324-325
%K Finite delay, semigroups, uniquely decipherable codes
%O Correspondence

%A D. Booth
%T Report on DAP least squares algorithm
%I City University
%D 1981

%A Grayce M. Booth
%T Distributed Information Systems
%J Proceedings of the NCC
%I AFIPS
%D 1976
%P 789-794
%X
Reprinted in "Tutorial: Distributed Processing," IEEE,
compiled by Burt H. Liebowitz and John H. Carson, 1981, 3rd edition.

%A H. Boral
%A D. J. DeWitt
%T Applying Data Flow Techniques to Data Base Machines
%J Computer
%I IEEE
%V 15
%N 8
%P 57-63
%D August 1982

%T Processor Allocation Strategies for Multiprocessor Database Machines
%A Haran Boral
%A David J. DeWitt
%J ACM Transactions on Database Systems
%V 6
%N 2
%D June 1981
%P 227-254
%K Database machines, associative processors, parallel processors,
back-end computers, data-flow computers, processors scheduling,
computer architecture, database management
CR Categories: 3.74, 4.22, 4.34, 6.22, 6.34

%A Anita Borg
%A Jim Baumbach
%A Sam Glazer
%T A Message System Support Fault Tolerance
%J Proceedings of the 9th Symposium on Operating Systems Principles,
Operating Systems Review
%V 17
%N 5
%D October 1983
%P 90-99
%O recovery and reconfiguration

%A B. R. Borgerson
%A M. L. Hanson
%A P. A. Hartley
%T The Evolution of the Sperry Univac 1100 Series:
A History, Analysis, and Projection
%J Communications of the ACM
%V 21
%N 1
%D January 1978
%P 25-43

%A B. R. Borgerson
%A M. D. Godfrey
%A P. E. Hagerty
%A T. R. Rykken
%T The Architecture of the Sperry UNIVAC 1100 Series Systems
%J Proceedings 6th Annual Symposium on Computer Architecture
%D April 1979
%C Philadelphia, PA
%P 369-388

%A Barry R. Borgerson
%A Richard F. Freitas
%T A Reliability Model for Gracefully Degrading and Standby-Sparing
Systems
%J IEEE Transactions on Computers
%V C-24
%N 5
%D May 1975
%P 517-525
%K Fault tolerance, gracefully degrading, PRIME, reliability,
resource exhaustion, solitary faults, space-domain multiple faults,
standby sparing, time-domain multiple faults,
Special issue on fault-tolerant computing

%A J. Boris
%T Flux-Corrected Transport Modules for Solving Generalized
Continuity Equations
%I Naval Research Laboratory
%R No. 3237
%D 1976
%X Remove?

%A J. Boris
%T Vectorized Tridiagonal Solvers
%I Naval Research Laboratory
%R No. 3048
%D 1976

%A Jay P. Boris
%A Niels K. Winsor
%T Vectorized Computation of Reactive Flow
%E Garry Rodrigue
%B Parallel Computations
%I Academic Press
%D 1982
%P 173-215
%K
recommended
%X Mentions programming style as an important consideration.
Has some of the best advise regarding guidelines (Section VI.) in
programming parallel supercomputers (KISS philosophy).

%T Process Communication Based on Input Specifications
%A Jan van den Bos
%A Rinus Plasmeijer
%A Jan Stroet
%J ACM Transactions on Programming Languages and Systems
%V 3
%N 3
%D July 1981
%P 224-250
%K Operating systems, interactive systems, real-time programming,
concurrency, parallel processes, communicating processes, parallel
programming, synchronization, input expressions, networks, data flow
CR Categories: 3.81, 3.82, 4.2, 4.32, 4.41, 8.2

%A A. Bossavit
%T On the Vectorization of Algorithms in Linear Algebra
%J Proc. 10th IMACS World Congress on Systems Simulation and Scientific
Computation
%V 1
%I IMACS
%P 95-97
%D 1982

%A P. Bouchet
%A A. Chesnais
%A J. M. Feuvre
%A G. Jomier
%A A. Kurinckx
%T PEPIN: An Experimental Multi-Microcomputer Data Base Management
System
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 211-217
%K
%O Distributed Databases

%A W. J. Bouknight
%A others
%T The ILLIAC IV System
%J IEEE Proceedings
%V 60
%N 4
%D April 1972
%P 369-388
%K Recommended

%A R. Boulis
%A R. Faiss
%T STARAN E Performance and LACIE algorithms
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 144-
%K
%O Associative processors

%A Daniel P. Bovet
%A Gerald Estrin
%T On Static Memory Allocation in Computer Systems
%J IEEE Transactions On Computers
%V C-19
%N 6
%D June 1970
%P 492
%K A priori model, directed graph model, memory allocation,
multiprocessors
Switching theory

%A Daniel P. Bovet
%A Gerald Estrin
%T A Dynamic Memory Allocation Algorithm
%J IEEE Transactions On Computers
%V C-19
%N 5
%D May 1970
%P 403-411
%K A priori information, directed graph model dynamic memory allocation,
multiprocessor systems
Switching theory

%A B. A. Bowen
%A R. J. A. Buhr
%T The Logical Design of Multiple-Microprocessor Systems
%I Prentice-Hall
%C Englewood Cliffs, NJ
%D 1980
%X The text has an interesting organization (One which I have restructured
my own survey to [independently]).  It starts in software moving to hardware.
It starts as an operating systems text then to hardware and then aspects of
design (the weakest section, but then the design process is weak itself).
The section on interconnect will ruffle some feathers because it does not
have the more advanced networks (O(n log n)).  It does cover packet switching.

%I Heather Liddell
%A G. Bowgen
%T The DAP Subroutine Library
%I Conference on Vector and Parallel Processors in Computational Science
%C Chester
%D August 1981

%A K. C. Bowler
%A G. Paley
%A B. Pendleton
%A D. Wallace
%A G. W. Thomas
%T Phase diagrams of U(1) Lattice Higgs Models
%I DAP Support Unit, Queen Mary's College
%J Physics Letters
%V 104B
%P 481
%D 1981
%X Remove?

%A Kenneth C. Bowler
%A G. Stuart Pawley
%T Molecular Dynamics and Monte Carlo Simulations in Solid-State and
Elementary Physics
%J Proceedings of the IEEE
%V 72
%N 1
%K Special issue -- Supercomputers - Their Impact on Science and Technology
%P 42-55
%D January 1984

%A James W. Bowra
%A H. C. Torng
%T The Modeling and Design of Multiple Function-Unit Processors
%J IEEE Transactions on Computers
%V C-25
%N 3
%D March 1976
%P 210-221
%K Analytic model, branch and bound technique,
integer nonlinear programming problem,
maximum performance-to-cost (MPCR) problem,
minimum cost (MC) problem, multiple function-unit (MFU) processor,
processor design
Computer systems

%A H. N. Boyd
%T An associative processor architecture for air traffic control
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 400-416
%K
%O Parallel processor architectures for air traffic control

%A J. W. Boyse
%A D. R. Warn
%T A straightforward model for computer performance prediction
%J Computing Surveys
%V 7
%N 2
%D June 1975
%P 73-93

%A Muslim Bozyigit
%A Harry English
%A Yakup Paker
%T MICROSS: Graphics Aided Simulation of Distributed Computer Systems
%E Y. Paker
%E J.-P. Jerjus
%B Distributed Computing Systems (Synchronization, Control and Communication)
%I Academic Press
%D 1983
%P 283-302
%K Multi-Microprocessor based System Simulation

%A G. Bracha
%T An Asynchronous [(n-1)]/3]-Resilient Consensus Protocol
%J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing
%I ACM
%D August 1984

%A G. Bracha
%A S. Toueg
%T A Distributed Algorithm for Generalized Deadlock Detection
%J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing
%I ACM
%D August 1984

%A R. Braden
%A R. Cole
%A P. Higginson
%A P. Lloyd
%T A distributed approach to the interconnection of heterogeneous
computer networks
%J Comput. Commun. Rev. (USA), SIGCOMM '83 Symposium on Communications
Architectures & Protocols
%V 13
%N 2
%C Austin, TX, USA
%P 254-259
%O 14 REFS
Treatment PRACTICAL
%D 8-9 March 1983
%K computer networks
heterogeneous computer networks distributed architecture
interconnected networks DARPA Internet
%X Describes a distributed architecture for the flexible interconnection
of heterogeneous networks with a number of mini-and microcomputers,
in a research environment. The interconnected networks include the
DARPA Internet, which uses the DoD protocols, and the X25-based
networks PSS and SERCNET. The approach described here distributes the
network access into a set of microcomputers acting as network
frontends ('network access machines'), with a local area network
(Cambridge Ring) as a common bus

%A P. Bradley
%A P. Siemers
%A K. Weilmuenster
%T Comparison of Shuttle Flight Pressure Data to Computational and
Wind-Tunnel Results
%J Journal of Spacecraft and Rockets
%V 19
%P 419-422
%D 1982
%X Remove?

%A P. Bradley
%A D. Dwoyer
%A J. South
%T Vectorized Schemes for Conical Flow Using the Artificial Density Method
%I AIAA
%R Paper No. 84-0162
%D January 1984

%A I. Brailovskaya
%T A Difference Scheme for Numerical Solution of the Two-Dimensional
Non-stationary Navier-Stokes Equations for a Compressible Gas
%J Soviet Physics Doklady
%V 10
%P 107-110
%D 1965
%X Remove?

%A A. Brandt
%T Multigrid Adaptive Solutions to Boundary Value Problems
%J Math. Comp.
%V 31
%P 333-390
%D 1977
%X Remove?

%A A. Brandt
%T Multi-grid solvers on parallel computers
%r ICASE Report No. 80-23
%d Sept. 2, 1980
%J Proc. of Elliptic Problem Solvers
%I LANL
%C Santa Fe, NM
%D June-July 1980

%T RP3 Processor-Memory Element
%A W. C. Brantley
%A K. P. McAuliffe
%A J. Weiss
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 782-789
%K The IBM Research Parallel Processor, RP3,

%A Jean-Paul Brassard
%A Jan Gecsei
%T Path Building in Cellular Partitioning Networks
%J Proceedings of 7th Annual Symposium on Computer Architecture
%D 1980
%P 44-50
%K Universite de Montreal

%A H. C. Brearley, Jr.
%T ILLIAC II - A Short Description and Annotated Bibliography
%J IEEE Transactions on Electronic Computers
%V EC-14
%N 3
%D June 1965
%P 399-407
%X Added for completeness. Bibliography is 40 entries, not added to this
text.

%A T. H. Bredt
%A E. J. McCluskey
%T Analysis and Synthesis of Control Mechanisms for Parallel Processes
%E L. C. Hobbs
%E D. J. Theis
%E Joel Trimble
%E Harold Titus
%E Ivar Highberg
%B Parallel Processor Systems, Technologies and Applications
%I Spartan Books
%C New York, New York
%D 1970
%P 287-295
%K Architecture
System and machine organization
%X Short analysis of the mutual exclusion problem and the use of flow tables.

%A Thomas H. Bredt
%T Analysis of Parallel Systems
%J IEEE Transactions on Computers
%V C-20
%N 11
%D November 1971
%P 1403-1407
%K Determinancy, flow tables, hazards, interlocks, models,
mutual exclusion, operating system, program correctness, systems analysis,

%A H. Breitwieser
%A M. Leszak
%T A DIstributed Transaction Processing Protocol Based on Majority
Consensus
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 224-237

%A R. Brent
%T The Parallel Evaluation of General Arithmetic Expressions
%J Journal of the ACM
%V 21
%N 2
%D April 1974
%P 201-206

%A R. Brent
%A F. Luk
%T Computing the Cholesky Factorization Using a Systolic Architecture
%I Cornell University
%R TR 82-521
%D 1982

%A R. Brent
%A F. Luk
%T A Systolic Array for the Linear Time Solution of Toeplitz Systems of
Equations
%J Journal of VLSI and Computer Systems
%V 1
%P 1-22
%D 1983

%A R. P. Brent
%T The Parallel Evaluation of Arithmetic Expressions in Logarithmic Time
%E J. F. Traub
%B Complexity of Sequential and Parallel Numerical Algorithms
%P 83-102
%I Academic Press, Inc.
%D 1973

%A Richard Brent
%A David Kuck
%A Kiyoshi Maruyama
%T The Parallel Evaluation of Arithmetic Expressions Without Division
%J IEEE Transactions on Computers
%N 5
%D May 1973
%P 532-534
%K Arithmetic expression evaluation, number of processors,
parallel computation, processing time upper bound, simultaneous operations,
tree-height reduction
Correspondence

%A Richard P. Brent
%A H. T. Kung
%T Systolic VLSI Arrays for Polynomial GCD Computation
%J IEEE Transactions on Computers
%V C-33
%N 8
%D August 1984
%P 731-736
%K algorithms, error-correcting codes, greatest common divisor,
special-purpose hardware, systolic arrays, VLSI,
special-purpose computer architecture

%A J. Breslin
%A C. B. Tashenberg
%T Distributed processing systems
%J AMACOM
%C New York, New York
%D 1978

%A R. D. Bressler
%A M. F. Kraley
%A A. Michel
%T PLURIBUS:  A Multiprocessor for Communications Networks
%J 14th Annual ACM/NBS Technical Symposium Computing in the Mid-70's:
An Assessment
%D June 1975
%C New York
%P 13-19

%A F. Briggs
%A M. Dubois
%A K. Hwang
%T Throughput Analysis and Configuration Design of a Shared-Resource
Multiprocessor Systems: PUMPS
%J Proceedings of 8th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 9
%N 3
%D May 1981
%P 67-80
%O Architecture

%A F. A. Briggs
%A M. Dubois
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Cache Effectiveness in Multiprocessor Systems with Pipelined Parallel
Memories
%P 306-313
%O Performance Evaluation

%A Faye A. Briggs
%A Edward S. Davidson
%T Organization of Semiconductor Memories for Parallel-Pipelined Processors
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 155-158
%K
%O Memory organizations

%A Faye A. Briggs
%A Edward S. Davidson
%T Organization of Semiconductor Memories for Parallel-Pipelined Processors
%J IEEE Transactions on Computers
%V C-26
%N 2
%D February 1977
%P 162-169
%K Memory configuration, memory conflict, memory interleaving,
parallel processor, pipelined processor, semiconductor memory,
Memory organization,
special issue on parallel processor and processing

%A Faye A. Briggs
%T Performance of Memory Configurations for Parallel-Pipelined Computers
%J Proceedings of 5th Annual Symposium on Computer Architecture
%D 1978
%K Purdue University
%P 202-209

%A Faye A. Briggs
%A Kai Hwang
%A K. S. Fu
%T PUMPS: A Shared-Resource Multiprocessor Architecture for Pattern Analysis
and Image Database Management
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 319-330
%K Purdue U, MIMD

%A Faye A. Briggs
%A King-Sun Fu
%A Kai Hwang
%A Benjamin W. Wah
%T PUMPS Architecture for Pattern Analysis and Image Database Management
%J IEEE Transactions on Computers
%V C-31
%N 10
%D October 1982
%P 969-982
%K Image database management,, multiprocessor architecture, pattern
analysis, reconfigurable architecture, resource sharing, VLSI computing
structures,
Special issue on computer architecture for pattern analysis and image
database management

%A E. O. Brigham
%T The Fast Fourier Transform
%I Prentice-Hall
%C Englewood Cliffs, NJ
%D 1973

%A P. Brinch-Hansen
%T The Programming Language Concurrent Pascal
%J IEEE Trans. on Software Engineering
%V SE-1
%N 2
%D June 1975
%P 199-207
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%A P. Brinch-Hansen
%T The Architecture of Concurrent Programs
%I Prentice-Hall
%D 1977

%A P. Brinch-Hansen
%T Network: A Multiprocessor Program
%J Computer Software and Applications Conference (COMPSAC77)
%I IEEE
%D November 1977
%P 336-339

%A P. Brinch-Hansen
%T Multiprocessor Architectures for Concurrent Programs
%J Proc. NCC Conf.
%D 1978
%I AFIPS Press
%P 317-323

%A P. Brinch-Hansen
%T Distributed Processes: a concurrent programming concept
%J Communications of the  ACM
%V 21
%N 11
%D November 1978
%P 934-941
%K concurrent programming, distributed processes, microprocessor networks,
nondeterminism, guarded regions, programming languages, process communications
and scheduling, sorting arrays, coroutines, classes, monitors, processes,
semaphores, buffers, path expressions, input/output,
CR categories: 3.8, 4.2, 4.22m 4.32, 5.24
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A P. Brinch-Hansen
%T A keynote address on concurrent programming
%J IEEE Computer
%V 12
%N 5
%D May 1979
%P 50-56

%A P. Brinch-Hansen
%T Edison: a multiprocessor language
%J Software \(em Practice and Experience
%V 11
%N 4
%D April 1981
%P 325-361

%A Per Brinch-Hansen
%T Multiprocessor Architectures for Concurrent Programs
%J Computer Architecture News (SIGARCH)
%I ACM
%V 7
%N 4
%D December 1978
%P 4-23
%K language-directed computer design, multiprocessor architecture,
hierarchical stores, real-time applications, concurrent programming,
processes, monitors
CR categories 4.2, 4.32, 6.2
%X This paper is the hardware complement to Brinch-Hansen's work
on concurrent Pascal and Edison.  It typically is a dual processor
(or three processor) situation.

%A J. D. Brock
%T Operational Semantics of a Data Flow Language
%I Laboratory for Computer Science, MIT
%R TM-120
%C Cambridge, MA
%D December 1978

%A J. D. Brock
%T Consistent Semantics for a Data Flow Language
%B Mathematical Foundations of Computer Science 1980: Proceedings of
the Ninth Symposium
%E P. Dembrinski
%S Lecture Notes in Computer Science
%V 88
%D September 1980
%P 168-180

%A J. D. Brock
%A W. B. Ackerman
%T Scenarios: A Model of Non-determinate Computation
%B International Colloquium on Formalization of Programming Concepts
%S Lecture Notes on Computer Science
%V 107
%D April 1981
%P 252-259

%A J. Dean Brock
%A Lynn B. Montz
%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T Translation and Optimization of Data Flow Programs
%P Languages and Translations
%O

%A B. Brode
%T Precompilation of Fortran Programs to Facilitate Array Processing
%J Computer
%V 14
%N 9
%P 46-51
%D September 1981

%A H. Broer
%A V. S. Cherniavsky
%T Ein Rechnerkonzept Mit Hoher Parallelitat: Das Rechnende Gedachtnis
Teil I
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 495-500
%D 1984

%A H. Broer
%A V. S. Cherniavsky
%T Ein Rechnerkonzept Mit Hoher Parallelitat: Das Rechnende Gedachtnis
Teil II
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 501-506
%D 1984

%A S. W. Brok
%A L. Dekker
%A H. de Swann Arons
%T Parallel Random Number Generators for the Use in Parallel Processors
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 113-118
%K parallel algorithms

%A E. C. Bronson
%A Leah Jamieson Siegel
%T A Distributed parallel computation station model for system, environment
and threat simulation
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 42-48
%K
%O Microprocessor architectures

%A Edward C. Bronson
%A Leah J. Siegel
%T A parallel architecture for acoustic processing in speech understanding
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 307-312
%K
Purdue, multiple SIMD (MSIMD) (PEs512 - controlled by MC68000s), multi-staged cube
%O Special purpose processors

%A Edward C. Bronson
%A Leah Jamieson Siegel
%T A parallel architecture for labeling, segmentation, and lexical
processing in speech understanding
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 275-280
%K
Purdue U, MIMD
images and speech

%T Reasoning About Synchronous Systems
%A Stephen D. Brookes
%I Carnegie-Mellon University
%R CMU-CS-84-145
%D 1984

%A E. Brooks
%A G. Fox
%T A Simple Mail Box Communications Package for the NNCP
%R Hm 2
%I California Institute of Technology
%C Pasadena, CA
%D 1982
%K Caltech Cosmic Cube, hypercube, C^3P

%A E. Brooks, III
%T The LaPlace Demonstration on the 4 Node NNCP
%R Hm 10
%I California Institute of Technology
%C Pasadena, CA
%D September 1982
%K Caltech Cosmic Cube, hypercube, C^3P

%A E. Brooks, III
%A G. Fox
%A S. Otto
%A M. Randeria
%A W. Athas
%A Erik De\ Benedictis
%A M. Newton
%A C. Seitz
%T Glueball Mass Calculations on an Array of Computers
%r Hm27
%R CALT-68-985
%I California Institute of Technology
%C Pasadena, CA
%D 1983
%K Caltech Cosmic Cube, hypercube, C^3P

%A E. Brooks, III
%A G. Fox
%A M. Johnson
%A S. Otto
%A P. Stolorz
%A W. Athas
%A E. De\ Benedictis
%A R. Faucette
%T Pure Gauge SU(3) Lattice Theory on an Array of Computers
%I California Institute of Technology
%C Pasadena, CA
%r Hm-65
%R CALT-68-1112
%D March 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%A E. D. Brooks, III
%T The UNIX Environment for the NNCP
%R Hm 9
%I California Institute of Technology
%C Pasadena, CA
%D January 1983
%K Caltech Cosmic Cube, hypercube, C^3P

%A Eugene Brooks, III
%A Geoffrey C. Fox
%A R. Gupta
%A O. Martin
%A Steve W. Otto
%A E. De\ Benedictis
%T Nearest Neighbor Concurrent Processor
%r Hm 1
%R CALT-68-867
%I California Institute of Technology
%C Pasadena, CA
%D 1981
%K Caltech Cosmic Cube, hypercube, C^3P

%A Eugene D. Brooks, III
%T A Multitasking Kernel for the C and FORTRAN Programming Languages
%R UCID-20167
%I Lawrence Livermore National Laboratory
%D September 1984

%T Performance of the Butterfly Processor-Memory Interconnection in a
Vector Environment
%A Eugene D. Brooks, III
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 21-24
%K Vector/Array Processing

%A Eugene D. Brooks, III
%T Performance of the Butterfly Processor-Memory Interconnection in a
Vector Environment
%I Lawrence Livermore National Laboratory
%D January 1985

%A F. P. Brooks, Jr.
%T Recent Developments in Computer Organization
%B Advances in Electronic and Electron Physics
%V 18
%I Academic Press
%C New York
%D 1963
%P 45-65

%A F. P. Brooks, Jr.
%T The Future of Computer Architecture
%J Proceedings AFIPS Congress 65
%V 1
%D 1965
%C Washington DC
%P 87-91

%A Richard S. Brooks
%A Victor R. Lesser
%T Distributed problem solving using iterative refinement
%R Technical Report 79-14
%R Department of Computer and Information Science, University of Massachusetts
%C Amherst, Massachusetts
%C May 1979

%A Richard S. Brooks
%T Experiments in Distributed Problem Solving with Iterative Refinement
%R PhD Thesis, Technical Report 82-25
%D 1983
%I Department of Computer and Information Science, University of Massachusetts
%C Amherst, Massachusetts
%D October 1982

%A George Broomell
%A J. Robert Heath
%T Classification categories and historical development of circuit switching
topologies
%J Computing Surveys
%V 15
%N 2
%D June 1983
%P 95-133
%K A broad tutorial survey is given of the various topologies available for use
in circuit switching systems for tightly coupled parallel/distributed
computer systems.  Terminology and issues of circuit switching as related to
parallel/distributed processing are first discussed.  Circuit switching
networks are then classified according to connection capability, topological
geometry, and basis for development.  Topological relationships of specific
networks are addressed.
Categories and Subject Descriptors:
A.1 [General Literature]: Introductory and Survey; B.3.4 [Hardware]:
Input/Output and Data Communications - interconnections (subsystems);
C.1 [Computer Systems Organization]: Network Architecture and Design - Network
topology; C.2.4 [Computer Systems Organization]: Network Architectures and
Design - distributed systems,
General terms: Theory,
Recommended,
Circuit switching, computers, distributed/parallel processing,
interconnection networks, topology

%A George Broomell
%A J. Robert Heath
%T An Integrated-Circuit Crossbar Switching System Design
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 278-287
%O Interconnection networks

%A C. W. Brown
%T No. 2 Switching Control Center System \(em
An example of real-time features in an interactive system
%J Proc. Computer Software & Applications Conf. (COMPSAC 77)
%D November 1977
%P 46-50

%T Vectorized Monte Carlo Methods for Reactor Lattice Analysis
%A F. Brown
%J CYBER 200 Applications Seminar
%R NASA Conference Publication 2295
%D October 1983
%E J. Patrick Gary, Compiler
%I NASA Goddard Space Flight Center
%C Greenbelt, Maryland
%P 79-81

%A Homer E. Brown
%T Parallel Processor and Pipeline Computers: An Annotated
Bibliography
%I EPRI (Electrical Power Research Institute)
%R EL-764-SR
%C Palo Alto, CA
%D June 1978
%K Computer, parallel processing, pipeline computer, vector computer,
array processing, power system computation
%X A review of the architecture text by Stone (SRA), Stevenson
on programming the ILLIAC IV, Heller's survey on numerical algorithms
(eventually published in SIAM Review), Pease's paper on matrix
inversion on vector or array machines (J. ACM), and other NTIS
papers in this file.  This survey was actually done in 1976, with most
of its results oriented to the ILLIAC IV.
$Revision: 1.2 $ $Date: 84/07/05 16:38:27 $

%A R. M. Brown
%A P. L. Neely
%T An Image Array Processor for the Investigation of Architectures and
Algorithms
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 204-213
%K
%O Image processing

%A D. R. Brownbridge
%A L. F. Marshall
%A B. Randell
%T The Newcastle connection or UNIXes of the world unite!
%J Software-Pract. & Exper. (GB)
%V 12
%N 12
%P 1147-1162
%D December 1982
%O 24 Refs.
Treatment PRACTICAL.
%K operating systems computer networks.
local area networks software subsystem UNIX distributed system
wide area networks network protocols PDP11s Cambridge Ring
operating systems.
%X Describes a software subsystem that can be added to each of a set of
physically interconnected UNIX or UNIX look-alike systems, so as to
construct a distributed system which is functionally
indistinguishable at both the user and the program level from a
conventional single-processor UNIX system. The techniques used are
applicable to a variety and multiplicity of both local and wide area
networks, and enable all issues of inter-processor communication,
network protocols, etc., which is currently operational on a set of
PDP11s connected by a Cambridge Ring. The final sections compare the
scheme to various precursor schemes and discuss its potential
relevance to other operating systems.

%A J. Browne
%T Parallel Architecture for Computer Systems
%J Physics Today
%V 37
%N 5
%D May 1984
%P 28-35

%A J. C. Browne
%T notes from the April 1982 NYU Workshop on Parallel Computing

%A J. C. Browne
%A A. Tripathi
%A S. Fedak
%A A. Adiga
%A R. Kapur
%T A language for definition and control
of reconfigurable parallel computation structures
%K TRAC CSL
%R
%I Department of Computer Science, University of Texas
%C Austin, Texas
%D 1980

%A J. C. Browne
%A W. Bays
%A A. Tripathi
%A S. Fedak
%A A. Adiga
%A R. Kapur
%T TRAC as a dataflow architecture
%R
%I Department of Computer Science, University of Texas
%C Austin, Texas
%D 1980

%A J. C. Browne
%A D. DeGroot
%A A. Tripathi
%A K. Ikumi
%A S. Fedak
%A A. Adiga
%T The structure of an operating system
for a reconfigurable network architectured computer system: TRACOS
%K TRAC
%R
%I Department of Computer Science, University of Texas
%C Austin, Texas
%D 1981

%A J. C. Browne
%A A. Tripathi
%A S. Fedak
%A A. Adiga
%A R. Kipur
%T A language for specification and programming of reconfigurable parallel
computation structures
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 142-149
%K
U. of Texas, TRAC, Computational Structures Language (CSL),
Languages

%A J. C. Browne
%T TRAC: An Environment for Parallel Computing
%J Digest of Papers COMPCON, Spring 84
%I IEEE
%D Feb. 1984
%P 294-298
%K Very high-end architectures
%X Argues that the TRAC is a testbed for trying new ideas in multiprocessing.
Longer papers exist which cover the same material.

%A J. C. Browne
%T Characterization of Parallel Computer Architectures
%I Dept. of Computer Science, University of Texas
%C Austin, TX
%D 1985

%T Formulation and Programming of Parallel Computations a Unified Approach
%A J. C. Browne
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 624-631
%K Expressing Parallelism

%T Characterization of Parallel Architecture
%A J. C. Browne
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 665
%K Multiprocessor Systems

%A James C. Browne
%A K. M. Chandy
%A John Hogarth
%A Chester C.-A. Lee
%T The Effect on Throughput of Multiprocessing in a Multiprogramming
Environment
%J IEEE Transactions on Computers
%V C-22
%N 8
%D August 1973
%P 728-735
%K CPU, multiprocessing, multiprogramming, multitasking, queueing models,
throughput,
Special issue on parallel computation, queueing and scheduling

%A S. A. Browning
%T The Tree Machine: A Highly Concurrent Programming Environment
%R PhD thesis
%I Caltech
%C Pasadena, CA
%D 1980

%A S. A. Browning
%T A Tree Machine
%J Lambda
%V 1
%D 2nd quarter 1980
%P 31-36

%A Sally A. Browning
%T Algorithms for the Tree Machine
%E C. Mead
%E L. Conway
%B Introduction to VLSI Systems
%I Addison-Wesley
%D 1980
%P 295-312

%A M. Broy
%T Are Fairness Assumptions Fair?
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 116-125
%K
%O Semantics of Parallel Programming

%A Hans-Joerg Brundiers
%A Richard E. Buehrer
%A Hansmartin Friess
%A Milan Tadian
%T The multiprocessor EMPRESS a useful tool for studying parallelization
concepts
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 511-513
%K
ETH, MIMD, 16 LSI-11s
multiprocessor systems

%A John D. Bruner
%A Anthony P. Reeves
%T A parallel P-code for parallel Pascal and other high level languages
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 240-243
%K
SIMD, MPP,
parallel programming and languages

%A J. Bruno
%A E. G. Coffman, Jr.
%A R. Sethi
%T Scheduling Independent Tasks to Reduce Mean Finishing Time
%J Communications of the ACM
%V 17
%N 7
%D July 1974
%P 382-387

%A John Bruno
%A Stanley M. Altman
%T A Theory of Asynchronous Control Networks
%J IEEE Transactions On Computers
%V C-20
%N 6
%D June 1971
%P 629-638
%K Asynchronous networks, control networks, logical design,
Control theory

%T Deterministic Scheduling with Pipelined Processors
%A John Bruno
%A John W. Jones, III
%A Kimming So
%J IEEE Transactions on Computers
%V C-29
%N 4
%D April 1980
%P 308-316
%K Deadlines, multiprocessor, pipelined processor, release times,
scheduling algorithms, task system
%O Scheduling algorithms

%A John Bruno
%T Final Report on the Feasibility of Using the Massive Parallel Processor
for Large Eddy Simulations and Other Computational Fluid Dynamics
Applications
%I RIACS
%R TR84.2
%D June 1984
%K MPP,

%A Sally A. Bruso
%T A Failure Detection and Notification Protocol for Distributed Computing
Systems
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Communication Protocols,
FDNP: Failure Detection and Notatification Protocol, NUP: Node Up Protocol,
NDP: Node Down Protocol,
%P 116-123

%A R. E. Bryant
%T Simulation of Packet Communication Architecture Computer Systems
%I Laboratory for Computer Science, MIT
%R TR-188
%C Cambridge, MA
%D November 1977

%A R. M. Bryant
%A R. A. Finkel
%T A Stable Distributed Scheduling Algorithm
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 314-323
%K
%O Distributed Scheduling

%A Randal E. Bryant
%T Simulation on a Distributed System
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 544-552
%O distributed systems: simulation and modeling

%A G. Bucci
%A D. N. Streeter
%T A methodology for the design of distributed information systems
%J Comm. ACM
%V 22
%N 4
%D April 1979
%P 233-245

%A P. Bucciarelli
%E W. Riddle
%E K. Thurber
%E P. Keen
%E R. H. Sprague, Jr.
%E B. Shriver
%E T. M. Walker
%E R. R. Grams
%T A distributed file management system for a network of minicomputers
%B Proceedings of the Fifteenth Hawaii International Conference on
System Sciences 1982
%C Honolulu, HI, USA
%P 517-523
%V 1
%O 7 REFS
Treatment PRACTICAL
%D 6-8 Jan. 1982
%I Hawaii Int. Conference Syst
Sci., Univ. Hawaii, Univ. Southwestern Louisiana,
2 vol. (xiii+916+xvii+778)
%K file organisation computer networks distributed processing
minicomputer network distributed file management system Olivetti
long haul network
DFMS file handling banking
%X The Distributed File Management System (DFMS) designed by Olivetti
for a long-haul network is described. The DFMS allows file handling
in a heterogeneous environment in a way independent of the file
system organisation of the host computers. The product is currently
operational on a long-haul network of Olivetti minicomputers in a
banking application

%A D. E. W. Bucher
%T Maintenance of the computer sciences teleprocessing system
%J Proc. Int. Conference on Reliable Software, SIGPLAN Notices
%V 10
%N 6
%D June 1975
%P 260-266

%A I. Bucher
%A T. Jordan
%T Solving Very Large Elliptic Problems on a Supercomputer with Solid
State Disk
%J J. Comp. Phys.
%V 55
%P 340-345
%D 1984

%A I. Bucher
%A T. Jordan
%T Linear Algebra Programs for Use on a Vector Computer with a Secondary
Solid State Storage Device
%E R. Vichnevetsky
%E R. Stepleman
%B Advances in Computer Methods for Partial Differential Equations,
Proc. of the Fifth IMACS International Symposium
%V V
%I Lehigh University
%D June 1984
%P 546-550

%A I. Y. Bucher
%A B. L. Buzbee
%A P. O. Frederickson
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Experiment in Parallel Processing of a Large Scientific Code
%P 166-167
%O

%A Ingrid Y. Bucher
%T The Computational Speed of Supercomputers
%J Proc. of ACM SIGMETRICS Conference on Measurement and Modeling
of Computer Systems
%I ACM
%D August 1983
%P 151-165
%K Cyber 205, Cray XMP,
%X A bit dated, but it describes the characteristics of various existing
supercomputers and problems in their measurement such as Amdahl's Law.
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%A B. P. Buckles
%A H. D. Fitzgibbon
%T Distributed Emulation Control: An Algorithm with ESP
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 536-543
%O distributed systems: simulation and modeling

%A G. N. Buckley
%A A. Silberschatz
%T An Effective Implementation of the Generalized Input-Output Construct
of CSP
%J ACM Transactions on Programming Languages and Systems
%V 5
%N 2
%D April 1983
%P 223-235
%K Algorithms, Languages, parallel programming, process communication,
CSP, guarded commands, output guards, nondeterminism
Categories: D.3.3 [Programming Languages]:
Language Constructs - concurrent programming structures;
D.4.1 [Operating Systems]: Process Management - synchronization;
D.4.4 [Operating Systems]: communications management - input/output;
message sending; D.4.7 [Operating Systems]:
organization and design - distributed systems

%A Gael N. Buckley
%A Avi Silberschatz
%T A Failure Tolerant Centralized Mutual Exclusion Algorithm
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 347-356
%O Synchronization in distributed fault-tolerant systems

%A R. S. Bucy
%A K. D. Senne
%T Nonlinear Filtering Algorithms for Parallel and Pipeline Machines
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 93-97
%K parabolic partial differential equations,
parallel algorithms
%X An algorithm was run on the STAR-100 (FORTRAN), ILLIAC IV (GLYPNIR),
and AP-120 (assembly).

%A R. S. Bucy
%T Nonlinear Filtering with Pipeline and Array Processor
%R AD-A046463
%D September 1977
%I National Technical Information Service
%C Springfield, VA 22151

%A R. S. Bucy
%A K. D. Senne
%T Nonlinear Filtering Algorithms for Vector Processing Machines
%J Computers & Mathematics with Applications
%V 6
%N 3
%D March 1980
%P 317-338

%A Timothy A. Budd
%T An APL Compiler for a Vector Processor
%J ACM Transactions on Programming Languages and Systems
%V 6
%N 2
%D July 1984
%P 297-313
%K Categories and subject descriptors: D.3.2 [Programming Languages]:
language classification - APL; D.3.4 [Programming Languages]: processors,
General terms: languages,
Additional keywords and phrases: APL, compilers, vector processors

%A P. Budnik
%A D. Kuck
%T The Organization and Use of Parallel Memories
%J IEEE Transactions on Computers
%V C-20
%N 12
%D December 1971
%P 1566-1569

%A Richard E. Buehrer
%A Hans-Joerg Brundiers
%A Hans Benz
%A Bernard Bron
%A Hansmartin Friess
%A Walter Haelg
%A Hans Juergen Halin
%A Milan Tadian
%A Anders Isacson
%T The ETH-Multiprocessor EMPRESS: A Dynamically Configurable MIMD System
%J IEEE Transactions on Computers
%V C-31
%N 11
%D November 1982
%P 1035-1044
%K Computer architecture, digital simulation, dynamic architecture,
EMPRESS, MIMD processors, parallel computation, parallel processors, PSCSP,
Special issue on parallel and distributed processing

%A R. J. A. Buhr
%A S. Michell
%T Object-Oriented Structured Design of Layered Protocol Systems
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 288-293
%K
%O Design of Distributed Computing Systems

%A R. J. A. Buhr
%A D. A. Mackinnon
%T MAILROOM: A computer-based message system model for person-to-person
and process-to-process communication
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 818-823
%K
%O Message Oriented Mechanisms

%A R. Buhrer
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T A New Type of MIMD-Organized Multiprocessor Handling Two-Stage
Parallelism by Means of a Dynamically Configurable Architecture
%P 292-293
%O

%A S. T. Buli
%T Advanced Array-Processor Architecture
%J Simulation
%V 33
%N 6
%D December 1979
%P 205

%A O. Buneman
%T A Compact Non-Iterative Poisson Solver
%I Stanford
%R Institute for Plasma Research Report No. 294
%D 1969
%X Remove?

%A P. Buneman
R. E. Frankel
R. Nikhil
%T An Implementation Technique for Database Query Languages
%J ACM Transactions on Database Systems
%V 7
%N 2
%D June 1982
%P 162-186

%A Peter Buning
%A J. Levy
%T Vectorization of Implicit Navier-Stokes Codes on the CRAY-1 Computer
%I Dept. of Aeronautics and Astronautics, Stanford University
%D 1979

%A R. B. Bunt
%T Scheduling Techniques for Operating Systems
%J Computer
%I IEEE
%V 9
%N 10
%D October 1976
%P 10-17
%X A brief survey with a look at OS/360, MULTICS, and UNIX (v6).
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A John Robert Burger
%T Data-stationary instructions as a way to minimize long distance
communication in VLSI
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 548-553
%K
pipelining

%A P. Burke
%A L. Delnes, (Ed.)
%T Proceedings of the International Conference on Vector and Parallel
Processors in Computational Science
%J Comp. Phys. Comm.
%V 26
%P 217-488
%C Chester, England
%D 1981

%A P. Burke
%A B. Davies
%A D. Edwards, (Ed.)
%T Some Research Applications on the CRAY-1 Computer at the Daresbury
Laboratory, 1979-81
%I Daresbury Laboratory
%C England
%D 1982

%A Walter H. Burkhardt
%T Fast Parallel Biharmonic Semidirect Solvers
%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%P 134
%X Summary only.

%A H. Burkhart
%A R. Fischer
%T Decentralized Management of Processes in a Multiprocessor
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 397-403
%D 1984
%K Modula-2, M^3 (modular multi-microprocessor),
%X Has a minor Modula-2 example.

%A J. T. Burkley
%A C. T. Mickelson
%T MPP: A Case Study of a Highly Parallel System
%J Proceedings of the AIAA Conference on Computers in Aerospace
%V 4
%D October 1983
%P ?
%K Massively Parallel Processor

%A John Burkley
%T MPP VLSI multiprocessor integrated circuit design
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 268-270
%K
Goodyear Aerospace, Massively Parallel Processor (MPP)
%O Array processors

%A F. J. Burkowski
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Parallel Hashing Hardware for Text Scanning Applications
%P 282-286
%O

%A F. J. Burkowski
%T A Multi-User Data Flow Architecture
%J Proceedings of 8th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 9
%N 3
%D May 1981
%P 327-339
%O data flow machines

%A F. J. Burkowski
%T Instruction Set Design Issues Relating to a Static Dataflow Computer
%J Proceedings of 9th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 10
%N 3
%D April 1982
%P 101-111

%A F. J. Burkowski
%T A Vector and Array Multiprocessor Extension of the Sylvan Architecture
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%D June 1984
%P 4-11
%K (VAMP), Vector and Array Multiprocessor
%O array processors

%A J. E. Burns
%A others
%T Data Requirements for Implementation of
N-Process Mutual Exclusion Using a Single Shared Variable
%J JACM
%V 29
%D January 1982
%P 183-205

%A James E. Burns
%A Mickael J. Fischer
%A Paul Jackson
%A Nancy A. Lynch
%A Gary L. Peterson
%T Shared Data Requirements for Implementation of Mutual Exclusion
Using a Test-and-Set Primitive
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 79-87
%O Language and control

%A Burroughs
%T Burroughs B6700 Information Processing Systems Reference Manual
%C Detroit, MI
%D 1972

%Q Burroughs Corporation
%T NAS Facility Feasibility Study
%R Final Report, Contract No. NAS2-9897
%D 1979

%A R. M. Burstall
%A D. B. MacQueen
%A D. T. Sannella
%T HOPE: An Experimental Applicative Language
%J Conference Record on the 1980 LISP Conference
%D August 1980
%P 136-143

%A F. W. Burton
%A M. R. Sleep
%T Executing Functional Programs on a Virtual Tree of Processors
%J Proceedings of the 1981 Conference on Functional Programming Languages
and Computer Architectures
%D October 1981
%P 187-194

%T Annotations to Control Parallelism and Reduction Order in the
Distributed Evaluation of Functional Programs
%A F. Warren Burton
%J ACM Transactions on Programming Languages and Systems
%V 6
%N 2
%D April 1984
%P 159-174
%K languages, performance, theory
Categories: D.1.1 [Programming Techniques]:
Applicative (Functional) Programming;
D.3.2 [Programming Languages] Language Classifications - applicative languages;
D.3.3 [Programming Languages]:
Language Constructs - concurrent programming structures;
F.4.1 [Mathematical Logic and Formal Languages]:
mathematical logic - lambda calculus and related systems

%A F. Warren Burton
%A Matthew H. Huntbach
%T Virtual Tree Machines
%J IEEE Transactions on Computers
%V C-33
%N 3
%D March 1984
%P 278-280
%K Distributed computing, multicomputer, network topology, process management,
simulation, tree machine,
Correspondence,

%A F. Warren Burton
%T Controlling Speculative Computation in a Parallel Functional
Programming Language
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Distributed Applications Algorithms
%P 453-458

%A H. O. Burton
%A D. D. Sullivan
%T Errors and error control
%J Proc. IEEE
%V 60
%N 11
%D November 1972
%P 1293-1301

%A U. Bussolati
%A G. Martella
%T On Designing a Security Management System for Distributed Data Bases
%J Computer Software and Applications Conference (COMPSAC80)
%I IEEE
%D October 1980
%P 288-294
%O Distributed Systems

%A R. E. Buten
%A V. Y. Shen
%T A scheduling model for computer systems with two classes of processors
%J Proc. 1973 Sagamore Computer Conf. on Parallel Processing
%C Sagamore, N. Y.
%I IEEE
%D August 1973
%P 130-138
%K scheduling

%A Jon T. Butler
%A Kenneth J. Breeding
%T Some Characteristics of Universal Cell Nets
%J IEEE Transactions on Computers
%V C-22
%N 10
%D October 1973
%P 897-903
%K Decomposition, disjunctive networks, network forms,
polyfunctional nets, universal cells
Cellular arrays

%A T. Butler
%A J. Cloutman
%A J. Ramshaw
%T Multidimensional Numerical Simulation of Reactive Flow in Internal
Combustion Engines
%J Prog. Energy Combust. Sci.
%V 7
%P 293-315
%D 1981
%X Remove?

%A S. E. Butner
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T A Constructive Approach to Fault Tolerance in VLSI-based Systems
%P 264-265
%O VLSI Architectures

%A Werner Butscher
%T The Solution of the Seismic One Way Equation on Parallel Computers
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 115-121
%D 1984
%K Cray X-MP/2
%X Some simple two processor results.

%A W. Bux
%A F. Closs
%A H. Keller
%A K. Kummerle
%A H. R. Muller
%A E. H. Rothauser
%E H. E. Peterson
%E A. I. Isaksson
%T Implementing and using an experimental local-area network
%B Communication Networks in Health Care. Proceedings of the IFIP-IMIA
Working Conference
%C Ulvsunda Palace, Sweden
%P 293-298
%O 12 REFS, Treatment PRACTICAL
%I North-Holland, Amsterdam, Netherlands, p: xii+366, ISBN: 0-444-86513-6
%D 14-18 June 1982
%K computer networks data communication systems protocols voice communication
digital communication systems
local area network IBM Zurich Research Laboratory token access ring
interconnecting rings
high throughput switching node data traffic synchronous channels voice services
adapters ring access control protocol token error recovery
%X An experimental local-area network designed and implemented at the
IBM Zurich Research Laboratory is described. The smallest
configuration of the network is a single token-access ring. Growth
potential to large networks is provided by interconnecting rings
through a high-throughput switching node. Rings support data traffic
as well as synchronous channels, e.g. for voice services. User
devices are attached to the rings by adapters which execute the
ring-access control protocol including token-error recovery

%A W. Bux
%A F. H. Closs
%A K. Kuemmerle
%A H. J. Keller
%A H. R. Mueller
%T Architecture and design of a reliable token-ring network
%J IEEE J. Sel. Areas Commun. (USA)
%V SAC-1
%N 5
%P 756-765
%O 18 Refs.
Treatment PRACTICAL.
%D 1983
%K computer networks protocols.
computer networks token ring network architecture performance
transmission system wiring local area network reliability
availability serviceability token access protocol asynchronous transmission
data frames full duplex synchronous channels delay mixed ring/star wiring.
%X The architecture, performance, transmission system, and wiring
strategy of a token-ring local area network implemented at the IBM
Zurich Research Laboratory are described. In designing the system,
particular emphasis was placed on high reliability, availability, and
serviceability. To ensure robustness of the token-access protocol,
the authors use the concept of a monitor function which is
responsible for fast recovery from access related errors. The
protocol supports asynchronous transmission of data frames
concurrently with full-duplex synchronous channels, e.g. for voice or
other applications requiring guaranteed delay. The delay-throughput
performance of the token ring is shown to depend very little on data
rate and distance. The transmission system of the ring is fully bit
synchronous and allows insertion/removal of stations into/from the
ring at any time. A mixed ring/star wiring strategy is used which
provides the means for both fault detection and isolation and system
reconfiguration, and allows wiring of a building systematically.

%A W. Bux
%A B. Meister
%A J. W. Wong
%T Bridges for interconnection of ring networks: a simulation study
%B Information Processing 83. Proceedings of the IFIP 9th World
Computer Congress
%C Paris, France
%D 19-23 Sept. 1983
%P 181-185
%O 8 REFS. Treatment PRACTICAL
%I North-Holland. Amsterdam, Netherlands, xvi+976, Std Book No.0 444 86729 5
%E Mason, R. E. A.
%K computer networks
interconnection bridges ring networks simulation study local area network
logical link control buffering strategies token rings probability

%A W. Bux
%A F. Closs
%A P. Janson
%A K. Kuemmerle
%A H. R. Mueller
%T A reliable token-ring system for local-area communication
%B Productivite et Informatique: Pour une Entreprise Dynamique. Recueil
des Conferences du Printemps Convention (Productivity and Data
Processing: Two Essentials for a Dynamic Company. Proceedings of the
Spring Convention)
%C Paris, France
%P 2
%P 66-71
%V 2
%D 30 May-3 June 1983
%O 10 Refs
Treatment PRACTICAL.
%K computer networks protocols.
computer networks protocols reliable token ring system local area communication
IBM Zurich Research Laboratory circulating permission token reliability
reliable access protocol
data frames priority mechanism synchronous data operation synchronous traffic
voice services.
%X This paper describes an experimental local-area system designed and
implemented at the IBM Zurich Research Laboratory. Access to the ring
is controlled by a circulating permission token. In the design of the
system, particular emphasis was placed on high reliability. The
approach taken to achieve a reliable access protocol is to have a
monitor function responsible for supervising the proper token
operation and for performing efficient recovery in case of
access-related errors. Transmission of data frames is considered to be the
basic operation. The authors also show how a token ring can provide
synchronous channels through a simple priority mechanism in addition
to the synchronous data operation. Possible applications of the
synchronous traffic capability are real-time and non-real-time voice
services.

%A J. N. Buxton
%A L. E. Druffel
%T Requirements for an ada programming support environment: rationale for
stoneman
%Z Harvard Univ., Cambridge, MA, USA
%J Computer software and applications conference
%P 66-72
%D 27-31 Oct. 1980
%C Chicago, IL, USA
%I IEEE, New York, USA
xix+874 pp.
%O 29 Refs.
treatment: applic
%K ada
ada programming support environment stoneman dod
%X Full advantage of the new dod programming language, ada, will be realized
only when a complete and sophisticated programming support environment is
provided. A detailed requirements definition (stoneman) for such a support
environment has been evolved through extensive cooperation with the dod,
software contracting and computer science communities. The authors
summarise the stoneman, provide motivation for the requirements and clarify
some underlying concepts.

%A B. Buzbee
%A G. Golub
%A C. Nielson
%T On Direct Methods for Solving Poisson's Equation
%J SIAM J. Numer. Anal.
%V 7
%P 627-656
%D 1970

%A B. Buzbee
%A G. Golub
%A J. Howell
%T Vectorizations for the CRAY-1 of Some Methods for Solving Elliptic
Difference Equations
%E D. Kuck
%E D. Lawrie
%E A. Sameh
%B High Speed Computer and Algorithm Organization
%I Academic Press
%C New York
%D 1977
%P 255-271

%A B. Buzbee
%A J. Morrison, (Ed.)
%T Proceedings of the 1978 LASL Workshop on Vector and Parallel Processors
%D 1978
%C Los Alamos, NM

%A B. Buzbee
%A D. Boley
%A S. Parter
%T Applications of Block Relaxation
%J Proc. 1979 AIME Fifth Symposium on Reservoir Simulation
%D 1979

%A B. Buzbee
%A J. Worlton
%A G. Michael
%A G. Rodrigue
%T DOE Research in Utilization of High Performance Systems
%I Los Alamos National Laboratory
%R LA-8609-MS
%D 1980

%A B. Buzbee
%T Implementing Techniques for Elliptic Problems on Vector Processors
%E M. Schultz
%B Elliptic Problem Solvers
%I Academic Press
%C New York
%D 1981
%P 85-98

%A B. Buzbee
%A R. Ewald
%A J. Worlton
%T Japanese Supercomputer Technology
%J Science
%V 218
%N 17
%P 1189-1193
%D 1982

%A B. Buzbee
%T Vectorization of Algorithms for Solving Systems of Elliptic Difference
Equations
%B Impact of New Computing Systems on Computational Mechanics
%E A. Noor
%I The American Society of Mechanical Engineers
%P 81-88
%D 1983

%A B. Buzbee
%T Two Parallel Formulations of Particle-In-Cell Models
%I Los Alamos National Laboratory
%R LA-UR-83-413
%D 1983

%A B. Buzbee
%T Remarks for the IFIP Congress '83 Panel on How to Obtain High
Performance for High-Speed Processors
%I Los Alamos National Laboratory
%R LA-UR-83-1392
%D 1983

%A B. Buzbee
%T Application of MIMD Machines
%I Los Alamos National Laboratory
%R LA-UR-2004
%D 1984

%A B. I. Buzbee
%T Applications of Block Relaxation
%R SPE 7672

%A B. L. Buzbee
%A L. E. Rudsinski
%T Exploiting Vector Mode in an SISD Computer
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 251
%K LASL (LANL), CDC 7600
%O performance evaluation
%X Summary only.

%A Bill Buzbee
%T Gaining Insight from Supercomputing
%J Proceedings of the IEEE
%V 72
%N 1
%K Special issue -- Supercomputers - Their Impact on Science and Technology
%P 19-21
%D January 1984
%X Three analogies of applications: equation of state, Three-Mile Island,
non-linear analysis

%A Billy L. Buzbee
%T A Fast Poisson Solver Amenable to Parallel Computation
%J IEEE Transactions on Computers
%V C-22
%N 8
%D August 1973
%P 793-796
%K Linear algebra, numerical solution of PDE's, Poisson equation
Special issue on parallel computation, parallel algorithms

%A J. P. Cabanel
%A M. N. Marouane
%A R. Besbes
%A R. D. Sazbon
%A A. K. Diarra
%Z Univ. Paul Sabatier, Toulouse, France
%T A decentralized os model for ARAMIS distributed computer system
%T A Decentralized Control Method in a Distributed Computer System
%J 1st International Conference on Distributed Computing Systems
%D October 1979
%P 529-535
%C Huntsville, AL , USA
%I IEEE, New York, USA
x+782 pp.
%O 12 Refs.
treatment: applic, general,review
%K multiprocessing systems e.d.p. management operating systems
computer architecture
distributed computer system multiplexed control algorithm
Decentralized control
%X The resource management problems in distributed multicomputer systems in
local networks (hospitals, factories, administrations...) is discussed. A
decentralized mechanism based on multiplexed control among all sites of the
distributed system, and allowing the resource management of the global
machine is presented. The algorithm proposed is a simple and modular
decentralized mechanism that allows from any site of aramis distributed
computer system (adcs) a transparent and automatic utilization of the whole
set of adcs resources.

%A J. P. Cabanel
%A R. D. Sazbon
%A A. K. Diarra
%A M. N. Marouane
%A R. Besbes
%Z Univ. Paul Sabatier, Toulouse, France
%T A Decentralized Control Method in a Distributed System
%J 1st International Conference on Distributed Computing Systems
%D October 1979
%P 651-659
%C Huntsville, AL, USA
%I IEEE, New York, USA
x+782 pp.
%O 13 Refs.
treatment: applic, general,review
%K multiprocessing systems computer architecture
decentralized control distributed system software control management
resource allocation
Distributed operating systems
%X Considers the software control management, which must present to the user
the whole set of resources as belonging to a single machine, and at the
same time, to perform an optimal allocation of resources, by resolving the
problems of distributed control, internal integrity, coherence and
automatic reconfiguration in case of faults.

%A D. Calahan
%T Parallel Solution of Sparse Simultaneous Linear Equations
%J Proceedings of the 11th Allerton Conference on Circuit and System
Theory
%I University of Illinois
%P 729-738
%D 1973

%A D. Calahan
%T Complexity of Vectorized Solution of Two-Dimensional Finite Element Grids
%I University of Michigan Systems Engineering Laboratory
%R No. 91
%D 1975

%A D. Calahan
%A W. Joy
%A P. Orbits
%T Preliminary Report on Results of Matrix Benchmarks on Vector Processors
%I University of Michigan Systems Engineering Laboratory
%D 1976

%A D. Calahan
%T Vectorized Sparse Elimination
%J Proceedings Sci. Computer Information Exchange Meeting
%C Livermore, CA
%D 1979

%A D. Calahan
%A W. Ames
%T Vector Processors: Models and Applications
%J IEEE Trans. Circuits and Systems
%V CAS-26
%P 715-776
%D 1979

%A D. Calahan
%A W. Ames
%A E. Sesek
%T A Collection of Equation Solving Codes for the CRAY-1
%I University of Michigan Systems Engineering Laboratory
%D 1979

%A D. Calahan
%T Multi-level Vectorized sparse solution of LSI Circuits
%J Proc. IEEE Conference on Circuits and Computers
%C Rye, NY
%D October, 1980
%P 976-979

%A D. Calahan
%T Direct Solution of Linear Equations on the CRAY-1
%J CRAY Channels
%V 3
%P 1-5
%D 1981
%X User group magazine article.

%A D. Calahan
%T Performance of Linear Algebra Codes on the CRAY-1
%J SPE Journal
%P 558-564
%D 1981

%A D. Calahan
%T Sparse Vectorized Direct Solution of Elliptic Problems
%E M. Schultz
%B Elliptic Problem Solvers
%I Academic Press
%C New York
%D 1981
%P 241-245

%A D. Calahan
%T High Performance Banded and Profile Equation-Solvers for the CRAY-1:
The Unsymmetric Case
%I University of Michigan Systems Engineering Laboratory
%R No. 160
%D 1982

%A D. Calahan
%T Vectorized Direct Solvers of 2-D Grids
%J Proc. 6th Symp. Reservoir Simulation
%P 489-506
%D 1982

%A D. Calahan
%T Tasking Studies in Solving a Linear Algebra Problem on a CRAY-class
Multiprocessor
%I University of Michigan Supercomputer Algorithm Research Laboratory
%R No. SARL 2
%D 1983

%A D. A. Calahan
%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T A Block-Oriented Sparse Equation Solver for the CRAY-1
%P 116-123
%O Arithmetic Processing

%A D. A. Calahan
%T Influence on Task Granularity on Vector Multiprocessor Performance
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 278-284
%K Cray XMP, code decomposition, SIMD
%O vector machines

%T Memory Conflict Simulation of a Many-Processor CRAY Architecture.
Part I: A CRAY X-MP Study
%A D.A. Calahan
%A Ken Elliott, III
%I Los Alamos National Laboratory
%D March 1, 1985

%T Conflict Sensitivity of Algorithms Part I: A CRAY X-MP Study
%A D. A. Calahan
%I Los Alamos National Laboratory
%D March 15, 1985

%A R. Callon
%T Internetwork protocol
%J Proc. IEEE (USA)
%V 71
%N 12
%P 1388-1393
%O 12 Refs.
%D December 1983
%K computer networks protocols standardisation.
Open System Interconnection computer networks standardisation
variety of networks
Open Systems Interconnection OSI protocols cost effective interconnection
future networks Network Layer.
%X Application of Open Systems Interconnection (OSI) protocols requires
cost-effective interconnection of a wide variety of existing and
future networks. Differences in underlying technologies, in
administrative control, in available qualities of service, and in
other important factors complicate the task of achieving
interconnection. The paper discusses a variety of the technical
issues related to interconnection within the OSI Network Layer.

%A L. J. Caluwaerts
%A J. Debacker
%A J. A. Peperstraete
%T A Dataflow Architecture with a Paged Memory System
%J Proceedings of 9th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 10
%N 3
%D April 1982
%P 120-130

%A L. J. Caluwaerts
%A J. DeBacker
%A J. Peperstraete
%T Implementing Streams on a Data Flow Computer System with Paged Memory
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 11
%N 3
%D 1983
%P 76-83
%O Data Flow Architectures

%A S. Cammarata
%A D. McArthur
%A R. Steeb
%T Strategies of Cooperation in Distributed Problem Solving
%J IJCAI83
%D 1983
%P 767-770
%X Strategies split into two main categories: organizational
(how to decompose large task and specification of roles for agents;
also prescribe communication paths) and information distribution
(e.g., broad or selective communication, unsolicited or on-demand comm.,
ack or no acknowledgements, single transmission or repeated
transmissions). Only organizational strategies varied for experiment.
Selection by shared convention, selection of least spatially
constrained agent, selection of the most knowledgeable, least
committed agent, and combination of last two. Last one most
interesting -- not yet studied in detail. The first strategy (simple)
is faster but the others lead to fewer separation errors.

%T Static Allocation for a Data Flow Multiprocessor
%A Michael L. Campbell
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 511-517
%K Data Flow

%A R. H. Campbell
%T Path Expressions: A Technique for Specifying Process Synchronization
%R Ph.D dissertation
%I Computing Laboratory, Univ. of Newcastle upon Tyne
%D August 1976

%A R. H. Campbell
%T Path Expressions: A Technique for Specifying Process Synchronization
%I Dept. of Computer Science, Univ. of Ill.
%R UIUCDCS-R-77-863
%C Urbana-Champaign, IL
%D 1977

%A Roy H. Campbell
%T Distributed Path Pascal
%E Y. Paker
%E J.-P. Jerjus
%B Distributed Computing Systems (Synchronization, Control and Communication)
%I Academic Press
%D 1983
%P 191-223
%X Includes a program example of the dining philosophers problem.

%A J. O. Campeau
%T Communication and Sequential Problems in the Parallel Processor
%E L. C. Hobbs
%E D. J. Theis
%E Joel Trimble
%E Harold Titus
%E Ivar Highberg
%B Parallel Processor Systems, Technologies and Applications
%I Spartan Books
%C New York, New York
%D 1970
%P 215-234
%K Architecture, Litton array processor, Litton parallel processor
System and machine organization

%A Joseph O. Campeau
%T The Block-Oriented Computer
%J IEEE Transactions on Computers
%V C-18
%N 8
%D August 1969
%P 706-718
%K array processor, computer organization, high reliability,
implicit function generation, large-scale integration, LSI wafers undiced,
modular computer organization, parallel computation,
variable increment computation algorithm
Computer group conf. proc.

%A E. Caneschi
%A E. Ruzza
%T Designing an OSI compatible network: the OSIRIDE case
%B NETWORKS India 84. International Symposium on Data Communication
and Computer Networks
%C Madras, India
%D 19-21 Oct. 1984
%P 189-190
%O 0 REFS. Treatment PRACTICAL
%E H. N. Mahabala
%E K. B. Lakshmanan
%E S. Srinivasan
%I Comput. Soc. India, IFIP, UNESCO
%K computer networks protocols data communication systems
OSI compatible network OSIRIDE protocols OSI architecture
Italy
%X Summary form only given, substantially as follows. The
interconnection of different computers of different manufacturers
with different operating systems is a problem which has been faced
several times and generally solved by means of ad-hoc solutions. The
new fact in the latest years has been the introduction of the Open
Systems Interconnection (OSI), presented by the International
Organization for Standardization (ISO). The architecture described
by OSI has quickly become a model for systems interconnection. The
protocols described in the OSI architecture are now at a very stable
stage, and national and international projects have been started all
through the world to interconnect systems by means of them. OSIRIDE
(OSI su Rete Italiana Dati Eterogenea/OSI over Heterogeneous Italian
Data Network) is one of these projects and has been developed in
Italy by the National Research Council (CNR), in collaboration with
the Italian industry

%A M. H. Cannel
%A et al.
%T Concepts and Applications of Computerized Associative Processing,
Including an Associative Processing Bibliography
%J National Technical Information Service
%R AD879281
%D December 1970

%A L. E. Cannon
%T A Cellular Computer to Implement the Kalman Filter Algorithm
%R PhD Thesis
%I Montana State University
%D August 1969

%A V. Canotni
%A C. Guerra
%A S. Levialdi
%T Towards an Evaluation of an Image Processing System
%E M. J. B. Duff
%B Computing Structures for Image Processing
%I Academic Press
%D 1983
%P 43-56
%X Gives ideas in evaluating more than just image processing systems, e.g.
general SIMD systems.

%A D. G. Cantor
%T On Nonblocking Switching Networks
%J Networks
%V 1
%N 4
%P 367-377
%D Winter 1971

%A David G. Cantor
%T Optimal Routing in a Packet-Switched Computer Network
%J IEEE Transactions on Computers
%V C-23
%N 10
%D October 1974
%P 1062-1068
%K Computer networks, decomposition method, mathematical programming,
minimum cost flow, multicommodity flow, packet switching, routing,
Computer systems

%A Peter R. Cappello
%A Kenneth Steiglitz
%T Unifying VLSI array designs with geometric transformations
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 448-457
%K
Princeton U
VLSI processor arrays
%X
Reproduced in the 1984 tutorial: \fIInterconnection Network for parallel
and distributed processing\fP by Wu and Feng.

%T A Mesh Automation for Solving Dense Linear Systems
%A Peter R. Cappello
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 418-425
%K Numeric Computing

%T A New Parallel Algorithm for Solving a Complex Function F(Z)=0
%A Carlos A. Cardelino
%A Pin-Yee Chen
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 305-311
%K Numeric Processing

%A G. Carey
%T High Speed Processors and Implications for Algorithms and Methods
%B Nonlinear Finite Element Analysis - Structural Mechanics
%E W. Wunderlich
%E E. Stein
%E K. Bathe
%I Springer-Verlag, Berlin
%D 1981

%T An Efficient Implementation of Search Trees on {lgN + 1} Processors
%A Michael J. Carey
%A Clark D. Thomspon
%J IEEE Transactions on Computers
%V C-33
%N 11
%D November 1984
%P 1038-1041
%K Algorithms for VLSI, dictionary search, pipelining, search trees,
special-purpose architectures,
Correspondence

%A Michael J. Carey
%A David J. DeWitt
%A Goetz Graefe
%T Mechanisms for Concurrency Control and Recovery in Prolog - A Proposal
%I University of Wisconsin
%C Madison, WI
%R Computer Sciences Technical Report #560
%D October 1984

%A Michael J. Carey
%A Miron Livney
%A Hongjun Lu
%T Dynamic Task Allocation in a Distributed Database System
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Distributed Query Processing, migration
%P 282-291

%A T. A. Cargill
%T A robust distributed solution to the dining philosophers problem
%J Software-Pract. & Exper. (GB)
%V 12
%N 10
%P 965-969
%O 7 REFS
Treatment PRACTICAL
%D 1982
%K multiprocessing programs fault tolerant computing
concurrency deadlock distributed processing multiprocessing programs
robust distributed solution dining philosophers problem
central synchronization mechanism failures Ada
%X A distributed solution to Dijkstra's 'Dining Philosophers' problem is
presented. There is no central synchronization mechanism and it is
robust in that the impact of failures is local. The solution is
amenable to implementation using a wide class of synchronization
primitives. A concrete implementation is presented in Ada

%A David A. Carlson
%A Binary Sugla
%T Time and processor efficient parallel algorithms for a recurrence
equations and related problems
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 310-314
%K perfect shuffle,
%O theory

%A David A. Carlson
%T Parallel Processing of Tree-like Computations
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 192-200
%O Parallel algorithms

%T Performing Tree and Prefix Computations on Modified Mesh-Connected
Parallel Computers
%A David A. Carlson
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 715-718
%K Mesh-Structured Systems

%A N. A. Carlson
%A A. F. Culone
%T Efficient Algorithms for On-Board Array Processing
%J Proc. Int'l Conf. Comm.
%D 1979
%P 1-5

%A A. Carroll
%A R. Wetherald
%T Application of Parallel Processing to Numerical Weather Prediction
%J Journal of the ACM
%N
%D 1967
%P 591-614
%X More

%A G. S. Carson
%T Message-based distributed computing
%J Proceedings of the Real-Time Systems Symposium
%C Los Angeles, CA, USA
%P 170-83
%O 17 Refs
Treatment PRACTICAL
%D 7-9 Dec. 1982
%K distributed processing data communication systems
distributed computing comparisons message exchange policies
message passing schemes communications model
%X For several reasons it is difficult to compare and judge the relative
merits of techniques used for exchanging messages among components of
distributed computing systems. These reasons include the lack of
systems. These reasons include the lack of terminology, differing
environmental assumptions, the absence of survey works in the field,
and the lack of any classification scheme based upon a set of
primitive properties of message passing. The first objective of this
paper is to provide a basis for such comparisons. A brief overview of
the message exchange policies of several recent proposals is
presented. A classification scheme for message passing schemes is
proposed and used to compare these policies. The second objective of
this paper is to synthesise a class of message exchange policies
which make it possible to construct provably correct real-time
systems and which fit the communications model of the ANSI/ISO Open
Systems Interconnection model. Finally, implementation techniques for
message passing are discussed and some factors which influence the
selection of a policy and its implementation to a particular
application are given

%A F. G. Carty
%A R. H. Ries
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Goodyear Aerospace Corporation's Microcomputer Array Processor System
%P 141-142
%O

%A O. S. F. Carvalho
%A G. Roucairol
%T On the Distribution of an Assertion
%T Language Constructs and Support Systems for Distributed Computing
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 121-131

%A Osaldo S. F. Carvalho
%A Gerard Roucairol
%T Assertion, Decomposition and Partial Correctness of Distributed Control
Algorithms
%E Y. Paker
%E J.-P. Jerjus
%B Distributed Computing Systems (Synchronization, Control and Communication)
%I Academic Press
%D 1983
%P 67-92

%A D. Casasent
%T Acousto-optic Linear Algebra Processors - Architectures, Algorithms and
Applications
%J Proc. IEEE
%V 72
%N 7
%P 831-849
%D July 1984

%A T. L. Casavant
%A J. G. Kuhl
%T Design of a loosely-coupled distributed multiprocessing network
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 42-45
%K Loosely-coupled multicomputer,
%O distributed systems

%A R. P. Case
%A A. Padegs
%T Architecture of the IBM System/370
%J Comm. ACM
%V 21
%N 1
%D January 1978
%P 73-96

%A L. Casey
%A N. Shelness
%T A domain structure for distributed computer systems
%Z Dept. of Computer Sci., Edinburgh Univ., Edinburgh, Scotland
%J Oper. Syst. Rev. (USA) Spec. Issue,
Proceedings of the sixth symposium on operating systems principles
%P 101-108
%V 11
%N 5
%D 16-18 nov. 1977
%C West Lafayette, IN, USA
%O 15 Refs.
treatment: practical
%K computer architecture operating systems multi access systems
domain structure distributed computer systems multicomputer
physical architecture dynamic distribution systems environment
%X This paper argues for the use of a multicomputer physical architecture in
preference to a multi-processor architecture, and for dynamic distribution
of functions and control as opposed to static allocation of functions and
hierarchical control. A systems environment which is based on a domain
structure is then described. The domain structure restricts sharing of
items. This alleviates the main problem in implementing a capability
mechanism to support domains in a system without shared memory, which is
that a central table of capabilities is required. In also makes the
management of the non shared items easier since they can be required only
at one computer at a time. Ensential sharing is also handled without
central control but at the cost of some complexity. Considerable attention
is paid to the handling of interdomain jumps as they provide the
opportunity for the dynamic allocation of functions. It is conjectured that
the resulting system would be capable of smooth expansion in size from one
to twenty five computers. In operation it would exhibit dynamic load
balancing as well as having the protection advantages of domain structure.

%A L. Casey
%A N. Shelness
%T A Domain Structure for Distributed Computer Systems
%J Proceedings of the Symposium on Operating System Principles
%D November 1977

%A L. M. Casey
%T Decentralised Scheduling
%J The Australian Computer Journal
%D May 1981
%V 13
%N 2
%P 58-63

%A R. G. Casey
%T Allocation of Copies of a File in an Information Network
%J Proceedings of the Spring Joint Computer Conference
%I AFIPS
%V 40
%D 1972
%P 617-625
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A R. A. Caspe
%T Array Processors
%J Mini-Micro Systems
%V 11
%N 7
%D July 1978
%P 54-63

%A P. Caspi
%A N. Halbwachs
%T Algebra of events: a model for parallel and real time systems
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 150-159
%K
IMAG France
%O Languages

%A P. Caspi
%A N. Halbwachs
%T An Approach to Real Time Systems Modeling
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 710-716
%K
%O Performance Evaluation of Distributed Computer Systems

%A M. Castan
%A E. I. Organick
%T U3L: An HLL-RISC Processor for Parallel Execution of FP-Language Programs
%J Proceedings of 9th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 10
%N 3
%D April 1982
%P 239-247

%A J. Castillo
%A S. D. Smith
%T Dynamic Routing in WISPAC: A Continuous System Simulation Machine
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 590-595
%K
%O Distributed Simulation

%l proceedings-article
%A M. Castran
%A R. P. Organick
%T u3L: An HLL-RISC Processor for Parallel Execution of FP-Language Programs
%J Proc Ninth Annual Symp on Computer Architecture
%P 239-247
%M April
%K RISC
%D 1982

%A A. J. Catto
%A J. R. Gurd
%A C. C. Kirkham
%T Nondeterministic Dataflow Programming
%J Proceedings of the Sixth ACM European Regional Conference
%D March 1981
%P 435-444

%A A. J. Catto
%A J. R. Gurd
%T Resource Management in Dataflow
%J Proceedings of the 1981 Conference on Functional Programming Languages
and Computer Architecture
%D October 1981
%P 77-84

%A D. Caughey
%A P. Newman
%A A. Jameson
%T Recent Experiences with Three Dimensional Transonic Potential Flow
Calculations
%I NASA Langley Research Center
%R TM 78733
%D 1978
%X Remove?

%A D. Caughey
%T Multigrid Calculation of Three-Dimensional Transonic Potential Flows
%J Appl. Math. & Comp.
%V 13
%P 241-260
%D 1983
%X Remove?

%A G. Caumont
%A J. C. Laprie
%A D. R. Powell
%T RHEA: A Fault and damage-tolerant hierarchical communication
support system for local area computing in aggressive environments
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 77-84
%K
%O Fault Tolerance Methods

%A Lucien M. Censier
%A Paul Feautrier
%T A New Solution ot Coherence Problems in Multicache Systems
%J IEEE Transactions on Computers
%V C-27
%N 12
%D December 1978
%P 1112-1118
%K Caches, coherence, memory hierarchy, multiprocessor systems,
nonstore-through,
Memory systems

%A V. G. Cerf
%A P. T. Kirstein
%T Issues in packet-network interconnection
%Z Advanced Res. Projects Agency, US Dept. of Defense, Arlington, VA, USA
%J Proc. IEEE (USA)
%V 66
%N 11
%P 1386-1408
%D Nov. 1978
%O 64 Refs.
treatment: general,review
%K packet switching computer networks reviews
packet switched data communication networks gateways addressing
congestion control
accounting access control CCITT X.25/X.75 packet network interface
network interconnection
%X Introduces the wide range of technical, legal, and political issues
associated with the interconnection of packet switched data communication
networks, and a range of technical choices for achieving interconnection
are compared. The level of interconnection, the role of gateways, naming
and addressing, flow and congestion control, accounting and access control,
and basic internet services are discussed in detail. The CCITT X.25/X.75
packet network interface recommendations are evaluated in terms of their
applicability to network interconnection. alternatives such as datagram
operation and general host gateways are compared with the virtual circuit
methods, and some observations on the regulatory aspects of interconnection
are offered.

%T Allocation of Operations in Distributed Database Access
%A Stefano Ceri
%A Giuseppe Pelagatti
%J IEEE Transactions on Computers
%V C-31
%N 2
%D February 1982
%P 119-129
%K Database access strategies, distributed databases, linear integer
programming, network information systems, operation allocation,
transmission costs
Distributed systems

%A C. A. Cesari
%T Application of Data Flow Architecture to Computer Music Synthesis
%I Laboratory for Computer Science, MIT
%R TR-257
%C Cambridge, MA
%D February 1981

%A Rukert Cezzar
%A David Klappholz
%T Process management overhead in a speedup-oriented MIMD system
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 395-403
%K
process management software (PMS)
scheduling resources

%A U. S. Chakravarthy
%A S. Kasif
%A M. Kohli
%A J. Minker
%A D. Cao
%T Logic programming on ZMOB: a highly parallel machine
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 347-349
%K
U Maryland, Prolog
%O Multi-microprocessors

%A D. D. Chamberlin
%T The `Single-Assignment' Approach to Parallel Processing
%J Conf. Proc. 1971 FJCC
%I AFIPS Press
%D 1971
%P 263-269

%A D. D. Chamberlin
%T Parallel Implementation of Single Assignment Languages
%R (PhD Thesis) TR 19
%I Stanford University
%D January 1971

%A Fred B. Chambers
%A David A. Duce
%A Gillian P. Jones, (eds.)
%T Distributed Computing
%I Academic Press
%S APIC Studies in Data Processing
%V 20
%D 1984

%T Generating Combinations in Parallel
%A Becky Chan
%A Selim G. Akl
%I Dept. of Computing and Information Science, Queen's University
%C Kingston, Canada - Ontario
%R TR-85-168
%D January 1985

%A T. Chan
%A R. Schreiber
%T Parallel Networks for Multigrid Algorithms: Architecture and
Complexity
%I Yale University Dept. of Computer Science
%R No. 262
%D 1983

%A Avinash Chandak
%A J. C. Browne
%T Vectorization of discrete event simulation
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 359-361
%K
U Texas,
simulation/operating systems

%A R. Chandra
%T Conjugate Gradient Methods for Partial Differential Equations
%I Yale University Dept. of Computer Science
%R Ph.D Thesis
%D 1978

%A K. M. Chandy
%A J. R. Dickson
%T Scheduling Unidentical Processors in a Stochastic Environment
%J Proceedings IEEE COMPCON 1972
%I IEEE
%C N. Y.
%D 1972
%P 171-174

%A K. M. Chandy
%T Models for the recognition and scheduling of parallel tasks on
multiprocessor systems
%J Bull. Operations Research Soc. of America
%V 23
%N Suppl. 1
%D Spring 1975
%P B-117
%K scheduling
%X Examines the problems of recognizing parallelism in programs and of
partitioning such programs to minimize execution time.  Also discusses
the effect of multiprocessor architecture on such partitionings.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A K. M. Chandy
%A M. Reiser, eds.
%T Computer Performance
%I North-Holland
%C Amsterdam, the Netherlands
%D 1977
%K performance
%X Contains articles on the performance of multiprocessors and computer
networks.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A K. M. Chandy
%A J. Misra
%T A Nontrivial Example of Concurrent Processing: Distributed Simulation
%J Computer Software and Applications Conference (COMPSAC78)
%I IEEE
%D November 1978
%P 822-826
%O software applications

%A K. M. Chandy
%A J. Misra
%T A Distributed Algorithm for Detecting Resource Deadlocks in Distributed
Systems
%T Language Constructs and Support Systems for Distributed Computing
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 157-164

%A K. M. Chandy
%A J. Misra
%T Distributed Computation on Graphs: Shortest Path Algorithms
%J CACM
%D Nov. 1982

**
%A K. M. Chandy
%A J. Misra
%A L. M. Haas
%T Distributed deadlock detection
%J ACM Trans. Comput. Syst. (USA)
%V 1
%N 2
%P 144-156
%O 15 REFS
Treatment PRACTICAL
%D 1983
%K operating systems computer networks fault tolerant computing
OS computer networks fault tolerant computing deadlock models
communication deadlocks distributed algorithms global information
distributed database
%X Distributed deadlock models are presented for resource and
communication deadlocks. Simple distributed algorithms for detection
of these deadlocks are given. The authors show that all true
deadlocks are detected and that no false deadlocks are reported. In
the algorithms, no process maintains global information; all messages
have an identical short length. The algorithms can be applied in
distributed database and other message communication systems

%A K. M. Chandy
%T Concurrent Programming for the Masses
%J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing
%I ACM
%D August 1984

%T A Paradigm for Detecting Quiescent Properties in Distributed
Computations
%A K. Mani Chandy
%A Jayadev Misra
%I Dept. of Computer Science, Univ. of TX at Austin
%J TR-85-02
%D January 1985

%A Donald Y. Chang
%A David J. Kuck
%A Duncan H. Lawrie
%T On the Effective Bandwidth of Parallel Memories
%J IEEE Transactions on Computers
%V C-26
%N 5
%D May 1977
%P 480-490
%K Array memory system, parallel memory bandwidth,
parallel memory performance, memory interference, multiprocessor performance,
Memory systems

%A Donald Y. Chang
%A David J. Kuck
%A Duncan H. Lawrie
%T On the Effective Bandwidth of Parallel Memories
%J IEEE Transactions on Computers
%V C-26
%N 5
%D May 1979
%P 480-489
%K Array memory system, parallel memory bandwidth, performance,
memory interference, multiprocessor performance
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."
This paper looks at various interleaving schemes and analyses their weaknesses
without suggesting an new major scheme.

%A E. Chang
%A R. Roberts
%T An Improved Algorithm for Decentralized Extrema-Finding in Circular
Configurations of Processes
%J CACM 22
%D May 1979
%P 281-283

%A E. Chang
%T An Introduction to Echo Algorithms
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 193-198
%O Communications Protocols for Distributed Computing Systems

%A E. Chang
%T n-Philosophers: an Exercise in Distributed Control
%J Computer Networks
%V 4
%D 1980
%P 71-76

%A Ernest Chang
%T Verification of Non-Terminating Concurrent Programs
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Program Verification, Parnas it-ti construct,
Dijsktra k-state self-stabilizing algorithm,
%P 411-415

%T AND-Parallelism of Logic Programs Based on a Static data Dependency
Analysis
%A Jung-Herng Chang
%A Alvin M. Despain
%A Dough DeGroot
%J Digest of Papers, Compcon85 Thirtieth IEEE Computer society
International Conference
%I IEEE Computer Society
%D February 25-28, 1985
%P 218-226

%A N. S. Chang
%A K. S. Fu
%T A Study on Parallel Parsing of Tree Languages and its Application to
Syntactic Pattern Recognition
%E Morio Onoe
%E Kendall Preston, Jr.
%E Azriel Rosenfeld
%B Real-Time/Parallel Computing: Image Analysis
%I Plenum Press
%C New York, NY
%D 1981
%P 107-129
%X A simulation study for languages processing Landsat image processing
data. ECTA (Error Correcting Tree Automaton) is the basic tree language
model.

%A S. Chang
%T Borehole Acoustic Simulation on Vector Computers
%I Control Data Corporation
%J Proceedings Symposium CYBER 205 Applications
%C Ft. Collins, CO
%D 1982

%T Multiple-Read Single-Write Memory and Its Applications
%A Sheldon S. L. Chang
%J IEEE Transactions on Computers
%V C-29
%N 8
%D August 1980
%P 689-694
%K Array processing, database management, data security,
distributed computing, fast scientific computing, memory conflict,
memory location conflict, memory organization, multiple access memory,
multiprocessing organization,
Distributed computing

%A Shi-Kuo Chang
%T The Computation of Window Operations
on a Parallel Organized Computer - A Case Study
%J IEEE Transactions on Computers
%V C-22
%N 1
%D January 1973
%P 34-40
%K Computer organization, local operation, parallel computation,
parallel organized computer, picture processing,
Computer systems

%A Shi-Kuo Chang
%T Parallel Balancing of Binary Search Trees
%J IEEE Transactions on Computers
%D April 1974
%P 441-444
%K Binary search trees, highly parallel computer, information retrieval,
parallel computation, sorting,
Correspondence

%A Shi Kuo Chang
%A An Chi Liu
%T File allocation in a distributed database
%J Int. J. Comput. & Inf. Sci. (USA)
%V 11
%N 5
%P 325-340
%O 20 REFS
Treatment PRACTICAL
%K file organisation database management systems distributed processing
distributed database file allocation problem concurrency control
cost optimal solution network flow problem
%X A file allocation problem is studied in this paper. The problem
formulated is to minimize transmission cost where the constraints are
the number of files and the number of copies. The transmission cost
also reflects concurrency control cost which is essential in a
distributed database system. It is demonstrated that an optimal
solution can be found by transforming this problem to a network flow
problem

%A T. L. Chang
%A P. D. Fisher
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T A Block-Driven Data-Flow Processor
%P 151-155
%O

%A Tammy Chann
%A Devesh Bhatt
%A Walter Heimerdinger
%A Larry Kinney
%A Marvin Lum
%T A High-Performance, Multi-Line, Multi-Protocol Data Link Controller for an
Experimental Distributed Computer Testbed
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 398-405
%O Control architectures

%A R. J. Chansler, Jr.
%T Coupling in Systems with Many Processors
%R CMU-CS-82-131
%I Carnegie-Mellon University
%C Pittsburgh, PA
%D Aug. 1982

%A Zhou Chaochen
%T Weakest Environment of Communicating Processes
%J National Computer Conference \(em Proceedings
%I AFIPS
%V 51
%D 1982
%P 679-690

%A Alphonse Chapanis
%T Interactive human communication
%J Scientific American
%V 232
%N 3
%P 36-42
%D March 1975
%X Remove?

%A D. Chapman
%T Computational Aerodynamics Development and Outlook
%J 17th Aerospace Sciences Meeting
%I AIAA
%R paper 79-0129
%D 1979
%X Remove?

%A Alan E. Charlesworth
%T An Approach to Scientific Array Processing: The Architectural Design of the
AP-120B/FPS-164 Family
%J Computer
%V 14
%N 9
%D September 1981
%P 18-27

%A Yves Chauvet
%T Multitasking a vectorized Monte Carlo algorithm on the CRAY X-MP/2
%J CRAY Channels
%D 1984
%V 6
%N 3

%A Yves Chauvet
%T Measured Performance on Vectorization and Multitasking with a Monte-Carlo
Code for Neutron Transport Problems
%D 1984
%I Commissarirt a l'Energie Atomique
%C France

%A D. Chazan
%A W. Miranker
%T Chaotic Relaxation
%J Linear Algebra and Its Applications
%V 2
%P 199-222
%D 1969

%T Computational Geometry on a Systolic Chip
%A Bernard Chazelle
%J IEEE Transactions on Computers
%V C-33
%N 9
%D September 1984
%P 774-785
%K Analysis of algorithms, computational geometry, convolution, parallel
computation, pipelining, real-time algorithms, systolic arrays, VLSI,
Computational geometry

%A A. C. M. Chen
%T Computerized Control and Protection of Electric Power Distribution
System
%J Computer Software and Applications Conference (COMPSAC78)
%I IEEE
%D November 1978
%P 520
%O distributed system software

%A Albert C. Chen
%A Chuan-lin Wu
%T Optimum solution to dense linear systems of equations
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 417-424
%K Model-0, Star,
%O matrix computations

%T Improvement Algorithms for Semijoin Query
%A Arbee L. P. Chen
%A Victor O. K. Li
%J IEEE Transactions on Computers
%V C-33
%N 11
%D November 1984
%P 959-967
%K Distributed database systems, heuristic algorithms, improvement
algorithms, optimality properties, query optimization, query
processing, relational data model, semijoin programs,
Algorithms

%A Arthur C. M. Chen
%A William D. Barber
%T Multi-Microprocessor System for Industrial Control
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 105
%K
%O multiprocessors
%X Summary only.

%A Bo-Shoe Chen
%A Raymond T. Yeh
%T Formal Specification and Verification of Distributed Systems
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 380-387
%K
%O Distributed Software Tools and Methods

%A Bo-Shoe Chen
%A Raymond T. Yeh
%T Formal Specification and Verification of Distributed Systems
%J IEEE Transactions on Software Engineering
%V SE-9
%N 6
%D November 1983
%P 710-722
%K Distributed systems, events, fopc, liveness, safety, specification,
verification
Event Base Specification (EBS) language	
Concurrent systems

%A C. J. Chen
%A A. A. Frank
%T On programmable parallel data routing networks via cross-bar switches for
multiple element computer architectures
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 338-369
%K
%O System architecture and component design

%A I-Ngo Chen
%T A Cellular Data Manipulating Array
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 114
%K
%O processor memory interconnections

%A I-Ngo Chen
%A Paul Y. Chen
%A Tse-Yun Feng
%T Associative Processing of Network Flow Problems
%J IEEE Transactions on Computers
%V C-28
%N 3
%D March 1979
%P 184-190
%K Assignment problem, associative processing, maximal flow, network flow,
parallel algorithms, simulation,
Associative processing

%A I. Chen
%T Performing summation and product in an associative processor
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 155-
%K
%O Associative processors

%A I.-N. Chen
%T A new parallel algorithm for network flow problems
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 306-307
%K
%O Computation algorithms

%A J. Chen
%A S. Kolodner
%T Estimating the Speedup in Parallel Parsing
%J IEEE-TSE
%V SE-11
%N 1
%P 114-124 
%D January 1985

%A Kuo-Wei Chen
%A Keki B. Irani
%T Mapping Problem and Graph Numbering
%J Workshop on Interconnection Networks for Parallel and Distributed
Processing
%D April 1980
%I IEEE
%P 41-46

%A Lee-Ming Chen
%A Jack Sklansky
%T A parallel multimicroprocessor architecture for image processing
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 185-192
%K PMMP (parallel multimicroprocessor), MIMD, arbitration, IPC,
%O image processing

%A Marina Chien-Mei Chen
%T Space-Time Algorithms: Semantics and Methodology
%I California Institute of Technology
%R 5090:TR-83
%D May 5, 1983

%A N. F. Chen
%A C. L. Liu
%T On a class of scheduling algorithms for multiprocessor computing systems
%J Proceedings of the Sagamore Computer Conference (1974)
%D August 1974
%I Springer-Verlag
%P 1-16
%C Raquette Lake, New York
%D August 1974
%K scheduling
%X Describes a class of scheduling algorithms called level algorithms
and derives the conditions under which this class yields optimal schedules.
Also presents quantitative estimates of the quality of these algorithms in
the cases where they are suboptimal.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A N. F. Chen
%T An Analysis of Scheduling Algorithms in Multiprocessor Computer Systems
%R Tech. Report UIUCDCS-R-75-724
%I Dept. of Computer Science, University of Illinois
%D 1975
%C Urbana, Ill.
%K scheduling

%A N.H. Chen
%A C.H. Smith
%A S.C. Fralick
%T A fast computational algorithm for discrete cosine transform
%J IEEE Trans. on Communications
%V COM-25
%N 9

%A P-Y. Chen
%A D. H. Lawrie
%A P. C. Yew
%A D. A. Padua
%T Interconnection networks using shuffles
%J Computer
%V 14
%N 12
%D Dec. 1981
%P 12-27

%A P. -Y. Chen
%A P. -C. Yew
%A D. Lawrie
%T Performance of packet switching in buffered single-stage shuffle-
exchange networks
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 622-628
%K
%O Network Evaluation

%T Optimal Design of Distributed Information Systems
%A Peter Pin-Shan Chen
%A Jacob Akoka
%J IEEE Transactions on Computers
%V C-29
%N 12
%D December 1980
%P 1068-1080
%K Branch and bound methods, distributed database, distributed information
systems, distributed processing, integer programming, mathematical
programming, system design
%O Special issue on distributed processing systems

%T Sorting with Systolic Architecture
%A Pin-yee Chen
%A Miguel Nussbaun
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 865-868
%K Sorting

%A R. C. Chen
%T Bus Communication Systems
%I University Microfilms Dissertation
%R Report #74-20493
%D 1974

%A Robert C. Chen
%A James E. Coffman
%T A Criterion for Synchronization Schemes
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 130
%K
%O Program decomposition and Petri nets
%X Summary only.

%A S. Chen
%A A. Sameh
%T On Parallel Triangular Systems Solvers
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 237-238
%K
%O algorithms and applications
%X Summary only.

%A S. Chen
%T Polynomial Scaling in the Conjugate Gradient Method and Related Topics
in Matrix Scaling
%I Pennsylvania State University Dept. of Computer Science
%D 1982
%R Ph.D Dissertation
%X Remove?

%A S. Chen
%T Large-Scale and High-Speed Multiprocessor System for Scientific
Applications: CRAY X-MP-2 Series
%B Proceedings of the NATO Workshop on High Speed Computations
%E J. Kowalik
%S NATO ASI Series
%V F-7
%I Springer-Verlag
%D 1984
%P 59-67

%A S. C. Chen
%T Speedup of Iterative Programs in Multiprocessor Systems
%I University of Illinois, Department of Computer Science
%R PhD thesis, TR 694
%D January 1975

%A S. C. Chen
%T Time and parallel processor bounds for linear recurrence systems with
constant coefficients
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 196-205
%K
%O Performance

%A S. C. Chen
%A D. Kuck
%T Combinational Circuit Synthesis with Time and Component Bounds
%J IEEE Transactions on Computers
%V C-26
%N 7
%D July 1977

%A S. C. Chen
%A D. J. Kuck
%A A. H. Sameh
%T Practical Parallel Band Triangular System Solvers
%J ACM Transactions on Mathematical Software
%V 4
%N 3
%D September 1978
%P 270-277
%K Parallel computers, array computers, triangular systems,
linear recurrences,
CR Categories: 5.0, 5.14

%A Shyh-Ching Chen
%T Speedup of Interactive Programs in Multiprocessing Systems
%R Tech. Report UIUCDCS-R-75-694
%I Dept. of Computer Science, University of Illinois
%C Urbana, Ill.
%D 1975
%K theoretical results
%X Discusses certain aspects of recognizing parallelism in sequential programs.
Presents techniques for exposing various operations in loop computations, for
use in multiprocessing as well as pipelined systems.  Derives theoretical
results in the time and processor bounds of these techniques and the maximum
speedup achievable for different loop computations.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Shyh-Ching Chen
%A David J. Kuck
%T Time and Parallel Processor Bounds for Linear Recurrence Systems
%J IEEE Transactions on Computers
%V C-24
%N 7
%D July 1975
%P 701-717
%K General linear recurrences, mth order linear recurrences, parallel
computation, processor bounds, time bounds, triangular linear systems

%A Steven S. Chen
%A Jack J. Dongarra
%A Christopher C. Hsiung
%T Multiprocessing Linear Algebra Algorithms on the CRAY X-MP-2:
Experiences With Small Granularity
%i Argonne National Laboratory, University of Chicago
%r TM-24
%d February 1984
%J Journal of Parallel and Distributed Computing
%V 1
%N 1
%D August 1984
%X
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%A T. C. Chen
%T Parallelism, Pipelining and Computer Efficiency
%J Computer Design
%V 10
%D 1971
%P 69-74

%A T. C. Chen
%T Unconventional Superspeed Computer Systems
%J Proceedings AFIPS Spring Joint Computer Conference
%D 1971
%P 365-371

%A T. C. Chen
%T Overlap and Pipeline Processing
%E H. Stone
%B Introduction to Computer Architecture
%I SRA
%P 375-429
%D 1975

%A W. T. Chen
%A H. C. Wang
%A J. W. Tsai
%A J. Y. Wei
%T TH-NET: A Microprocessor-Based Local Network
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 770-775
%K Local Area Networks

%A Yu K. Chen
%A Tse-yun Feng
%T A parallel algorithm for maximum flow problem
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 60
%K
%O Parallel processing techniques
%X Summary.

%A Z. C. Chen
%A C. A. R. Hoare
%T Partial Correctness of Communicating Sequential Processes
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 1-12
%K
%O

%A D. Y. Cheng
%T A Floating Poit Coprocessor for the Butterfly Multiprocessor System
%R UCB/ERL M84/55
%I Electronics Research Lab, University of California
%C Berkeley, CA
%D July 1984
%X Master's thesis.

%A Ray Cheng
%A Jane W. S. Liu
%T Reliable Synchronization in Computer Networks
%R UIUCDCS-R-83-1126 (UILU-ENG 83 1706)
%I Computer Science Department, University of Illinois
%D April 1, 1983
%K

%A W.-T. Cheng
%A Tse-yun Feng
%T Analysis and design of a cost-effective associative processor for
weather computations
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 53-74
%K
%O Associative processors

%A D. R. Cheriton
%T Local networking and internetworking in the V-system
%J Proceedings. Eighth Data Communications Symposium
%C North Falmouth, MA, USA
%I IEEE Computer Soc. Press
Silver Spring, MD, USA x+261
%D 3-6 Oct. 1983
%P 9-16
%O 15 Refs
Treatment PRACTICAL.
%K computer networks data communication systems protocols.
computer networks data communication systems internetworking V system
protocols local network gateway access control
reliability security.
%X A description is given of the use of server-based intelligent
gateways to provide internetworking using standard protocols in
conjunction with an efficient light-weight protocol for the V IPC on
a local network. Beside providing good local network performance,
this design allows a gateway to act as an access control mechanism,
addressing some reliability and security issues that arise with local
networks.

%A David R. Cheriton
%A Willy Zwaenepoel
%T The Distributed V Kernel and its Performance for Diskless Workstations
%J Proceedings of the 9th Symposium on Operating Systems Principles,
Operating Systems Review
%V 17
%N 5
%D October 1983
%P 129-140
%K SUN workstation, uniform interprocess communication
%O distributed file access

%A David R. Cheriton
%A Timothy P. Mann
%T Uniform Access to Distributed Name Interpretation in the V-System
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 290-297
%O Distributed naming and debugging

%A V. Cherkassky
%A M. Malek
%A G. J. Lipovski
%T Fail-Softness Analysis of Tree-Based Local Area Networks
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Fault-Tolerant Networks,
balanced tree communications, fail-softness, local area network,
lookahead ring,
%P 380-385

%T On permuting Properties of Regular Rectangular SW-Banyans
%A Vladimir Cherkassky
%A Miroslaw Malek
%I IEEE Computer Society
%R ISSN 0018-9340
%D June 1985
%K Banyan, combinatorial power, crossbar network, graph isomorphism, graph
modeling, multistage interconnection network, permutation network,
rearrangeable network, stirling approximation.

%A Ming-Yang Chern
%A Tadao Murata
%T A fast algorithm for concurrent LU decomposition and matrix inversion
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 79-86
%K
U Ill, arrays
numerical algorithms

%A Ming-Yang Chern
%A Tadao Murata
%T Efficient matrix multiplications on a concurrent data-loading array
processor
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 90-94
%K
U Ill, CDLAP (concurrent data-loading array processor),
numerical algorithms

%A L. Cheung
%T Techniques for Reducing Dependencies among Instructions for a Parallel
Single Processor Computer System
%I Purdue University
%D 1975

%A Lawrence Cheung
%J Proceedings of the 1978 International Conference on Parallel Processing
%T Dynamic Block Concept
%I IEEE
%D August 1978
%P 52-57
%O Language and control

%A Lawrence S. Cheung
%A Frederic J. Mowle
%T A model for a shared resource multiprocessor
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 93-99
%K
%O System performance

%A R. C. Cheung
%A W. A. Montgomery
%T Functional Multiprocessing in an Experimental Digital Switching Office
%J Computer Software and Applications Conference (COMPSAC79)
%I IEEE
%D November 1979
%P 74-79
%K Bell Labs
%O telecommunications software

%T A Method for Equijoin Queries in Distributed Relational Databases
%A To-Yat Cheung
%J IEEE Transactions on Computers
%V C-31
%N 8
%D August 1982
%P 746-751
%K Distributed relational databases, general equijoin queries, semijoin
transmissions
Distributed systems

%A Tony Cheung
%A James E. Smith
%T An analysis of the CRAY X-MP memory system
%J Proceedings of the 1984 International Conference on Parallel
Processing
%r ECE-84-1
%i EE Dept., University of Wisconsin
%I IEEE
%D August 1984
%P 499-505
%K contention, vector processors, conflict, pipelines,
%O memory systems
%X A discussion comparing the Cray-1S to the newer Cray-XMP dual
processor memory system.

%A Y. Chiang
%A L. S. Fu
%T A VLSI Architecture for Fast Context-Free Language Recognition
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 864-869
%K
%O Applications of Parallelism

%A Yetung P. Chiang
%A King-Sun Fu
%T Matching parallel algorithms and architecture
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 374-380
%K models,

%A R. E. Childs
%T Multiple microprocessor systems: Goals, limitations and alternatives
%J Exploding Technology, Responsible Growth \(em Digest of Papers \(em
COMPCON Spring 79
%C San Francisco, California
%D March 1979
%P 94-97
%K miscellaneous topics in multiprocessing
%X Surveys the merits and appropriateness of using multiprocessing in
microprocessing in microprocessor systems.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A R. Chima
%A G. Johnson
%T Efficient Solution of the Euler and Navier-Stokes Equations with a
Vectorized Multiple-Grid algorithm
%I AIAA
%R 83-1893
%D 1983

%A Chi-Yuan Chin
%A Kai Hwang
%T Priority queueing analysis of packet switching networks
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 220-224
%K synchronous switching networks, MINs (multistage interconnection nets),
FIFO, asynchronous switching networks,
%O queueing analysis

%A Chi-Yuan Chin
%A Kai Hwang
%T Connection Principles of Multipath Packet Switching Networks
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%D June 1984
%P 99-108
%K multistage interconnection networks (MIN),
multipath multistage interconnection networks (MMIN),
interconnection networks
%X
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%T Packet Switching Networks for Multiprocessors and Data Flow Computers
%A Chi-Yuan Chin
%A Kai Hwang
%J IEEE Transactions on Computers
%V C-33
%N 11
%D November 1984
%P 991-1003
%K Arbitration network, buffered 2-by-2 switches, data flow computers,
distribution network, interprocessor-memory networks,
multiprocessor systems, multistage interconnection network, packet switching,
Communications

%A F. Y. Chin
%A J. Lam
%A I. N. Chen
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Optimal Parallel Algorithms for the Connected Component Problems
%P 170-175
%O Non-Numerical Algorithms

%A Francis Chin
%A H. F. Ting
%T A Near-Optimal Algorithm for Finding the Median Distributively
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Distributed Applications Algorithms
%P 459-465

%A C. Cholesky
%T Poisson Solvers on a Large Array Computer
%J Proc. 1978 LASL Workshop on Vector and Parallel Processors
%P 98-132
%D 1978

%A C. Cholesky
%T Performance Analysis of Tridiagonal Equation Solvers on Array Computers
%I Old Dominion University
%C Norfolk, VA
%R TR 79-4
%D 1979

%A C. Cholesky
%T Performance Analysis of Poisson Solvers on Array Computers
%E C. Jesshope
%E R. Hockney
%B Infotech State of the Art Report: Supercomputers
%I Maidenhead: Infotech Int. Ltd.
%V 2
%D 1979
%P 147-181

%A C. Cholesky
%T The Effect of the Data Transfer Pattern of an Array Computer on the
Efficiency of Some Algorithms for the Tridiagonal and Poisson Problems
%J Conference on Array Architectures for Computing in the
80's and 90's
%C Hampton, VA
%D 1980

%A K. Chong
%A P. Hsia
%T Diagnostic system for distributed software: a relational database
approach
%J Proceedings of the 7th International Conference on Software
Engineering (cat. no. 84CH2011-5)
%C Orlando, FL, USA
New York, USA, p: xiv+545
%P 30-40
%O 13 REFS
Treatment PRACTICAL
%I IEEE
ISBN: 0-8186-0528-6
%D 26-29 March 1984
%K database management systems distributed processing program diagnostics
DBMS software engineering distributed software relational database
software diagnostics static analysis dynamic testing symbolic execution
performance evaluation syntax analysis source program symbol tables
graph models program fragments execution histories data structures
dynamic testing features
%X Software errors in distributed systems are difficult to detect,
locate and correct. The relational database approach in software
diagnostics is an integrated approach encompassing most features of
static analysis, dynamic testing, symbolic execution, and performance
evaluation techniques. Modified syntax analysis of the source program
and testing run of the instrumented code generates the basis
relations (symbol tables, graph models, program fragments, execution
histories) from which diagnostic information is retrieved
interactively. The basis relations contain necessary information to
diagnose the software since data structures, algorithms and execution
behavior of the software are included. Implementations of some
typical dynamic testing features extended to distributed software are
discussed and illustrated

%T A Simple and Efficient Randomized Byzantine Agreement Algorithm
%A Benny Chor
%A Brian A. Coan
%J IEEE Transactions on Software Engineering
%V SE-11
%N 6
%I IEEE Computer Society
%D June 1985
%O Special Issue on Reliability in Distributed Software and Database
Systems
%P 531-539
%K Byzantine agreement, fault-tolerance, randomized algorithms

%A A. L. Chos
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T A Practical Parallel Algorithm for Reporting Intersections of
Rectangles
%P 304-305
%O

%A Timothy C. K. Chou
%A Jacob A. Abraham
%T Load Balancing in Distributed Systems
%J IEEE Transactions on Software Engineering
%D July 1982
%V SE-8
%N 4
%P 401-412

%A Timothy C. K. Chou
%A Jacob A. Abraham
%T Load redistribution under failure in distributed systems
%J IEEE Transactions on Computers
%V C-32
%N 9
%D September 1983
%P 799-808
%K
Distributed systems, load redistribution, computer systems modeling,
high-availability systems, fault-tolerant computing

%A Paul Chow
%A Zvonko G. Vranesic
%A Jui Lin Yen
%T A Pipeline Distributed Arithmetic PFFT Processor
%J IEEE Transactions on Computers
%V C-32
%N 12
%D December 1983
%P 1128-1136
%K Distributed arithmetic, fast Fourier transform, prime factor Fourier
transform.
Butterfly structures.

%A Y. Chow
%A R. Dixon
%A T. Feng
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T An Interconnection network for Processor Communication with
Optimized Local Connections
%P 65-74
%O Interconnections

%A Yuan-Chieh Chow
%A W. H. Kohler
%T Performance of several queueing models for multiprocessor
multiprogramming systems
%J Computers ... by the Millions for the Millions \(em Digest of Papers \(em
COMPCON Fall 76
%C Washington, D.C.
%D September 1976
%P 66-71
%K performance
%X The performances of a single large processor and a number of cooperating
processors are compared using three different models.  The conditions under
which the performance degradation in using multiple processors is small are
indicated.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Yuan-Chieh Chow
%A Walter H. Kohler
%T Models for Dynamic Load Balancing in a Heterogeneous Multiple Processor
System
%J IEEE Transactions on Computers
%D May 1979
%V C-28
%N 5
%P 354-361
%K Job routing, load balancing, multiple processor system, performance
analysis, queueing models
%O Multiple processor systems

%A Yuan-Chieh Chow
%A Robert D. Dixon
%A Tse-yun Feng
%A Chuan-lin Wu
%T Routing Techniques for Rearrangeable Interconnection Networks
%J Workshop on Interconnection Networks for Parallel and Distributed
Processing
%D April 1980
%I IEEE
%P 64-69

%A Normal H. Christ
%A Anthony E. Terrano
%T A Very Fast Parallel Processor
%J IEEE Transactions on Computers
%V C-33
%N 4
%D April 1984
%P 344-350
%K Distributed processing, microcomputers, parallel computation,
specialized computers, vector processing,
lattice gauge theory, processor array,
Parallel processors

%A David Park Christman
%T Programming the Connection Machine
%I Xerox Palo Alto Research Center
%C Palo Alto, CA
%R ISL-84-3
%D April 1984
%K MIT, parallel computation

%A T. Christopher
%A O. El-Dessouki
%A M. Evens
%A P. Greene
%A A. Hazra
%A W. Huen
%A A. Rastogi
%A R. Robinson
%A W. Wojciechowski
%T Uniprogramming a Network Computer
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 132-138
%O Distributed Processing

%A T. Christopher
%A O. El-Dessouki
%A M. Evens
%A W. Kabat
%A S. Wagle
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T A Fastbus System Description Language
%P 149-150
%O

%A T. Christopher
%A M. Evens
%A R. R. Gargeya
%A T. Leonhardt
%T Structure of a Distributed Simulation System
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 584-589
%K
%O Distributed Simulation

%A T. W. Christopher
%T The Operating System for Technec
%J Computer Software and Applications Conference (COMPSAC79)
%I IEEE
%D November 1979
%P 434-435
%O distributed systems

%A T. W. Christopher
%A O. El-Dessouki
%A M. Evens
%A H. Harr
%A H. Dlawans
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T SALAD:  A Distributed Compiler for Distributed Systems
%P 50-57
%O Languages and Compilers

%A W. W. Chu
%A G. Ohlmacher
%T Avoiding Deadlock in Distributed Data Bases
%J Proceedings of the ACM Symp.
%D November 1974
%P 156-160
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A W. W. Chu
%T Advances in Computer Communications
%I Artech House
%C Boston, Massachusetts
%D 1976

%A W. W. Chu
%A P. P. Chen
%T Tutorial: Centralized and Distributed Data Base Systems
%N Catalog No. EHO 154-5
%I IEEE
%D 1979

%A Wesley W. Chu
%T Optimal File Allocation in a Multiple Computer System
%J IEEE Transactions on Computers
%D October 1969
%V C-18
%N 10
%P 885-889
%K computer communication, linear integer programming,
multicomputer information systems, multiprocessor,
non-linear integer programming, optimal file allocation
%O Computer system
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A Wesley W. Chu
%A Paul Hurley
%T A Model for Optimal Query Processing for Distributed Data Bases
%J Proceedings of the 18th IEEE COMPCON
%D 1979
%P 116-122
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%T A Hierarchical Routing and Flow Control Policy (HRFC) for Packet
Switched Networks
%A Wesley W. Chu
%A Michael Yih-Chung Shen
%J IEEE Transactions on Computers
%V C-29
%N 11
%D November 1980
%P 971-977
%K Alternative route, computer network, distributed routing, flow control,
hierarchical routing and flow control policy, HRFC, packet switched
network, primary route, routing
%O Computer networks

%A Wesley W. Chu
%A Leslie J. Holloway
%A Min-Tsung Lan
%A Kemal Efe
%T Task Allocation in Distributed Data Processing
%J Computer
%I IEEE
%D November 1980
%V 13
%N 11
%P 57-69
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%T An Analysis of a Tandem Queueing System for Flow Control in Computer
Networks
%A Wesley W. Chu
%A Guy Fayolle
%A David G. Hibbits
%J IEEE Transactions on Computers
%V C-30
%N 5
%D May 1981
%P 318-324
%K Computer networks, conjunction control, flow control, gateway design,
internetworking, queueing system with input rejection, tandem queueing
systems, threshold control queueing system

%A Wesley W. Chu
%A Joseph Hellerstein
%A Min-Tsung Lan
%T The Exclusive-Writer Protocol: A Low Cost Approach for Updating Replicated
Files in Distributed Real Time Systems
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 269-278
%K
%O Replicated Databases
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%T Optimal Query Processing for Distributed Database Systems
%A Wesley W. Chu
%A Paul Hurley
%J IEEE Transactions on Computers
%V C-31
%N 9
%D September 1982
%P 835-850
%K Distributed database, local operation group, optimal query processing,
query operating cost, query processing graph, query tree, relational
algebra, relational database
Database systems

%A Wesley W. Chu
%A Min-Tsung Lan
%A Joseph Hellerstein
%T Estimation of Intermodule Communication (IMC) and Its Application in
Distributed Processing Systems
%J IEEE Transactions on Computers
%V C-33
%N 8
%D August 1984
%P 691-699
%K Control and data flow graph, distributed processing,
intermodule communication (IPC), interprocessor communication (IPC),
module assignment, performance measurement, real-time systems, task assignment,
distributed processing systems

%T The Exclusive-Writer Approach to Updating Replicated Files in
Distributed Processing Systems
%A Wesley W. Chu
%A Joseph Hellerstein
%I IEEE Computer Society
%R ISSN 0018-9340
%D April 1985
%K Concurrency control, distributed database, distributed processing,
exclusive-writer, locking, multiple copy update, real time, response
time models, timestamps.

%A Yaohan Chu
%A Kozo Itano
%T Organization of a Parallel Prolog Machine
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 4.18-4.30
%O PROLOG machines

%A Henry Y. H. Chuang
%A Guo He
%T A Versatile Systolic Array for Matrix Computations
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K systolic arrays,
%C Boston, MA
%P 315-322

%T Complete Binary Spanning Trees of the Eight Nearest Neighbor Array
%A M. Ashraf Chughtai
%I IEEE Computer Society
%R ISSN 0018-9340
%D June 1985
%K Array Processor, complete binary tree, eight nearest neighbor array,
spanning tree.

%A Z. Chunag-qi
%A S. Ren-Ben
%T Alignment Networks Used for Connecting a Prime Number of Memory
Blocks with a Power of 2 Processing Elements
%J Proceedings of 8th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 9
%N 3
%D May 1981
%P 495-500
%O interconnection

%A Chin-Wan Chung
%A Keki B. Irani
%T A Semi-join Strategy for Distributed Query Optimization
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 368-377
%O Distributed query processing

%A K.-M. Chung
%A C. K. Wong
%T Asymptotically Optimal Interconnection Networks from Two-State Cells
%J IEEE Transactions on Computers
%V C-28
%N 7
%D July 1979
%P 500-505

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T Macrocellular Pipelined Multiplying Arrays
%A L. Ciminiera
%A A. Serra
%P 321
%O Pipelining
%X Summary only.

%A L. Ciminiera
%A A. Serra
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T LSI Implementation of Modular Interconnection Networks for MIMD
Machines
%P 162-163
%O

%A L. Ciminiera
%A A. Serra
%T A fault-tolerant connecting network for multiprocessing systems
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 113-122
%K F networks
CENs Italy
%O Network diagnosis and fault tolerance

%A M. Dal Cin
%T Performance evaluation of self-diagnosing multiprocessing systems
%J 8th Ann. Int. Conf. on Fault-Tolerant Computing
%C Toulouse, France
%D June 1978
%P 59-64
%K performance
%X Uses a graph theoretic model and queueing analysis to investigate the
performance of self diagnosing multiprocessor systems.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A F. De Cindio
%A G. de Michelis
%A L. Pomello
%A C. Simone
%T Exhibited-Behaviour Equivalence and Organizational Abstraction in
Concurrent Systems Design
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Models of distributed Processes, Petri nets,
%P 486-495

%A Willy Claes
%T A New Concept of an Advanced Hybrid System
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 161-163
%K advanced hybrid systems

%A D. Clark
%T Scheduling Independent Tasks on Non-Identical Parallel Machines to
Minimize Mean Flow Time
%I Dept. of Computer Science, Carnegie Mellon University
%C Pittsburgh, PA
%D June 1974

%A D. D. Clark
%A K. T. Pogran
%A D. P. Reed
%T An introduction to local area networks
%Z Lab. for Computer Sci., MIT, Cambridge, MA, USA
%J Proc. IEEE (USA)
%V 66
%N 11
%P 1497-1517
%D Nov. 1978
%O 34 Refs.
treatment: general,review
%K computer networks data communication systems computer interfaces
local area networks reliable high speed communication protocols host computer
interface hardware interconnection topologies control structures reliability
data flow
%X Discusses the two basic issues in local area network design. First, how
should the hardware realizing the network be organized to provide reliable
high speed communication at minimum cost? second, what protocols should be
used for the operation of the network? also considers the interconnection
of local area networks and long-haul networks and presents a case study
which describes in detail the host computer interface hardware required for
a typical local area network.

%l journal-article
%T Comments on 'The Case for the Reduced Instruction Set Computer'
%A D. W. Clark
%A W. D. Strecker
%J Computer Architecture News
%V 8
%N 6
%D October 1980
%P 34-38
%K risc reduced instruction set computer restricted architecture

%A K. L. Clark
%A S. Gregory
%T A Relational Language for Parallel Programming
%J Proceedings of the 1981 Conference on Functional Programming
Languages and Computer Architecture
%D October 1981
%P 171-178

%T Distributed Reconfiguration Strategies for Fault-Tolerant
Multiprocessor Systems
%A Edmund M. Clarke
%A Christos N. Nikolaou
%J IEEE Transactions on Computers
%V C-31
%N 8
%D August 1982
%P 771-784
%K Communication page, fault-tolerance, multiprocessor systems,
reconfiguration strategies
Fault tolerant computing

%T Synthesis of Resource Invariants for Concurrent Programs
%A Edmund Melson Clarke, Jr.
%J ACM Transactions on Programming Languages and Systems
%V 2
%N 3
%D July 1980
%P 338-358
%K Concurrent program, conditional critical region, correctness proof,
resources invariant
CR Categories: 4.32, 5.24

%A T. J. W. Clarke
%A P. J. S. Gladstone
%A C. D. Maclean
%A A. C. Norman
%T SKIM \(em The S, K, I Reduction Machine
%J Proceedings of the LISP-80 Conference
%C Stanford, CA
%D August 1980
%P 128-135

%A R. Clayton
%A B. Hager
%A G. Fox
%A A. Kuppermann
%A H. Keller
%A P. Saffmann
%A L. Johnsson
%A A. Martin
%A C. Seitz
%T Caltech Scientific Computing Group
%R Hm23
%D January 1983
%I California Institute of Technology
%C Pasadena, CA
%K Caltech Cosmic Cube, hypercube, C^3P

%A Robert W. Clayton
%T Finite Difference Solutions of the Acoustic Wave Equation on a Concurrent
Processor
%R Hm89
%I Seismological Lab, California Institute of Technology
%C Pasadena, CA
%D 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%A Enrico Clementi
%T A Parallel Supercomputer for Computational Chemistry
%J Digest of Papers, Compcon85 Thirtieth IEEE Computer society
International Conference
%I IEEE Computer Society
%D February 25-28, 1985
%P 25-28

%l journal-article
%A B. Clifford
%T Fewer Instructions Speed Up VLSI
%J Electronics
%V 55
%N 23
%P 101-102
%M November
%K RISC
%D 1982

%A William Douglas Clinger
%T Foundations of Actor Semantics
%I Artificial Intelligence Laboratory, Massachusetts Institute of Technology
%R AI-TR-633
%D May 1981
%X Also his Ph.D. thesis

%A M. Clint
%A C. Holt
%A R. H. Perrott
%A A. Stewart
%T Algorithms for the Parallel Computation of Eigensystems
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 123-130
%D 1984
%K PST - parallel similarity transform, 
%X Algorithm comparison between Cray and DAP.

%A M. Clint
%A K. T. Narayana
%T Programming Structures for Synchronous Parallelism
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 405-412
%D 1984
%K VAL,
%X Oh no! Another VAL language, this case, based on the ACTUS language
by Perrott.

%A W. F. Clocksin
%T Logic Programming and Prolog
%B Distributed Computing - Part II Declarative Systems
%E Fred B. Chambers
%E David A. Duce
%E Gillian P. Jones
%I Academic Press
%S APIC Studies in Data Processing
%V 20
%D 1984
%P 79-109

%A Charles Clos
%T A study of non-blocking switching networks
%J Bell System Technical Journal
%V 32
%D March 1953
%P 406-424
%X
Reproduced in the 1984 tutorial: \fIInterconnection Networks for parallel
and distributed processing\fP by Wu and Feng.

%A F. Closs
%A R. P. Lee
%T A multi-star broadcast network for local-area communication
%Z IBM Res. Lab., San Jose,CA, USA
%E A. West
%E P. Janson
%B Local networks for computer communications. Proceedings of the IFIP
working group 6.4 international workshop on local networks
%P 61-80
%D 27-29 Aug. 1980
%C Zurich, Switzerland
%I North-Holland, Amsterdam, Netherlands
xiii+470 pp. isbn 0 444 86287 0
%O 8 Refs.
treatment: general,review
%K computer networks packet switching protocols
computer communications local area networks packet broadcasting protocol
star networks node full duplex links rooted tree topology
%X Topologies for local area networks are reviewed. An approach to local
area networking is presented which combines advantages of packet
broadcasting, protocol and star networks. In its simplest form, the network
consists of a star node to which stations are connected with full duplex
links. Larger networks can be built by interconnecting identical star nodes
to form a rooted tree topology.

%A J. Cocke
%A D. Slotnick
%T The Use of Parallelism in Numerical Calculations
%I IBM
%R Research Memorandum RC-55
%D 1958

%A E. G. Coffman, Jr.
%A M. J. Elphick
%A A. Shoshani
%T System Deadlocks
%J Computing Surveys
%V 3
%N 1
%D Mar. 1971
%P 67-78
%K deadlocks, deadly embraces, system deadlocks, multiprogramming,
interlock problems
CR categories: 4.10, 4.32
%X Uses the classical traffic intersection example.  Survey characterizes
deadlocks, discusses detection, avoidance, and recovery
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A E. G. Coffman, Jr.
%A R. L. Coffman
%T Optimal Scheduling for Two Processor Systems
%J Acta Informatica
%V 1
%D 1972
%P 200-213

%A E. G. Coffman, Jr.
%A R. Sethi
%T Algorithms Minimizing Mean Flow Time: Schedule-Length Properties
%J Acta Informatica
%V 6
%N 1
%D 1976
%K scheduling
%P 1-14

%A E. G. Coffman, Jr.
%A J. Leung
%A D. Slutz
%T On the optimality of first-fit and level algorithms for parallel
machine assignment and sequencing
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 95-99
%K
%O Scheduling

%A E. G. Coffman, Jr.
%A Kimming So
%T On the Comparison Between Single and Multiple Processor Systems
%J Proceedings of 7th Annual Symposium on Computer Architecture
%D 1980
%P 72-79

%A D. Cohen
%T A Methodology for Programming A Pipeline Array Processor
%J Proceedings 11th Annual Microprogramming Workshop
%D 1978
%P 82-89

%A J. Cohen
%A T. Hickey
%A J. Katcoff
%T Upper Bounds for Speedup in Parallel Parsing
%J Journal of the ACM
%V 29
%D 1982
%P 408-428

%A Philip R. Cohen
%T On Knowing What to Say: Planning Speech Acts
%R PhD thesis, Technical Report 118
%I Department of Computer Science, University of Toronto
%C Toronto, Canada
%D January 1978
%X Remove?

%T Elements of a Plan-Based Theory of Speech Acts
%A Philip R. Cohen
%A C. Raymond Perrault
%J Cognitive Science
%V 3
%D 1979
%P 177-212
%X Seminal paper for AAAI-82 paper.

%A S. Cohen
%A D. Lehmann
%T Dynamic Systems and their Distributed File System
%T Language Constructs and Support Systems for Distributed Computing
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 29-33

%A T. Cohen
%T Structure Flowcharts for Multiprocessing
%J Computer Languages
%V 3
%N 4
%D 1978
%P 209-233
%K theoretical results
%X Describes flow chart constructs for parallel processing primitive and
discusses the transformation of programs using these primitives into
equivalent structured programs.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Edmund U. Cohler
%A James E. Storer
%T Functionally Parallel Architectures for Array Processors
%J Computer
%V 14
%N 9
%D September 1981
%P 28-36

%A C. H. Coker
%T An Experimental Interconnection of Computers Through a Loop Transmission
System
%J Bell System Technical Journal
%D July/August 1972

%A Clement T. Cole
%T Attaching an Array Processor in the UNIX Environment
%R Memorandum No. UCB/ERL M83/23
%C EE/CS Dept., University of California, Berkeley
%D April 12, 1983

%A G. D. Cole
%A L. Kleinrock
%T An analysis of the separation between packets in a store-and-forward network
%B 22nd international symposium on computer-communications networks
and teletraffic
%C New York, USA
%D 4-6 Apr 1972
%P 3
%I Polytechnic Inst. Brooklyn. New York, USA, x+54
%O Treatment Theoretical
%K data communication systems queueing theory
message switching store and forward network ARPA
computer network communications transmission
Interface Message Processors message delay buffer utilization
packet separation Poisson arrivals interfering traffic
priority queue disciplines modelling

%A R. Cole
%A P. Lloyd
%E R. E. A. Mason
%T A flexible architecture for protocol studies in a multi-network
environment.
%J Information Processing 83. Proceedings of the IFIP 9th World Computer
Congress
%C Paris, France
%I North-Holland, Amsterdam, Netherlands, xvi+976, ISBN: 0-444-86729-5
%P 401-406
%O 17 Refs
Treatment PRACTICAL.
%D 19-23 Sept. 1983
%K computer networks protocols.
multinetwork environment flexible architecture protocol
internetworking environment
UCL monitoring control facilities.
%X The paper first outlines the internetworking environment at UCL and
the way in which the interconnection architecture allows a single set
of protocols to be operated over a varied multi-network
configuration. The concepts of the architecture are discussed with
details of the main components used in the implementation. The
applications, both research and service, are described with the
requirements and constraints they impose on the architecture. It is
shown how the architecture meets the requirements of the applications
in a flexible way. Finally, some of the monitoring and control
facilities are outlined.

%A R. Cole
%T Network inter-connection techniques
%J IEE Colloquium on Local Area Networks -How Computers Talk to Each
Other [digest no. 50]
%C London, England
%D 10 May 1984
%P 42
%V 6
%N 1-4
%O 5 Refs
%I IEE. London, England
IEE Treatment PRACTICAL
%K computer networks
network interconnection techniques local area networks CPU memory
software routing addressing network management
host

%A T. W. Cole
%T Electrooptical Array Processor for Complex Signals
%J Applied Optics
%V 17
%N 18
%D September, 15 1978
%P 2952-2955

%A N. B. Coletti
%T Image Processing on MPP-like Arrays
%I Dept. of Computer Science, Univ. of Ill., Urbana-Champaign
%R UIUCDCS-R-83-1132
%D May 1983
%K Massively Parallel Processor

%A Neil Boyd Coletti
%T Image Processing on MPP-like Arrays
%R UIUCDCS-R-83-1132
%I U. Ill
%D May 1983
%K PhD thesis

%A S. Colley
%A G. Cox
%A others
%T The object-base architecture of the Intel 432
%J Proceedings of Spring 1981 Compcon
%I IEEE
%D February 1981

%A W. Collier
%A C. McCallien
%A J. Enderby
%T Tough Problems in Reactor Design
%E D. Paddon
%B Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford
%D 1984
%P 91-106

%A W. D. Collier
%A C. W. J. McCallien
%A J. A. Enderby
%T Tough Problems in Reactor Design
%E D. J. Paddon
%B Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford, England
%D 1984
%P 91-106
%K Finite difference algorithms, Cray-1, finite element, Monte Carlo,

%T Architectures for Systems of Parallel Processes
%A William W. Collier
%I IBM
%R TR 00.3253
%D January 27, 1984

%T Write Atomicity in Distributed Systems
%A William W. Collier
%I IBM
%R TR 00.3304
%D October 19, 1984
%K Processor architectures, multiple data stream architectures,
multiple-instruction-stream, multiple-data-stream, distributed systems,
network operating systems, design, human factors, theory

%l journal-article
%A R. P. Colwell
%A C. Y. Hitchcock III
%A E. D. Jensen
%T Peering through the RISC/CISC Fog: An Outline of Research
%J Computer Architecture News
%I ACM
%V 11
%N 1
%D 1983
%M March
%P 44-50
%K archons 432 object-oriented overlapped multiple register sets
%X attempt to determine if RISCs faster than CISCs, and why

%A Robert P. Colwell
%A Charles Y. Hitchcock, III
%A E. Douglas Jensen
%T Peering Through the RISC/CISC Fog: An Outline of Research
%J Computer Architecture News
%V 11
%N 1
%D March 1983
%P 44-50
%K CMU, iAPX-432, Archons

%T The TILDE Project
%A Douglas Comer
%A John T. Korb
%A Thomas Murtagh
%A Walter Tichy
%I Purdue University
%R CSD-TR-500
%D November 23, 1984

%T Tilde Trees in the UNIX Environment
%A Douglas Comer
%A Ralph E. Droms
%I Tilde Project, Purdue University
%D January 28, 1985

%Q Computer Sciences Corporation
%T MPP Primitives to Support the Parallel Pascal Compiler
%D September 1983
%K Massively Parallel Processor

%A D. Comte
%A A. Durrieu
%A O. Gelly
%A A. Plas
%A J. C. Syre
%T TEAU 9/7: System LAU \(em Summary in English
%R CERT Tech. Rep. #1/3059
%I Centre d'Etudes et de Recherches de Toulouse
%D October 1976

%A D. Comte
%A G. Durrieu
%A O. Gelly
%A A. Plas
%A J. C. Syre
%T Parallelism, Control and Synchronization Expressions in a Single
Assignment Language
%J SIGPLAN Notices
%I ACM
%V 13
%N 1
%D January 1978
%P 25-33

%A D. Comte
%A N. Hifdi
%T LAU Multiprocessor: Microfunction description and technological choices
%J Proceedings 1st European Conf. Parallel and Distributed Processing
%C Toulouse, France
%D February 1979
%P 8-15

%A D. Comte
%A N. Hifdi
%A J. C. Syre
%T The Data Driven LAU Multiprocessor System: Results and Perspectives
%J Information Processing 80: Proceedings of the IFIP Congress 80
%D October 1980
%P 175-180

%A P. Concus
%A G. Golub
%A D. O'Leary
%T A Generalized Conjugate Gradient Method for the Numerical Solution of
Elliptic Partial Differential Equations
%B Sparse Matrix Computations
%E J. Bunch
%E D. Rose
%I Academic Press
%C New York, NY
%D 1976
%P 309-332
%X Remove?

%A P. Concus
%A G. Golub
%A G. Meurant
%T Block Preconditioning for the Conjugate Gradient Method
%I Stanford University Computer Science Dept.
%D 1982
%X Remove?

%A Victor Conrad
%A Yehuda Wallach
%T Iterative Solution of Linear equations on a Parallel Processor System
%J IEEE Transactions on Computers
%V C-26
%N 9
%D September 1977
%P 838-847
%K Iterative methods, linear algebra, parallel processing,
Applications

%A Christoph von Conta
%T Torus and other networks as communication networks with up to some one
hundred points
%J IEEE Transactions on Computers
%V C-32
%N 7
%D July 1983
%P 657-666
%K
dense (d,k) graphs, distributed processing, message passing networks,
network architectures, regular networks, Torus networks

%Q Control Data Corporation
%T Final Report: Feasibility Study for NASF
%R NASA Contractor Report No. NAS2-9896
%D 1979

%Q Control Data Corporation
%T Proceedings Symposium CYBER 205 Applications
%C Ft. Collins, CO
%D 1982

%A M. E. Conway
%T A Multiprocessor System Design
%J Proceedings AFIPS Fall Joint Computer Conference
%I AFIPS Press
%D 1963
%P 139-146

%A R. W. Conway
%A W. L. Maxwell
%A L. W. Miller
%T Theory of Scheduling
%I Addison-Wesley Publishing Co.
%C Reading, MA
%D 1967

%A Robert Cook
%A Raphael Finkel
%A David DeWitt
%A Lawrence Landweber
%A Thomas Virgilio
%T The Crystal Nugget, Part I of the First Report on The Crystal Project
%C Madison, WA
%R Univ. of Wis. CS TR 499
%D April 1983

%A Robert Cook
%A Raphael Finkel
%A Bob Gerber
%A David DeWitt
%A Lawrence Landweber
%T The Crystal Nuggetmaster, Part II of the First Report on The Crystal Project
%C Madison, WA
%R Univ. of Wis. CS TR 500
%D April 1983

%A Robert Cook
%A Raphael Finkel
%A David DeWitt
%A Nancy Hall
%A Lawrence Landweber
%T Wisconsin Modula, Part III of the First Report on The Crystal Project
%C Madison, WA
%R Univ. of Wis. CS TR 501
%D April 1983

%A Robert P. Cook
%T *MOD-A Language for Distributed Processing
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 233-241
%O Programming Languages for Distributed Systems

%A Robert P. Cook
%T *MOD \(em A language for distributed programming
%J IEEE Trans. on Software Engineering
%V SE-6
%N 6
%D November 1980
%P 563-571
%K computer networks, distributed programming, Modula, processor module,
programming languages
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A A. E. Cooper
%A W. T. Chow
%T Development of On-Board Space Computer Systems
%J IBM Journal of Research and Development
%V 20
%N 1
%D January 1976
%P 5-19

%A E. C. Cooper
%T Replicated Procedure Call
%J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing
%I ACM
%D August 1984

%A Jack Cooper
%A Selim G. Akl
%T Efficient Selection on A Binary Tree
%I Dept. of Computing and Information Science, Queen's University
%C Kingston, Canada - Ontario
%R TR-85-167
%D April 1985

%T The Distributed Pipeline
%A Richard G. Cooper
%J IEEE Transactions on Computers
%V C-26
%N 11
%D November 1977
%P 1123-1132
%K Array of computers, computer architecture, computer network,
distributed computer, distributed pipeline (DP), microcomputer, microprocessor,
multiple-instruction multiple-data-stream (MIMD) computer,
multiprocessor, pipeline,
Very large multiprocessors

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T A Modular Multi-Microprocessor Oriented for Real-Time Controls
%A M. Coppo
%A A. Giordana
%P 307
%O Special Purpose Architectures
%X Summary only

%T A Reconfigurable Multiprocessor
%A L. D. Coraor
%A P. T. Hulina
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 649-651
%K Multiprocessor Systems

%A Ricardo Cordon
%A Hector Garcia-Molina
%T The Performance of a Concurrency Control Mechanism That Exploits
Semantic Knowledge
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Performance Studies
%P 350-358

%A V. Cordonnier
%A L. Moussu
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T The M.A.P. Project \(em An Associative Processor for Speech Processing
%P 120-128
%O Associative Processors and Processing

%A V. M. Cordonnier
%T A Two Dimensional Pipe-Lined Processors for Communication in a Parallel
System
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 115-121
%K
%O processor memory interconnections

%A Micharel J. Corinthios
%A Kenneth C. Smith
%T A Parallel Radix-4 Fast Fourier Transform Computer
%J IEEE Transactions on Computers
%V C-24
%N 1
%D January 1975
%P 80-92
%K Computer architecture, convolution, correlation, digital filtering,
digital processing of signals, fast Fourier transform (FFT),
special-purpose computer, spectral analysis, time-series analysis,
Signal processing

%A Daniel D. Corkill
%T Distributed planning in a hierarchical environment
%J Proceedings of the Sixth International Joint Conference on Artificial
Intelligence
%P 168-175
%D August 1979

%A Daniel D. Corkill
%A Victor R. Lesser
%T The use of meta-level control for coordination in a distributed problem
solving network
%J To appear in Proceedings of the Eighth International
Joint Conference on Artificial Intelligence
%D August 198.

%A Daniel D. Corkill
%A Victor R. Lesser
%T A goal-directed Hearsay-II architecture: Unifying data and goal
directed control
%R Technical Report 81-15
%I Department of Computer and Information Science, University of Massachusetts
%C Amherst, Massachusetts
%D June 1981

%A Daniel D. Corkill
%A Victor R. Lesser
%A Eva Hudlicka
%T Unifying data-directed and goal-directed control: An example and experiments
%J Proceedings of the Second National Conference on Artificial Intelligence
%P 143-147
%D August 1982

%A Daniel D. Corkill
%A Ed Pattison
%T Specifying organizational relationships
%R Technical report
%I Department of Computer and Information Science, University of Massachusetts
%C Amherst, Massachusetts
%D in preparation

%A Daniel David Corkill
%T A Framework for Organizational Self-Design in Distributed Problem Solving
Networks
%R PhD Thesis, Technical Report 82-33
%I Department of Computer and Information Science, University of Massachusetts
%C Amherst, Massachusetts
%D February 1983

%A J. A. Cornell
%T Parallel Processing of Ballistic Missile Defense Radar Data With PEPE
%J IEEE Computer Society International Conference
%D September 1972
%P 69-72

%A R. G. Cornell
%A H. C. Torng
%T A Cellular General Purpose Computer
%J Proceedings of 2nd annual Symposium on Computer Architecture
%D 1975
%K Bell Laboratories and Cornell University
%P 207-213

%T Array Processor's User's Guide
%Q Cornell Computer Services
%I Cornell University
%C Ithaca, NY 14850

%A M. Cornish
%T The TI data flow architecture: the power of concurrency for avionics
%J Proceedings 3rd Conf. Digital Avionics Systems
%C Fort Worth, TX
%I IEEE
%D 1979
%P 19-25

%A M. Cornish
%T Dataflow controlled mesh machines
%R
%I Texas Instruments
%C Austin, Texas
%D 1981

%A Neil B. Corrigan
%A Denbigh Starkey
%T A Concurrent General Purpose Operator Interface
%I IEEE Transactions on Software Engineering
%V SE-10
%N 6
%D November 1984
%K Computer graphics, Concurrent Pascal, concurrent programming,
interactive system, man-machine interface, operatory interface, process control,
Practice

%A P. Corsini
%A G. Frosini
%A F. Grandoni
%A G. Galati
%A M. La Manna
%T The Serial Microprocessor Array (SMA):  Microprogramming and
Application Examples
%J Proceedings of 5th Annual Symposium on Computer Architecture
%D 1978
%K Selenia, Sp.A., Rome Italy
%P 230-235

%A W. Corwin
%T The Scheduling of Primary Memory in a Multiprocessor
%R
%I Carnegie-Mellon University
%D 1979

%A William F. Cote
%A Richard F. Riccelli
%T The Design of a Data Driven Processing Element
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 173-180
%O Data Flow

%A G. R. Couranz
%A A. M. Gerhardt
%A C. Young
%T Programmable radar signal processing using the RAP
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 37-52
%K
%O Associative processors

%A J. E. Courtney
%A H. M. Halpern
%T Parallel Processing for Phased-Array Radars
%E L. C. Hobbs
%E D. J. Theis
%E Joel Trimble
%E Harold Titus
%E Ivar Highberg
%B Parallel Processor Systems, Technologies and Applications
%I Spartan Books
%C New York, New York
%D 1970
%P 87-106
%K Applications

%A M. Courvoisier
%T A varied strategy programmable arbiter
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 322-325
%K
%O Distributed processing

%A Abrahm A. Covo
%T Analysis of Multiprocessor Control Organizations with Partial Program
Memory Replication
%J IEEE Transactions on Computers
%V C-23
%N 2
%D February 1974
%P 113-120
%K Common program memory pool, dynamic programming, multiprocessing,
partial program replication, real-time control systems, speed-size
characteristic, speed/size ratio
Computer systems, performance
%X Replicating copies of a program run by different processors in a
multiprocessing situation helps reduce memory interference and queueing
delays at eh expense of increased memory requirements. This paper describes
a dynamic programming solution to finding an optimal degree of replication.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%T A Distributed File-Server for a Personal Computer Network
%A D. D. Cowan
%A F. D. Boswell
%I Computer Systems Group, University of Waterloo
%C Waterloo, Ontario, Canada
%R Research Report CS-84-54
%D December 1984

%A George W. Cox
%A William M. Corwin
%A Konrad K. Lai
%A Fred J. Pollack
%T A Unified Model and Implementation for Interprocess Communication
%J Proceedings of the 8th Symposium on Operating Systems Principles,
Operating Systems Review
%V 15
%N 5
%D December 1981
%P 125-126
%O iMAX-432 operating system

%T Ocean Modelling On the CYBER 205 at GFDL
%A Michael D. Cox
%J CYBER 200 Applications Seminar
%R NASA Conference Publication 2295
%D October 1983
%E J. Patrick Gary, Compiler
%I NASA Goddard Space Flight Center
%C Greenbelt, Maryland
%P 21-32

%A G. L. Craig
%A J. R. Goodman
%A R. H. Katz
%A A. R. Pleszkun
%A J. Sayah
%A J. E. Smith
%T PIPE: A High Performance VLSI Processors Implementation
%R CS TR #513
%I Computer Sciences Dept., Univ. Wisc.
%C Madison, WI
%D October 1983

%A S. Cramer
%A J. Goodman
%T Modeling Material Failure With A Vectorized Routine
%J CYBER 200 Applications Seminar
%R NASA Conference Publication 2295
%D October 1983
%E J. Patrick Gary, Compiler
%I NASA Goddard Space Flight Center
%C Greenbelt, Maryland
%P 259-271

%T A Comparative Study of Unification Algorithms for Or-Parallel Execution
of Logic Languages
%A Jim Crammond
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 131-138
%K Logic Programming

%A B. A Crane
%A et al
%T PEPE Computer Architecture
%J Compcon 72
%P 57-60
%I IEEE
%D 1972

%A B. A. Crane
%A J. A. Githens
%T Bulk Processing in Distributed Logic Memory
%J IEEE Transactions on Electronic Computers
%D April 1965
%P 186-196

%A Hewitt D. Crane
%T Beyond the seventh synapse: The neural marketplace of the mind
%R Research memorandum
%I SRI International
%C Menlo Park, California
%D December 1978

%A Hewitt D. Crane
%T The New Social Marketplace: Notes on effecting social change in
America's third century
%I Ablex Publishing
%D 1980

%T Cray-1 Computer System Reference Manual
%Q Cray Research, Inc.
%D 1976

%Q Cray Research, Inc.
%T Science, Engineering and the CRAY-1
%J Proceedings of a Cray Research Inc. Symposium
%D 1982

%Q Cray Research, Inc.
%T CRAY-2 Computer System Functional Description
%R HR-2000
%D 1985

%Q Cray Research, Inc.
%T CRAY-2 Computer System, CRAY-2 Operating System Primer
%R SR-2010
%D 1985

%Q Cray Research, Inc.
%T CRAY-2 Computer System, CRAY-2 Operating System
%R SR-2014
%D 1985

%A A. Crick
%T Scheduling and controlling I/O operations
%J Data Processing
%V 16
%N 3
%D May-June 1974
%P 170-171
%K multiprocessor architectures and operating systems
%X A multiprocessor real-time operating system for the Univac 1110 permits
every I/O device to communicate with every processor in the system.
Interrupt latency, reliability, error recoverability, and other related
aspects of this system are discussed.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Flaviu Cristian
%A Houtan Aghili
%A Ray Strong
%A Danny Dolev
%T Atomic Broadcast: From Simple Message Diffusion to Byzantine Agreement
%I IBM Research Laboratory
%C San Jose, CA
%R RJ 4540 (48668)
%D December 10, 1984
%K Atomic Broadcast, Byzantine Agreement, Computer Network, Distributed
System, Fault Classification, Fault-Tolerance, Real-Time System,
Reliability, Replicated Data

%A A. J. Critchlow
%T Generalized multiprocessing and multiprogramming systems
%J AFIPS Proc. of the FJCC
%V 24
%D 1963
%P 107-126

%A S. D. Crocker
%A J. F. Heafner
%A R. M. Metcalfe
%A J. B. Postel
%T Function-oriented protocols for the ARPA computer network
%B AFIPS Conference Proceedings, the 1972 Spring Joint
Computer Conference
%V 40
%C Atlantic City, N.J., USA
%D 16-18 May 1972
%P 271-279
%O 13 REFS. Treatment Practical
%I AFIPS. Montvale, N.J., USA.,1972 , viii+1217
%K digital communication systems data handling
ARPA computer network function oriented protocols
%X Reproduced in Advances in Computer Commun., Chu,W.W.,(Ed.)
(1974), 350-358; in Computer Commun., Green,P.E., and Lucky
R.W., (Eds.), (1975), 318-326.

%A Daniel H. Croft
%T Resource Management in a Decentralized System
%J Proceedings of the 9th Symposium on Operating Systems Principles,
Operating Systems Review
%V 17
%N 5
%D October 1983
%P 11-19
%K Processor Bank, 29 processors (LSI4 and 68000)
%O resource management

%A C. W. Crouch
%T AOS-A Tool For Designing Distributed Real-Time Operating Systems
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 422-428
%K
%O Distributed Testbeds for Real Time Systems

%T Performance Measurements on a 128-Node Butterfly Parallel Processor
%A W. Crowther
%A J. Goodhue
%A E. Starr
%A R. Thomas
%A W. Miliken
%A T. Blackadar
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 531-540
%K Performance Measurement

%A Cryer
%A others
%T Solution of Linear Complementarity problems on an array processor
%I Wisconsin Madison

%A C. W. Cryer
%T Solution of Linear Complementarity Problems Using the DAP
%I Univ. of Wisconsin

%A L. Csanky
%T On the Parallel Complexity of Some Computational Problems
%R PhD. Dissertation
%I Computer Science Dept., UC Berkeley
%C Berkeley, CA
%D 1974

%A L. Csanky
%T Fast Parallel Matrix Inversion Algorithms
%J SIAM J. Comput.
%V 5
%P 618-623
%D 1976

%A K. Culik, II
%A J. Pachl
%T Folding and Unrolling Systolic Arrays
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 254-261

%T Towards a Theory of Control-Flow and Data-Flow Algorithms
%A K. Culik
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 341-348
%K Data Flow

%T Translation of Systolic Algorithms Between Systems of Different
Topology
%A K. Culik, II
%A S. Yu
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 756-763
%K Systolic Systems

%A M. Cullen
%T Current Progress and Prospects in Numerical Techniques for Weather
Prediction Models
%J Computational Physics
%V 50
%P 1-37
%D 1983
%X Remove?

%A M. P. Cullinan
%A M. J. D. Powell
%T Data smoothing by divided difference
%I Cambridge University
%J DAMTP

%A N. Cullmann
%T Load-Sensitive Software Distribution in Satellite Graphic Systems
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 72-78
%O Network Design for Distributed Systems

%A P. R. F. Cunha
%A T. S. E. Maibaum
%T A Synchronization Calculus for Message Oriented Programming
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 433-445
%K
%O Languages Constructs & Semantics of Parallel Programming

%A J. E. Cuny
%A L. Snyder
%T Conversion from Data-flow to Synchronous Execution in Loop Programs
%I CS Dept., Purdue Univ.
%C West Layfayette, IN
%D 1982?

%A Janice E. Cuny
%A Lawrence Snyder
%T Testing coordination for "homogeneous" parallel algorithms
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 265-267
%K
Purdue
%O Array processors

%A Janice E. Cuny
%A Lawrence Snyder
%T Testing the Coordination Predicate
%J IEEE Transactions on Computers
%V C-33
%N 3
%D March 1984
%P 201-208
%K Coordination, data-driven execution, oblivious machines,
parallel machines, parallel program transformation, synchronization,
Coordination testing,
%X Oriented to tightly coupled (pipelines and systolic arrays)
processors.

%A R. Curtis
%A L. Wittie
%T BUGNET: A Debugging system for parallel programming environments
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 394-400?
%K
%O Distributed Software Tools and Methods

%A R. Curtis
%A L. Wittie
%T Global naming in distributed systems
%J IEEE Software (USA)
%V 1
%N 3
%P 76-80
%O 8 REFS
Treatment PRACTICAL
%D 1984
%K distributed processing operating systems program debugging
distributed systems BugNet debugging system distributed applications software
Unix based global naming system accessing networks tasks modules
data files Modula 2 programs distributed operating systems
%X A description is given of BugNet, a debugging system for distributed
applications software. This Unix-based global naming system provides
concise notation for accessing networks, tasks, modules, data, and
files. Although developed for Modula-2 programs and written in that
language, BugNet techniques apply to other languages. In particular,
its uniform naming mechanism can be used for many languages under
many distributed operating systems

%A Ronald Curtis
%A Larry D. Wittie
%T Naming in Distributed Language Systems
%R TR #83/056
%I Computer Science Dept., SUNY
%C Stony Brook, Long Island, NY 11794
%D September 1983

%A Ronald Curtis
%A Larry D. Wittie
%T Tools for Debugging Distributed Real-Time Systems
%R TR #83/055
%I Computer Science Dept., SUNY
%C Stony Brook, Long Island, NY 11794
%D September 1983

%A Ronald Curtis
%A Larry Wittie
%T Naming in Distributed Language Systems
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE Comput. Soc. Press,
Silver Spring, MD, USA, p: ix+580
ISBN: 0-8186-0534-0
%D May 1984
%P 298-302
%O 8 REFS
Treatment PRACTICAL
%K distributed processing operating systems program debugging
distributed language systems naming mechanism
UNIX file specification mechanism networks
tasks procedures debugging tool distributed programs
Distributed naming and debugging
%X A naming mechanism for accessing entities in a distributed system has
been developed. Based on the UNIX file specification mechanism, it
provides a unified notation for accessing networks, tasks,
procedures, and data in a distributed system. Originally developed
for a debugging tool for distributed programs, the notation can be
utilized on the operating system or language level. It provides
simple names for items that appear at important locations in other
networks, tasks, or procedures

%A M. Cutler
%T Virtual Instruction sets in an MIMD Microcomputer network
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 54
%K
%O Distributed function architectures

%A R. J. Cypser
%T Communications Architecture for Distributed Systems
%I Addison-Wesley
%C Reading, Massachusetts
%D 1978

%A W. Cyre
%A C. Davis
%A A. Frank
%A L. Jedynak
%A M. Redmond
%A V. Rideout
%T WISPAC: A Parallel Array Computer for Large Scale System Simulation
%I NASA Ames Research Center
%R SP-347
%P 1351-1376
%D 1975

%A W. R. Cyre
%A G. J. Lipovski
%T On Generating Multipliers for a Cellular Fast Fourier Transform
Processor
%J IEEE Transactions on Computers
%N 1
%P 83-87
%D January 1972
%K Cellular processor, Cooley-Tukey algorithm, fast Fourier transform,
fast Fourier transform hardware, parallel processing, special-purpose
processor,
Short notes

%T Useful Parallelism in a Multiprocessing Environment
%A Ron Cytron
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 450-457
%K Parallel Programming

%A Ron Cytron
%A Harlan Husmann
%T High-speed I/O in a Multiprocessor Environment
%R RC 11069 (#49706)
%D March 1985
%I IBM T. J. Watson Research Center
%C Yorktown Heights, NY
%K MIMD, omega net, RP3,
%X IBM discovers disk stripping.

%A E. H. D'Hollander
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Speedup Bound for Continuous System Simulation on a Homogeneous
Multiprocessor
%P 176-182
%O Non-Numerical Algorithms

%A Y. K. Dalal
%A R. M. Metcalfe
%T Reverse path forwarding of broadcast packets
%J Commun. ACM (USA)
%V 21
%N 12
%P 1040-1048
%O 14 REFS. Treatment PRACTICAL
%D Dec. 1978
%K computer networks packet switching
broadcast packets broadcast routing packet switching computer networks
reverse path forwarding

%A James S. Daley
%A B. D. Underwood
%T Short-Term Weather Prediction on ILLIAC IV
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 240
%K
%O algorithms and applications
%X Summary only.

%A I. N. Dallas
%E M. B. Williams
%T Implementation of a gateway between a Cambridge Ring local area
network and a packet switching wide area network
%B Pathways to the Information Society. Proceedings of the Sixth
International Conference on Computer Communication
%C London, England
%P 137-142
%O 14 REFS. Treatment PRACTICAL
%I North-Holland, Amsterdam, Netherlands, p: xx+1018, ISBN: 0-444-86464-4
%D 7-10 Sept. 1982
%K computer networks packet switching
Cambridge Ring local area network packet switching
wide area network interconnection
gateways operating system X25 package
%X With the increasing numbers of local area networks, a need has arisen
to interconnect these networks with existing and planned wide area
networks. This interconnection is by means of gateways, and the
author shows how one such gateway has been designed, and is currently
being implemented. The gateway in question uses a standard
manufacturer's operating system and X25 package, and as well as
presenting a case study of the project the author highlights some of
the problems encountered with this approach

%A Meledath Damodaran
%T Continuous system simulation on an MIMD multiprocessor
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 470-472
%O simulation

%A Scott Danforth
%T DOT: a distributed operating system model for a tree-structured
multiprocessor
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 194-201
%K
U NC, FFP, UNIX
tree structured systems

%A Michel Dang
%A Guy Mazare
%A Gerard Michel
%T Local Area Networks for Distributed Process Control Systems
%E Y. Paker
%E J.-P. Jerjus
%B Distributed Computing Systems (Synchronization, Control and Communication)
%I Academic Press
%D 1983
%P 265-284

%A N. Dang
%A G. Sergeant
%T Expression of parallelism and communication in distributed network
processing
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 55
%K
%O Distributed function architectures

%A P.-E. Danielson
%A T. S. Ericsson
%T LIPP \(em Proposals for the Design of an Image Processor Array
%E M. J. B. Duff
%B Computing Structures for Image Processing
%I Academic Press
%D 1983
%P 157-178

%A Per-Erik Danielson
%A Bjorn Gudmendsson
%T Time-Shared Memory-Processor Interface
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 90-98
%K
%O multiprocessors

%A P. E. Danielsson
%A S. Levialdi
%T Computer architectures for pictorial information systems
%I Linkopring University

%A Per E. Danielsson
%T Serial/Parallel Convolvers
%J IEEE Transactions on Computers
%V C-33
%N 7
%D July 1984
%P 652-667
%K bit-serial processing, convolution, recursive filter design,
serial/parallel multipliers, systolic arrays, VLSI design
special purpose computer architectures

%A Roger B. Dannenberg
%T Protection for Communication and Sharing in a Personal Computer Network
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Interprocess communication, SPICE, Banker/butler, authentication,
%P 88-98

%T Linear Programming and Extensions
%A George B. Dantzig
%I Princeton University Press
%C Princeton, New Jersey

%T Matrix Storage on the DAP
%Q DAP Support Unit

%T Some Interesting and Useful Results from Complexity Theory
%Q DAP Support Unit

%T Some Useful Results in Matrix Partitioning
%Q DAP Support Unit

%T GRAPHIC \(em A FORTRAN interface for the Sigma Graphics Terminal
%Q DAP Support Unit

%T A Parallel Algorithm for Solving Tri-diagonal Systems
%Q DAP Support Unit

%T A Parallel Algorithm for Inverting a Lower Triangular Matrix
%Q DAP Support Unit

%T A note on exploiting Parallel Processing in the Monte Carlo Methods
%Q DAP Support Unit

%T Multiplication of non-standard matrices on the DAP
%Q DAP Support Unit

%T Iterative Solution of tridiangonal linear equations
%Q DAP Support Unit

%T Why are DAP processors 1 bit units rather than floating point units
%Q DAP Support Unit

%T Sparse matrix vector multiplication on the DAP
%Q DAP Support Unit

%T A note on Parallel Grid algorithms for Global optimisation in two
dimensions
%Q DAP Support Unit

%T A note on Data Organisation
%Q DAP Support Unit

%T Report on the DAP Users Meeting
%D December 1980
%Q DAP Support Unit

%T Report on the Parallel Languages User Group Meeting
%D December 1980
%Q DAP Support Unit

%T Report on the DAP Subroutine Library Meeting
%D January 1980
%Q DAP Support Unit

%T Report on the Statistics and Econometrics User Group
%D July 1980
%Q DAP Support Unit

%T DAP User Group on Sorting
%D May 1980
%Q DAP Support Unit

%T Report on the Image Processing User Group
%D November 1980
%Q DAP Support Unit

%T Report on the DAP Users Meeting
%D May 1981
%Q DAP Support Unit

%T Report on the DAP Users Meeting
%D September 1981
%Q DAP Support Unit

%T Report on the DAP Users Meeting
%D January 1982
%Q DAP Support Unit

%A J. Darlington
%A M. Reeve
%T ALICE: A Multi-Processor Reduction Machine for Parallel Evaluation
of Applicative Languages
%J Proceedings of the 1981 Conference on Functional Programming
Languages and Computer Architecture
%D October 1981
%P 65-75

%A J. Darlington
%T Functional Programming
%B Distributed Computing - Part II Declarative Systems
%E Fred B. Chambers
%E David A. Duce
%E Gillian P. Jones
%I Academic Press
%S APIC Studies in Data Processing
%V 20
%D 1984
%P 57-77
%K HOPE, KRC, SASL, FP,

%A Ph. Darondeau
%A others
%T Abstract Specification fo Communication Systems
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 339-346
%O Specification and Design of Communication Systems

%A T. Darr
%T Performance aspects of multiprocessing in a time sharing environment
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 139
%K
%O Performance evaluation

%T Reliability Simulation of Multiprocessor Systems
%A Chita R. Das
%A Laxmi N. Bhuyan
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 591-598
%K Parallel Systems

%T Computation Availability of Multiple-Bus Multiprocessors
%A Chita R. Das
%A Laxmi N. Bhuyan
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 807-813
%K Fault Tolerance and Reliability

%A P. Das
%A D. E. Farmer
%T Fault-Detection Experiments for Parallel-Decomposable Sequential
Machines
%J IEEE Transactions on Computers
%V C-24
%N 11
%D November 1975
%P 1104-1108
%K Checking experiment, decomposition of sequential machines,
fault-detection experiments, identification of sequential machines,
parallel decompositions of sequential machines, sequential machine,
structure of sequential machines,
Correspondence

%A B. Dasarathy
%T Timing Constraints of Real-Time Systems:
Constructs for Expressing Them, Methods of Validating Them 
%J IEEE-TSE
%V SE-11
%N 1
%P 80-86 
%D January 1985

%A Subrata Dasgupta
%A John Tartar
%T The Identification of Maximal Parallelism in Straight-Line
Microprograms
%J IEEE Transactions on Computers
%V C-25
%N 10
%D October 1976
%P 986-992
%K Horizontal microprograms, microinstruction, optimization, parallelism,
straight-line microprograms,
Special issue on microprogramming

%A G. I. Davida
%A R. A. DeMillo
%A R. J. Lipton
%T Multilevel Secure Distributed System
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 308-312
%K
%O Security and Reliability

%A E. S. Davidson
%T A Multiple Stream Microprocessor Prototype System:  AMP-1
%J Proceedings 7th Annual Symposium on Computer Architecture
%D May 1980
%I IEEE
%C La Baule, France
%P 9-16

%A Ian A. Davidson
%A James A. Field
%T Design Criteria for a Switch for a Multiprocessor Computing System
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 110-113
%K
%O processor memory interconnections

%T The ARPANET TELNET protocol: its purpose, principles, implementation, and
impact on host operating system design
%A J. Davidson
%A W. Hathaway
%A J. Postel
%A N. Mimno
%A R. Thomas
%A D. Walden
%Z Inst. for Advanced Computation, Sunnyvale,CA, USA
%B fifth data communications symposium
%V 4
%P 10-18
%D 27-29 Sept. 1977
%C Snowbird, Utah, USA
%I IEEE, Snowbird, Utah, USA
176 pp.
%O 21 Refs.
treatment: general,review
%K operating systems computer networks
arpanet telnet protocol development terminal communication
operating system design host operating system computer networks
computer communications
%X The arpanet telnet protocol development has demonstrated the feasibility
of constructing a protocol which dynamically adapts to support terminal
communication between previously incompatible hosts and remote terminals.
The protocol has also proved useful for process-to-process and
terminal-to-terminal communication. The iterative design and implementation
experience leading to widespread implementation of the telnet protocol
revealed several fundamental principles of protocol design which have broad
application beyond the arpanet. Several approaches to operating system
design which facilitate telnet-like communication have become apparent.

%A S. B. Davidson
%T Optimism and consistency in partitioned distributed database systems
%J ACM Trans. Database Syst. (USA)
%V 9
%N 3
%P 456-481
%O 29 REFS
Treatment THEORETICAL/MATHEMATICAL
%D 1984
%K database management systems
partitioned distributed database systems transaction processing
partition failures mutual consistency
data items protocol precedence graph backout strategy
modeling optimistic protocols
%X A protocol for transaction processing during partition failures is
presented which guarantees mutual consistency between copies of data-items
after repair is completed. The protocol is 'optimistic' in that
transactions are processed without restrictions during failure;
conflicts are then detected at repair time using a precedence graph,
and are resolved by backing out transactions according to some
backout strategy. The resulting database state then corresponds to a
serial execution of some subset of transactions run during the
failure. Results from simulation and probabilistic modeling show that
the optimistic protocols is a reasonable alternative in many cases
Conditions under which the protocol performs well are noted, and
suggestions are made as to how performance can be improved. In
particular, a backout strategy is presented which takes into account
individual transaction costs and attempts to minimize total backout
cost. Although the problem of choosing transactions to minimize total
backout cost is, in general, NP-complete, the backout strategy is
efficient and produces very good results

%A D. W. Davies
%A D. L. A. Barber
%A W. L. Price
%A C. M. Solomonides
%T Computer Networks and their Protocols
%I John Wiley and Sons
%C Chichester, England
%D 1979

%A Donald W. Davies
%A Richard W. Watson
%T Hierarchy
%E B. W. Lampson
%E M. Paul
%E H. J. Siegert
%B Distributed Systems \(em Architecture and Implementation (An Advanced Course)
%S Lecture Notes in Computer Science
%V 105
%I Spring-Verlag
%D 1981
%P 94-139

%A Donald W. Davies
%T Protection
%E B. W. Lampson
%E M. Paul
%E H. J. Siegert
%B Distributed Systems \(em Architecture and Implementation (An Advanced Course)
%S Lecture Notes in Computer Science
%V 105
%I Spring-Verlag
%D 1981
%P 211-245

%A E. R. Davies
%T Image Processing \(em its Milieu, its Nature, and Constraints on the Design
of Special Architectures for its Implementation
%E M. J. B. Duff
%B Computing Structures for Image Processing
%I Academic Press
%D 1983
%P 57-76

%A S. T. Davies
%T The Implementation of the FFT on the DAP
%E D. J. Paddon
%B Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford, England
%D 1984
%P 195-207
%K SIMD,

%A A. L. Davis
%T Data-Driven Nets: A Maximally Concurrent, Procedural, Parallel Process
Representation for Distributed Control Systems
%R UUCS-78-108
%I Computer Science Dept., University of Utah
%C Salt Lake City, UT
%D 1978

%A A. L. Davis
%T The architecture and system method of DDM1:
a recursively structured data driven machine
%J Proceedings of 5th Annual Symposium on Computer Architecture
%C Palo Alto, California
%D April 1978
%P 210-215
%K multiprocessor architectures and operating systems
%X This architecture presents a facade of unlimited concurrency and pipelining
to programs, expressed in a formalism called data driven nets.  Multiprocessing
is used to approximate this unlimited parallelism, with the assignment of
processes to available processor being done by the hardware.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A A. L. Davis
%T DDM's \(em A low level program schema for fully distributed systems
%J Proc. 1st European Conf. Parallel and Distributed Processing
%C Toulouse, France
%D Feb. 1979
%P 1-7

%A A. L. Davis
%T A Data Flow Evaluation System Based on the Concept of Recursive
Locality
%J Proceedings of the 1979 National Computer Conference
%I AFIPS Press
%V 48
%D June 1979
%P 1079-1086

%A A. L. Davis
%A W. M. Denny
%A I. Sutherland
%T A Characterization of Parallel Systems
%I University of Utah
%R UUCS-80-108
%D August 1980

%A A. L. Davis
%A J. A. Stanek
%T A Computer Music Synthesis Study on a Tree Structured Data-Driven
Machine
%J COMPCON Spring 80
%I IEEE
%D February 1980
%P 188-201

%A A. L. Davis
%A P. J. Drongowski
%T Dataflow Computers: A tutorial and survey
%R Tech. Rep., UUCS-80-109
%I Dep. Computer Science, Univ. of Utah
%C Salt Lake City
%D July 1980

%A A. L. Davis
%A S. A. Lowder
%T A Sample Management Application Program in a Graphical Data-Driven
Programming Language
%J COMPCON Spring 1981
%I IEEE
%D February 1981
%P 162-167

%A A. L. Davis
%A Robert M. Keller
%T Data flow program graphs
%J Computer
%V 15
%N 2
%D Feb. 1982
%P 26-41

%T The FAIM-1 Symbolic Multiprocessing System
%A A. L. Davis
%A S. V. Robison
%J Digest of Papers, Compcon85 Thirtieth IEEE Computer society
International Conference
%I IEEE Computer Society
%D February 25-28, 1985
%P 370-375

%A Carl Davis
%A Steven I. Kartashev
%A Svetlana P. Kartashev
%T Reconfigurable Multicomputer Networks for Very Fast Real-Time Applications
%J National Computer Conference \(em Proceedings
%I AFIPS
%V 51
%D 1982
%P 167-184
%K Signal processing, MIMD, K-rooted trees, stars, rings
%X
Reproduced in the 1984 tutorial: "Interconnection Networks for parallel
and distributed processing" by Wu and Feng.

%A D. F. Davis
%T Array Processor as a Research Tool
%J Bull. Amer. Physical Society
%V 24
%N 8
%D October 1979
%P 1091-1092

%A E. W. Davis, Jr.
%T Concurrent Processing on Conditional Jump Trees
%J Proc. COMPCON 1972
%I IEEE
%D 1972
%P 279-281

%A E. W. Davis, Jr.
%T A Multiprocessor for Simulation Application
%R PhD Thesis, Report 72-527
%I Computer Science Dept., Univ. of Ill.
%C Urbana-Champaign, Ill.
%D June 1972

%A E. W. Davis
%T STARAN Parallel Processor System Software
%J Proc. NCC Conf.
%I AFIPS Press
%V 43
%D May 1974
%P 17-22
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%A E. W. Davis
%T A microprocessor-based simulation machine
%J Proc. SOUTHEASTCON '78 Region 3 Conf.
%C Atlanta, Georgia
%D April 1978
%K multiprocessor applications
%X This multiprocessor system was intended specifically for simulation
applications.  Presents techniques for using its parallelism to speed up
simulations.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A E. W. Davis
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Suitability of Bubble Memories in Parallel Processor Architectures
%P 53-55
%O Architecture

%A Edward W. Davis
%T STARAN/RADCAP system software
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 153-159
%K
%O RADCAP

%A H. F. Davis
%T Array Processor
%J Industrial Research
%V 19
%N 11
%D November 1977
%P 82-85

%A Larry S. Davis
%A Azriel Rosenfeld
%T Curve Segmentation by Relaxation Labeling
%J IEEE Transactions on Computers
%V C-26
%N 10
%D October 1977
%P 1053-1060
%K Angle detection, curve segmentation, pattern recognition,
picture processing, scene analysis,
Correspondence

%A Nathaniel J. Davis, IV
%A Howard Jay Siegel
%T The Performance Analysis of Partitioned Circuit Switched Multistaged
Interconnection Networks
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K Interconnection Networks, PASM
%C Boston, MA
%P 387-394

%T Algorithms For Solving large Sparse Systems of Simultaneous Linear
Equations on Vector Processors
%A R. Davis
%J CYBER 200 Applications Seminar
%R NASA Conference Publication 2295
%D October 1983
%E J. Patrick Gary, Compiler
%I NASA Goddard Space Flight Center
%C Greenbelt, Maryland
%P 275

%A R. L. Davis
%A S. Zucker
%A C. M. Campbell
%T The Building Block Approach to Multiprocessing
%J AFIPS Spring Joint Computer Conference
%D 1972
%P 685-703

%T A Model for Planning in a Multi-Agent Environment: Steps Toward Principles
for Teamwork
%A Randall Davis
%I Massachusetts Institute of Technology
%D June 1981
%R MIT A.I. Working Paper
%X Not intended for reference. Abstract principles of cooperation.

%A Randall Davis
%A Reid G. Smith
%T Negotiation as a Metaphor for Distributed Problem Solving
%R AI Memo 624
%I Artificial Intelligence Laboratory, Massachusetts Institute of Technology
%C Cambridge, Massachusetts
%D May 1981
%X Overview of Contract Net

%A Randall Davis
%T Applications of Meta-level Knowledge to the Construction,
Maintenance, and Use of Large Knowledge Bases
%E R. Davis
%E D. Lenat
%B Knowledge-based Systems in Artificial Intelligence
%I McGraw-Hill
%D 1982
%P 229-490
%X Originally, Memo AIM-283, AI Laboratory, and Rep. No. STAN-CS-76-552
1976, Computer Science Dept., Stanford University.

%A Robert L. Davis
%T The ILLIAC IV Processing Element
%J IEEE Transactions on Computers
%V C-18
%N 9
%D September 1969
%P 800-816
%K computer arithmetic, ILLIAC IV, medium-scale integration,
parallel processing
Logical design

%T Parallel Digital Differential Analyzer with Arbitrary Stored
Interconnections
%A Dawoud S. H. Dawoud
%A Nadia Z. El-Araby
%J IEEE Transactions on Computers
%V C-22
%N 1
%D January 1973
%P 41-46
%K Arbitrary stored interconnection,
destructive readout (DRO) associative memory,
increment store unit, multifunction memory unit (MFMU),
nondestructive readout (NDRO) associative memory,
parallel-type digital differential analyzer (DDA),
Computer systems

%A J. M. Dawson
%A R. W. Huff
%A C. Wu
%T Plasma Simulation on the UCLA CHI Computer System
%J AFIPS NCC Conference Proceedings
%V 47
%D 1978
%P 395-407
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%A J. D. Day
%A H. Zimmerman
%T The OSI Reference Model
%J Proc. IEEE (USA)
%V 71
%N 12
%P 1334-1340
%O 5 Refs.
Treatment GENERAL OR REVIEW.
%D 1983
%K computer networks standardisation.
standardisation OSI Reference Model computer networks
international standards International Standards Organization
ISO Open Systems Interconnection
requirements highest level of abstraction building blocks network model
seven layer model outstanding issues extensions.
%X The early success of computer networks in the mid-1970s made it
apparent that to utilize the full potential of computer networks
international standards would be required. In 1977, the International
Standards Organization (ISO) initiated work in Open systems
Interconnection (OSI) to address these requirements. The paper
briefly describes the OSI Reference Model, the highest level of
abstraction in the OSI scheme. The paper first describes the basic
building blocks used to construct the network model. Then the
particular seven-layer model used by OSI is briefly described,
followed by a discussion of outstanding issues and future extensions
for the model.

%A S. Day
%A B. Shkoller
%T A 3-D Earthquake Model
%I Control Data Corp.
%J Proceedings Symposium CYBER 205 Applications
%C Ft. Collins, CO
%D 1982

%A Manilal Daya
%T On determinacy and equivalence of parallel program schemata
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 246
%K
%O Fundamental theory
%X Summary only.

%T Operational Numerical Weather Prediction on The CYBER 205 At The
National Meteorological Center
%A Dennis Deaven
%J CYBER 200 Applications Seminar
%R NASA Conference Publication 2295
%D October 1983
%E J. Patrick Gary, Compiler
%I NASA Goddard Space Flight Center
%C Greenbelt, Maryland
%P 21-24

%A A. Deb
%A A. Mukhopadhyay
%T Optimal Parallel Algorithm for Evaluation of Arithmetic Expressions
%R TR 73-10
%I University of Iowa
%C Iowa City
%D 1973

%A A. Deb
%T Exploitation of Distribution Laws for Parallel Evaluation of Arithmetic
Expressions
%R TR 74-06
%I University of Iowa
%C Iowa City
%D 1974

%A A. Deb
%T Parallel Numerical Computation
%R TR 76-01
%I University of Iowa
%C Iowa City
%D 1976

%A Ashoke Deb
%A Amar Mukhopadhyay
%T Parallel Algorithms for Evaluation of Arithmetic Expressions
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 236
%K
%O algorithms and applications
%X Short summary only.

%Q DEC
%T DECnet
%D 1976
%K DNA,
%X An interesting look at the first commercial distributed system.
From a DEC manual.
Reprinted in "Tutorial: Distributed Processing," IEEE,
compiled by Burt H. Liebowitz and John H. Carson, 1981, 3rd edition.

%A Casper R. DeFiore
%A P. Bruce Berra
%T A Quantitative Analysis of the Utilization of Associative Memories in
Data Management
%J IEEE Transactions on Computers
%V C-23
%N 2
%D February 1974
%P 121-132
%K Associative memories, content-addressable memories, data management,
data structures, information systems, inverted lists,
Computer systems

%A N. DeFrancesco
%A G. Perego
%A A. Tomasi
%A G. Vaglini
%A M. Vanneschi
%T On the Feasibility of Nondeterministic and Interprocess Communication
Constructs in Data-Flow Computing Systems
%J Proceedings of the First European Conference on Parallel and
Distributed Processing
%D February 1979
%P 93-100

%A Doug DeGroot
%T Partitioning job structures for SW-Banyan networks
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 106-113
%K
packet switching
network interconnection capabilities

%A Doug DeGroot
%T Expanding and contracting SW-banyan networks
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 19-24
%K expanding SW-banyan networks, contracting SW-banyan networks,
multistage network performance

%T Alternate Graph Expressions for Restricted AND-Parallelism
%A Doug DeGroot
%J Digest of Papers, Compcon85 Thirtieth IEEE Computer society
International Conference
%I IEEE Computer Society
%D February 25-28, 1985
%P 206-210

%A Morris H. DeGroot
%T Reaching a Consensus
%J Journal of the American Statistical Association
%D March 1974
%V 69
%N 345
%P 118-121

%T Three-Dimensional Flow Over A Conical Afterbody Containing A Centered
Propulsive Jet: A Numerical Simulation
%A G. Deiwert
%A H. Rothmund
%J CYBER 200 Applications Seminar
%R NASA Conference Publication 2295
%D October 1983
%E J. Patrick Gary, Compiler
%I NASA Goddard Space Flight Center
%C Greenbelt, Maryland
%P 187-197

%A E. Dekel
%A S. Sahni
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Parallel Scheduling Algorithms
%P 352-357
%O Scheduling

%A Eliezer Dekel
%A David Nassimi
%A Sartaj Sahni
%T Parallel Matrix and Graph Algorithms
%J SIAM Journal of Computing
%V 10
%N 4
%D November 1981
%P 657-673
%K Cube connected computer, perfect shuffle computer, parallel algorithm,
matrix multiplication, graph algorithm, complexity
%X This paper contrasts shared memory with cube connected memory algorithms.
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%A Eliezer Dekel
%A Sartaj Sahni
%T Parallel generation of the postfix form
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 171-177
%K
U of Minn
%O Non-numeric algorithms

%A Eliezer Dekel
%A Sartaj Sahni
%T A parallel matching algorithm for convex bipartite graphs
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 178-184
%K
U of Minn
%O Non-numeric algorithms

%T Parallel Generation of Postfix and Tree Forms
%A Eliezer Dekel
%A Sartaj Sahni
%J ACM Transactions on Programming Languages and Systems
%V 5
%N 3
%D July 1983
%P 300-317
%K Algorithms, arithmetic expressions, postfix, infix, tree form, parallel
computing, complexity
Categories: D.3.4 [Programming Languages]: processors - parsing

%A J.-M. Delosme
%A M. Morf
%T Scattering Arrays for Matrix Computations
%J SPIE 25th Tech. Symp.
%C San Diego, CA
%D 1981

%A J.-M. Delosme
%A I. Ipsen
%T Efficient Parallel Solution of Linear Systems with Hyperbolic Rotations
%I Yale University, Dept. of Computer Science
%R YALEU/CSD/RR-341
%D 1984

%A P. Delsarte
%A Y. Genin
%A Y. Kamp
%T A Method of Matrix Inverse Triangular Decomposition Based on Contiguous
Principle Submatrices
%J J. Linear Algebra Applications
%V 31
%P 194-212
%D 1980
%X Remove?

%A L. Delves
%A A. Samba
%A J. Hendry
%T Band Matrices on the DAP
%E D. Paddon
%B Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford
%P 167-183
%D 1984

%A L. M. Delves
%A A. S. Samba
%T Band Matrices on the DAP
%E D. J. Paddon
%B Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford, England
%D 1984
%P 167-183
%K SIMD, Global Element Method (GEM2), parallel cyclic reduction,
parallel reduction of augmented triangles (PRAT), matrix multiplication,

%A B. Dembast
%A K. Neves
%T Sparse Triangular Factorization on Vector Computers
%J Exploring Applications of Parallel Processing to Power System Analysis
%I Electric Power Research Institute
%R EE 566-SR
%D 1977

%A Jarek Deminent
%T Experience with multiprocessor algorithms
%J IEEE Transactions on Computers
%V C-31
%N 4
%P 278-288
%D April 1982
%K

%T Experience with Multiprocessor Algorithms
%A Jarek Deminet
%J IEEE Transactions on Computers
%V C-31
%N 4
%D April 1982
%P 278-288
%K Distributed data structures, multiprocessors, parallel processing,
performance evaluation, synchronization
Multiprocessors

%A Gary Demos
%A Maxine D. Brown
%A Richard A. Weinberg
%T Digital Scene Simulation: The Synergy of Computer Technology and Human
Creativity
%J Proceedings of the IEEE
%V 72
%N 1
%D January 1984
%P 22-31
%K Special issue -- Supercomputers - Their Impact on Science and Technology,
Graphics

%Q Denelcor
%T Heterogeneous Element Processor Principles of Operation
%R Part No. 9000001
%C Denver, Colorado
%D April 1981

%Q Denelcor
%T HEP Concepts and Facilities
%R Part No. 9000005
%C Denver, Colorado
%D Feb. 1982

%Q Denelcor
%T HEP FORTRAN 77 User's Guide
%R Part No. 9000006
%C Denver, Colorado
%D Feb. 1982

%A P. J. Denning
%T Virtual Memory
%J Computing Surveys
%V 2
%N 3
%D September 1970
%P 153-189

%A P. J. Denning
%T Fault tolerant operating systems
%Z Computer Sci. Dept., Purdue Univ., West Lafayette, IN, USA
%J Computing Surveys (USA)
%V 8
%N 4
%P 359-389
%D Dec. 1976
%O 58 Refs.
treatment: practical
%K operating systems fault tolerant computing
architectural principles operating systems system closure
capability based machine
resource control decision verification error detection fault tolerant
%X This paper develops four related architectural principles which can guide
the construction of error-tolerant operating systems. The fundamental
principle, system closure, specifies that no section is permissible unless
explicitly authorised. The capability based machine is the most efficient
known embodiment of this principle: it allows efficient small access
domains, multiple domain processes without a privileged mode of operation,
and user and system descriptor information protected by the same mechanism.
System closure implies a second principle resource control, that prevents
processes from exchanging information via residual values left in physical
resource units. These two principles enable a third, decision verification
by failure-independent processes. These principles enable prompt error
detection and cost-effective recovery. Implementations of these principles
are given for process management, interrupts and traps, store access
through capabilities, protected procedure entry, and tagged architecture.

%l journal-article
%A P. J. Denning
%T Computer Architecture: Some Old Ideas that Haven't Quite Made It Yet
%J CACM
%V 24
%N 9
%P 553-554
%M September
%K RISC
%D 1981

%A P. J. Denning
%A R. L. Brown
%T Should distributed systems be hidden?"
%J International Workshop on Computer Systems Organization
%C New Orleans, LA, USA
%P 49-61
%O 29 REFS
Treatment PRACTICAL
%I IEEE
New York, USA, p: viii+227
ISBN: 0-8186-0010-1
%D 29-31 March 1983
%K distributed processing multiprocessing systems data communication systems
operating systems
distributed systems multiprocessor systems communications layer local network
operating system
%X Existing multiprocessor systems can be divided into three classes
according to the degree of coupling among the machines: shared
memory, local network, or long-haul network. The tighter the
coupling, the deeper in the operating system will be the optimal
position of the software for interprocess communications. The authors
argue that the best position of the communications layer for a local
network is in the middle levels of the operating system-above the
virtual memory layer and below the directory manager. With this
position, the directory hierarchy can be extended to become a global
name space for permanent objects in the system. Each of the higher
levels is then easily converted to hide the remaining vestiges of the
locations of objects it manages. The resulting operating system can
fit on machines as small as workstations

%A P. J. Denning
%A A. Hearn
%A C. W. Kern
%T History and overview of CSNET
%J Comput. Commun. Rev. (USA), SIGCOMM '83 Symposium on Communications
Architectures & Protocols
%V 13
%N 2
%C Austin, TX, USA
%P 138-145
%O 5 REFS
Treatment GENERAL OR REVIEW
%D 8-9 March 1983
%K computer networks
computer science research CSNET logical network ARPANET
Phonenet Telenet
%X CSNET is the acronym for the Computer Science Research Network, a
project supported by NSF to provide advanced computer network
services to the computer research community. CSNET is a 'logical
network'-a high-level communication environment spanning several
physical network, including the ARPANET, Phonenet and Telenet. This
paper reviews the history, the goals, the organisation, the
components and the status of CSNET

%A Peter J. Denning
%A G. Scott Graham
%T A Note on Sub-Expression Ordering in the Execution of Arithmetic Expressions
%J Communications of the ACM
%V 16
%N 11
%D November 1973
%P 700-702

%A J. B. Dennis
%T Programming Generality, Parallelism and Computer Architecture
%J Information Processing 68: Proceedings of IFIP Congress 1968
%D August 1968
%P 484-492

%A J. B. Dennis
%T On the design and specification of a common base language
%J Proc. Symp. Computers and Automata
%I Polytechnic Inst. of Brooklin
%C Brooklin, NY
%D 1971

%A J. B. Dennis
%A J. B. Fosseen
%A J. P. Linderman
%T Data flow schemas
%E A. Ershov
%E V. A. Nepomniascuy
%B Int. Symp. on Theoretical Programming
%V 5
%S Lecture Notes in Computer Science
%I Springer-Verlag
%D 1972
%P 187-216

%A J. B. Dennis
%T First Version of a Data Flow Language
%E B. Robinet
%B Programming Symposium: Proceedings, Colloque sur la Programmation,
%S Lecture Notes in Computer Science
%V 19
%D April 1974
%P 362-376
%K Recommended,

%A J. B. Dennis
%A D. P. Misunas
%T A Computer Architecture for Highly Parallel Signal Processing
%J Proceedings of the ACM 1974 National Conference
%I ACM
%D November 1974
%P 402-409

%A J. B. Dennis
%T A Language Design for Structured Concurrency
%B Design and Implementation of Programming Languages: Proceedings of
a DoD Sponsored Workshop
%E J. H. Williams
%E D. A. Fisher
%S Lecture Notes in Computer Science
%V 54
%D October 1976
%P 231-242

%A J. B. Dennis
%A K.-S. Weng
%T Application of Data Flow Computation to the Weather Problem
%E D. J. Kuck
%E D. H. Lawrie
%E A. H. Sameh
%B High Speed Computer and Algorithm Organization
%D April 1977
%P 143-157
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%A J. B. Dennis
%A C. K. C. Leung
%A D. P. Misunas
%T A Highly Parallel Processor Using a Data Flow Machine Language
%I Computational Structures Group, Laboratory for Computer Science, MIT
%C Cambridge, MA
%R Memo 134-1
%D June 1979

%A J. B. Dennis
%T The varieties of data flow computers
%J Proc. 1st European Conf. Parallel and Distributed Processing
%C Toulouse, France
%D Oct. 1979
%P 430-439

%A J. B. Dennis
%A C. K. C. Leung
%A D. P. Misunas
%T A Highly Parallel Processor Using a Data Flow Machine Language
%I Computational Structures Group, Laboratory for Computer Science, MIT
%C Cambridge, MA
%R Memo 134-2
%D June 1980

%A J. B. Dennis
%T An Operational Semantics for a Language with Early Completion
Data Structures
%J International Colloquium on Formalization of Programming
Concepts, Lecture Notes in Computer Science 107
%P 260-267
%D April 1981

%A J. B. Dennis
%T High Speed Data Flow Computer Architecture for the Solution of the
Navier-Stokes Equations
%R Final Report to NASA Ames Research Center
%D April 1982

%A J. B. Dennis
%A G. R. Gao
%A K. W. Todd
%T A Data Flow Supercomputer
%R Computation Structure Group Memo 213
%I Laboratory for Computer Science, MIT
%C Cambridge, MA
%D January 1982

%A Jack Dennis
%A Guang R. Gao
%T Maximum Pipelining of Array Operations on Static Data Flow Machine
%R Computation Structure Group Memo 233-1
%I Laboratory for Computer Science, MIT
%C Cambridge, MA
%D September 1982
%X This is a more detailed version of the paper presented at the 1983
Parallel Processing conference.

%A Jack Dennis
%A Guang R. Gao
%T A Code Generation Shceme for Static Data Flow Computers
%I MIT
%C Cambridge, MA
%D September 1984
%K preliminary

%A Jack B. Dennis
%A Earl C. Van Horn
%T Programming Semantics for Multiprogrammed Computations
%J Comm. ACM
%V 9
%N 3
%P 143-155
%D March 1966
%X The original paper which coined "capability."
Summarized the simple fork-join and cobegin-coend parallel computing
constructs.

%A Jack B. Dennis
%T Packet Communication Architecture
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 224-229
%K
%O Data flow architecture

%A Jack B. Dennis
%A David P. Misunas
%T A preliminary architecture for a basic data flow processor
%J Proceedings of 2nd Annual Symposium on Computer Architecture
%I IEEE
%D Jan. 1975
%P 126-132

%A Jack B. Dennis
%A Ken K. S. Weng
%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T An Abstract Implementation for Concurrent Computation with Streams
%P 35-45
%O Languages and Translations

%A Jack B. Dennis
%T The Varieties of Data-Flow Machines
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 430-439
%K data base computers
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%A Jack B. Dennis
%A G. Andrew Boughton
%A Clement K. C. Leung
%T Building Blocks for Data Flow Prototypes
%J Proceedings of 7th Annual Symposium on Computer Architecture
%D 1980
%K MIT
%P 1-8

%A Jack B. Dennis
%T Data Flow Supercomputers
%J Computer
%V 13
%N 11
%D November 1980
%P 48-56
%K Recommended,
%X Covers basic data flow, the idea of activity templates, single assignment
and so on.
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%A Jack B. Dennis
%A Gao Guang Rong
%T Maximum pipelining of array operations on static data flow machine
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 331-334
%K
MIT, VAL
data flow

%A Jack B. Dennis
%T Data Flow Ideas for Supercomputers
%J Digest of Papers COMPCON, Spring 84
%I IEEE
%D Feb. 1984
%P 15-19
%K Numerical supercomputers
%X Short position paper on static data flow architectures (4 predictions
and mention of Japanese plans (1980s).

%A Jack B. Dennis
%A Guang-Rong Gao
%A Kenneth W. Todd
%T Modeling the Weather with a Data Flow Supercomputer
%J IEEE Transactions on Computers
%V C-33
%N 7
%D July 1984
%P 592-603
%K Computer architecture, data flow, global weather model,
parallel computation, partial differential equations, performance analysis,
pipelined computation,
Computer architecture
%X An example using the VAL language and the data flow machine language.
Details include FIFO buffering and performance measurement.

%A Jack B. Dennis
%A Joesph Stoy
%A Bhaskar Guharoy
%T VIM: An Experimental Multi-User System Supporting Functional Programming
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 1.1-1.9
%O Data flow machines

%A N. Deo
%A C. Y. Pang
%A R. E. Lord
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Two Parallel Algorithms for Shortest Path Problems
%P 244-253
%O Nonnumerical Algorithms and Applications

%A N. Deo
%A Y. B. Yoo
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Parallel Algorithms for the Minimum Spanning Tree Problem
%P 188-189
%O Non-Numerical Algorithms

%T Proposal for a Joint Effort in Personal Scientific Computing
%Q Department of Computer Science
%I Carnegie-Mellon University
%K SPICE

%A Warren Y. Dere
%A D. J. Sakrison
%T Berkeley Array Processor
%J IEEE Transactions On Computers
%D May 1970
%P 444-447
%K Array processor, convolution, Cooley-Tukey algorithm, correlation,
digital filtering, Fourier transform, special purpose computer,
time series analysis
Short Notes

%A R. B. Derickson
%T A Proposed Associative Push Down Memory
%J Computer Design
%D March 1968
%P 60-66

%A D.M. DeRuyck
%A L. Snyder
%A J. D. Unruh
%T Processor Displacement: An Area-Time Trade-off Method for VLSI Design
%I CS Dept., Purdue Univ.
%C West Layfayette, IN
%D 1982?

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T Modeling Maximum Parallel Executions in Pipeline Executable Form
Using Precedence Expressions
%A B. I. Dervisoglu
%P 322
%O Pipelining
%X Summary only.

%A B. C. Desai
%A C. Lam
%A J. W. Atwood
%A J. Opatrny
%A P. Grogono
%A S. Cabilio
%T NOVAC \(em a non-tree variable tree for combinatorial computing
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 193-195
%K
NovacBus, PDP-11 (23s / 34), Pascal-C
Concordia U, Montreal
%O Non-numeric algorithms

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T A Parallel Microprocessing System
%A Bipin C. Desai
%P 136
%O Searching
%X Summary only.

%A R. desJardins
%A J. S. Foley
%T Open Systems Interconnection: a review and status report
%J J. Telecommun. Networks (USA)
%V 3
%N 3
%P 194-209
%O 3 Refs
Treatment APPLICATIONS, GENERAL
%D 1984
%K data communication systems computer networks protocols standardisation
Open Systems Interconnection OSI ISO CCITT
standards computer networking protocols

%A Richard DesJardins
%T Evolutionary Distributed Systems
%J Computer Software and Applications Conference (COMPSAC77)
%I IEEE
%D November 1977
%P 765-771

%A A. M. Despain
%T X-Tree: a multiple microcomputer system
%J Spring 1980 Compcon
%I IEEE
%D 1980
%P 324-327

%A Alvin M. Despain
%A David A. Patterson
%T X-TREE:  A Tree Structured Multiprocessor Computer Architecture
%J Proceedings 5th Annual Symposium on Computer Architecture
%D April 1978
%C Palo Alto, CA
%P 144-150

%A Alvin M. Despain
%T Notes on Computer Architecture for High Performance
%E J. Tiberghien
%B New Computer Architectures
%I Academic Press
%C London, England
%D 1984
%P 59-138

%T Aquarius - A High Performance Computing System for Symbolic/Numeric
Applications
%A Alvin M. Despain
%A Yale N. Patt
%J Digest of Papers, Compcon85 Thirtieth IEEE Computer society
International Conference
%I IEEE Computer Society
%D February 25-28, 1985
%P 376-382

%A Alvin W. Despain
%A Yale N. Patt
%T The Aquarius Project
%J Digest of Papers COMPCON, Spring 84
%I IEEE
%D Feb. 1984
%P 364-367
%K Very high-end architectures
%X Covers the design of a PROLOG machine.  Thesis is that logic programming
can control supercomputing to benefit overall performance.  The machine tends
to be AI (symbolic) in orientation.

%A J. T. Deutsch
%A A. R. Newton
%T MSPLICE: A multiprocessor-based circuit simulator
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 207-214
%O applications

%A John Deverell
%T Pipeline Iterative Arithmetic Arrays
%J IEEE Transactions on Computers
%V C-24
%N 4
%D April 1975
%P 317-322
%K Cellular arrays, division, general iterative arrays, multiplication,
pipelining,
Short notes

%A C. Devor
%T Experiences with Distributed Software Design in DDTS
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 475-485
%K
%O Distributed Systems-Practices and Experiences

%A M. Devy
%A M. Diaz
%T Multilevel Specification and validation of the Control in a
Communication System
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 43-50
%O Testing and Evaluation

%A P. M. Dew
%T VLSI Architectures for Problems in Numerical Computation
%E D. J. Paddon
%B Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford, England
%D 1984
%P 1-24
%K DAP, Cray, systolic arrays, inner product, matrix inversion,

%A David J. DeWitt
%T DIRECT \(em A Multiprocessor Organization for Supporting Relational Data
Base Management Systems
%J Proceedings of 5th Annual Symposium on Computer Architecture
%D April 1978
%I University of Wisconsin
%P 182-289

%A David J. Dewitt
%A Dina Friedland
%T Exploiting Parallelism for the Performance Enhancement of Non-Numeric
Applications
%J National Computer Conference \(em Proceedings
%I AFIPS
%V 51
%D 1982
%P 207-216
%K I/O problem, data base machines
%X Has a nice published summary classifying data base machines.

%T The CRYSTAL Multicomputer: Design and Implementation Experience
%A David J. DeWitt
%A Raphael Finkel
%A Marvin Solomon
%I University of Wisconsin-Madison
%R Computer Sciences Technical Report #553
%D September 1984	
%K Required
%X A good current overview of the Crystal project.  The first part reads like
the C.mmp retrospective by Wulf [1980] et al.  They suffered from the same
problems as CMU: small address space, reliability, and they also pushed
the software the software forward to the next stage of problems.

%A S. K. Dhall
%A C. L. Liu
%T On a real-time scheduling problem
%J Operations Research
%V 26
%N 1
%D January-February 1978
%P 127-140
%K scheduling
%X Provides two heuristic algorithms for deciding the number of processors
needed to service periodically arriving time-critical requests.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A P. Dhar
%A R. Ramaswamy
%T A starting topology algorithm for computer communication networks
%B NETWORKS India 84. International Symposium on Data Communication
and Computer Networks
%C Madras, India
%D Oct. 1984
%P 179-188
%O 8 REFS. Treatment PRACTICAL, THEORETICAL
%E H. N. Mahabala
%E K. B. Lakshmanan
%E S. Srinivasan
%I Comput. Soc. India, IFIP, UNESCO
%K computer networks iterative methods data communication systems
iterative methods starting topology computer communication networks
network design algorithms cost delay throughput reliability
nodal locations storage capacities
%X In the design of a computer communication network, generally the
starting topology is arbitrarily chosen. The network design
algorithms are then iteratively applied to this topology until a
best topology satisfying cost, delay, throughput and reliability
constraints is obtained. Because of the arbitrary selection of the
starting topology, the network design cost becomes high. Therefore
an algorithm for the generation of a good starting topology that
reduces the design cost is presented. For any given set of nodal
locations and their storage capacities, the algorithm generates a
two connected starting topology. Simulation results, which
illustrate the generation of a starting topology for the design of a
model computer communication network, are also given

%A Sanjay Dhar
%A Mark A. Franklin
%A Donald F. Wann
%T Timing control of VLSI based N log N and crossbar networks
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 59-64
%K
multistage networks

%A C. R. Dhas
%T Performance Evaluation of a Feedback Data Flow Processor Using
Simulation
%J Proceedings of Performance 80: The Seventh IFIP Working Group
International Symposium on Computer Performance Modelling, Measurement,
and Evaluation
%I ACM SIGMETRICS
%V 9
%N 2
%D May 1980
%P 191-197

%A Martin A. Diamond
%T The Stability of a Parallel Algorithm for the Solution of Tridiagonal
Linear Systems
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 235
%K
%O algorithms and applications
%X Short summary only.

%A D. M. Dias
%A J. R. Jump
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Packet Communication in Multistage Shuffle-Exchange Networks
%P 327-328
%O Interconnections

%A Daniel M. Dias
%A J. Robert Jump
%T Analysis and Simulation of Buffered Delta Networks
%J IEEE Transactions on Computers
%V C-30
%N 4
%D April 1980
%P 273-282
%X Also published in
"Workshop on Interconnection Networks for Parallel and Distributed
Processing,"
Purdue U., IEEE, April 1980, pp. 84-92.

%A Daniel M. Dias
%A J. Robert Jump
%T Analysis and Simulation of Buffered Delta Networks
%J IEEE Transactions on Computers
%V C-30
%N 4
%D April 1981
%P 273-282
%K Crossbar switches, delta networks, multistage interconnection networks,
packet communication architecture, performance analysis, simulation
%O Special issue on interconnection networks for parallel and distributed
processing
%X
Reproduced in the 1984 tutorial: "Interconnection Networks for parallel
and distributed processing" by Wu and Feng.

%A Daniel M. Dias
%A J. Robert Jump
%T Augmented and pruned n log n multistaged networks: topology and performance
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 10-12
%K
Mitre and Rice Univ.
%O Interconnection networks

%A Francisco J. O. Dias
%T Truth-Table Verification of an Iterative Logic Array
%J IEEE Transactions on Computers
%V C-25
%N 6
%D June 1976
%P 605-613
%K Adder, cell, checking experiment, fault detection, iterative array,
multiple fault, test, truth table,
Special issue on fault tolerant computing

%A Rolf Diekkamper
%T Vectorized Finite Element Analysis of Nonlinear Problems in Structural
Mechanics
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 293-298
%D 1984

%T Refined C: A Sequential Language for Parallel Programming
%A Henry Dietz
%A David Klappholz
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 442-449
%K Parallel Programming

%A Henry G. Dietz
%A David Kappholz
%T Refining a conventional language for race-free specification of
parallel algorithms
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 380-382
%K applicative languages, partitioning, C,
%O languages

%T A Search Memory for Many-to-Many Comparison
%A David W. Digby
%J IEEE Transactions on Computers
%V C-22
%N 8
%D August 1973
%P 768-772
%K Associative memory, content addressable, many-to-many search,
multiple comparison, parallel search algorithms,
Special issue on parallel computation, implementation 

%A E. W. Dijkstra
%T Cooperating Sequential Processes
%B Programming Languages
%E F. Genuys
%I Academic Press
%C New York, NY
%P 43-112
%D 1968

%A E. W. Dijkstra
%A L. Lamport
%A A. J. Martin
%A C. S. Scholten
%A E. F. M. Steffens
%T On-the-fly garbage collection: An exercise in cooperation
%J Communications of the ACM
%V 21
%D Nov. 1979
%P 966-975

%A Edsger W. Dijsktra
%T The Structure of the "THE"-Multiprogramming System
%J Communications of the ACM
%V 11
%D May 1968
%P 347-360
%K operating system, multiprogramming system, system hierarchy,
system structure, real-time debugging, program verification,
synchronization primitives, cooperating sequentials processes, system levels,
input-output buffering, multiprogramming, processor sharing, multiprocessing,
CR Categories: 4.30, 4.32
%X The classic semaphore paper.
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A Nikitas Dimopoulos
%T The homogeneous multiprocessor architecture \*- structure and performance
analysis
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 520-523
%K
MIMD, H-network, multiprocessor systems

%T On the Structure of the Homogeneous Multiprocessor
%A Nikitas J. Dimopoulos
%J IEEE Transactions on Computers
%V C-34
%N 2
%D February 1985
%P 141-150
%K MIMD, Multiprocessors, parallel processing, relaxation, SIMD, temporal
logic
%O Multiprocessor systems

%A J. R. Dingeldine
%A H. G. Martin
%A W. M. Patterson
%T Operating system and support for PEPE
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 170-178
%K
%O PEPE

%A J. R. Dingeldine
%T Parallel FORTRAN (PFOR) PEPE Assembly Language (PAL) User's Manual
%R TM-HU-046/400/01
%I System Development Corporation
%D 1976

%A J. Dion
%T The Cambridge File Server
%J Oper. Syst. Rev. (USA)
%V 14
%N 4
%P 26-35
%O 7 Refs.
%D 1980.
%K operating systems time sharing programs virtual storage.
Cambridge File Server local area network Cambridge ring dedicated minicomputer
general storage service filing systems virtual memory systems.
%X In a local area network such as the Cambridge ring, one of the
principal benefits to be gained is the centralisation of expensive
resources such as discs. Rather than each processor having a private
disc, one or more computers can provide a storage service for all
others on the network. The Cambridge File Server, a program
controlling a dedicated minicomputer and 150 megabytes of disc
storage, is an attempt to create a general storage service for the
ring, and has been used to implement both filing systems and virtual
memory systems in computers on the ring.

%A D. R. Ditzel
%T Architectural support for programming languages in the X-Tree processor
%J Spring 1980 Compcon
%I IEEE
%D 1980
%P 335-339

%A M. C. DiVecchio
%T The Design and Implementation of a High/Low Magnitude Search Instruction
for PEPE
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 122
%K
%O Associative/parallel processors
%X Summary only.

%A T. P. Dobry
%A A. M. Despain
%A Y. N. Patt
%T Performance Studies of a Prolog Machine Architecture
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K Logic programming machines, Aquaris, MIMD
%C Boston, MA
%P 180-190

%A D. Dodson
%T Preliminary Timing Study for the CRAYPACK Library
%I Boeing Computer Services
%R Internal Memorandum G4550-CM-39
%C Seattle, WA
%D 1981

%A D. Dolev
%A J. Meseguer
%A M. C. Pease
%T Finding Safe Paths in a Faulty Environment
%T Language Constructs and Support Systems for Distributed Computing
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 95-103

%A D. Dolev
%A R. Reischuk
%T Bounds on Information Exchange for Byzantine Agreement
%T Language Constructs and Support Systems for Distributed Computing
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 132-140

%A D. Dolev
%A others
%T An Efficient Byzantine Agreement without Authentication
%R IBM tech. rep. RJ3428
%D March 1982

%A D. Dolev
%A H. R. Strong
%T Polynomial Algorithms for Multiple Processor Agreement
%J Symposium on Theory of Computation
%D May 1982
%P 401-407

%A D. Dolev
%A J. Halpern
%A B. Simons
%A H. Ray Strong
%T Fault-Tolerant Clock Synchronization
%J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing
%I ACM
%D August 1984

%A Danny Dolev
%T Scheduling Wide Graphs
%I Department of Computer Science, Stanford University
%D December 1980
%R STAN-CS-80-832

%A Danny Dolev
%T The Byzantine Generals Strike Again
%J Journal of Algorithms
%D December 1981

%A D. R. Doll
%T Multiplexing and concentration
%J Proc. IEEE
%V 60
%N 11
%D November 1972
%P 1313-1321

%A A. Doman
%T PARADOCS: A Highly Parallel Data Flow Computer and Its Data Flow Language
%J Euromicro Journal
%V 7
%D 1981
%P 20-31

%A J. Dongarra
%A A. Hinds
%T Unrolling Loops in FORTRAN
%J Software Practice and Experience
%V 9
%P 219-229
%D 1979

%A J. Dongarra
%T Redesigning Linear Algebra Algorithms
%J E.D.F. Bulleting de la Direction des Etudes Et Recherches
%V Serie C
%N 1
%P 51-59
%D 1983

%A J. Dongarra
%T Performance of Various Computers Using Standard Linear Equations
Software in a Fortran Environment
%I Argonne National Laboratory
%R MCA-TM-23
%D 1984

%A J. Dongarra
%A S. Eisenstat
%T Squeezing the Most out of an Algorithm in CRAY-FORTRAN
%J ACM Transactions Math. Softw.
%V 10
%P 221-230
%D 1984

%A J. Dongarra
%A F. Gustavson
%A A. Karp
%T Implementing Linear Algebra Algorithms for Dense Matrices on a Vector
Pipeline Machine
%J SIAM Rev.
%V 26
%P 91-112
%D 1984

%A J. Dongarra
%A A. Sameh
%A D. Sorenson
%T Implementation of Some Concurrent Algorithms for Matrix Factorization
%I Argonne National Laboratory
%R ANL/MCS-TM-25
%D 1984

%A J. J. Dongarra
%T Some LINPACK Timing on the Cray-1
%J LASL Workshop on Vector and Parallel Processors
%I Los Alamos Scientific Laboratory
%D 1978
%P 58-75
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%A J. J. Dongarra
%A D. C. Sorensen
%T A Parallel Linear Algebra Library for the Denelcor HEP
%E Janusz S. Kowalik
%B Parallel MIMD Computation: HEP Supercomputer and Its Applications
%I MIT Press
%C Cambridge, MA
%D 1985
%P 275-294
%K Applications, LINPACK, BLAS, LU decomposition, basic math,
%X An extension of Jack's work on benchmarking.

%T On Some Parallel Banded System Solvers
%A Jack J. Dongarra
%A Ahmed Sameh
%I Argonne National Laboratory, University of Chicago
%R ANL/MCS-TM-27
%D March 1984

%A Jeffery M. Donnelly
%T Porting the Newcastle Connection to 4.2 Berkeley UNIX
%I Computer Science Dept., University of Illinois
%C Urbana-Champaign
%D March 1985
%K distributed operating system, networking
%X Master's thesis on one of the more popular existing portable distributed
systems.

%A V. Donzeau-Gouge
%A others
%T The MENTOR Program Manipulation System
%I IRIA Laboria
%C Paris (Le Chesnay), France
%D 1979

%A F. Dorr
%T The Direct Solution of the Discrete Poisson Equation on a Rectangle
%J SIAM Rev.
%V 12
%P 248-263
%D 1970
%X Remove?

%A K. W. Doty
%A P. L. McEntire
%A J. G. O'Reilly
%T Task Allocation in a Distributed Computer System
%J Proceedings INFOCOM 82
%I IEEE Computer Society
%D 1982
%P 33-37

%A K. W. Doty
%T Large Regular Interconnection Networks
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 312-317
%K
%O Network Topology

%A Karl W. Doty
%T Dense bus connection networks
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 158-160
%K
node-to-node networks

%A Karl W. Doty
%T New Designs for Dense Processor Interconnection Networks
%J IEEE Transactions on Computers
%V C-33
%N 5
%D May 1984
%P 447-455
%K Chordal rings, diameter, (d,k) graphs, multicomputer systems,
network topology,
Correspondence
%X
Reproduced in the 1984 tutorial: \fIInterconnection Networks for parallel
and distributed processing\fP by Wu and Feng.

%T Magnetic Bubble Memory Architectures for Supporting Associative
Searching of Relational Databases
%A Keith L. Doty
%A Joel D. Greenblatt
%A Stanley Y. W. Su
%J IEEE Transactions on Computers
%V C-29
%N 10
%D October 1980
%P 957-970
%K Associative retrieval, associative search, information retrieval,
magnetic bubbles, major/minor loops, memory architectures, memory-scan,
query, relational database, search time
%O Bubble memories

%A R. J. Douglas
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T The Requirements of a Language for Asynchronous Parallel Image
Processing
%P 147-148
%O

%A R. J. Douglas
%T MAC: A Programming Language for Asynchronous Image Processing
%B Languages and Architectures for Image Processing
%E M. J. B. Duff
%E S. Levialdi
%I Academic Press
%C New York, NY
%D 1981
%P 41-51

%A Robert J. Douglas
%T Computing Occlusion with Locally Connected Networks of Parallel Processes
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 207-219
%K U Va, MAC

%A Robert J. Douglass
%T A qualitative assessment of parallelism in expert systems
%J IEEE Software
%V 2
%N 3
%P 70-81
%D MAY 1985
%K AI,
%X Developers envision expert systems than can make up to one billion
inferences per second.  This will require full utilization of a system's
potential for parallel processing.

%A W. S. Dowey
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T VSP:  Building Blocks for Parallel Processors
%P 151-152
%O

%A H. Robert Downs
%T Real-Time Algorithms and Data Management on ILLIAC IV
%J IEEE Transactions on Computers
%V C-22
%N 8
%D August 1973
%P 773-777
%K Data management, parallel processing, radar signal processing,
real-time processing, surveillance, tracking,
Special issue on parallel computation, parallel algorithms

%A R. D. Dowsing
%T Processor management in a multiprocessor system
%J Electronic Letters
%V 12
%N 24
%D November 1976
%K theoretical results
%X Compares memory management in uniprocessor systems with processor management
in multiprocessor system and shows that many results apply to both cases.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A R. Dressler
%A S. Robertson
%A L. Spradley
%T Effects of Rayleigh Accelerations Applied to an Initially Moving Fluid
%B Materials Processing in the Reduced Gravity Environment of Space
%E G. Rindone
%I Elsevier Science Publishing Co.
%D 1982
%X Remove?

%A Francois Dromard
%A Gerard Noguez
%T Asynchronous network of specific micro-processors
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 120-129
%K
%O Processor organizations

%A J. Drummond
%A E. Weidner
%T Numerical Study of a Scramjet Engine Flow Field
%I AIAA
%V 20
%P 1182-1187
%D 1982
%X Remove?

%A J. Drummond
%T Numerical Study of a Ramjet Dump Combustor Flow Field
%I AIAA
%R No. 83-0421
%D 1983
%X Remove?

%A H. C. Du
%T Concurrent disk accessing for partial match retrieval
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 211-218
%K
U of Minn
%O Non-numeric algorithms

%A H. C. Du
%A J. L. Baer
%T On the performance of interleaved memories with non-uniform access
probabilities
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 429-436
%K
system performance

%A S. Duane
%A M. Green
%T Phase transitions in Lattice RPN-1, CPN-1 and other Grassmann Models
%I Cambridge
%I Queen Mary's College
%J Physics Letters
%V 103B
%P 359
%D 1981

%A O. C. Duarte
%A J. Radureau
%T Interconnection of local area networks through a multipoint
satellite link
%B NETWORKS India 84. International Symposium on Data Communication
and Computer Networks
%C Madras, India
%D Oct. 1984
%P 15-16
%O 0 REFS. Treatment PRACTICAL
%D Oct. 1984
%E H. N. Mahabala
%E K. B. Lakshmanan
%E S. Srinivasan
%I Comput. Soc. India, IFIP, UNESCO
%K local area networks satellite relay systems
local area networks multipoint satellite link
decentralization data communications
LAN NADIR interconnections centralized multipoint data transport service
remote LANs

%A M. Dubois
%A F. Briggs
%T Efficient Interprocessor Communications for MIMD Multiprocessor Systems
%J Proceedings of 8th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 9
%N 3
%D May 1981
%P 187-195

%A M. Dubois
%A F. Briggs
%T Performance of Synchronized Iterative Processes in Multiprocessor Systems
%J IEEE Transactions Software Engineering
%V SE-8
%D 1982
%P 419-431

%A M. Dubois
%A F. A. Briggs
%T Effects of Cache Coherency in Multiprocessors
%J Proceedings of 9th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 10
%N 3
%D April 1982
%P 299-310

%A Michel Dubois
%A Faye A. Briggs
%T An approximate analytical model for asynchronous processes in multiprocessors
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 290-297
%K
blocking (starvation)
%O MIMD processing

%A Michel Dubois
%A Faye A. Briggs
%T Effects of Cache Coherency in Multiprocessors
%J IEEE Transactions on Computers
%V C-31
%N 11
%D November 1982
%P 1083-1099
%K Cache, cache coherence, multicache consistency, multiprocessors,
performance evaluation
Special issue on parallel and distributed processing
%X
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%T A Cache-based Multiprocessor with High Efficiency
%A Michel Dubois
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 646-648
%K Multiprocessor Systems

%A P. Dubois
%A G. Rodrigue
%T An Analysis of the Recursive Doubling Algorithm
%E D. Kuck
%E D. Lawrie
%E A. Sameh
%B High Speed Computer and Algorithm Organization
%I Academic Press
%C New York
%D 1977
%P 299-305

%A P. Dubois
%A G. Rodrigue
%T Operator Splitting on the STAR Without Transposing
%I Lawrence Livermore National Laboratory
%R UCID-17515
%D 1977

%A P. Dubois
%A A. Greenbaum
%A G. Rodrigue
%T Approximating the Inverse of a Matrix for Use in Iterative Algorithms
on Vector Processors
%J Computing
%V 22
%P 257-268
%D 1979

%A Paul F. Dubois
%T Swimming Upstream: Calculating Table Lookups and Piecewise Functions
%E Garry Rodrigue
%B Parallel Computations
%I Academic Press
%D 1982
%P 129-151

%A D. E. Dudgeon
%T Fundamentals of Digital Array Processing
%J Proceedings of the IEEE
%V 65
%N 6
%D June 1977
%P 898-904

%A I. Duff
%T MA28 - A Set of Fortran Subroutines for Sparse Unsymmetric Linear Equations
%I AERE
%R No. R8730
%C Harwell, England
%D 1977
%X Remove?

%A I. Duff
%T The Solution of Sparse Linear Equations on the CRAY-1
%J CRAY Channels
%V 4
%N 3
%D 1982

%A I. Duff
%T The Solution of Sparse Linear Equations on the CRAY-1
%I Cray Research, Inc.
%J Proceedings of a Cray Research Inc. Symposium
%P 17-39
%D 1982

%A I. Duff
%T Experience of Sparse Matrix Codes on the CRAY-1
%J Comp. Phys. Comm.
%V 76
%P 293-302
%D 1982

%A I. Duff
%T The Solution of Sparse Linear Equations on the CRAY-1
%B Proceedings of the NATO Workshop on High Speed Computations
%E J. Kowalik
%S NATO ASI Series
%V F-7
%I Springer-Verlag
%P 293-309
%D 1984

%A M. J. B. Duff
%A S. Levialdi, eds.
%T Languages and Architectures for Image Processing
%I Academic Press
%C New York, NY
%D 1981

%A M. J. B. Duff
%T The Elements of Digital Picture Processing
%E Morio Onoe
%E Kendall Preston, Jr.
%E Azriel Rosenfeld
%B Real-Time/Parallel Computing: Image Analysis
%I Plenum Press
%C New York, NY
%D 1981
%P 1-9
%X Non-floating-point oriented survey of picture processing (short).

%A M. J. B. Duff
%T Parallel Algorithms and Their Influence on the Specification of Application
Problems
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 261-274

%A M. J. B. Duff, ed.
%T Computing Structures for Image Processing
%I Academic Press
%D 1983

%A R. Dugan
%A I. Durham
%A S. Talukdar
%T An Algorithm for Power System Simulation by Parallel Processing
%J Proc. IEEE Power Eng. Soc. Summer Meeting
%D 1979

%A R. P. W. Duin
%T Interactive Image Processing in a Multi-user Environment
%E M. J. B. Duff
%B Computing Structures for Image Processing
%I Academic Press
%D 1983
%P 113-121

%A J. Dulfer
%T 4th generation PBX
%J Gov. Data Syst. (USA)
%V 13
%N 4
%P 82-86, 99
%O 0 REFS. Treatment GENERAL
%D July-Aug. 1984
%K private telephone exchanges local area networks
computer controlled PBX fourth generation private branch exchange data voice
information processing accounting X.25 gateway tending local area networking

%A A. W. G. Duller
%A D. J. Paddon
%T Processor Arrays and The Finite Element Method
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 131-136
%D 1984
%X Commentary on the finite element method without respect to any
special machine.

%A M. Dungworth
%T The CRAY-1 Computer System
%E C. Jesshope
%E R. Hockney
%B Infotech State of the Art Report: Supercomputers
%I Maidenhead: Infotech Int. Ltd.
%V 2
%P 51-76
%D 1979

%A I. Durham
%A R. Dugan
%A A. Jones
%A S. Talukdar
%T Power System Simulation on a Multiprocessor
%J Proc. IEEE Power Eng. Soc. Summer Meeting
%D 1979

%A R. P. Dutton
%T Design of Real-Time Signal Processing Software for Efficient Use of
High-Speed Array Processors in Multitasking Environments
%J Conf. Record IEEE Int'l Conf. Acoustics, Speech and Signal Processing
%D 1979
%P 692-697

%A C. Dwork
%A N. Lynch
%T Consensus in the Presence of Partial Synchrony
%J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing
%I ACM
%D August 1984

%A C. Dwork
%A D. Skeen
%T Patterns of Communication in Consensus Protocols
%J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing
%I ACM
%D August 1984

%A Charles R. Dyer
%T Pyramid Algorithms and Machines
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 409-420

%A W. L. Eastman
%A S. Even
%A I. H. Isaacs
%T Bounds for the Optimal Scheduling of n Jobs on m Processors
%J Management Science
%D November 1964
%P 268-279

%A Eastwood
%A C. R. Jesshope
%T The Solution of Elliptical Partial Difference Equations Using number
Theoretic Transforms with Application to Narrow or Limited Computer
Hardware
%I Univ. of Reading
%D 1977

%A D. Scott Eberhardt
%A Donald Baganoff
%A K. G. Stevens, Jr.
%T Study of the Mapping of the Navier-Stokes Algorithms onto
Multiple-Instruction/Multiple-Data-Stream Computers
%R TM 85945
%I NASA
%D July 1984
%K Navier-stokes equations, MIMD, concurrent processing,
computational fluid dynamics

%A K. Ecker
%T On task scheduling in a multiprocessor environment
%J Micros, Minis, & Maxis, Technology Thrust vs. User Requirement \(em
Digest of Papers \(em COMPCON Fall '77
%C Washington, D.C.
%D September 1977
%P 297-298
%K scheduling
%X Discusses heuristic algorithms for scheduling multiple processors
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Klaus Ecker
%T A Comparison of Approximative Scheduling Algorithms
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 201
%K
%O operating systems
%X Summary only.

%A Klaus Ecker
%T Analysis of a Simple Strategy for Resource Constrained Task Scheduling
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 181-183
%O Scheduling
%X Summary only.

%A E. E. Eddey
%A W. C. Meilander
%T Application of an associative processor to aircraft tracking
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 417-428
%K
%O Parallel processor architectures for air traffic control

%T Quadtrees in Concurrent Prolog
%A Shimon Edelman
%A Ehud Shapiro
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 544-551
%K Logic Programming/Production Systems

%A Donald S. Edgar
%T Matrix Inversion and Iterative Refinement
%I NTIS
%R PB-180037
%D June 1968
%K Gauss-Jordan, Gauss UL decomposition,

%A S. W. Edge
%A A. J. Mayne
%T A Stochastic Model of an End-to-End Packet-Switched Connection
with Optimistic Storage Allocation at the Receiver
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 227-235
%K
%O Performance Analysis

%A G. Pawley Edinburgh
%T Plastic Phase Simulations

%A Jay Edler
%A Allan Gottlieb
%A Clyde P. Kruskal
%A Kevin P. McAuliffe
%A Larry Rudolph
%A Marc Snir
%A Patricia J. Teller
%A James Wilson
%T Issues Related to MIMD Shared-memory Computers: the NYU Ultracomputer
Approach
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K multiprocessors, MIMD, programmability, operating system,
%C Boston, MA
%P 126-135

%A Kemal Efe
%T Heuristic Models of Task Assignment Scheduling in Distributed Systems
%J IEEE Computer
%D June 1982
%V 15
%N 6
%P 50-56

%A G. K. Egan
%T FLO: A decentralised data-flow system
%I University of Manchester
%C England
%D October 1979

%A Margaret H. Eich
%A David L. Wells
%T Database flow graphs
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 266-268
%O databases

%A Steward Einstein
%A John Levesque
%A Gene Wagenbreth
%A George Waller
%T Optimal Utilization of Super Computers, vol. 1, The Control Data 7600
%I R & D Associates
%C Marina del Rey, CA
%D April 1976
%K ILLIAC IV, CDC 7600,
%X An analysis of the CDC 7600 and its pipelining features.

%A S. Eisenstat
%A M. Schultz
%T Trends in Elliptic Problem Solvers
%E M. Schultz
%B Elliptic Problem Solvers
%I Academic Press
%C New York
%D 1981
%P 99-114
%X Remove?

%A O. El-Dessouki
%A others
%T Toward a Partitioning Compiler for a Distributed Computer System
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 296-304
%O Network Language and System Software

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T Distributed Enumeration on network Computers
%A Ossama I. El-Dessouki
%A Wing H. Huen
%P 137-146
%O Searching

%A Ossama I. El-Dessouki
%A Nevin Darwish
%T Distributed Search of Games Trees
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 183-191
%O Parallel algorithms

%T Distributed Enumeration on Between Computers
%A Ossama Ibrahim El-Dessouki
%A Wing H. Huen
%J IEEE Transactions on Computers
%V C-29
%N 9
%D September 1980
%P 818-825
%K Analysis of distributed algorithms, branch and bound, distributed
algorithms, distributed enumeration algorithms, dynamic programming and
integer programming, network computers, NP-complete problems
%O Special issue on Parallel Processing

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T A Demon Language Compiler on a Network for Parallel Control
%A Farid El-Wailly
%A Peter Greene
%A John Putnam
%A Martha Evens
%P 209
%O Synchronization
%X Summary only.

%l journal-article
%A Electronics
%T Altering Computer Architecture is a Way to Raise Throughput Suggests IBM Researchers
%J Electronics
%V 49
%N 25
%P 30-31
%M December 23
%K RISC
%D 1976

%A J. Eliot
%A B. Moss
%T Checkpoint and restart in distributed transaction systems
%B Proceedings Third Symposium on Reliability in Distributed Software
and Database Systems
%C Clearwater Beach, FL, USA
%P 85-89
%I IEEE Comput. Soc. Press
Silver Spring, MD, USA, p: viii+195
%O 12 REFS. Treatment PRACTICAL
%D 17-19 Oct. 1983
%K computer networks distributed processing system failure and recovery
system recovery failure minimisation network reliability
distributed-transaction-systems, failure-recovery-distributed-systems,
nested-transactions
%X A logging, checkpointing, and restart mechanism is described for
failure recovery distributed systems. Moreover, nested transactions
are used to enhance the performance and flexibility of the design
The result is that actions occurring at different sites can be
significantly decoupled while avoiding any domino effect. Further,
unreliability of one site has a limited impact on performance
elsewhere

%T Communicating Sequential Processes for Centralized and Distributed
Operating System Design
%A M. Elizabeth
%A C. Hull
%A R. M. McKeag
%J ACM Transactions on Programming Languages and Systems
%V 6
%N 2
%D April 1984
%P 175-191
%K Design, languages, operating systems, parallel programming, program
design, communicating sequential processes, distributed systems
Categories: C.2.4 [Computer-Communication Networks]:
distributed systems - network operating systems;
D.1.3 [Programming Techniques] concurrent programming;
D.3.3 [Programming Languages]:
Language Constructs - concurrent programming languages; Pascal-plus;
D.4.0 [Operating Systems] General; D.4.1 [Operating Systems]:
process management - concurrency; scheduling; synchronization;

%A M. S. Elizas
%A J. H. Smeenk
%T A Synchronous Approach to Parallel Computer Tasking
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 333-337
%K multi-processors and parallel computers
%X Three LSI-11s synchronized by a PDP-11 connected via busses running
Runge-Kutta code.

%A C. Ellis
%T Concurrent search and insertion in 2-3 trees
%J Acta Informatica
%V 14
%D 1980
%P 63-86

%A C. A. Ellis
%A G. J. Nutt
%T Preliminary thoughts on degrees of security in multiprocessor systems
%R CU-CS-036-74
%I University of Colorado
%C Boulder, Colorado
%D June 1974
%K multiprocessor architectures and operating systems
%X Discusses protection and security issues in a multiprocessing environment
and examines the impact of multiprocessing on problems such as deadlocks,
scheduling, and equitable resource allocation.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A C. S. Ellis
%A J. A. Feldman
%A J. E. Heliotis
%T Language Constructs and Support Systems for Distributed Computing
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 1-9

%A C. S. Ellis
%A R. A. Floyd
%T The Roe file system
%J Proceedings Third Symposium on Reliability in Distributed Software
and Database Systems
%C Clearwater Beach, FL, USA
%P 175-181
%O 23 REFS. Treatment PRACTICAL
%I IEEE Comput. Soc. Press, ISBN: 0-8186-0501-4
Silver Spring, MD, USA, p: viii+195
%D 17-19 Oct. 1983
%K computer networks
Roe file system networkwide file system local network consistency
replicated data transparent reconfiguration file accessibility Roe
%X Roe is a networkwide file system being developed for a heterogeneous
local network. The system has been designed for two purposes: to
serve as a testbed for experimenting with various policies for file
migration and distribution strategies and to provide users with a
logically coherent file system that takes advantage of distributed
and diverse resources. The system is a synthesis of solutions to the
problems of ensuring consistency of replicated data, allowing
transparent reconfiguration, and providing adequate file
accessibility. The authors describe what has been accomplished so far
in the Roe project. They outline the assumed environment, the basic
structure of Roe, and the functions provided. Mechanisms are
presented that allow migration, replication of file objects, and
replication of access information to work together

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T Concurrent Search and Insertion in AVL Trees
%A Carla Schlatter Ellis
%P 250-256
%O Searching

%A Carla Schlatter Ellis
%T Concurrent Search and Insertion in AVL Trees
%J IEEE Transactions on Computers
%V C-29
%N 9
%D Sept. 1980
%P 811-817
%D September 1980
%K Concurrent access, data bases, parallel processing, performance
evaluation, search trees
%O Special issue on Parallel Processing

%A Carla Schlatter Ellis
%T Distributed Data Structures: A Case Study
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Distributed Database Design Concepts, extendible hashing,
%P 201-208

%A J. T. Ellis
%A R. W. Smith
%T ADL/ADS-A tool for describing, constructing, conducting, and Evaluating
DDP Experiments
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 416-421
%K
%O Distributed Testbeds for Real Time Systems

%A K. A. Elmquist
%T Architectural and Design Perspectives in a Modular Multi-Microprocessor,
the DPS-1
%J Proceedings AFIPS National Computer Conference
%D June 1979
%P 587-593

%A T. Elrad
%A N. Francez
%T A weakest precondition semantics for communicating processes
%I Computer Science Department, Technion - Israel Institute of Tech.
%D 1982
%R 244

%A Tzilla Elrad
%T A practical software development for dynamic testing of distributed
programs
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 388-391
%K distributed composition,
%O languages
%X Paper also comes with a distributed sort example

%Q ELXSI
%T ELXSI 6400, EMBOS User's Guide
%V 1
%R Order No. 9510
%D December 1983

%Q ELXSI
%T ELXSI 6400, EMBOS User's Guide
%V 2
%R Order No. 9511
%D December 1983

%Q ELXSI
%T ELXSI 6400, Programmer's Reference Manual
%V 1
%R Order No. 9540
%D March 1983

%Q ELXSI
%T ELXSI 6400, Programmer's Reference Manual
%V 2
%R Order No. 9541
%D March 1983

%A Joel S. Emer
%A Edward S. Davidson
%T Control Store Organization for Multiple Stream Pipelined Processors
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 43-48
%O Pipelined Architectures

%A Perry Emrath
%T Xylem: an operating system for the Cedar multiprocessor
%J IEEE Software
%V 2
%N 4
%P 30-38
%D July 1985
%K DOALL, parallel FORTRAN, scheduling,
issue on complex parallel systems,
%X Based on version 4.2 of Unix, this system is being implemented in an
extended version of C and features systems calls to support multiprocessing
within individual programs.

%A H. Engheli
%A T. Ginsberg
%A H. Ruthishauser
%A E. Stiefel
%T Refined Iterative Methods for Computational of the Solution and
the Eigenvalues of Selfadjoint Boundary Value Problems
%I Mitteilungen aus dem Institut fur Angewandte Mathematik:8,
Birkhauser Verlag
%C Basel, Stuttgart
%D 1959
%X Remove?

%A D. M. England
%T Architectural features of the System 250
%J Proc. Symp. on Operational On-Line Computing for Defense
%C Malvern, England
%D November 1972
%K multiprocessor architectures and operating systems
%X Describes the architecture and software of a multiprocessor system designed
for reliable, real-time operation.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A D. M. England
%T Critical Requirements for Multiprocessor System Design
%J INFO Software
%D 1974

%A D. M. England
%T Software Strategy and Structure in Multiprocessor Systems
%B Multiprocessor Systems
%I Infotech
%D 1976

%A H. Enomoto
%A T. Katayama
%A N. Yonezaki
%A I. Miyamura
%T Image Data Modeling and Language for Parallel Processing
%E Morio Onoe
%E Kendall Preston, Jr.
%E Azriel Rosenfeld
%B Real-Time/Parallel Computing: Image Analysis
%I Plenum Press
%C New York, NY
%D 1981
%P 95-105
%X
The language has no specific name.

%A M. Enselme
%A C. Fraboul
%A P. Leca
%T An MIMD Architecture System for PDE Numerical Simulation
%E R. Vichnevetsky
%E R. Stepleman
%B Advances in Computer Methods for Partial Differential Equations,
Proc. of the Fifth IMACS International Symposium
%V V
%I Lehigh University
%D June 1984
%P 502-509

%A P. H. Enslow, Jr.
%T Multiprocessor Architecture \(em A Survey
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 63-70

%A Philip H. Enslow, Jr.
%T Multiprocessors and Other Parallel Systems: An Introduction and Overview
%E W. Handler
%B Computer Architecture
%P 133-198
%I Springer-Verlag
%D 1976

%A Philip H. Enslow, Jr.
%T Multiprocessor organization \(em A survey
%J Computing Surveys
%V 9
%N 1
%D March 1977
%P 103-129
%K computer system organization, concurrent operations,
interconnection subsystems, multiprocessor operating systems,
multiprocessors, simultaneous operations
CR categories: 1.3, 4.32, 4.35, 6.20
miscellaneous topics in multiprocessing
%X A well-written and oft-quoted survey of multiprocessing.  Describes
a variety of processor-memory interconnection schemes as well as
different operating system structures.
Text reproduced with the permission of Prentice-Hall \(co 1980.
A table of this paper was reproduced in Kuhn and Padua's (1981)
"Tutorial on Parallel Processing."
Reprinted in "Tutorial: Distributed Processing," IEEE,
compiled by Burt H. Liebowitz and John H. Carson, 1981, 3rd edition.

%A Philip H. Enslow, Jr.
%T What is a "distributed" data processing system?
%J IEEE Computer
%V 11
%N 1
%D January 1978
%P 13-21
%Z Georgia Inst. of Technol., Atlanta, GA, USA
%O 13 Refs.
treatment: general,review
%K computer networks
distributed data processing
%X Words have only one purpose in a technical context-the transmission of
information. When they fail to do that, they lead to confusion and
misunderstanding. 'Distributed data processing' and 'distributed
processing' are two phrases which illustrate the axiom. The author hopes to
introduce some precision of technology and evaluation for this new area of
distributed data processing.
%X Not as detailed at Enslow's Computing Surveys paper.  It does talk about
transparency and autonomy.
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A Philip H. Enslow, Jr.
%A N. J. Livesey
%A Richard J. LeBlanc
%A Martin S. McKendry
%T Software Support for Fully Distributed/Loosely Coupled Processing
Systems
%R RADC-TR-83-238
%V I
%I Rome Air Development Center
%D January 1984
%C Griffiss Air Force Base, NY 13441
%K Distributed system support capabilities, fully distributed/loosely
coupled processing systems, software development tools

%T Software Support for Fully Distributed/Loosely Coupled Processing
Systems - Appendix - Selected Papers
%A Philip H. Enslow, Jr.
%A N. J. Livesey
%A Richard J. LeBlanc
%A Martin S. McKendry
%R RADC-TR-83-238
%V II
%I Rome Air Development Center
%D January 1984
%C Griffiss Air Force Base, NY 13441
%K Distributed system support capabilities, fully distributed/loosely
coupled processing systems, software development tools

%A Ronald S. Entner
%T The Advanced Avionic Digital Computer
%E L. C. Hobbs
%E D. J. Theis
%E Joel Trimble
%E Harold Titus
%E Ivar Highberg
%B Parallel Processor Systems, Technologies and Applications
%I Spartan Books
%C New York, New York
%D 1970
%P 203-214
%K Architecture, AADC,
System and machine organization

%A M. D. Ercegovac
%A A. L. Grnarov
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T On the Performance of On-Line Arithmetic
%P 55-64
%O Architecture

%A M. D. Ercgovac
%A W. J. Karplus
%T On a Dataflow Approach in High-Speed Simulation of Continuous Systems
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 2.1-2.8
%O Architecture dependent computation
%K Functional programming

%A M. D. Ercgovac
%A P. W. Chan
%A T. M. Ravi
%T A Data Flow Multimicroprocessor Architecture for High-Speed
Simulation of Continuous Systems
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 2.9-2.17
%O Architecture dependent computation
%K Functional programming
%X Funded by the NASA Lewis RC.

%A Werner Erhard
%T ICL-DAP mit asynchroner Ein-/Ausgabe zur Losung groBer Gleichungssysteme
und zur Invertierung groBer Matrizen
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 137-142
%D 1984
%X In the original German.  A description of the DAP and its programming
for two problems: matrix inversion and relaxation problems.

%A J. Erhel
%A A. Lichnewsky
%A F. Thomasett
%T Parallelism in Finite Element Computations
%J IBM Symposium on Vector Computers and Scientific Computing
%C Rome
%D 1982

%A J. Erhel
%T Parallelisation d'an Algorithme de gradient Conjuge Preconditionne
%I INRIA
%R No. 189
%D 1983

%A J. Erhel
%A W. Jalby
%A A. Lichnewsky
%A F. Thomasett
%T Quelques Progress en Calcul Parallele et Vectoriel
%J Coll. Inf. ser des Methodes de Calcul Scientifique et Technique
%D 1983

%A Jocelyne Erhel
%A Alain Lichnewski
%A Francois Thomasset
%T Some Algorithms for Vector or Parallel Computers
%J Physica: Europhysics Journal, Mathematical Physics, Proc. VIIth
International Congress on Mathematical Physics
%V 124A
%N 1-3
%D March 1984
%X Paper on preconditioned conjugate gradient method.

%A J. Ericksen
%T Iterative and Direct Methods for Solving Poisson's Equation and Their
Adaptability to ILLIAC IV
%I University of Illinois at Urbana - Champaign
%R Center for Advanced Computation Document No. 60
%D 1972

%A J. Ericksen
%A R. Wilhelmson
%T Implementation of a Convective Problem Requiring Auxiliary Storage
%J ACM Transactions on Mathematical Software
%V 2
%P 187-195
%D 1976
%X Remove?

%A D. B. Erickson
%T Array Processing on an Array Processor
%J SIGPLAN Notices
%V 10
%N 3
%P 17-24
%D March 1975

%A L. W. Ericson
%T DPL-82: A language for distributed processing
%J 3rd International Conference on Distributed Computing Systems
%i Computer Science Department, Carnegie Mellon University
%r CMU-CS-82-129
%C Miami, FL
%D October 1982
%I IEEE
%P 526-531
%K
%O High Level Languages for Distributed Processing

%A T. Ericsson
%A P. E. Danielson
%T LIPP \(em A SIMD Multiprocessor Architecture for Image Processing
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%D 1983
%V 11
%N 3
%P 395-400
%O architectures for image processing

%A L. Erikio
%A J. Heimonen
%A P. Hietala
%A R. Kurki-Suonio
%T PLEXUS II \(em A data flow system
%R Tech Rept. A43
%I Dept. Mathematical Sciences, Univ. of Tampere
%C Finland
%D April 1980

%A L. D. Erman
%A V. R. Lesser
%T The Hearsay-II System: A Tutorial
%E W. A. Lea
%B Trends in Speech Recognition
%I Prentice-Hall
%D 1979

%A Lee D. Erman
%A Victor R. Lesser
%T A multi-level organization for problem solving using many diverse
cooperating sources of knowledge
%J IJCAI-75
%P 483-490

%A Lee D. Erman
%A Frederick Hayes-Roth
%A Victor R. Lesser
%A D. Raj Reddy
%T The Hearsay-II speech understanding system: Integrating knowledge
to resolve uncertainty
%J Computing Surveys
%V 12
%N 2
%P 213-253
%P June 1980

%A Lee D. Erman
%A Richard D. Fennell
%A Victor R. Lesser
%A D. Raj Reddy
%T System Organizations for Speech Understanding: Implications of Network
and Multiprocessor Computer Architectures for AI
%J IEEE Transactions on Computers
%V C-25
%N 4
%D April 1976
%P 414-421
%K Hardware for AI, multiprocessors, networks, parallel processing,
real-time systems, software for AI, speech recognition, speech
understanding, system organization
Special issue on artificial intelligence, multiprocessor applications
%X Discusses the implementation of a speech understanding system on multi-
processors and on network architectures.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Renato M. Ermann
%A William I. Grosky
%T Some computational and system theoretic properties of regular
processor networks
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 230-234
%K
%O Fundamental theory

%T Semisystolic Array Implementation of Circular, Skew Circular, and
Linear Convolutions
%A Okan Ersoy
%J IEEE Transactions on Computers
%V C-34
%N 2
%D February 1985
%P 190-196
%K Convolution, FFT algorithms, parallel processing, semisystolic arrays,
Toeplitz forms, VLSI
%O Correspondence

%A J. D. Erwin
%A E. D. Jensen
%T Interrupt Processing with Queued Content Addressable Memories
%J Proceedings AFIPS Fall Joint Computer Conference
%D 1972
%P 621-627

%A P. Estraillier
%A C. Girault
%T Petri Net Specification of a New Protocol for Controlling a
Distributed System Organization
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 654-659
%K
%O Communication Protocol Modeling

%A G. Estrin
%A B. Bussell
%A R. Turn
%A J. Bibb
%T Parallel Processing in a Restructurable Computer System
%J IEEE Transactions on Electronic Computers
%V EC-12
%N 5
%D December 1963
%P 747-755

%A K.P. Eswaran
%A J.N. Gray
%A R.A. Lorie
%A I.L. Traiger
%T The notions of consistency and predicate locks in a database system
%J CACM
%V 19
%D Nov. 1976
%P 624-633

%A C. D. Ethridge
%A J. W. Moore
%A V. A. Trujillo
%T Experimental Parallel Microprocessor System
%R LA-UR 83-1676
%I Los Alamos National Laboratory \"submited to Interfaces in
%C Los Alamos, NM
%D 1983 \"Computing, D Horelick @ su editor

%A D. Evans
%A N. Yousif
%T Asynchronous and Synchronous Iterative Methods for Solving Linear
Equations
%X To appear

%A D. Evans
%T On the Numerical Solution of Sparse Systems of Finite Element Equations
%B The Mathematics of Finite Elements & Applications III, Mafelap 1978
Conference Proceedings
%E J. R. Whiteman
%I Academic Press
%C New York, NY
%D 1979
%P 448-458
%X Remove?

%A D. Evans
%A M. Hatzopolous
%T A Parallel Linear Systems Solver
%J Int. J. Comput. Math
%V 7
%P 227-238
%D 1979

%A D. Evans
%A A. Hadjidimos
%T A Modification of the Quadrant Interlocking Factorisation Parallel
Method
%J Int. J. Comput. Math.
%V 8
%P 149-166
%D 1980

%A D. Evans
%A A. Hadjidimos
%A D. Noutsos
%T The Parallel Solution of Banded Linear Equations by the New Quadrant
Interlocking Factorisation (Q.I.F.) Method
%J Int. J. Comput. Math.
%V 9
%P 151-162
%D 1981

%A D. Evans
%A S. Okolie
%T A Recursive Decoupling Algorithm for Solving Banded Linear Systems
%J Int. J. Comput. Math.
%V 10
%P 139-152
%D 1981
%X Remove?

%A D. Evans
%A R. Sojoodi-Haghighi
%T Parallel Iterative Methods for Solving Linear Equations
%J Int. J. Comput. Math.
%V 11
%P 247-284
%D 1982

%A D. Evans
%T New Parallel Algorithms in Linear Algebra
%J EDF - Bulletin de la Direction Des Estudes et des Researches - Ser C
%N 1
%P 61-69
%D 1983

%A D. Evans
%A R. Dunbar
%T The Parallel Solution of Triangular Systems of Equations
%J IEEE Transactions on Computers
%V C-32
%D 1983
%P 201-204

%A D. J. Evans
%T Problem Formulation Using Array Processing Techniques
%J SIGPLAN Notices
%V 10
%N 3
%D March 1975
%P 153-163

%A D. J. Evans
%A S. A. Williams
%T The Optimisation of Parallel Programs
%I Loughborough University
%J IUCC Bulletin
%V 1
%P 87
%D 1979

%A D. J. Evans, ed.
%T Parallel Processing Systems
%I Cambridge University Press
%D 1982

%A D. J. Evans
%A J. Shanehchi
%A R. H. Barlow
%T Implementation of the Conjugate Gradient and Lanczos Algorithms for
Large Sparse Banded Matrices on the ICL-DAP
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 143-151
%D 1984

%A D. J. Evans
%T Parallel S.O.R. Iterative Methods
%J Parallel Computing
%V 1
%N 1
%D August 1984
%P 3-18
%K Explicit group S.O.R. methods, red-black ordering, asynchronous MIMD
computer system, performance analysis

%A David J. Evans
%T New Parallel Algorithms for Partial Differential Equations
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 3-56
%D 1984
%K Parabolic solvers, two time-level finite difference approximation,
error analysis, stability analysis, group explicit method (new GER),
alternating group explicit ([SD](AGE)) methods, elliptic problems,
block solvers, Jacobi,

%A A. Evansen
%T PEPE Hardware and system overview
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 185
%K
%O Parallel array processors

%A Shimon Even
%T Parallelism in tape sorting
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 55-59
%K
%O Parallel processing techniques

%A M. W. Evens
%T Compilers for Distributed Systems
%J Computer Software and Applications Conference (COMPSAC79)
%I IEEE
%D November 1979
%P 436-440
%O distributed systems

%A Alf J. Evensen
%A James L. Troy
%T Introduction to the architecture of a 288-element PEPE
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 162-169
%K
%O PEPE

%T Making Oneself Known in a Distributed World
%A Ahmed K. Ezzat
%A Rakesh Agrawal
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 139-142
%K Operating System Problems

%A V. Faber
%T Block Relaxation Strategies
%E M. Schultz
%B Elliptic Problem Solvers
%I Academic Press
%C New York
%P 271-275
%D 1981
%X Remove?

%A R. S. Fabry
%T Capability-based addressing
%J Comm. ACM
%V 17
%N 7
%D July 1974
%P 403-411

%A E. Faddon
%T The AD-10: a Digital Computer Approach to Time Critical Simulation
%J Proc. 4th Power Plant Dynamics, Control, and Testing Symposium
%D 1980
%X Remove?

%A V. Fadeeva
%A D. Fadeeva
%T Parallel Computations in Linear Algebra
%J Kibernetica
%N 6
%P 28-40
%D 1977

%A Scott E. Fahlman
%T Representing and Using Real-World Knowledge
%B Artificial Intelligence: An MIT Perspective
%I MIT Press
%D 1979
%V Volume 1
%X Check this

%A L. Fahrmeir
%T Parallel Estimation Algorithms for Stochastic Parameters of the Time
Series Models
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 99-102
%K Kalman filtering,
parallel algorithms,

%A D. G. Fairbairn
%T VLSI: a new frontier for systems designers
%J Computer
%V 15
%N 1
%D Jan. 1982
%P 87-96

%A G. Falk
%A J. M. McQuillan
%T Issues in sizing store and forward communication switches
%J Proceedings of Computer Networking Symposium
%C Gaithersburg, MD, USA
%D 15 Dec. 1977
%P 97-103
%O 8 REFS. Treatment Practical
%I IEEE. New York, USA, 1977, 129
%K computer networks switching systems
store and forward communication switches sizing throughput methodology
I/O requirements communication protocol design processing requirements
memory requirements

%A B. W. Fam
%A J. K. Millen
%T The channel assignment problem
%J Proceedings of the 1983 Symposium on Security and Privacy
%C Oakland, CA, USA
%I IEEE
Comput. Soc. Press, Silver Spring, MD, USA, P: viii+163, ISBN: 0-8186-0467-0
%D 25-27 April 1983.
%P 109-112
%O 3 Refs
Treatment THEORETICAL/MATHEMATICAL.
%K computer networks optimisation security of data.
channel assignment problem optimization problem local area network security
NP complete problem set basis problem polynomial time
%X An optimization problem in the context of local area network security
is considered. The network provides a number of physical or logical
channels, each carrying a set of levels or compartments of
information. A channel is accessible to users cleared for all the
levels it carries. The problem is to assign the set of levels to be
carried by each channel so as to minimize the total number of
channels, under the constraint that each pair of users with a level
in common can communicate over some channel. This problem was found
to be equivalent to a known NP-complete problem, the set basis
problem. The main result is an approximate algorithm that runs in
polynomial time and finds one solution. It has succeeded in finding
an optimal solution in all of the test cases small enough to confirm
the optimality independently.

%A Bahaa W. Fam
%T A parallel/pipeline processor for fast exponentiation
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 316-318
%K
%O Special purpose processors

%A D. J. Farber
%A K. Larson
%T The structure of a distributed computer system-communications
%J 22nd international symposium on computer-communications networks and
teletraffic
%D 4-6 Apr 1972
%C New York, USA
%I Polytechnic Inst. Brooklyn, New York, USA, x+54 pp.
%O treatment: applic, practical
%K digital communication systems computer interfaces
distributed parameter systems distributed computer system communications
experimental computer network digital communications ring
fixed message lengths ring interface retransmission sequencing messages
error detection and maintenance hardware innovation
%X The distributed computing system (dcs) is an experimental computer
network under study at the university of california at irvine. The
structure is a digital communications ring using t1 technology and fixed
message lengths. The computers used are small to medium scale and are
interfaced to the ring using a fairly sophisticated piece of hardware
called a ring interface (ri). There are two features which make the
communications protocols unique. First, messages are addressed to
processes, not processors. Second, messages are only removed at the ri from
which they originate. To transmit a message the ri waits for an empty slot
and places the message on the ring. The message is copied when necessary as
it proceeds around the ring and checked against the original when it
returns to the originating ri where it is removed from the ring. If errors
are detected or the message fails to return in a specific amount of time
the message is retransmitted. The retransmission causes problems since ri's
may receive multiple copies of the message. The paper describes a scheme
for sequencing messages which removes these problems. The paper also
discusses the error detection and maintenance features. The paper also
describes the hardware innovations used in the implementation of this
system, some design ideas, and expected costs.

%A D. J. Farber
%A K. C. Larson
%T The System Architecture of the Distributed Computer System \(em The
Communications System
%J Proceedings Symposium on Computer-Communications Networks and
Teletraffic
%D April 1972

%A D. J. Farber
%T Networks: An introduction
%J Datamation (USA)
%V 18
%N 4
%P 36-39
%D April 1972
%O Treatment General
%K digital communication systems
computer networks overview problems data conversion
rigidity protocols
%X Dated rag.
Reproduced in Computer Commun., Green,P.E., and Lucky,R.W.
(Eds.), (1975), 555-558).

%A D. J. Farber
%A K. C. Larson
%T The Structure of a Distributed Computing System
%J Proceedings of the Symposium on Computer-Communications Networks and
Teletraffic
%I Potytechnic Press
%D April 1972
%P 539-545

%A D. J. Farber
%A J. Feldman
%A F. R. Heinrich
%A M. D. Hopwood
%A C. Larson
%T The distributed computing system
%J Digest of papers from the 7th annual IEEE computer society international
conference
%P 31-34
%D 27 Feb. -1 March 1973
%C San Francisco, Calif., USA
%I IEEE, New York, USA
xviii+246 pp pp.
%O 8 refs
treatment: practical
%K data communication systems reliability
distributed computing system hardware software system control
network architecture reliability
%X The distributed computing system is an information utility designed to
provide reliable, fail-soft service at relatively low cost to a large class
of users with modest requirements. The salient feature of this system is
the distribution of hardware, software, and system control. Hardware
distribution is achieved using a network architecture. Software and control
distribution is facilitated through the use of communication by name,
rather than address, among the network components. The combined effect of
distribution, which provides both redundancy and isolation, and of
controlled access, makes total failure of the computing system unlikely.
Reliability is achieved by minimizing the probability of total failure,
using isolation to keep local failures from spreading and causing global
failure, and using redundancy to negate the effects of local failures.

%T The design of the distributed computer system
%A D. J. Farber
%J Bull. Sci. Assoc. Ing. Electr. Inst. Electrotech. Montefiore
(Belgium)
%V 88
%N 2
%P 161-163
%O 9 REFS. Treatment GENERAL
%D April-June 1975
%K computer networks design engineering
design distributed computer system processors reliability
communications protocol system software hardware distribution failure detection

%A D. J. Farber
%A K. C. Larson
%T A prototype implementation of a protocol for network security
%B Trends and Applications 1976: Computer Networks
%C Gaithersburg, Md., USA
%D 17 Nov. 1976
%P 33-36
%O 2 REFS. Treatment Practical
%I IEEE. New York, USA, 1976, v+186
%E IEEE, Nat. Bur. Standards, et al
%K computer networks
protocol network security prototype system Distribution Computer System
ring interface

%A W. O. Farmer
%A E. E. Newhall
%T An Experimental Distributed Switching System to Handle Bursty Computer
Traffic
%J Proceedings ACM Symposium on Problems in the Optimization of Data
Communications
%D October 1969

%A P. Farmwald
%T The S-1 Mark IIA Supercomputer
%B Proceedings of the NATO Workshop on High Speed Computations
%E J. Kowalik
%S NATO ASI Series
%V F-7
%I Springer-Verlag
%P 145-155
%D 1984

%A A. Faro
%A C. Messina
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Parallel Processing in Computer Communications
%P 294-296
%O

%A Edward P. Farrell
%A Noordin Ghani
%A Philip C. Treleaven
%T A Concurrent Computer Architecture and a Ring Based Implementation
%J Proceedings 6th Annual Symposium on Computer Architecture
%D April 1979
%P 1-11

%A Rodney Farrow
%T Attribute Grammars and Data-Flow Languages
%J Proceedings of the SIGPLAN '83 Symposium on Programming Language Issues
in Software Systems, SIGPLAN NOTICES
%C San Francisco, CA
%V 18
%N 6
%D June 1983
%P 28-40
%K Dataflow, semantics, coroutines, functional programming

%A R. J. Fateman
%T High-level language implications of the proposed IEEE floating-point
standard
%J ACM Trans. on Programming Languages and Systems
%V 4
%N 2
%D April 1982
%P 239-257

%A E. T. Fathi
%A M. Krieger
%T Multiple microprocessors systems: what why, and when
%J Computer
%V 16
%N 3
%D Mar. 1983
%P 23-32

%T Working with OCCAM: A Program for Generating Display Images
%A D. Fay
%J Microprocess. and Microsyst. (GB)
%V 8
%D Jan.-Feb. 1984
%P 3-15

%A G. Feierbach
%A D. Stevenson
%T The ILLIAC IV
%E C. Jesshope
%E R. Hockney
%B Infotech State of the Art Report: Supercomputers
%I Maidenhead: Infotech Int. Ltd.
%V 2
%P 77-92
%D 1979

%A Gary Feierbach
%T On Processing Element Power in an SIMD Architecture
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 160-165
%K NASA ARC (IAC), ILLIAC IV,
%O SIMD Architectures
%X Analyzes the factors in determining the size and cost of individual
processing elements (units).  Does not analyze the bit-serial architectures
for image processing such as the MPP and DAP.  Indicates PEs in the mid-1980s
should have 10 MFLOPS power a piece.

%A B. Feijoo
%A R. R. Meyer
%T Optimization on the Crystal Multicomputer
%I University of Wisconsin
%C Madison, WI
%R Computer Sciences Technical Report #562
%D October 1984
%K Charlotte

%A M. Feilmeier, ed.
%T Parallel Computers, Parallel Mathematics
%I North-Holland
%D 1977
%X Proceedings of the IMACS Intl. Assoc. for Math. and Computers in
Simulation) Symposium in Munich, March 1977.

%A M. Feilmeier
%A G. Segerer
%T Numerical Stability in Parallel Evaluation of Arithmetic Expressions
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 107-112
%K parsing,
parallel algorithms
%X A further exposition of the ideas of Winograd's JACM "Parallel Evaluation"
paper 75.

%A M. Feilmeier
%T Parallel numerical algorithms
%E D. J. Evans
%B Parallel Processing Systems
%I Cambridge University Press
%D 1982
%P 285-338

%A M. Feilmeier
%A G. Joubert
%A U. Schnedel, (eds.)
%T Parallel Computing 83
%I North-Holland
%D 1984
%X The Berlin Conference of 1983.

%A M. Feilmeier
%A G. Joubert
%A U. Schendel, (Ed.)
%T Parallel Computing 83: Proceedings of the International Conference on
Parallel Computing
%C North Holland, NY
%D 1984

%A J. A. Feldman
%A P. D. Rovner
%T An Algol-based Associative Language
%J Comm. ACM
%V 12
%P 439-449
%D August 1969

%A J. A. Feldman
%A L. C. Fulmer
%T RADCAP \(em An Operational Parallel Processing Facility
%J Proc. NCC Conf.
%P 7-15
%I AFIPS Press
%D 1974

%A J. A. Feldman
%A J. R. Low
%A P. D. Rovner
%T Programming Distributed Systems
%J Proc. ACM 1978 Ann. Conf.
%P 310-316
%I ACM
%D 1978

%A James D. Feldman
%A Oskar A. Reimann
%T RADCAP: an operational parallel processing facility
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 140-146
%K
%O RADCAP

%A Jerome A. Feldman
%T High level programming for distributed computing
%J Communications of the ACM
%V 22
%N 6
%P 353-368
%D June 1979
%K distributed computing, modules, messages, assertions,
CR categories: 4.22, 4.32
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A C. Felippa
%T Architecture of a Distributed Analysis Network for Computational
Mechanics
%J Computers and Structures
%V 13
%P 405-413
%D 1981
%X Remove?

%A Edward Felten
%A Scott Karlin
%A Steve Otto
%T Sorting on the NNCP
%R Hm92
%I California Institute of Technology
%C Pasadena, CA
%D 1984
%K Caltech Cosmic Cube, hypercube, C^3P, bitonic sort

%T The Traveling Salesman Problem on a Hypercubic, MIMD Computer
%A Edward Felten
%A Scott Karlin
%A Steve W. Otto
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 6-10
%K Parallel Algorithms

%A T. Fend
%A C. P. Hsieh
%T Operating system modelled as a conglomerate of interdependent
activities
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 304-311
%K
%O Scheduling

%A T. Feng
%T A survey of interconnection networks
%J Computer
%V 14
%N 12
%D December 1981
%P 12-27
%X
Reproduced in the 1984 tutorial: "Interconnection Networks for parallel
and distributed processing" by Wu and Feng.

%A T.-Y. Feng
%A C.-L. Wu
%A D. P. Agrawal
%T A Microprocessor-Controlled Asynchronous Circuit Switching Network
%J Proceedings of the 6th Annual Symposium on Computer Architecture
%I IEEE
%D 1979
%P 202-215

%A T. Y. Feng
%T Search Algorithms for Associative Memories
%J Proceedings Fourth Annual Princeton Conference on Information  Sciences
and Systems
%C Princeton, New Jersey
%D March, 1970
%P 442-446

%A T. Y. Feng, ed.
%J Proceedings 1972 Sagamore Computer Conference on RADCAP and its
Applications
%D August 1972
%P 226

%A Tse-yun Feng
%T A versatile data manipulator
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 101
%K
%O Processor components
%X Short summary.

%A Tse-Yun Feng
%T Data Manipulating Functions in Parallel Processing and Their
Implementation
%J IEEE Transactions on Computers
%V C-23
%N 3
%P 309-318
%D March 1974
%K Cell communications, data manipulating functions, data manipulator,
logic design, parallel processing, parallel processor organization,
processing characteristics,
Parallel processing
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."
Also, reproduced in the 1984 tutorial: "Interconnection Networks for parallel
and distributed processing" by Wu and Feng.

%A Tse-Yun Feng
%A Chuan-Lin Wu
%T Fault-Diagnosis for a Class of Multistage Interconnection Networks
%J IEEE Transactions on Computers
%V C-30
%N 10
%D October 1981
%P 743-758
%K Baseline network, fault detection and location, fault model,
multiple faults, multistage interconnection networks, parallel processing,
single fault
%X
Reproduced in the 1984 tutorial: \fI Interconnection Networks for parallel
and distributed processing\fP by Wu and Feng.

%A Tse-yun Feng
%A I-pieng Kao
%T On fault-diagnosis of some multistage networks
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 99-101
%K n log n networks
OhSU
%O Network diagnosis and fault tolerance

%T An O(log2N) Control Algorithm
%A Tse-yun Feng
%A Wei Young
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 334-340
%K Interconnection Networks

%A Tse-yun Feng
%A Wei Young
%T Existence and Optimization of Rearrangeable Networks
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Distributed Programming, Benes networks, omega networks,
%P 167-172

%A Tse-yun Feng
%A Qirui Zhang
%T Fault Diagnosis of Multistage Interconnection Networks with Four Valid
States
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Fault-Tolerant interconnection, Banyan networks,
%P 218-226

%A Richard D. Fennell
%A Victor R. Lesser
%T Parallelism in AI Problem Solving: A Case Study of HEARSAY II
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 214-216
%K
%O Image processing
%X Summary only.

%A Richard D. Fennell
%A Victor R. Lesser
%T Parallelism in artificial intelligence problem solving: A case study
of Hearsay-II
%T IEEE Transactions on Computers
%V C-26
%N 2
%P 98-111
%D February 1977
%K Artificial intelligence (AI) problem solving, data-directed control,
multiprocessors, parallelism, speech understanding, synchronization,
system organization,
CMU,
%O Applications, special issue on parallel processors and processing
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%A John Feo
%A Roy Jenevein
%A J. C. Browne
%T Dynamic, Distributed Resource Configuration on SW-Banyans
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K Multiprocessor Issues
%C Boston, MA
%P 268-275

%A A. M. Feridun
%A K. G. Shin
%T A Fault-Tolerant Multiprocessor System with Rollback Recovery
Capabilities
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 283-298
%K
%O Security and Reliability

%A E. B. Fernandez
%A T. Lang
%T Computation of lower bounds for multiprocessor schedules
%J IBM Journ. of Research and Development
%V 19
%N 5
%D September 1975
%P 435-444
%K scheduling
%X Presents computationally efficient techniques for calculating lower bounds
on the number of processors needed to complete a set of tasks within a given
time, and on the minimum execution time using a fixed number of processors.
The analysis assumes non-preemptive scheduling identical processors, and
a set of tasks with precedence constraints.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Eduardo B. Fernandez
%A Bertram Bussell
%T Bounds on the Number of Processors and Time for Multiprocessor Optimal
Schedules
%J IEEE Transactions on Computers
%V C-22
%N 8
%D August 1973
%P 745-751
%K Multiprocessing, optimal scheduling, parallel processing,
weighted directed graphs,
Special issue on parallel computation, queueing and scheduling

%A S. Fernbach
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Parallelism in Computing
%P 1-4
%O History of Parallel Processing

%A Sidney Fernbach
%T Application of Supercomputers in the U.S. -- Today and Tomorrow
%J Proceedings of the Symposium on Supercomputer Architecture
%C Tokyo
%D October 1981
%X Contains interesting table of numbers on Class IV, V, and VI machines.
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%A Sidney Fernbach
%T Supercomputers - Past, Present, Prospects
%J FGCS - Future Generations Computer Systems
%I North-Holland
%V 1
%N 1
%D July 1984
%P 23-30

%A Christer Fernstrom
%T Programming techniques on the LUCAS associative array computer
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 253-261
%K
Sweden, LUCAS (Lund University Content Addressable System), SIMD, Pascal/L
%O Array processors

%A D. Ferrari
%A E. Gelenbe
%A R. Mahl
%T An analytic study of memory allocation in multiprocessor systems
%J Proc. Conf. on Computer Architecture and Networks
%C Rocquencourt, France
%D August 1974
%K performance
%X Discusses analytical techniques for optimally partitioning main memory
among processes running in a multiprocessor environment and outlines the
issues involved in appling these ideas to a practical situation.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A D. Ferrari
%T Characterizing a workload for the comparison of interactive services
%B Proc. Nat. Computer Conf.
%I AFIPS Press
%C Montvale, New Jersey
%D 1979
%P 789-796

%A D. Ferrari
%A T. Y. P. Lee
%T Modeling file system organizations in a local area network
environment
%B International Conference on Data Engineering
%C Los Angeles, CA, USA
%P 517-524
%O 11 REFS
Treatment PRACTICAL
%I IEEE Comput. Soc. Press, Silver Spring, MD, USA, p: xiii+630
ISBN: 0-8186-0533-2
%D 24-27 April 1984
%K file organisation graph theory local area networks queueing theory
file system organizations local area network workload
business transaction systems
file distribution graph models queuing network models
%X A modeling methodology for the design of file system organizations in
a local area network environment is presented. A measurable
characterization for the workload of typical business transaction
systems is proposed and then used to derive input parameters for the
file distribution graph models and the queuing network models that
represent two completely different file system organizations, i.e. a
file server-based file system and a distributed file system. Total
system throughput and mean system response time are the indices used
in comparing these two design approaches. An example of this
comparison is given. It is shown that this methodology and these
models are useful tools for the evaluation of certain design
tradeoffs

%A A. Ferravanta
%A M. Martelli
%A F. Tarini
%A P. Zini
%T Virtual Memory Service in Local Area Network
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 218-225
%K
%O Network Operating Systems

%A R. C. Ferreira
%A D. Vojnovic
%T Multiminicomputers: A perspective on the next five years
%B Future Systems, State of the Art Report
%I Infotech, Ltd.
%C Maidenhead, England
%K miscellaneous topics in multiprocessing
%X Predicts the future of multiprocessors that are built with minicomputers
e.g., C.mmp.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Edward A. Feustel
%T On The Advantages of Tagged Architecture
%J IEEE Transactions on Computers
%V C-22
%N 7
%D July 1973
%P 644-656
%K Computer architecture, data representation, firmware,
hardware-software tradeoffs, Computer systems

%A J. M. Feuvre
%T Satellite communication and distributed database systems
%B NETWORKS India 84. International Symposium on Data Communication
and Computer Networks
%C Madras, India 19-21
%D Oct. 1984
%P 149-156
%O 29 REFS., Treatment PRACTICAL
%E H. N. Mahabala
%E K. B. Lakshmanan
%E S. Srinivasan
%I Comput. Soc. India, IFIP, UNESCO
%O Treatment PRACTICAL
%K satellite relay systems computer networks distributed processing
database management systems
distributed database systems satellite communication DDBS terrestrial networks
high transmission speed wide geographical coverage broadcasting facilities
propagation delay message exchanges data transfers
%X Presents the impact of satellite communication on distributed
database systems (DDBS). Compared with terrestrial networks, these
satellite networks offer different characteristics: high
transmission speed, wide geographical coverage, broadcasting
facilities and long propagation delay. The author studies the
consequences of these characteristics on the algorithms usually used
in a DDBS. These algorithms have to be adapted for two reasons:
firstly to minimize the communication cost caused by long
propagation delay, and secondly to take advantage of the
broadcasting facility and high transmission speed. The author also
points out some specific distributed applications for which
permanent communication links are not indispensable. These
applications take the best advantage of satellite links by reducing
the message exchanges and by batching their requests in infrequent
and massive data transfers

%A Jean-Michel Feuvre
%T Concurrency Control Mechanism for a Fault Tolerant Distributed Database
System
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Distributed Concurrency Control
%P 246-253

%T Polymorphic Arrays: An Architecture for a Programmable Systolic
Machine
%A Amos Fiat
%A Adi Shamir
%A Ehud Shapiro
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 112-117
%K Systolic Systems

%A Faith E. Fich
%A Martin Tompa
%T The Parallel Complexity of Exponentiating over Finite Fields
%R 85-03-01
%D 1985

%A Wolfgang Fichtner
%A Laurence W. Nagel
%A B. Reddy Penumalli
%A Wesley P. Peterson
%A John L. D'Arcy
%T The Impact of Supercomputers on IC Technology Development and Design
%J Proceedings of the IEEE
%V 72
%N 1
%K Special issue -- Supercomputers - Their Impact on Science and Technology
%P 96-112
%D January 1984

%T Self-Clocking Networks
%A A. J. Field
%A M. D. Cripps
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 384-387
%K Interconnection Networks

%A J. Field
%A A. Kapauan
%A L. Snyder
%T Pringle: A Parallel Processor to Emulate Chip Computers
%I Purdue University
%R Computer Science Dept. Report No. CSD-TR-433
%D 1983

%A J. A. Field
%A A. N. El Naga
%T A Pipelined Direct Execution High Level Language Machine
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 49-5l
%O Pipelined Architectures

%A R. J. Filene
%A A. I. Green
%T A simple executive for a fault-tolerant real-time multiprocessor
%J Hardware, Software, Firmware and Tradeoffs \(em Digest of Papers
\(em COMPCON Fall 71
%C Boston, Massachusetts
%D September 1971
%K multiprocessor architectures and operating systems
%X An operating system intended for a fault-tolerant multiprocessor in a
real-time environment is described.  Architectural features to support such
an operating system are discussed.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A A. E. Filip
%T A distributed signal processing architecture
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 49-55
%K
%O Microprocessor architectures

%A Robert E. Filman
%A Daniel P. Friedman
%T Model, Languages, and Heuristics for Distributed Computing
%J National Computer Conference \(em Proceedings
%I AFIPS
%V 51
%D 1982
%P 671-677
%X Reasonable survey of various distributed software systems.

%A J. P. Finance
%A M. S. Ouerghi
%T On the algebraic specification of concurrency and communication
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 281-288
%K concurrency, communication, algebraic abstract data type, semantics,
serial time
CSPD
expressing parallelism

%A D. Fincham
%T Questions and answers about molecular dynamics on the DAP
%I MD & MC Simulations
%J CCPS Newsletters

%A D. Fincham
%T Algorithms for rotational dynamics of rigid molecules
%I Queen Mary College
%D 1982

%A David Fincham
%T Molecular Dynamics Using the DAP
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 299-302
%D 1984

%A M. Fine
%A F. A. Tobagi
%T Demand assignment multiple access schemes in broadcast bus local area
networks
%J IEEE Trans. Comput. (USA)
%V C-33
%N 12
%P 1130-1159
%D Dec. 1983
%O 35 REFS
Treatment PRACTICAL
%K local area networks multi access systems packet switching protocols
demand assignment multiple access schemes broadcast bus local area networks
scheduling techniques
%X Recently, a number of distributed demand assignment multiple access
(DAMA) schemes suitable for broadcast bus networks have emerged which
provide conflict-free broadcast communications by means of various
scheduling techniques. Some of these use implicit tokens, whereby
stations in the network rely on information deduced from the activity
on the bus to schedule their transmissions. The authors present a
number of implicit-token DAMA schemes in a unified manner, grouped
according to their basic access mechanisms, and compare them in terms
of performance and other important attributes

%A Raphael Finkel
%A Marvin Solomon
%A David DeWitt
%A Lawrence Landweber
%T The Charlotte Distributed Operating System,
Part IV of the First Report on The Crystal Project
%C Madison, WA
%R Univ. of Wis. CS TR 502
%D October 1983

%A Raphael Finkel
%A Udi Manber
%T DIB--A Distributed Implementation of Backtracking (preliminary version)
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Distributed Applications Algorithmms, Crystal,
%P 446-452

%A Raphael A. Finkel
%A Marvin H. Solomon
%T Processor Interconnection Strategies
%J IEEE Transactions on Computers
%V C-29
%D May 1980
%P 360-371
%N 5
%K Computer networks, distributed computing, message routing,
multiprocessor architectures, network topology
%O Parallel computation

%A Raphael A. Finkel
%A Marvin H. Solomon
%T The Lens Interconnection Strategy
%J IEEE Transactions on Computers
%V C-30
%N 12
%D December 1981
%P 960-965
%K Computer networks, distributed computing, message routing, multiprocessor
architectures, network topology, MIMD
%X
Reproduced in the 1984 tutorial: \fI Interconnection Networks for parallel
and distributed processing\fP by Wu and Feng.

%A Charles A. Finnila
%T The Associative Linear Array Processor
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 123
%K
%O Associative/parallel processors
%X Summary only.

%A Charles A. Finnila
%A Hubert H. Love, Jr.
%T The Associative Linear Array Processor
%J IEEE Transactions on Computers
%V C-26
%N 2
%D February 1977
%P 112-125
%K Associative memory, associative processor system, cellular logic array,
data retrieval, electronic fault isolation, fault-tolerant logic,
highly parallel arithmetic, large-scale integration (LSI), parallel processing
Architecture, special issue on parallel processors and processing

%A M. A. Fiol
%A I. Alegre
%A J. L. A. Yebra
%T Line Digraph Iterations and the (c,k) Problem for Directed Graphs
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 11
%N 3
%D 1983
%P 174-177
%O Interconnection Networks

%A R. J. Firth
%T Architecture of a Cellular Hardware Lexical Analysis Machine
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 8.1-8.7

%A Fischer
%A others
%T Resource Allocation with Immunity to Limited Process Failure
%J Symposium on Foundation of Computer Science
%D October 1979

%A Charles N. Fischer
%T On Parsing Context-free Languages in Parallel Environments
%R TR 75-237, PhD dissertation
%I CS Dept., Cornell Univ.
%C Ithaca, NY
%D 1975

%T On Parsing and Compiling Arithmetic Expressions on Vector Computers
%A Charles N. Fischer
%J ACM Transactions on Programming Languages and Systems
%V 2
%N 2
%D April 1980
%P 203-224
%K Vector parsing, vector compiling, arithmetic infix expressions, vector
computers
CR Categories: 4.12, 5.23, 5.25

%A Jim Fischer
%T MPP Bibliography \(em papers and \(em Documentation
%I NASA GSFC
%D January 1984
%K Massively Parallel Processor
%X A collection obtained upon a visit to the MPP.  The bibliography has
not been fully checked.  There are holes in its information.
$Revision: 1.2 $ $Date: 84/07/05 16:52:05 $

%A M. J. Fischer
%A L. J. Guibas
%A N. D. Griffeth
%A N. A. Lynch
%T Optimal Placement of Identical Resources in a Distributed Network
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 324-336
%K
%O Distributed Scheduling

%A M.J. Fischer
%A N.A. Lynch
%A M.S. Paterson
%T Impossibility of Distributed Consensus with One Faulty Process
%I Yale
%R Research Report #245
%D September 1982

%A J. P. Fishburn
%A R. A. Finkel
%A S. A. Lawless
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Parallel Alpha-Beta Search on Arachne
%P 235-243
%K U of Wisc.
%O Nonnumerical Algorithms and Applications
%X For other reports, see references to Roscoe and Charlotte, and Crystal
for hardware.

%A John P. Fishburn
%A Raphael A. Finkel
%T Quotient Networks
%J IEEE Transactions on Computers
%V C-31
%N 4
%D April 1982
%P 288-295
%K Interconnection networks, large problem size/machine size, parallel FFT,
SIMD computers, theory of parallel algorithms
%X
Reproduced in the 1984 tutorial: "Interconnection Networks for Parallel
and Distributed Processing" by Wu and Feng.

%A Allan L. Fisher
%T Dictionary Machines With a Small Number of Processors
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%D June 1984
%P 151-156
%K tree machine, database issues

%T Memory and Modularity in Systolic Array Implementations
%A Allan L. Fisher
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 99-101
%K Systolic Systems

%A Allen L. Fisher
%A H. T. Kung
%A L. M. Monier
%A Y. Dohi
%T Architecture of the PSC:  A Programmable Systolic Chip
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 11
%N 3
%D 1983
%P 48-53
%K
CMU
%O VLSI architectures

%A Allen L. Fisher
%A H. T. Kung
%T Synchronizing Large VLSI Processor Arrays
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 11
%N 3
%D 1983
%P 54-58
%K
CMU
%O VLSI architecture
%X
Reproduced in the 1984 tutorial: \fIInterconnection Networks for parallel
and distributed processing\fP by Wu and Feng.

%l proceedings-article
%A J. A. Fisher
%T Very Long Instruction Word Architectures and the ELI 512
%J Int. Symp. on Computer Architecture
%D 1983
%P 140
%K parallel data flow trace scheduling cray-1 RISC multiprocessor

%A J. A. Fisher
%T Very Long Instruction Word Architectures and the ELI-512
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 11
%N 3
%D 1983
%P 140-150
%O Multiple Functional Unit Processors

%A Joesph A. Fisher
%A John J. O'Donnell
%T VLIW Machines: Multiprocessors We Can Actually Program
%J Digest of Papers COMPCON, Spring 84
%I IEEE
%D Feb. 1984
%P 299-305
%K ELI (Enormously Long Instructions), BULLDOG compiler,
Very high-end architectures

%A Joesph A. Fisher
%T The VLIW Machine: A Multiprocessor for Compiling Scientific Code
%J Computer
%I IEEE
%V 17
%N 7
%D July 1984
%P 45-53
%K Bulldog compiler, enormously long instruction (ELI), trace-scheduling,
Hardware-software interface: effect on performance

%A Joesph A. Fisher
%A John R. Ellis
%A John C. Ruttenberg
%A Alexandru Nicolau
%T Parallel Processing: A Smart Compiler and a Dumb Machine
%J Proc. SIGPLAN '84 Symposium on Compiler Construction, SIGPLAN Notices
%I ACM
%V 19
%N 6
%D June 1984
%P 37-47
%K very long instruction word (VLIW), enormously long instruction (ELI),
trace scheduling,
%X Yet another paper on the parsing of the Yale ELI machine.

%l journal-article
%A D. T. Fitzpatrick
%A J. K. Foderaro
%A M. G. H. Katevenis
%A H. A. Landman
%A D. A. Patterson
%A J. B. Peek
%A Z. Peshkess
%A C. H. Sequin
%A R. W. Sherbourne
%A K. S. Van Dyke
%T A RISCy Approach to VLSI
%J VLSI Design
%N 4th Quarter
%D 1981
%K risc reduced instruction set computer architecture restricted

%A Eugene Fiume
%A Alain Fourier
%A Larry Rudolph
%T A Parallel Scan Conversion Algorithm with Anti-Aliasing for a General-Purpose
Ultracomputer
%J Computer Graphics
%V 17
%N 3
%D July 1983
%K CR Categories and Subject Descriptors: B.3.2 [Memory Structures]: Design Styles
- Shared memory; D.3.3 [Programming Languages]: Language Constructs - Concurrent
programming structures; F.2.2 [Analysis of Algorithms and Problem Complexity]:
Nonnumerical algorithms and problems - Geometrical problems and computations;
I.3.1 [Computer graphics]: Hardware architecture - Raster display devices; I.3.3
[Computer graphics]: Picture/Image generation - Display algorithms; I.3.7
[Computer graphics]: Three-dimensional graphics and realism - Visible
line/surface algorithm.
Anti-aliasing techniques

%A Flanders
%A others
%T Experience gained in Programming the pilot DAP, a Parallel
Processor with 1024 Processing Elements
%I ICL

%A P. Flanders
%T Internal Sorting Using Batcher's Bitonic Algorithm
%I ICL

%A P. Flanders
%A D. Hunt
%A S. Reddaway
%A D. Parkinson
%T Efficient High Speed Computing with the Distributed Array Processor
%E D. Kuck
%E D. Lawrie
%E A. Sameh
%B High Speed Computer and Algorithm Organization
%I Academic Press
%C New York
%D 1977
%P 113-128
%K DAP

%A P. Flanders
%T FORTRAN Extensions for a Highly Parallel Processor
%B Supercomputers
%I Infotech, state of the art report
%D 1979

%A P. M. Flanders
%A D. J. Hunt
%A D. Parkinson
%A S. F. Reddaway
%T Experience Gained in Programming the Pilot DAP, A Parallel Processor with
1024 Elements
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 269-273
%K DAP,
applications

%A P. M. Flanders
%T Non-numerical aspects of computations on Parallel Hardware
%I ICL
%J Conference Proceedings for CONPAR 81
%D 1981

%A P. M. Flanders
%T A Unified Approach to a class of Data movements on an Array Processor
%I ICL
%J IEEE Trans. on Computers
%D 1981

%A P. M. Flanders
%T Non-numerical methods on parallel computers
%I ICL
%J Proceedings of Chester Conference
%D 1981

%A P. M. Flanders
%A S. F. Reddaway
%T Sorting on DAP
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 247-252
%D 1984
%K Bitonic, tag, internal, external,

%T A Unified Approach to a Class of Data Movements on an Array Processor
%A Peter M. Flanders
%J IEEE Transactions on Computers
%V C-31
%N 9
%D September 1982
%P 809-819
%K Array processors, data routing, fast Fourier transform, parallel
algorithms, parallel processing, sorting
Array processors

%A M. P. Fle
%A G. Roucairol
%T On Serializability of Iterated Transactions
%T Language Constructs and Support Systems for Distributed Computing
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 194-200

%A John G. Fletcher
%A Richard W. Watson
%T Service support in a network operating system
%J Spring 1980 Compcon
%I IEEE
%D 1980
%P 415-423

%A M. Flint
%T VANS at work [value added network services]
%I Telecommunications (USA)
%V 18
%N 12
%P 75-76
%O 0 REFS. Treatment GENERAL
%D Dec. 1984
%K computer networks data communication systems telecommunication services
OSI standards value added network services VANS TRADANET
Article Number Association data communications ICL network Open System Interconnection

%Q Floating Point Systems
%T AP-120B Array Processor Handbook
%R Reference Manual 7259-02
%D 1976

%Q Floating Point Systems
%T Array Processor FORTRAN Reference Manual
%R FPS-860-7408-0000
%D November 1978
%C Portland, OR 97223

%Q Floating Point Systems
%T Processor Handbook
%R 860-7259-0038
%D 1979
%P 1-1 to 1-23
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%A L. Flon
%A N. Suzuki
%T Nondeterminism and the correctness of parallel programs
%J Proc. IFIP Working Conf. on Formal Descriptions of Programming Concepts
%C St. Andrews, N.B., Canada
%D August 1977
%K theoretical results
%X Describes a technique for transforming parallel programs into equivalent
nondeterministic programs and then proving the former by proving the latter.
Presents the proof for some commonly encountered parallel programs.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A M. Flynn
%T Directions and Issues in Architecture and Language
%J Computer
%V 13
%N 10
%D October 1980
%P 5-22

%A M. J. Flynn
%T Shared Internal Resources in a Multiprocessor
%J Multiprocessor Information Processing 71, Proceedings IFIP Congress 1971
%P 565-569

%A M. J. Flynn
%T Very High-Speed Computing Systems
%J Proceedings of the IEEE
%V 54
%D December, 1966
%P 1901-1909
%X The original paper which classified computer system into instruction
and data stream dimensions (SISD, SIMD, etc.).

%A M. J. Flynn
%A A. Podvin
%A K. Shimizu
%T A Multiple Instruction Stream Processor with Shared Resources
%E L. C. Hobbs
%E others
%B Parallel Processor Systems Technologies and Applications
%P 251-286
%I Spartan Books
%D 1970

%A M. J. Flynn
%T Shared Internal Resources in a Multiprocessor
%J Proc. IFIP Congress
%P 565-569
%I North-Holland
%D 1971

%A M. J. Flynn
%A A. Podvin
%T An Unconventional Computer Architecture: Shared Resource Multiprocessing
%J Computer
%I IEEE
%V 5
%N 2
%D March/April, 1972
%P 20-28

%A M. J. Flynn
%A J. L. Hennessy
%T Parallelism, Architecture and Representation Problems in Computer
Systems
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 124-130
%K Distributed architectures

%A Michael J. Flynn
%T Some Computer Organizations and Their Effectiveness
%J IEEE Transactions on Computers
%V C-21
%N 9
%D September 1972
%P 948-960
%K Computer organization, instruction stream, overlapped, parallel processors,
resource hierarchy
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%T Parallelism and Representation Problems in Distributed Systems
%A Michael J. Flynn
%A John L. Hennessy
%J IEEE Transactions on Computers
%V C-29
%N 12
%D December 1980
%P 1080-1086
%K Directly executed languages, distributed systems, functional
programming, parallelism, representation
%O Special issue on distributed processing systems

%l journal-article
%A J. K. Foderaro
%A K. S. Van Dyke
%A D. A. Patterson
%T Running RISCs
%J VLSI Design
%N September/October
%D 1982
%K risc reduced instruction set computer architecture restricted

%A H. Foerster
%A K. Steuben
%A U. Trottenberg
%T Nonstandard Multigrid Techniques Using Checkered Relaxation and
Intermediate Grids
%E M. Schultz
%B Elliptic Problem Solvers
%I Academic Press
%C New York
%D 1981
%P 285-300

%A K. Fong
%A T. Jordan
%T Some Linear Algebraic Algorithms and Their Performance on the CRAY-1
%I Los Alamos National Laboratory
%R LA-6774
%D 1977

%A Kirby W. Fong
%T The National MFE Computer Center Cray Time Sharing System
%R UCRL-88569
%I LLNL MFE
%C Livermore, CA
%j Software Practice and Experience
%D 1984

%A Ray Ford
%A Duangkaew Sawamiphakdi
%T A Greedy Concurrent Approach to Incremental Code Generation
%X Check further for refs.

%A A. Forman
%T Mathematical Algorithms to Maximize Performance in Numerical Weather
Prediction
%J CYBER 200 Applications Seminar
%R NASA Conference Publication 2295
%D October 1983
%E J. Patrick Gary, Compiler
%I NASA Goddard Space Flight Center
%C Greenbelt, Maryland
%P 3-13

%A B. Fornberg
%T A Vector Implementation of the Fast Fourier Transform Algorithm
%J Math. Comp.
%V 36
%P 189-191
%D 1981

%T Steady Viscous Flow Past A Circular Cylinder
%A B. Fornberg
%J CYBER 200 Applications Seminar
%R NASA Conference Publication 2295
%D October 1983
%E J. Patrick Gary, Compiler
%I NASA Goddard Space Flight Center
%C Greenbelt, Maryland
%P 201-224

%A Harry C. Forsdick
%A Richard E. Scantz
%A Robert H. Thomas
%J Computer
%T Operating Systems for Computer Networks
%I IEEE
%D January 1978
%V 11
%N 1
%P 48-57
%K RSEXEC, national software works (NSW), network operating system (NOS)
%X Not a really hot paper, just okay.
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A G. E. Forsythe
%A M. A. Malcolm
%A C. B. Moler
%T Computer Methods for Mathematical Computations
%I Prentice-Hall
%C Englewood Cliffs, NJ
%D 1977

%A J. A. B. Fortes
%A F. Parisi-Presicce
%T Optimal linear time schedules for the parallel execution of
algorithms
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 322-329
%O scheduling

%A J. A. B. Fortes
%A D. I. Moldovan
%T Data Broadcasting in Linearly Scheduled Array Processors
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%D June 1984
%P 224-231
%K algorithms for array processors

%A Gary N. Fostel
%T Summary of a hybrid data flow system
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 134-136
%K
%O Data flow and reduction machines

%A C. Foster
%T Content Addressable Parallel Processors
%I van Nostrand Reinhold
%D 1976

%A C. C. Foster
%T Computer Architecture
%I Van Nostrand Reinhold Co.
%D 1970

%A C. C. Foster
%A E. M. Riseman
%T Percolation of Code to Enhance Parallel Dispatching and Execution
%J IEEE Trans. on Computers
%V C-21
%P 1411-1415
%D 1972

%A M. J. Foster
%A H. T. Kung
%T Design of Special-Purpose VLSI Chips:  Example and Opinions
%J Proceedings of 7th Annual Symposium on Computer Architecture
%D 1980
%K CMU
%P 300-307

%A T. J. Fountain
%T CLIP4: A Progress Report
%B Languages and Architectures for Image Processing
%E M. J. B. Duff
%E S. Levialdi
%I Academic Press
%C New York, NY
%D 1981
%P 283-291

%A T. J. Fountain
%T A Survey of bit-serial array processor circuits
%E M. J. B. Duff
%B Computing Structures for Image Processing
%I Academic Press
%D 1983
%P 1-14

%A G. Fox
%T A Tentative Design for the 1024 Node Caltech Concurrent Processor (CCP)
%R Hm 6
%D August 1982
%I California Institute of Technology
%C Pasadena, CA
%K Caltech Cosmic Cube, hypercube, C^3P

%A G. Fox
%T Matrix Operations on the Homogeneous Machine
%r Hm 5
%R CALT-68-939
%I California Institute of Technology
%C Pasadena, CA
%D July 1982
%K Caltech Cosmic Cube, hypercube, C^3P

%A G. Fox
%T Array Processors and Arrays of Processors
%R Hm 4
%I California Institute of Technology
%C Pasadena, CA
%D June 1982
%K Caltech Cosmic Cube, hypercube, C^3P
%X Internal memo

%A G. Fox
%T Caltech Homogeneous Machine (or Nearest Neighbor Concurrent Processor - NNCP)
%R Hm 3
%I California Institute of Technology
%C Pasadena, CA
%D May 1982
%K Caltech Cosmic Cube, hypercube, C^3P
%X Viewgraphs.

%A G. Fox
%T Status of the Concurrent Processor Project
%R Hm 7
%I California Institute of Technology
%C Pasadena, CA
%D September 1982
%K Caltech Cosmic Cube, hypercube, C^3P
%X Memo.

%A G. Fox
%T Future Software Development for the NNCP
%R Hm 11
%I California Institute of Technology
%C Pasadena, CA
%D September 1982
%K Caltech Cosmic Cube, hypercube, C^3P

%A G. Fox
%T Concurrent Processor for Scientific Calculations, Development of Hardware
and Software for a Homogeneous Machine
%R Hm 12
%I California Institute of Technology
%C Pasadena, CA
%D September 1982
%K Caltech Cosmic Cube, hypercube, C^3P
%X Incomplete proposal

%A G. Fox
%T Decomposition of Scientific Problems for Concurrent Processors
%r Hm28
%R CALT-68-986
%I California Institute of Technology
%C Pasadena, CA
%D 1983
%K Caltech Cosmic Cube, hypercube, C^3P

%A G. Fox
%A C. Seitz
%T Concurrent Processing and the Decomposition of Problems
%r Hm34
%R CALT-68-1004
%I California Institute of Technology
%C Pasadena, CA
%D 1983
%K Caltech Cosmic Cube, hypercube, C^3P

%A G. Fox
%A S. Otto
%A P. Hipes
%A A. Kuppermann
%A B. Hager
%A R. Clayton
%A M. Johnson
%T Collection of Presentations to System Development Foundation
%R Hm47
%I California Institute of Technology
%C Pasadena, CA
%D 1983
%K Caltech Cosmic Cube, hypercube, C^3P

%A G. Fox
%T Hypercube Simulator V1.1
%R Internal memo, Hm38
%I California Institute of Technology
%C Pasadena, CA
%D August 1983
%K Caltech Cosmic Cube, hypercube, C^3P

%A G. Fox
%T Project Summary for the System Development Foundation
%R Internal Memo, Hm46
%I California Institute of Technology
%C Pasadena, CA
%D December 1983
%K Caltech Cosmic Cube, hypercube, C^3P

%A G. Fox
%T Proposal to DOD-University Research Instrumentation Program for the
acquisition of a concurrent Computer
%R Internal Memo, Hm50
%I California Institute of Technology
%C Pasadena, CA
%D December 1983
%K Caltech Cosmic Cube, hypercube, C^3P

%A G. Fox
%T California Institute of Technology: Concurrent Processing for Scientific
Computing
%R Hm24
%D January 1983
%I California Institute of Technology
%C Pasadena, CA
%K Caltech Cosmic Cube, hypercube, C^3P

%A G. Fox
%T Further Notes on the Astrophysics Application
%R Hm33
%I California Institute of Technology
%C Pasadena, CA
%D March 1983
%K Caltech Cosmic Cube, hypercube, C^3P

%A G. Fox
%T Scientific Calculations for Ensemble Computers
%r Hm37
%R CALT-68-1032
%I California Institute of Technology
%C Pasadena, CA
%D March 1983
%K Caltech Cosmic Cube, hypercube, C^3P
%X Invited talk Padua HEP Microprocessor Conference.

%A G. Fox
%T Summary of Status of Concurrent Processor Algorithm Development
%I California Institute of Technology
%C Pasadena, CA
%R Hm-66
%D April 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%A G. Fox
%T Caltech/JPL Concurrent Computation Project: Annual Report 1983-1984 and
Recent Documentation
%D August 1984
%K Caltech Cosmic Cube, hypercube, C^3P
%X The thick collection of papers and references found in the Rcccp file.
Includes programming it.
6 dimensional hypercube, running a Unix like operating system, programmed
with C and now FORTRAN using strictly local memories and synchronizing
via blocking I/O (read/write) calls.  The main processors are Intel 8087s.
There will be smaller (8 and 32 processors) and larger cubes (128 and 1024
processors).  The OS is aka: Crystalline Operating system. $Revision$ $Date$

%A G. Fox
%T Householder's Tridiagonalization Technique
%D August 1984
%R Hm97
%I California Institute of Technology
%C Pasadena, CA
%K Caltech Cosmic Cube, hypercube, C^3P

%A G. Fox
%T LU Decomposition for Banded Matrices
%D August 1984
%R Hm98
%I California Institute of Technology
%C Pasadena, CA
%K Caltech Cosmic Cube, hypercube, C^3P

%A G. Fox
%T Report to Parson's Foundation
%R Internal Memo, Hm59
%I California Institute of Technology
%C Pasadena, CA
%D January 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%A G. Fox
%T Concurrent Computation: Tutorial and Handbook, Preliminary Plan of Proposed
Book
%D July 1984
%I California Institute of Technology
%C Pasadena, CA
%K Caltech Cosmic Cube, hypercube, C^3P

%A G. Fox
%T The Cyclic Jacobi Method for Eigenvalues of Symmetric Matrices
%r Hm82
%I California Institute of Technology
%C Pasadena, CA
%D July 1984
%K Caltech Cosmic Cube, hypercube, C^3P
%X Draft.

%A G. Fox
%T Eigenvalues of Symmetric Tridiagonalization Matrices
%D July 1984
%R Hm95
%I California Institute of Technology
%C Pasadena, CA
%K Caltech Cosmic Cube, hypercube, C^3P

%A G. C. Fox
%A D. L. Meier
%T Demonstration of the Ability of a Concurrent Processor to Solve
Astrophysical Problems
%R Hm54
%I California Institute of Technology
%C Pasadena, CA
%D January 1984
%K Caltech Cosmic Cube, hypercube, C^3P
%X Caltech Pres. Fund proposal.

%A Geoffrey Fox
%T Annual Report of the Caltech Concurrent Computation Project
%D July 1984
%R Hm100
%I California Institute of Technology
%C Pasadena, CA
%K Caltech Cosmic Cube, hypercube, C^3P

%A Geoffrey C. Fox
%T Concurrent Processing - A Revolution in Scientific Computing
%R Hm 15
%I California Institute of Technology
%C Pasadena, CA
%D November 12, 1982
%K Caltech Cosmic Cube, hypercube, C^3P
%X Viewgraphs.

%A Geoffrey C. Fox
%T Concurrent Processing for Scientific Calculations
%J Digest of Papers COMPCON, Spring 84
%r Hm62
%I IEEE
%D Feb. 1984
%P 70-73
%K Super scientific computers
%X An introduction the the current 64 PE Caltech hypercube.  Based
on the dissertation by Lang (Caltech 1982) on the `Homogeneous machine.'

%A Geoffrey C. Fox
%A Steve W. Otto
%T Algorithms for Concurrent Processors
%J Physics Today
%r Hm71
%V 37
%N 5
%P 50-59
%D May 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%A Mark S. Fox
%T Organization structuring: Designing large complex software
%R CMU-CS-79-155
%I Department of Computer Science, Carnegie-Mellon University
%C Pittsburgh, Pennsylvania
%D December 1979

%A Mark S. Fox
%T An organizational view of distributed system
%J IEEE Transactions on Systems, Man, and Cybernetics
%V SMC-11
%N 1
%P 70-80
%D January 1981

%T Expressing and Exploiting Parallelism on an Experimental MIMD System
%A Ch. Fraboul
%A N. Hifdi
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 236-238
%K Languages for Parallel Processing

%A Vito Fragnelli
%T Architectures for Sparse Band Matrix Dense Vector Multiplication
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 507-514
%D 1984

%T XOR-Schemes: A Flexible Data Organization in Parallel Memories
%A J. M. Frailong
%A W. Jalby
%A J. Lenfant
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 276-283
%K Memory Management

%A P. A. Franaszek
%T Address-independent routing for local networks
%J IBM J. Res. & Dev. (USA)
%V 27
%N 5
%P 464-471
%O 8 Refs.
Treatment PRACTICAL
%D 1983
%K computer networks switching theory.
computer networks local networks routing methodology classes of networks
bidirectional trees augmented rings optimality property address
independent routing strategies
augmented loops redundant links.
%X A routing methodology is introduced which permits messages to be
propagated throughout a network without recourse to destination or
origin addresses. Two classes of networks, bidirectional trees and
augmented rings, are analyzed from this point of view. An optimality
property is proved for the bidirectional tree, and three types of
address-independent routing strategies are derived. It is shown that
augmented loops, a class of structures incorporating redundant links,
may be rerouted to compensate for the failure of any single node or
link.

%A N. De Francesco
%T On the Decomposition of Parallel Computations
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 221-224
%K Petri nets and related topics
%X Petri nets and logic approach to decomposition.

%A N. Francez
%A M.  Rodeh
%T Achieving Distributed Termination without Freezing
%J IEEE Trans. on Software Engineering
%V SE-8
%D May 1982
%P 287-292

%A N. Francez
%A O. Grumberg
%A S. Katz
%T Fair Termination of Communicating Processes
%J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing
%I ACM
%D August 1984

%A Nissim Francez
%A Amir Pnueli
%T A proof method for cyclic programs
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 235-245
%K
%O Fundamental Theory

%A Nissim Francez
%T Distributed Termination
%J ACM Transactions on Programming Languages and Systems
%V 2
%N 1
%D January 1980
%P 42-55
%K Concurrent programs, distributed processes, disjoint memories,
communication, input-output, distributed termination
CR Categories: 4.32, 5.24

%A Ariel J. Frank
%A Larry D. Wittie
%A Arthur J. Bernstein
%T Group Communication on Netcomputers
%I Computer Science Dept., SUNY
%C Stony Brook, Long Island, NY 11794
%R TR #83/057
%D September 1983

%A Ariel J. Frank
%A Larry Wittie
%A Arthur J. Bernstein
%T Group Communication in Netcomputers
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 326-335
%O Local area network case studies

%T Maintaining Weakly-Consistent Replicated Data on Dynamic Groups of
Computers
%A Ariel J. Frank
%A Larry D. Wittie
%A Arthur J. Bernstein
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 155-162
%K Operating System Problems

%A Ariel J. Frank
%A Larry D. Wittie
%A Arthur J. Bernstein
%T Multicast communication on network computers
%J IEEE Software
%V 2
%N 3
%P 49-61
%D MAY 1985
%X Channel-oriented packet casting is a predominant feature of Micros, an
operating system designed to explore control and communication techniques
for netcomputers with thousands of hosts.

%A G. A. Frank
%A E. M. Greenwalt
%A A. V. Kulkarni
%T A Systolic Processor for Signal Processing
%J National Computer Conference \(em Proceedings
%I AFIPS
%V 51
%D 1982
%P 225-231
%K Convolution, matrix multiplication, FFTs

%A Geoffrey A. Frank
%A William E. Siddall
%A Donald F. Stanat
%T Virtual Memory Schemes for an FFP Machine
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 8.37-8.45

%A James Lowell Frankel
%T The Architecture of Closely-coupled Distributed Computers and their
Language Processors
%I Harvard University
%R PhD thesis
%D 1983
%X Just to remind you, the dissertation has two major parts: a hardware
architecture concentrating on a shared-memory multiprocessor computer system
using the butterfly network, and a software architecture dealing with (1) a
compiler which compiles a single program in parallel and (2) a compiler which
analyzes a sequential program to determine its dependencies, translates it into
a data flow graph, and partitions the data flow graph for execution on a
multiprocessor. The software ideas are based on data flow analysis, coarse
data flow rather than the fine granularity of data flow used in data flow
machines, petri net partitioning, etc.

%A M. Franklin
%A D. Wann
%T Asynchronous and Clocked Control Structures for VLSI Based Interconnection
Networks
%J Proceedings of 9th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 10
%N 3
%D April 1982
%P 50-62

%A M. Franklin
%A D. F. Wann
%A K. F. Wong
%T Parallel machines and algorithms for discrete-event simulation
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 449-458
%K VLSI,
%O simulation
%X Compares various logic simulators.

%A M. A. Franklin
%A S. A. Kahan
%A M. J. Stucki
%T Design issues in the development of a modular multiprocessor
communications network
%J Proceedings 6th Annual Symposium on Computer Architecture
%I Philadelphia, Pa.
%D April 1979
%P 182-187
%K miscellaneous topics in multiprocessing
%X Describes a modular, easily expandable crossbar network for use in
multiprocessor systems.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A M. A. Franklin
%A D. F. Wann
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Pin Limitations and VLSI Interconnection Networks
%P 253-258
%O VLSI Architectures

%A Mark A. Franklin
%T Parallel Solution of Ordinary Differential Equations
%J IEEE Transactions on Computers
%V C-27
%N 5
%D May 1978
%P 413-420
%K Multicomputer, multiprocessor, ordinary differential equations,
parallel numerical methods, parallel processing,
Parallel computation

%A Mark A. Franklin
%T VLSI Performance Comparison of Banyan and Crossbar Communications Networks
%J IEEE Transactions on Computers
%V C-30
%N 4
%D April 1980
%P 283-290
%X Also published in \fIProc. Workshop on Interconnection Networks\fP,
Purdue U., IEEE, April 1980, pp. 20-28.

%A Mark A. Franklin
%T VLSI Performance Comparison of Banyan and Crossbar Communications Networks
%J IEEE Transactions on Computers
%V C-30
%N 4
%D April 1981
%P 283-290
%K Banyan network, communication networks, crossbar networks,
multiprocessor networks, space-time product, VLSI
%O Special issue on interconnection networks for parallel and distributed
processing
%X
Reproduced in the 1984 tutorial: \fI Interconnection Networks for parallel
and distributed processing\fP by Wu and Feng.

%T One-Dimensional Optimization on Multiprocessor Systems
%A Mark A. Franklin
%A Norman L. Soong
%J IEEE Transactions on Computers
%V C-30
%N 1
%D January 1981
%P 61-66
%K Multiprocessor systems, optimization, parallel numerical methods,
parallel processing, search techniques, unimodal function optimization
%O Parallel computation

%A Mark A. Franklin
%A Donald F. Wann
%A William J. Thomas
%T Pin Limitations and Partitioning of VLSI Interconnection Networks
%J IEEE Transactions on Computers
%V C-31
%N 11
%D November 1982
%P 1109-1116
%K Banyan, crossbar, interconnection networks, pin limitations,
multiprocessors, synchronization
correspondence, Special issue on parallel and distributed processing
%X
Reproduced in the 1984 tutorial: "Interconnection Networks for parallel
and distributed processing" by Wu and Feng.

%A J. M. Frankovich
%T A Bandwidth Analysis of Baseline Networks
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 572-579?
%K
%O Multistage Network Performance

%A W. R. Franta
%A P. A. Houle
%T Comments on models of multiprocessor multi-memory bank computer systems
%J Proc. 1974 Winter Simulation Conference
%C Washington, D. C.
%D January 1974
%P 86-97
%K performance
%X Contains a discussion of the hardware and software factors contributing
to memory interference in multiprocessor systems.  Describes a simulation
model of memory interference and compares it to other models.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A W. R. Franta
%A E. D. Jensen
%A R. Y. Kain
%A G. D. Marshall
%T Real-Time Distributed Computer Systems
%B Advances in Computers
%I Academic Press
%D 1981

%A V. Frantzen
%E M. B. Williams
%T Packet-switched data communication services in the ISDN
%B Pathways to the Information Society. Proceedings of the Sixth
International Conference on Computer Communication
%C London, England
%P 25-30
%O 9 REFS. Treatment PRACTICAL
%I North-Holland, Amsterdam, Netherlands, p: xx+1018
ISBN: 0-444-86464-4
%D 7-10 Sept. 1982
%K telephone networks digital communication systems pulse code modulation
speech analysis and processing packet switching
data communication services ISDN public telephone networks
Integrated Services Digital Network
digital channels PCM coded speech nonvoice services X.21
X.25 PS facilities
%X End-to-end digitization of public telephone networks leads to the
concept of an Integrated Services Digital Network (ISDN) that uses
standard 64 kbit/s digital channels both for the transmission of
PCM-coded speech and for a wide range of new and established nonvoice
services. Even though emphasis will be on a new service independent
ISDN-type interface (S) that will enable new terminals to exploit the
full range of ISDN features, ISDN will also provide for the
connection of existing terminals in accordance with CCITT
Recommendations X.21 and X.25. The author deals with possible
solutions for incorporating PS facilities into ISDN. Different
degrees of integration of PS facilities within ISDN are discussed. In
particular, various approaches for the access of X.25-DTEs to a PS
facility within the ISDN are described

%A G. H. Franzkowiak
%A R. W. Naro
%T An analytical model for evaluation of distributed multiprocessor
systems with shared common resources
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 786-791
%K
%O Performance Evaluation of Multiprocessor Systems

%A T. Freeburg
%T Portable data comes of age [Motorola's radio data terminal system]
%J Telecommunications (USA)
%V 18
%N 12
%P 51-54
%O 0 REFS. Treatment APPLICATIONS, PRACTICAL
%D Dec. 1984
%K data communication systems mobile radio systems computer networks
interactive terminals
RF channel reuse Motorola mobile communication systems computerised databases
data communications system computer system KDT
portable radio data terminal system computer networks

%A D. N. Freeman
%T IBM and Multiprocessing
%J Datamation
%D March 1976
%P 92-109
%X An article about IBM's early attached processors 370/168.  The
text by Satya1980 is better for detail.  This article is very dated.

%A M Freeman
%A W. Jacobs
%A L. Levy
%T On the construction of Microprocessor-Oriented operating systems
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 56
%K
%O Operating systems and compilers

%A S. L. Freeny
%T Special Purpose Hardware for Digital Filtering
%J Proceedings of the IEEE
%V 63
%N 4
%D April 1975
%P 633-648

%A D. H. Freidel
%T Modelling Communication and Synchronization in Parallel Programming
Languages
%I University of Iowa
%R Technical Report 84-01
%D 1984

%A Brett D. Freisch
%T Meta-Activities: Towards Coherent Distributed Jobs
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 566-578
%O Distributed control algorithms

%A Elaine French
%A Hugh Glaser
%T TUKI, A Data Flow Processor
%J Computer Architecture News
%V 11
%N 1
%D March 1983
%P 12-18
%K CAJOLE

%A M. Fridrich
%A W. Older
%T The FELIX File Server
%J Proceedings of the 8th Symposium on Operating Systems Principles,
Operating Systems Review
%V 15
%N 5
%D December 1981
%P 37-44
%O 7 Refs
Treatment PRACTICAL.
%K virtual storage input output programs computer networks file organisation
utility programs.
I/O programs computer networks file organisation utility programs
Felix file server distributed multicomputer system file systems virtual memory
database local area network block oriented data access crash resistance
data sharing consistency.
remote data storage
%X Describes Felix-a File Server for an experimental distributed
multicomputer system. Felix is designed to support a variety of file
systems, virtual memory, and database applications with access being
provided by a local area network. Its interface combines block
oriented data access with a high degree of crash resistance and a
comprehensive set of primitives for controlling data sharing and
consistency. An extended set of access modes allows increased
concurrency over conventional systems.

%A M. Fridrich
%A W. Older
%T HELIX: The Architecture of a Distributed File System
%J 4th International Conference on Distributed Computing Systems
%I IEEE Comput. Soc. Press. Silver Spring, MD, USA, (Cat. No. 84CH2021-4),
ix+580, Std Book No.0 8186 0534 0
%C San Francisco, CA
%D May 1984
%P 422-431
%O 17 REFS. Treatment PRACTICAL
%K database management systems distributed processing local area networks
system security Helix distributed file system
user organized directory structure
local area network system integrity abstraction layering system decomposition
resource recovery
Distributed database system

%A Marek Fridrich
%A William Older
%T Helix: the architecture of the XMS distributed file system
%J IEEE Software
%V 2
%N 3
%P 21-29
%D MAY 1985
%X With abstraction layering and system decomposition, all the user sees is
one homogeneous system.  Behind the scene, the architecture is supporting 15
LANs and close to 1000 workstations

%A A. Friedman
%A D. Kershaw
%T Vectorized Incomplete Cholesky Conjugate Gradient (ICCG) Package for
the CRAY-1 Computer
%B Laser Program Annual Report
%I Lawrence Livermore National Laboratory
%R UCRL-500021-81
%D 1982

%A D. P. Friedman
%A D. S. Wise
%T CONS Should Not Evaluate its Arguments
%J Automata, Languages, and Programming: Third International
Colloquium
%E S. Michaelson
%E R. Milner
%D July 1976
%P 257-284

%A D. P. Friedman
%A D. S. Wise
%T An Approach to Fair Applicative Multiprogramming
%B Semantics of Concurrent Computation: Proceedings of the International
Symposium
%E G. Kahn
%S Lecture Notes in Computer Science
%V 70
%D July 1979
%P 203-225

%A D. P. Friedman
%A D. S. Wise
%T An Indeterminate Constructor for Applicative Programming
%J Conference Record of the Seventh Annual ACM Symposium on
Principles of Programming Languages (POPL)
%I ACM
%D January 1980
%P 245-250

%A Daniel P. Friedman
%A David S. Wise
%T The impact of applicative programming on multiprocessing
%J Proceedings of the 1976 International Conference on Parallel Processing
%C Walden Woods, Michigan
%D August 1976
%P 263-272
%K Functional combination, suspensions, recursion, parallelism, compiling
LISP, U Indiana
CR categories: 4.32, 4.29, 4.12, 4.13
theoretical results, language issues

%A Daniel P. Friedman
%A David S. Wise
%T Aspects of Applicative Programming for Parallel Processing
%J IEEE Transactions on Computers
%V C-27
%N 4
%D April 1978
%P 289-296
%K Compiling, functional combinations, Lisp, multiprocessing, recursion,
suspensions
%O Applicative programming for multiprocessing

%A G. Fritsch
%A W. Kleinoeder
%A C. U. Linster
%A J. Volkert
%T EMSY85 \*- The Erlangen Mutli-Processor System for a broad spectrum of
applications
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 325-330
%K
pyramid machine, EMOS, UNIX-like, iAPX286/287,
database machine/signal processing
%X
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%A J. S. Fritz
%A C. F. Kaldenbach
%A L. M. Progar
%T Local area networks: Selection guidelines
%I Englewood Cliffs, NJ, USA, p: v+106, Prentice-Hall
ISBN: 0-13-539552-6
%D 1985
%K broadband networks local area networks
LAN local area networks selection guidelines PBX
baseband networks broadband networks hybrid networks private branch exchange
%X This book provides a guide for both the lay person and the
professional in the rather complicated process of seeking a local
area network. The text has been organized so that it is easily read
and understood by the non-technical person, yet in specific areas it
provides enough technical detail for the systems engineer. The volume
provides step-by-step procedures to illustrate how alternative local
area networks can be selected for a specific facility, and it
explains how these alternatives can be evaluated in terms of desired
attributes. The four major network systems discussed are private
branch exchange (PBX), baseband, broadband and hybrid

%A T. E. Fritz
%A J. E. Hefner
%A T. M. Raleigh
%T A network of computers running the UNIX system
%J AT&T Bell Lab. Tech. J. (USA)
%V 63
%N 8, pt.2
%P 1877-1896
%O 8 REFS
Treatment PRACTICAL
%D 1984
%K local area networks operating systems software portability
network computers UNIX operating system
high speed local area network portability schedulers input/output subsystems
speed processors network usage traffic patterns throughput
response
%X Discusses experience in designing software to interconnect large
numbers of processors that are based on the UNIX operating system
over a high-speed local area network. The authors discuss portability
of the implementation between different processors and operating
systems based on the UNIX system, the influence of different
schedulers, input/output subsystems, and different speed processors
on the implementation and performance of the network. Also discussed
are characteristics of network usage, such as traffic patterns,
throughput, and response

%A King-Sun Fu
%A Bharat K. Bhargava
%T Tree Systems for Syntactic Pattern Recognition
%J IEEE Transactions on Computers
%V C-22
%N 12
%D December 1973
%P 1087-1099
%K Bubble chamber events, picture recognition,
syntactic pattern recognition, tree automata, tree grammars,
tree languages, trees, tree, transformation,
pattern recognition

%A Henry Fuchs
%A Biran W. Johnson
%T An expandable multiprocessor architecture for video graphics (Preliminary
report)
%J Proc. 6th Annual Symp. on Computer Architecture
%I IEEE
%D 1979
%P 58-59

%A W. Kent Fuchs
%A Jacob A. Abraham
%A Kuang-Hua Huang
%T Concurrent Error Detection in VLSI Interconnection Networks
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%D 1983
%V 11
%N 3
%P 309-316
%O interconnection networks
%X
Reproduced in the 1984 tutorial: \fIInterconnection Networks for parallel
and distributed processing\fP by Wu and Feng.

%A F. Fucito
%A S. Solomon
%T Long Range Forces on NNCP
%r Hm80
%R CALT-68-1111
%I California Institute of Technology
%C Pasadena, CA
%D 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%A F. Fucito
%A S. Solomon
%T On the Relation Between the Coulomb Gas and the Lattice XY Model
%r Hm76
%R CALT-68-1114
%I California Institute of Technology
%C Pasadena, CA
%D April 3, 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%A F. Fucito
%A S. Solomon
%T Monte Carlo Parallel Algorithms for Long Range Interactions
%r Hm79
%R CALT-68-1134
%I California Institute of Technology
%C Pasadena, CA
%D June 7, 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%A M. Fujii
%A T. Kasami
%A K. Ninomiya
%T Optimal Sequencing of Two Equivalent Processors
%J SIAM Journal of Applied Mathematics
%V 17
%N 4
%D July 1969
%P 784-789

%A M. Fujii
%A T. Kasami
%A K. Ninomiya
%T Erratum
%J SIAM Journal of Applied Mathematics
%V 20
%N 1
%D January 1971
%P 141

%Q Fujitsu Limited
%T Performance of Livermore Loops
%C Shizuoka, Japan
%J FACOM VP System Performance Data
%P 1-3

%Q Fujitsu Limited
%T Performance of Mathematical Solvers
%C Shizuoka, Japan
%J FACOM VP System Performance Data
%P 4-17

%A Y. Fukada
%T Real Time Region Analysis for Image Data
%E Morio Onoe
%E Kendall Preston, Jr.
%E Azriel Rosenfeld
%B Real-Time/Parallel Computing: Image Analysis
%I Plenum Press
%C New York, NY
%D 1981
%P 159-169
%X A paper covering clustering.  Nothing involving parallelism, but
real time is covered.

%A Keinosuke Fukunaga
%A Patrenahalli M. Narendra
%T A Branch and Bound Algorithm for Computing k-Nearest Neighbors
%J IEEE Transactions on Computers
%V C-24
%N 7
%P 750-753
%D July 1975
%K Branch and bound, distance computation, hierarchical decomposition,
k-nearest neighbors, tree-search algorithm,
Correspondence

%A R. H. Fuller
%A R. M. Bird
%T An Associative Parallel Processor with Application to Picture Processing
%J Proceedings AFIPS Fall Joint Computer Conference
%D 1965
%P 105-116

%A R. H. Fuller
%T Associative Parallel Processing
%J Proceedings AFIPS Spring Joint Computer Conference
%V 31
%D 1967
%P 471-475

%A S. H. Fuller
%A D. P. Siewiorek
%A R. J. Swan
%T Computer Modules:  An Architecture for Large Digital Modules
%J Proceedings 1st Annual Symposium on Computer Architecture
%D December 1973
%C Gainesville, Florida
%P 231-237

%J Proceedings of 3rd Annual Symposium on Computer Architecture
%D 1976
%T The Design of a Multi-Micro-Computer System
%A S. H. Fuller
%A D. P. Siewiorek
%A H. J. Swan
%I CMU
%P 123

%A S. H. Fuller
%T Price/performance comparison of C.mmp and the PDP-10
%J Proc. 3rd Ann. Symp. on Computer Architecture
%C Clearwater, Florida
%D January 1976
%P 195-202
%K performance
%X Compares the price performance trade offs involved in choosing between
a large mainframe computer (the PDP-10) and a multiprocessor built with
minicomputers (the C.mmp). Yields valuable insights into the economic and
technical issues involved in such a choice.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A S. H. Fuller
%A P. N. Oleinick
%T Initial Measurements of Parallel Programs on Multi-Miniprocessor
%J 13th IEEE Computing Society International Conference
%C Washington, DC
%D September 1976

%A S. H. Fuller
%A A. K. Jones
%A L. Durham, eds.
%T Cm* Review, June 1977
%R Technical Report
%I Carnegie Mellon University
%C Pittsburg, PA
%D June 1977
%X This paper has been superceeded by the 1980 report and by A. Jones's
\fIComputing Survey\fP paper in 1980.  At this time, only 10 processors
and 3 Kmap clusters were completed [of the 50 Cms eventually placed in
Cm*].

%A Samual H. Fuller
%A Richard J. Swan
%A William A. Wulf
%T The instrumentation of C.mmp, a multi-(mini) processor
%J Compcon 73
%I IEEE
%D 1973
%P 173-176

%A Samuel H. Fuller
%A John K. Ousterhout
%A Levy Raskin
%A Paul I. Rubinfeld
%A Pradeep J. Sindhu
%A Richard J. Swan
%T Multi-Microprocessors: An Overview and Working Example
%J Proceedings of the IEEE
%V 66
%N 2
%D February 1978
%P 216-228
%K multiprocessor architectures and operating systems
%X Discusses the problems and advantages of using microprocessors for building
multiprocessors.  Describes Cm* from this viewpoint and gives some
performance measurements.
Text reproduced with the permission of Prentice-Hall \(co 1980.
Reprinted in "Tutorial: Distributed Processing," IEEE,
compiled by Burt H. Liebowitz and John H. Carson, 1981, 3rd edition.

%A L. C. Fulmer
%A W. C. Meilander
%T A Modular Plated-Wire Associative Processor
%J Proc. 1970 IEEE Intl. Computer Group Conference
%I IEEE
%D 1970
%P 325-335

%A David L. Fulton
%A Claude Overstreet
%A Richard T. Thomas
%T The Design of a Minicomputer Network Operating System
%J Trend and Applications 1976: Computer Networks
%I IEEE
%D 1976
%X A low level look at the Bowling Green State net.
Reprinted in "Tutorial: Distributed Processing," IEEE,
compiled by Burt H. Liebowitz and John H. Carson, 1981, 3rd edition.

%A Kwok-Tung Fung
%A H. C. Torng
%T On the Analysis of Memory Conflicts and Bus Contentions in a
Multiple-Microprocessor System
%J IEEE Transactions on Computers
%V C-28
%N 1
%D January 1979
%P 28-37
%K Bus contention, interference, memory conflict, memory mapping,
multiple-microprocessor system,
Multimicroprocessor system

%A L. W. Fung
%T A Massively Parallel Processing Computer
%E D. J. Kuck
%E others
%B High Speed Computer and Algorithm Organization
%C New York
%I Academic Press
%D 1977
%P 203-204
%K MPP

%A Mark Furtney
%A Terrence W. Pratt
%T Kernel-control tailoring of sequential programs for parallel execution
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 245-247
%K
%O Large-scale scientific processing

%A A. Fusi
%A G. Sommi
%T Distributed Virtual Systems
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 41-49
%K
%O Distributed Systems Structure

%A Dieter Fuss
%A Carol G. Tull
%T Centralized Supercomputer Support for Magnetic Fusion Energy Research
%J Proceedings of the IEEE
%V 72
%N 1
%D January 1984
%P 32-41
%K LLNL MFECC,
Special issue -- Supercomputers - Their Impact on Science and Technology
%X A description of an applications environment.  It says more of physics
and Livermore than of computer science.
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984, pp. 452-461.

%A John Gabriel
%A Tim Lindholm
%A E. L. Lusk
%A R. A. Overbeek
%T Logic Programming on the HEP
%E Janusz S. Kowalik
%B Parallel MIMD Computation: HEP Supercomputer and Its Applications
%I MIT Press
%C Cambridge, MA
%D 1985
%P 181-202
%K Programming and languages, Prolog, AND-parallelism, OR-parallelism,
%X Oriented to the 5th generation.....

%A Richard P. Gabriel
%A John McCarthy
%T Queue-based Multi-processing Lisp
%I Stanford University Dept. of Computer Science
%R STAN-CS-84-1007
%D June 1984

%A Armen Gabrielian
%A Douglas B. Tyler
%T Optimal Object Allocation in Distributed Computer Systems
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 88-95
%O Software allocation to distributed hardware

%A Peter Gacs
%T Reliable Computation with Cellular Automata
%I Dept. of Computer Science, University of Rochester
%C Rochester, NY
%R TR132

%A Peter Gacs
%A John H. Reif
%T A Simple Three-Dimensional Real-Time Reliable Cellular Array
%R Tech Report #85/002
%I Computer Science Dept., Boston University
%C Boston, MA
%D March 1985
%K Theory,

%A J. A. Gadsden
%T ADNET: An Experiment in Computer Networking for the Royal Navy
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 351-356
%K
%O Distributed Computing Testbeds

%A W. W. Gaertner
%A M. P. Patel
%A S. S. Reddi
%A C. T. Retter
%A I. M. Singh
%T High-Resolution image processing on a parallel computer system
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 33
%K
%O applications: image processing
%X Summary only.

%A W. W. Gaertner
%A M. P. Patel
%A C. T. Retter
%A I. M. Singh
%T Construction of a versatile data manipulator for parallel/associative
processors
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 72
%K
%O System architecture and organization
%X Summary only.

%A W W. Gaertner
%T Architecture for a Highly Reliable Parallel Computer System
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 125
%K
%O Associative/parallel processors

%A Robert D. Gaglianello
%A Howard P. Katseff
%T Meglos: An Operating System for a Multiprocessor Environment
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Distributed Operating System, S/NET, MPS,
%P 35-42
%X This variant of UNIX uses additions to system calls and modifications
to existing read/write calls on channels (not streams as in SV.3) for
synchronization and communication.  There are 12 68000s on a backplane
interconnections with 80 Mb/S thruput.

%A G. Gaillat
%T The Design of a Parallel Processor for Image Processing On-Board
Satellites: An Application Oriented Approach
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%D 1983
%V 11
%N 3
%P 379-386
%O architectures for image processing

%A R. S. Gaines
%A C. Y. Lee
%T An Improved Cell Memory
%J IEEE Transactions on Electronic Computers
%D February 1965
%P 72-75

%A Peter Gais
%A Karsten Rodenacker
%A Uta Jutting
%T Lokale Logische Algorithem fur Binarbilder
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 253-258
%D 1984
%K Array processor 120B,
%X In the original German.

%A Jason Gait
%T A Distributed Process Manager with Transparent Continuation
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Software approach to fault tolerance,
competition to respond, concurrent programming, engineering workstations,
failure transparency, location transparency, parallel access,
process management, redundency, replication transparency,
transparent continuation,
%P 422-429

%A D. D. Gajski
%A D. H. Lawrie
%A J-K. Peir
%A A. Veidenbaum
%A P-C. Yew
%T Second Preliminary Specification of Cedar
%R Cedar Document No. 8
%I Computer Science Department, University of Illinois
%K
instruction set

%A D. D. Gajski
%A D. J. Kuck
%A D. A. Padua
%T Dependence driven computation
%J Spring 1981 Compcon
%I IEEE
%D 1981
%P 168-172

%A D. D. Gajski
%A A. H. Sameh
%A J. A. Wisniewski
%T Iterative algorithms for tridiagonal matrices on a WSI-multiprocessor
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 82-89
%K
U. Ill, WSI (Wafer scale intergration)
%O Numerical algorithms

%A D. D. Gajski
%A D. A. Padua
%A D. J. Kuck
%A R. H. Kuhn
%T A Second Opinion on Data Flow Machines and Languages
%J Computer
%V 15
%N 2
%D Feb. 1982
%P 15-25
%K Recommended,
%X (SKS) or why I'm afraid people won't use FORTRAN.
This paper should only be read (by beginners) in conjection a pro dataflow
paper for balance: maybe McGraw's "Physics Today" May 1984.
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%A D. D. Gajski
%A D. H. Lawrie
%A D. J. Kuck
%A A. H. Sameh
%T CEDAR
%J Digest of Papers COMPCON, Spring 84
%I IEEE
%D Feb. 1984
%P 306-309
%K Very high-end architectures
%X Short introduction to the CEDAR multiprocessor.  Longer papers exist
in The 10th Arch. Symposium and the 1983 Parallel Processing Proceedings.

%A D. D. Gajski
%T Recurrence semigroups and their relation to data storage in fast
recurrence solvers in parallel machines
%J CONPAR 81 Proceedings
%C Nurnberg
%D June 1981), Springer-Verlag.  \" recurrence discussion

%A Daniel Gajski
%A David Kuck
%A Duncan Lawrie
%A Ahmed Sameh
%T Cedar \(em a large scale multiprocessor
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 524-529
%K Recommended,
U Ill, MIMD, Parafrase, multi-level parallelism, multiprocessor systems

%A Daniel Gajski
%A David Kuck
%A Duncan Lawrie
%A Ahmed Sameh
%T Cedar
%R UIUCDCS-R-83-1123
%I Dept. of Computer Science, University of Illinois
%C Urbana-Champaign
%D February 1983
%X
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%A Daniel Gajski
%A David Kuck
%A Duncan Lawrie
%A Ahmed Sameh
%T Construction of a Large Scale Multiprocessor
%R UIUCDCS-R-83-1123 (UILU-ENG 83 1704) Cedar Document No. 5
%I Computer Science Department, University of Illinois
%D February 1983
%K
U Ill, Cedar, overview, hardware (instruction set, architecture) and software
(operating system and compilers),

%A Daniel Gajski
%A David Kuck
%A Duncan Lawrie
%A Ahmed Sameh
%T Cedar \(em a large scale multiprocessor
%J Computer Architecture News
%V 11
%N 1
%D March 1983
%P 7-11

%A Daniel Gajski
%A Won Kim
%A Shinya Fushimi
%T A Parallel Pipelined Relational Query Processor: An Architectural
Overview
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%D June 1984
%P 134-141
%K database issues

%A Daniel Gajski
%A Jih-Kwon Peir
%T Essential Issues in Multiprocessor Systems
%J Computer
%I IEEE
%V 18
%N 6
%D June 1985
%P 9-27
%X The performance of a multiprocessor system depends on how it
handles the key problems of control, partitioning, scheduling,
synchronization, and memory access
%K parallel processor vector shared memory message passing tightly
loosely coupled dataflow partitioning cedar csp occam hep
synchronization

%A Daniel D. Gajski
%T Processor Arrays for Computing Linear Recurrence Systems
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 246-256
%K
%O Arithmetic processors

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T Solving Banded Triangular Systems on Pipelined Machines
%A Daniel D. Gajski
%P 308-319
%O Pipelining

%T Parallel Compressors
%A Daniel D. Gajski
%J IEEE Transactions on Computers
%V C-29
%N 5
%D May 1980
%P 393-398
%K Associative processors, carry-shower counters, content-addressable
memory, elementary logic functions, fast multipliers, high-speed
arithmetic, multiple-operand addition, parallel counters
%O Correspondence

%T An Algorithm for Solving Linear Recurrence Systems on Parallel and
Pipelined Machines
%A Daniel D. Gajski
%J IEEE Transactions on Computers
%V C-30
%N 3
%D March 1981
%P 190-206
%K Complexity of algorithms, computer organization, linear recurrences,
parallel evaluation, parallel processors, pipelined processors,
triangular system solvers

%A Gus A. Galatianos
%A Wang-Chuan Tsai
%T Performance Evaluation of Database Update Synchronization on
Ethernet Environments
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 503-512
%O Distributed synchronization algorithms

%A Jay Galbraith
%T Designing Complex Organizations
%I Addison-Wesley
%D 1973

%A Jay R. Galbraith
%T Organization Design
%I Addison-Wesley
%D 1977

%A Z. Galil
%A W. Pauli
%T An Efficient General-Purpose Parallel Computer
%J Journal of the ACM
%V 30
%P 286-299
%D 1983

%A Letizia Galli
%A Giovanni Resta
%T Implementation of a Data Flow Algorithm for Linear Programming
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 153-158
%D 1984
%K DAP,

%A Efstatios Gallopolos
%A Scott McEwan
%T Numerical Experiments with the Massively Parallel Processor
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 29-35
%K
NASA GFSC, MPP, simulation, Navier-Stokes solver,
numerical algorithms
%X U Ill., see also UIUCDCS-R-83-1124 (UILU-ENG 83 1705).
%r UIUCDCS-R-83-1124 (UILU-ENG 83 1705)
%d February 1983

%A E. Gallopoulos
%T The Massively Parallel Processor for Problems in Fluid Dynamics
%J Proc. Vector and Parallel Processors in Computational Science II
Conference
%C Oxford, England
%D 1984
%K MPP

%A Efstratios Gallopoulos
%T Processor Arrays for Problems in Computational Physics
%I Department of Computer Science, Ill.
%R UIUCDCS-R-85-1193
%D January 1985
%K PhD thesis

%A E. Galloppoulos
%A S. McEwan
%A D. Visek
%T MPP Simulator Manual
%I University of Illinois, Urbana-Champaign
%R UIUCDCS-R-82-1075
%D April 1982
%K Massively Parallel Processor

%A Lawrence A. Gambino
%A Roger L. Boulis, Sr.
%T STARAN Complex Defense Mapping Agency US Army Engineer Topographic
Laboratories
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 132-141
%K
%O STARAN

%A N. D. Gammage
%A L. M. Casey
%T The Software Architecture of a Distributed Processing System
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 414-420
%K Distributed systems, tasking, rendezvous, local area networks,
remote procedure calls
%O Control architectures

%A Neil Gammage
%A Liam Casey
%T XMS: a rendezvous-based distributed system software architecture
%J IEEE Software
%V 2
%N 3
%P 9-19
%D MAY 1985
%X XMS creates a single, powerful system from loosely-coupled microcomputers.
Programs work together across nodes, making systemwide resource management
transparent and distributed system design simpler

%A D. Gannon
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T A Note on Pipelining a Mesh Connected Multiprocessor for Finite
Element Problems by Nested Dissection
%P 197-204
%O Numerical Algorithms and Applications

%A D. Gannon
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T On Mapping Non-uniform P.D.E. Structures and Algorithms onto Uniform
Array Architectures
%P 100-105
%O Numerical Algorithms

%A D. Gannon
%A J. R. Van Rosendale
%T Highly Parallel multigrid solvers for elliptic PDEs: An experimental
analysis
%R ICASE Report No. 82-36
%D November 17, 1982
%J \fRSubmitted to\fP SIAM J. Sci. Statistical Comput.

%A D. Gannon
%A L. Snyder
%A J. Van Rosendale
%T Programming Substructure Computation for Elliptic Problems on the CHiP
System
%B Impact of New Computing Systems on Computational Mechanics
%E A. Noor, (Ed.)
%I The American Society of Mechanical Engineers
%P 65-80
%D 1983

%A D. Gannon
%A J. R. Van Rosendale
%T Parallel architectures for iterative methods on adaptive, block structured
grids
%J Elliptic Problems Solvers Conference
%D January 1983
%I Academic Press

%A D. Gannon
%A J. Van Rosendale
%T Parallel Architectures for Iterative Methods on Adaptive, Block
Structured Grids
%E G. Birkhoff
%E A. Schoenstadt
%B Elliptic Problem Solvers
%I Academic Press
%C New York
%D 1984
%P 93-104

%A D. Gannon
%A J. Van Rosendale
%T On the Impact of Communication Complexity in the Design of Parallel
Numerical Algorithms
%J IEEE Transactions on Computers
%V C-33
%P 1180-1194
%D 1984

%A D. Gannon
%A J. Panetta
%T SIMPLE on the CHiP
%I Purdue University
%r CSD-TR-469
%d 1984
%T Restructuring SIMPLE for the CHiP Architecture
%J Parallel Computing
%D 1985

%A D. Gannon
%A S. Bechtolsheim
%A A. Kapuan
%T The Systolic BLAS: An Experiment in Parallel Algorithm Design
%J Digest of Papers, Compcon85 Thirtieth IEEE Computer society
International Conference
%I IEEE Computer Society
%D February 25-28, 1985
%P 66-70

%A D. B. Gannon
%A L. Snyder
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Linear Recurrence Systems for VLSI:  The Configurable, Highly Parallel
Approach
%P 259-260
%O VLSI Architectures

%A Dennis Gannon
%T Pipelining array computations for MIMD parallelism: a function specification
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 284-286
%K
Purdue, systolic arrays
%O MIMD processing

%A Chuanshan Gao
%A Jane W. S. Liu
%A Malcolm Railey
%T Load balancing Algorithms in Homogeneous Distributed Systems
%r UIUCDCS-R-84-1168
%d June 1984
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 302-306
%K balance average arrival rates, balance unfinished work, simulation
%O theory

%A G. R. Gao
%T An Implementation Scheme for Array Operations in Static Data Flow Computer
%R MS thesis
%I Laboratory for Computer Science, MIT
%C Cambridge, MA
%D June 1982

%A Guang R. Gao
%T Maximum Pipielining Linear Recurrence on Static Data Flow Computers
%I MIT
%C Cambridge, MA
%D September 1984
%K prelininary

%A Q. S. Gao
%A X. Zhang
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Architecture of the First Vector Computer of China
%P 300-301
%O

%A Miguel E. Garcia
%A W. Joseph Berman
%T An Approach to Concurrent Systems Debugging
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Distributed Debugging & Monitoring, Petri nets, Path Pascal,
%P 507-514

%A O. N. garcia
%A J. McNally
%T Parallelism in Simulation
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 133-136
%K simulation of hardware and software
%X A short paper comparing simulation to compilation-execution.
Analogy covers phases (passes), detection and exploitation of parallelism.
Too short to really go into depth.

%A Hector Garcia-Molina
%T Centralized Control Update Algorithms for Fully Redundant Distributed
Data Bases
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 699-706
%O Distributed data bases processing and control

%T Elections in a Distributed Computing System
%A Hector Garcia-Molina
%J IEEE Transactions on Computers
%V C-31
%N 1
%D January 1982
%P 48-59
%K Crash recovery, distributed computing systems, elections, failures,
mutual exclusion, reorganization
Distributed computing

%T Read-Only Transactions in a Distributed Database
%A Hector Garcia-Molina
%A G. Wiederhold
%J ACM Transactions on Database Systems
%V 7
%N 3
%D June 1982
%P 209-234
%K Concurrency control, consistency, currency, query, R insularity,
read-only transaction, schedule, serializability, transaction,
transaction processing algorithm
C.2.4 [Computer-Communication Networks]:
distributed systems - distributed databases;
H.2.4 [Database Management]: systems - distributed processing;
query processing

%A Hector Garcia-Molina
%A Daniel Barbara
%T Optimizing the Reliability Provided by Voting Mechanisms
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 340-346
%O Synchronization in distributed fault-tolerant systems

%T Evaluating Response Time in a Faulty Distributed Computing System
%A Hector Garcia-Molina
%A Jack Kent
%J IEEE Transactions on Computers
%V C-34
%N 2
%D February 1985
%P 101-109
%K Distributed computing system, failure models, graceful degradation,
performance evaluation, reliability evaluation, response time
%O Distributed Systems

%T A Distributed Control Algorithm for Reliably and Consistently Updating
Replicated Databases
%A Georges Gardarin
%A Wesley W. Chu
%J IEEE Transactions on Computers
%V C-29
%N 12
%D December 1980
%P 1060-1068
%K Concurrency, deadlock, distributed control, locking, lock table,
recovery, replicated databases, time stamps, two-step commit
%O Special issue on distributed processing systems

%A Hector Gardcia-Molina
%A Richard J. Lipton
%A Jacobo Valdes
%T A Massive Memory Machine
%J IEEE Transactions on Computers
%V C-33
%N 5
%D May 1984
%P 391-390
%K Cache, computer architecture, massive memory, memory bound computation,
reliability, supercomputer,
Computer architecture

%A M. R. Garey
%A R. L. Graham
%T Bounds on Scheduling with Limited Resources
%J Proceedings of the 4th Symposium on Operating Systems Principles,
Operating Systems Review
%V 7
%N 4
%D October 1973
%P 104-111

%A M. R. Garey
%A D. S. Johnson
%T Complexity results for multiprocessor scheduling under resource constraints
%J SIAM Journal on Computing
%V 4
%N 4
%D December 1975
%P 397-411
%K scheduling
%X Considers an abstract model of a multiprocessor system and obtains lower
bounds on the complexity of scheduling algorithms for this model.  Presents
an important but rather depressing result-almost all interesting scheduling
problems are NP-complete.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A M. R. Garey
%A R. L. Graham
%T Bounds for multiprocessor scheduling with resource constraints
%J SIAM Journal on Computing
%V 4
%N 2
%D June 1975
%P 187-200
%K scheduling
%X Presents upper and lower bounds for non-preemptive scheduling algorithms
applicable to a multiprocessor system composed of identical processors.  The
tasks are assumed to have precedence constraints and nonidentical resource
requirements.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A M. R. Garey
%A D. S. Johnson
%T Scheduling tasks with nonuniform deadlines on two processors
%J Journal of the ACM
%V 23
%N 3
%D July 1976
%K scheduling

%A M. R. Garey
%A D. S. Johnson
%T Two-processor scheduling with start-times and deadlines
%J SIAM Journnal on Computing
%V 6
%N 3
%D September 1977
%K scheduling

%A Michael R. Garey
%A Frank K. Hwang
%A David S. Johnson
%T Algorithms for a Set Partitioning Problem Arising in the Design of
Multipurpose Units
%J IEEE Transactions on Computers
%V C-26
%N 4
%D April 1977
%P 328
%K Circuit card libraries, cost minimization, design automation,
dynamic programming, partitioning algorithms,
Algorithms

%A Michael R. Garey
%A David S. Johnson
%T Computers and Intractability: A Guide to the Theory of NP-Completeness
%I W. H. Freeman and Company
%C San Francisco
%D 1979
%X Useful complexity results for scheduling; see especially
pp. 82-83. Used in 'The Utility of Meta-level Effort' paper

%A K. Garg
%T An Approach to Performance Specification of Communication Protocols Using
Timed Petri Nets
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 202-212
%O Network performance analysis

%A Thomas D. Garvey
%A John D. Lowrance
%A Martin A. Fischler
%T An inference technique for integrating knowledge from disparate sources
%J IJCAI-81
%P 319-325

%A J. Gary
%T Analysis of Applications Programs and Software Requirements for High
Speed Computers
%E D. Kuck
%E D. Lawrie
%E A. Sameh
%B High Speed Computer and Algorithm Organization
%I Academic Press
%C New York
%D 1977
%P 329-354

%A J. Gary
%A S. McCormick
%A R. Sweet
%T Successive Overrelaxation Multigrid, and Preconditioned Conjugate
Gradients Algorithms for Solving a Diffusion Problem on a Vector Computer
%J Appl. Math. & Comp.
%V 13
%P 285-309
%D 1983

%A J. Patrick Gary, ed.
%T CYBER 200 Applications Seminar
%R NASA Conference Publication 2295
%D October 1983
%I NASA Goddard Space Flight Center
%C Greenbelt, Maryland
%P 3-13

%A J. -L. Gaudiot
%A M. D. Ercegovac
%T A scheme for handling arrays in data-flow systems
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 724-729
%K
%O Data Flow Languages

%A J. L. Gaudiot
%A M. D. Ercegovac
%T Performance Analysis of a Data Flow Computer with Variable Resolution Actors
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 2-9
%O Data flow systems

%A J. L. Gaudiot
%T Methods for Handling Structures in Data-Flow Systems
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K data flow and reduction
%C Boston, MA
%P 352-358

%A J. L. Gaudiot
%A C. S. Raghavendra
%T Fault-Tolerance and Data-Flow Systems
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Data Flow Systems
%P 16-23
%X Not a bad survey of the issues of this frequently overlooked issue.

%A M. Gautzsch
%A G. Weiland
%A D. Muller-Richards
%T Possibilities and Problems with the Application of Vector Computers
%I German Research and Testing Establishment for Aerospace
%D 1980

%A B. Gavish
%A H. Koch
%T An Extensible Architecture for Data Flow Processing
%J The Papers of the Fourth Workshop on Computer Architecture for
Non-Numeric Processing
%D April 1978
%P 71-76

%A J. Gecsei
%A J.-P. Brassard
%T The Topology of Cellular Partitioning Networks
%J IEEE Transactions on Computers
%V C-30
%N 2
%D February 1981
%# No Page number %P

%A Jan Gecsei
%T Interconnection Networks from Three-State Cells
%J IEEE Transactions on Computers
%V C-26
%N 8
%D August 1977
%P 705-711
%K Cellular arrays, partition networks, switching networks,
Cellular networks

%A Narain H. Gehani
%T Broadcasting Sequential Processes (BSP)
%J IEEE Transactions on Software Engineering
%V SE-10
%N 4
%D July 1984
%P 343-352
%K broadcast multiprocessors (BPM),
distributed systems
%X This system is based on an obvious idea untried by the owners of many Cray
(LLNL, LASL).  Computers work together on a single problem interconnected
via a simple network (Ethernet is this example).  The protocol bases it
self around a command called SHOUT.  An example of shouting dinning
philosophers.

%A E. F. Gehringer
%A Anita K. Jones
%A Z. Z. Segall
%T The Cm* testbed
%J Computer
%V 15
%N 10
%D Oct. 1982
%P 40-53

%A Edward F. Gehringer
%T Capability Architectures and Small Objects
%I UMI Research Press
%C Ann Arbor, MI
%D 1982
%K PhD thesis,

%A Kurt Geihs
%T Design Considerations for a Fault-Tolerant Distributed Processor System
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 533-543
%O Recovery in fault-tolerant distributed systems

%A Erol Gelenbe
%A Ken Sevcik
%T Analysis of Update Synchronization for Multiple Copy Data Bases
%J IEEE Transactions on Computers
%V C-28
%N 10
%D October 1979
%P 737-747
%K Coherence, multiple copy information system,
update synchronization techniques,
Distributed systems

%A Erol Gelenbe
%A Alain Lichnewsky
%A Andreas Staphylopatis
%T Experience with the Parallel Solution of Partial Differential Equations
on a Distributed Computing System
%J IEEE Transactions on Computers
%V C-31
%N 12
%D December 1982
%P 1157-1164
%K Distributed system, numerical analysis, parallel computation,
performance evaluation, probabilistic model, speed gain,
Distributed computing

%A D. Gelernter
%A A. J. Bernstein
%T Distributed Communications via Global Buffer
%T Language Constructs and Support Systems for Distributed Computing
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 10-18

%A David Gelernter
%T Dynamic global name spaces on network computers
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 25-31
%K Linda (distributed processing language),
%O distributed systems

%T Parallel Programming in Linda
%A David Gelernter
%A Nicholas Carriero
%A Sarat Chandran
%A Silva Chang
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 255-263
%K Languages for Parallel Processing

%A O. Gelly
%A others
%T Lau system software: A high level data driven language for
parallel programming
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 255
%K
%O Language issues
%X Summary only.

%A P. Gemmar
%A H. Ischen
%A K. Luetjen
%T FLIP: A Multiprocessor System for Image Processing
%B Languages and Architectures for Image Processing
%E M. J. B. Duff
%E S. Levialdi
%I Academic Press
%C New York, NY
%D 1981
%P 245-256

%A Peter Gemmar
%T Image Correlation: Processing Requirements and Implementation Structures
on a Flexible Image Processing System (FLIP)
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 87-98

%A T. B. Genduso
%A S. Y. W. Su
%T An analytical model of the MICRONET distributed database management
system
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 232-237
%K
%O Microprocessor Networks

%A W. Gentleman
%T Error Analysis of the QR Decomposition by Givens Transformations
%J Linear Algebra & Applications
%V 10
%P 189-197
%D 1975
%X Remove?

%A W. Gentleman
%T Design of Numerical Algorithms for Parallel Processing
%J Parallel Processing Conference
%C Bergams, Italy
%D 1981

%A W. Gentleman
%A H. Kung
%T Matrix Trangularization by Systolic Arrays
%J Proc. SPIE 298, Real-Time Signal Processing IV
%P 19-26
%D 1981

%A W. M. Gentleman
%T Some complexity results for matrix computations on parallel processors
%J Journal of the ACM
%V 25
%N 1
%D January 1978
%P 112-115
%K Recommended

%A W. Gentzsch
%T How to Maintain the Efficiency of Highly Serial Algorithms Involving
Recursions on Vector Computers
%J Proc. Conf. Vector and Parallel Methods in Scientific Computing
%C Paris
%D 1983

%A W. Gentzsch
%T Vectorization of Computer Programs with Applications to Computational
Fluid Dynamics
%I Heyden & Son
%C Philadelphia, PA
%D 1984
%X Remove?

%A W. Gentzsch
%T Benchmark Results on Physical Flow Problems
%B Proceedings of the NATO Workshop on High Speed Computations
%E J. Kowalik
%S NATO ASI Series
%V F-7
%I Springer-Verlag
%P 211-228
%D 1984

%A Wolfgang Gentzsch
%T Solution of Large Linear Systems on Vector Computers
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 159-166
%D 1984
%X This is yet another linear methods tried on different computers
comparison paper.

%A Wolfgang Gentzsch
%T Numerical Algorithms in Computational Fluid Dynamics on Vector
Computers
%J Parallel Computing
%V 1
%N 1
%D August 1984
%P 19-33
%K Computational fluid dynamics, vector computers, numerical methods,
CRAY-1S, CYBER-205, programming

%A A. C. Genz
%T Numerical Multiple Integration on Parallel Computers
%I Kent University

%A Alan Genz
%A D. A. Swayne
%T Parallel Implementation of ALOD Methods for Partial Differential Equations
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 167-172
%D 1984
%K ALOD - Alternating locally one-dimension,
%X This is yet another linear methods tried on different computers
comparison paper.

%A A. George
%T An Efficient Hand-Oriented Scheme for Solving n by n Grid Problems
%J Proc. 1972 FJCC
%I AFIPS Press
%C Montvale, NJ
%P 1317-1321
%D 1972
%X Remove?

%A A. George
%T Nested Dissection of a Regular Finite Element Mesh
%J SIAM J. Numer. Anal.
%V 10
%P 345-363
%D 1973
%X Remove?

%A A. George
%T Numerical Experiments Using Dissection Methods to Solve n by n Grid
Problems
%J SIAM J. Numer. Anal.
%V 14
%P 161-179
%D 1977
%X Remove?

%A A. George
%A J. Liu
%T Computer Solution of Large Sparse Positive Definite Systems
%I Prentice Hall
%C Englewood Cliffs, NJ
%D 1981
%X Remove?

%T Parallel Cholesky Factorization on a Multiprocessor
%A Alan George
%A Michael T. Heath
%A Joseph Liu
%I University of Waterloo

%A J. Alan George
%A W. G. Poole, Jr.
%A R. G. Voigt
%T Analysis of dissection algorithms for vector computers
%J Comput. Math. Appl.
%V 4
%D 1978
%P 287-304
%r ICASE Report No. 76-16
%d June 1, 1976

%A J. Alan George
%A W. G. Poole, Jr.
%A R. G. Voigt
%T A variant of nested dissection for solving n by n grid problems
%J SIAM J. Numerical Analysis
%V 15
%N 4
%D August 1978
%P 662-673
%r ICASE Report No. 76-16
%d June 1, 1976

%A P. I. Georgiadis
%A M. P. Papazoglou
%A D. G. Maritsas
%T Towards a Parallel SIMULA Machine
%J Proceedings of 8th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 9
%N 3
%D May 1981
%P 263-278
%O parallel processing

%A A. Gerdts
%T First Experiences with an Emulation of a System of Cooperating Reduction
Machines
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 8.8-8.15

%A Steven M. German
%T Monitoring for Deadlock and Blocking in Ada Tasking
%I IEEE Transactions on Software Engineering
%V SE-10
%N 6
%D November 1984
%K Concurrent algorithms, concurrent programming languages,
correctness proofs of concurrent programs, deadlock detection,
exceptions, program transformations, semantics of Ada tasking,
state graph models, task identifiers,
Practice

%A F. A. Gerritsen
%A R. D. Monhemius
%T Evaluation of the Delft Image Processor DIP-1
%B Languages and Architectures for Image Processing
%E M. J. B. Duff
%E S. Levialdi
%I Academic Press
%C New York, NY
%D 1981
%P 189-203

%A F. A. Gerritsen
%T A Comparison of the CLIP4, DAP and MPP Processor Array Implementations
%E M. J. B. Duff
%B Computing Structures for Image Processing
%I Academic Press
%D 1983
%P 15-30

%A F. A. Gerritsen
%T Comparison of Processor-Arrays with Pipe-Line-Processors for Image
Processing (In Dutch)
%J Symposium "Bijzondere Rekenautomaten voor technische en
Wetenschappelijke Toepassingen"
%I National Aerospace Laboratory NLR
%D January 26, 1983
%C Amsterdam, The Netherlands
%K Image processing, pipelining (computers), processor arrays, computer
architecture, parallel processing (computer), digital computers,
performance
%X Reproduced for NASA by the NASA Scientific and Technical Information
Facility

%A I. Gertner
%T A Report on Process Management in a Guest Distributed System
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 206-211
%K
%O Network Operating Systems

%A I. Gertner
%A R. Lindenberg
%T Initializing replicated name servers in a wide area network
%B Proceedings Third Symposium on Reliability in Distributed Software
and Database Systems
%C Clearwater Beach, FL, USA
%P 90-94
%O 10 REFS. Treatment PRACTICAL
%I IEEE Comput. Soc. Press
Silver Spring, MD, USA, p: viii+195
%D 17-19 Oct. 1983
%K computer networks reliability
replicated name servers wide area network responsiveness initialization
network failures
%X A name server is a utility for supporting naming, storage, and
retrieval of network-visible objects. Reliability and responsiveness
of the name server in a large network can be greatly enhanced by
replicating the service on many physical sites. The replication of
the service requires the different name servers to coordinate their
activities. Initialization of a set of replicated servers requires
that a server locates all other servers and that a user locates at
least one server. The authors describe initialization algorithms
which are robust and recover automatically from the most common
network failures. Some exceptional cases may still require
interference from a systems administrator

%A Hans Gethoffer
%T A Concept of Hardware and Software for Digital Signal Processing
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 275-279
%K Cross bus, butterfly processor,
applications

%A Fredric Gey
%A Deane Merrill
%A John McCarthy
%A Harvard Holmes
%T Distributed SEEDIS: An Information Systems Using Local Area and
Long Distance Networks
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 243-247
%O Special applications

%A Fawzi F. Ghertal
%A S. Mamrak
%T An Optimistic Concurrency Control Mechanism for an Object Based
Distributed System
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Distributed Concurrency Control, synchronization, deadlock,
%P 236-245

%A J. C. Gibson
%T The Gibson Mix
%R TR-00.2043
%I IBM Systems Development Division
%C Poughkeepsie, NY 12601
%D June 18. 1970

%A Randall Gibson
%A Paul Anderson
%T Technical Overview of the Renaissance OCTOBUS Systems
%J Computer Architecture News, (SIGARCH)
%I ACM
%V 7
%N 8
%D June 1979
%P 2-9
%K distributed processing, concurrency, microcomputer
%X This is a short commercial presentation describing a bus-oriented
multiprocessor.

%T Coordinating Independent Atomic Action
%A David K. Gifford
%J Digest of Papers, Compcon85 Thirtieth IEEE Computer society
International Conference
%I IEEE Computer Society
%D February 25-28, 1985
%P 92-95

%A B. K. Gilbert
%A R. D. Beistad
%A L. M. Krueger
%T A Hierarchical Network of Processors for computed Tomography
Computation on Large Data Bases
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 423-431
%K
%O Distributed Systems in Specific Applications

%A Barry K. Gilbert
%A Thomas M. Kinter
%A Loren M. Krueger
%T Advances in Processor Architecture, Device Technology, and Computer-Aided
Design for Biomedical Image Processing
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 385-407
%X General survey of multiprocessing with a biomedical slant.  Includes
short descriptions of cross-bars versus cube interconnect, software, and
VLSI.

%A E. O. Gilbert
%T A Special Digital Computer for High-Speed Function Generation in Hybrid
and Digital Simulation
%J Proc., Int'l Congress, IMACS
%D 1976
%P 471-481

%A E. O. Gilbert
%A R. M. Howe
%T Design Considerations in A Multiprocessor Computer for Continuous
Systems Simulation
%J AFIPS NCC Conf. Proc.
%V 47
%D 1978
%P 385-393

%A Erik James Gilbert
%T An Investigation of the Partitioning of Algorithms Across an MIMD Computing
System
%R Tech. Note No. 176
%I Stanford University
%C Stanford, CA
%D May 1980
%K S-1, shared memory, vector processor, cache memory,

%A Erik James Gilbert
%T Algorithm Partitioning Tools for a High-Performance Multiprocessor
%R STAN-CS 83-946
%I Stanford University
%C Stanford, CA, 94305
%D February 1983
%K S-1 project, shared memory, vector processor, cache memory,
%X Partitioning is the process of formulating a single application
program so that it runs on a system of multiple cooperating processors.
When cooperating in this fashion, the processors share the computational
work of the problem.  This dissertation investigates tools which a
programmer may use to simplify the partitioning of algorithms for
effective execution on a high-performance multiprocessor.  The motivation
for partitioning assumed is simple decrease in overall execution time,
i.e. multiprocessor speedup of the algorithm.  Focus is provided by
emphasis on the structure of a particular system currently under
construction, the S-1 multiprocessor.  The S-1 consists of 16 very
high-performance general-purpose uniprocessors connected to a uniformly
addressed, fully shared memory.
   A large number of mechanisms, techniques, and environments are
included in the set of tools useful in constructing a partitioned
algorithm.  The categories of tools considered in this dissertation are:
(1) programming language mechanisms for specification and control of
partitioning; (2) operating system mechanisms for controlling parallel
execution; (3) hardware mechanisms for synchronization, communication, and
sharing; (4) automatic aids for discovering and defining parallelism in
algorithms; (5) simulation environments for studying aspects of parallel
execution with various parameters; (6) debugging tools for use in real and
simulated multiprocessing; and (7) performance monitoring and tuning
tools.
   The tools proposed in this dissertation have been successfully
applied to the task of partitioning a number of sample programs, which
were selected as representative of realistic multiprocessor
applications.  The partitioning experiments helped discover potential
performance difficulties, and also suggested ways to enhance the set
of tools.

%A M. C. Gilliland
%A Burton J. Smith
%A W. Calvert
%T HEP: a semaphore-synchronized multiprocessor with central control
%J Proc. 1976 Summer Computer Simulation Conf.
%C Washington, D.C.
%D July 1976
%P 57-62
%K multiprocessor architectures and operating systems
%X HEP-heterogeneous element processor-is a multiprocessor designed
specifically for high performance in simulation applications.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A P. A. Gilmore
%T Structuring of Parallel Algorithms
%J Journal of the ACM
%P 176-192
%V 15
%D 1968

%A P. A. Gilmore
%T Numerical Solution to Partial Differential Equations by Associative
Processing
%J Proc. AFIPS Fall Joint Computer Conference
%V 39
%D 1971
%I AFIPS Press
%C Montvale, NJ
%P 411-418

%A P. A. Gilmore
%T Matrix computations on an associative processor
%r GER-15260, Goodyear Aerospace
%d June 1971
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 272-290
%K
%O Computation algorithms

%A Paul A. Gilmore
%T The Computer MPP
%J International Society of Photogrammetry and Remote Sensing Commission II
Symposium
%D September 1982
%C Ottawa, Canada
%K Massively Parallel Processor

%A Paul C. Gilmore
%T Defining and Computing Many-Valued Functions
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 17-23

%A W. Giloi
%A H. Berg
%T Introducing the concept of data structure architectures
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 44-
%K
%O Distributed function architectures

%A W. K. Giloi
%A P. Behr
%T An IPC Protocol and Its Hardware Realization for a High-Speed
Distributed Multicomputer System
%J Proceedings of 8th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 9
%N 3
%D May 1981
%P 481-494
%O interconnection

%A W. K. Giloi
%A P. Behr
%T Hierarchical Function Distribution \(em A Design Principle for Advanced
Multicomputer Architectures
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%D 1983
%V 11
%N 3
%P 318-325
%O multicomputers and multiprocessors

%A Wolfgang K. Giloi
%A Helmut Berg
%T Data Structure Architectures: A New Approach to Parallel Processing
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 327-331
%K multi-processors and parallel computers
%X A simple look at array and linear structures of processing elements.

%T Design and Implementation of Switching Systems for Parallel Processors
%A Ran Ginosar
%A Dwight D. Hill
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 674-680
%K Parallel Systems

%A M. Ginsburg
%T Some Observations on Supercomputer Computational Environments
%J Proc. 10th IMACS World Congress on Systems Simulation and Scientific
Computation
%V 1
%I IMACS
%P 297-301
%D 1982

%A A. Giordana
%A P. Laface
%A L. Saitta
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Modelling Control Strategies and Artificial Intelligence Applications
%P 347-350
%O

%A C. Girault
%A M. Morcrette
%T Syntactic Analysis by Specialized Parallel Operations
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 211-215
%K Petri nets and related topics

%A E. Giroux
%T A Large Mathematical Model Implementation on the STAR-100 Computer
%E D. Kuck
%E D. Lawrie
%E A. Sameh
%B High Speed Computer and Algorithm Organization
%I Academic Press
%C New York
%D 1977
%P 287-298

%A E. D. Giroux
%T Vectorizing and Machie-Spanning Techniques
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 303-309
%D 1984

%A J. A. Githens
%T An Associative, Highly-Parallel Computer for Radar Data Processing
%E L. C. Hobbs
%E D. J. Theis
%E Joel Trimble
%E Harold Titus
%E Ivar Highberg
%B Parallel Processor Systems, Technologies and Applications
%I Spartan Books
%C New York, New York
%D 1970
%P 71-86
%K Applications

%T User Defined Parallel Control Strategies
%A J. I. Glasgow
%A M. A. Jenkins
%A C. D. McCrosky
%I Dept. of Computing and Information Science, Queen's University
%C Kingston, Canada - Ontario
%R TR-84-163

%A J. R. W. Glauert
%T High Level Dataflow Programming
%B Distributed Computing - Part I The Dataflow Approach
%E Fred B. Chambers
%E David A. Duce
%E Gillian P. Jones
%I Academic Press
%S APIC Studies in Data Processing
%V 20
%D 1984
%P 43-53
%K Manchester, SISAL,

%A Virgil D. Gligor
%A Gary L. Luckenbaugh
%T Interconnecting Heterogeneous Database Management Systems
%J Computer
%V 17
%N 1
%D January 1984
%P 33-43
%K Database models,

%A I. Gloudeman
%A J. Hodge
%T The Adaptation of MSC/NASTRAN to a Supercomputer
%J Proc. 10th IMACS World Congress on Systems Simulation and Scientific
Computation
%V 1
%I IMACS
%P 302-304
%D 1982

%A I. Gloudeman
%A C. Hennrich
%A J. Hodge
%T The Evolution of MSC/NASTRAN and the Supercomputer for Enhanced
Performance
%B Proceedings of the NATO Workshop on High Speed Computations
%E J. Kowalik
%S NATO ASI Series
%V F-7
%I Springer-Verlag
%P 393-402
%D 1984

%A Joseph F. Gloudeman
%T The Anticipated Impact of Supercomputers on Finite-Element Analysis
%J Proceedings of the IEEE
%V 72
%N 1
%K Special issue -- Supercomputers - Their Impact on Science and Technology
%P 80-84
%D January 1984

%A P. Gnoffo
%T A Vectorized, Finite-Volume, Adaptive-Grid Algorithm for Navier-Stokes
Calculations
%B Numerical Grid Generation
%E J. Thompson
%I Elsevier Science Publishing Co.
%D 1982
%X Remove?

%A G. H. Goble
%A M. H. Marsh
%T A Dual Processor VAX 11/780
%J Proceedings of 9th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 10
%N 3
%D April 1982
%P 291-298

%A L. Rodney Goke
%A G. J. Lipovski
%T Banyan networks for partitioning on multiprocessor systems
%J Proc. 1st Annual Symp. on Computer Architecture
%I IEEE
%D Dec. 1973
%P 21-28
%X
Reproduced in the 1984 tutorial: \fIInterconnection Networks for parallel
and distributed processing\fP by Wu and Feng.

%A Y. I. Gold
%A W.R. Franta
%T SOSAM for hidden nodes or an efficient collision-free access-
protocol for stationary radio networks with less-than-full connectivity
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 748-754
%K
%O Communication Protocols

%A J. Goldberg
%A R. A. Short
%T Antiparallel Control Logic
%J IEEE Transactions on Electronic Computers
%V EC-14
%N 3
%D June 1965
%P 383-393
%K Low-level parallelism pipelining

%A J. Goldberg
%T New Problems in Fault-Tolerant Computing
%J Int. Symp. on Fault-Tolerant Computing
%D January 1975
%P 29-34

%A Robert N. Goldberg
%T Software Design Issues in the Architecture and Implementation of Distributed
Text Editors
%I UMI Microfilms
%D January 1982

%A S. M. Goldwasser
%A R. A. Reynolds
%T An architecture for the real-time display and manipulation of
three-dimensional objects
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 269-274
%K
images and speech

%A Naga S. Gollakota
%A F. Gail Gray
%T Reconfigurable cellular architecture
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 377-379
%K cellular automata
%O array computations
%X Another interesting cellular archiecture proposal.  This design
uses different planes of control and computation.

%A G. Golub
%A D. Mayers
%T The Use of Preconditioning Over Irregular Regions
%I Stanford University
%R Numerical Analysis Project Report No. NA-83-27
%D 1983
%X Remove?

%A M. J. Gonzalez
%T SIMDA Overview
%J Proc. 1972 Sagamore Computer Conf. on RADCAP and its Applications
%D August 23-25, 1972
%P 17-28

%A M. J. Gonzalez
%A J. W. Soh
%T Periodic Job Scheduling in a Distributed Processor System
%J IEEE Trans. Aerospace and Electronic Systems
%V AES-12
%N 5
%D September 1976
%P 530-536

%A M. J. Gonzalez, Jr.
%T Deterministic processor scheduling
%J Computing Surveys
%V 9
%N 3
%D September 1977
%P 173-204
%K scheduling
%X Surveys processor scheduling and presents results on scheduling in a
multi-processor environment.  Describes a wide range of scheduling constraints
and examines results for each constraint.  This is an excellent starting point
for anyone interested in detailed information on scheduling.
Text reproduced with the permission of Prentice-Hall \(co 1980.
References are classified into various types (single, dual, multiple,
and flow shop) at end of paper.

%A M. J. Gonzalez
%A others
%T A Framework for the Quantitative Evaluation fo Distributed Computer
Systems
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 156-165
%O Testing and Evaluation

%A M. V. Gonzalez
%A C. V. Ramamoorthy
%T Recognition and Representation of Parallel Processable Streams in
Computer Systems
%E L. C. Hobbs
%E D. J. Theis
%E Joel Trimble
%E Harold Titus
%E Ivar Highberg
%B Parallel Processor Systems, Technologies, and Applications
%P 335-374
%I Spartan Books
%D 1970
%K theoretical results
%X Two techniques for exploiting parallelism in programs developed here.  One
tries to decompose a sequential program into tasks that may be executed in
parallel; the other tries to recognize parallelism at a finer grain, within one
task.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Mario J. Gonzalez, Jr.
%A C. V. Ramamoorthy
%T Program Suitability for Parallel Processing
%J IEEE Transactions On Computers
%V C-20
%N 6
%D June 1971
%P 647-654
%K Interpreters, measurements, multiprocessor, operating systems, parallel
processing, program suitability,
Language and software

%A Mario J. Gonzalez, Jr.
%A C. V. Ramamoorthy
%T Parallel Task Execution in a Decentralized System
%J IEEE Transactions on Computers
%V C-21
%N 12
%P 1310-1322
%D December 1972
%K Centralized, decentralized, operating systems, parallel processors,
program graphs, task schedules, task tables
Computer systems, theoretical results
%X Develops a technique for representing program segments that may be executed
in parallel and describes the use of the technique in multiprocessor systems.
The overhead involved in executing tasks in parallel are investigated in
both centralized and decentralized control environments.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%T A Framework for the Quantitative Evaluation of Distributed Computer
Systems
%A Mario J. Gonzalez, Jr.
%A Bernard W. Jordan, Jr.
%J IEEE Transactions on Computers
%V C-29
%N 12
%D December 1980
%P 1087-1094
%K Distributed computer systems, distributed design, multiple processor
systems, performance metrics, system evaluation
%O Special issue on distributed processing systems

%A T. Gonzalez
%A S. Sahni
%T Open shop scheduling to minimize finish time
%J Journ. ACM
%V 23
%N 4
%D October 1976
%P 665-679
%K scheduling
%X Examines the problem of obtaining a minimum finish time schedule for a
set of preemptable tasks.  Presents a linear time algorithm for the two-
processor case and a polynomial algorithm for the general case.  The
problem for non-preemptible tasks is proved NP-complete.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A T. Gonzalez
%A O. H. Ibarra
%A S. Sahni
%T Bounds for LPT schedules on uniform processors
%J SIAM Journ. on Computing
%V 6
%N 1
%D March 1977
%K scheduling
%X Using an LPT (largest processing time) algorithm as an approximation to
the optimal schedule, investigates the scheduling of independent,
non-preemptible tasks.  The processors are identical except for their speeds.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A T. Gonzalez
%A S. Sahni
%T Preemptive scheduling of uniform processor systems
%J Journ. ACM
%V 25
%N 1
%D January 1978
%P 92-101
%K scheduling
%X Presents a linear time algorithm for computing the optimal finish time
for a set of independent tasks, ordered by length, on a set of processors,
ordered by speed.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A D. I. Good
%T The proof of a distributed system in GYPSY
%I Computing Sci. Inst.
%D 1982
%R TR-030

%A J. R. Goodman
%A A. M. Despain
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T A Study of the Interconnection of Multiple Processors in a Database
Environment
%P 269-278
%O Data Base Architecture and Software

%A J. R. Goodman
%T Using Cache Memory to Reduce Processor-Memory Traffic
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 11
%N 3
%D 1983
%P 124-131
%O Cache Memories

%A James R. Goodman
%A Carlo H. Sequin
%T Hypertree: A Multiprocessor Interconnection Topology
%J IEEE Transactions on Computers
%V C-30
%N 12
%D December 1981
%P 923-933
%K Communication networks, hypercube, message traffic, multicomputers,
routing algorithms, tree structure
%X
Reproduced in the 1984 tutorial: \fI Interconnection Networks for parallel
and distributed processing\fP by Wu and Feng.

%A James R. Goodman
%A Jian-tu Hsieh
%A Koujuch Liou
%A Andrew R. Pleszkun
%A P. B. Schechter
%A Honesty C. Young
%T A VLSI Decoupled Architecture: PIPE
%I University of Wisconsin-Madison
%K VLSI, decoupled architecture, pipelining, queues, cache, code
scheduling, memory interleaving, delayed branch, memory hazards
%O Submitted to ACM Transactions of Computer Systems
%D April 18, 1985

%A James R. Goodman
%A Jian-tu Hsieh
%A Koujuch Liou
%A Andrew R. Pleszkun
%A P. B. Schechter
%A Honesty C. Young
%T PIPE: A VLSI Decoupled Architecture
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K Pipelined CPUs
%C Boston, MA
%P 20-27

%A Joseph W. Goodman
%A Frederick J. Leonberger
%A Sun-Yuan Kung
%A Ravindra A. Athale
%T Optical Interconnections for VLSI Systems
%J Proceedings of the IEEE
%V 72
%N 7
%D July 1984
%P 780-786
%K Special issue on optical computing

%A R. J. Goodwin
%T A Design for Distributed-Control Multiple Processor Computer system
%J National Technical Information Service
%D December 1973

%T Theory of MPP Hardware Operation
%R GER-17143
%Q Goodyear Aerospace
%K Massively Parallel Processor
%X The MPP system comprises many subsystems each interfaced to the other by
cable or backplane communication paths.  Each subsystem and its interfaces
are described in sufficient detail to complement or fill in material in other
Goodyear documents and enable technically-trained personnel to understand the
workings of those subsystems.  Information is given to assist maintenance
personnel in isolating problems in subsystems.

%T MPP Maintenance Manual
%R GER-17144
%Q Goodyear Aerospace
%K Massively Parallel Processor
%X Volume 1, 48 pages, describes the hardware configuration, power sequencer
commands, preventive maintenance, replacement of hardware components,
handling of sensitive parts, and general operating procedures.
 Volume 2, 215 pages, describes operation of the MPP's system validation and
hardware diagnostic software, describes the testing performed by each
component program in these packages and explains use of the diagnostics by
maintenance personnel to locate malfunctions in the hardware.

%T MPP Acceptance Test Plan
%R GER-17146
%Q Goodyear Aerospace
%K Massively Parallel Processor
%X A set of computer files which can be run on the MPP system to verify
operation of all delivered components: the Array Unit and its control
units, the cross assemblers and other development aids, the diagnostics and
validation software, the host computer interfaces, the high speed data mode,
the PDMU peripherals and the PDMU functions.

%T MPP Main Control Unit
%D March 1980
%R GER-16659, Rev 2
%Q Goodyear Aerospace
%K Massively Parallel Processor
%X The Main Control Unit executes the application program.  Its performs
scalar operations and calls on the PE control Unit to perform the array
operations.  The components and instruction set of the Main Control Unit are
described.

%T MPP Staging Memory
%D March 1981
%R GER-16964
%Q Goodyear Aerospace
%K Massively Parallel Processor
%X The Staging Memory is in the data path between the Array Unit and host
computer.  It has two basic functions: buffering and reformatting arrays
of data.  The major parts of the Staging Memory hardware and their control
are discussed, along with conceptual aids useful when manually programming
the reformatting operations which the Staging Memory will perform.

%T General Description of the MPP
%D April 1983
%R GER-17140
%Q Goodyear Aerospace
%K Massively Parallel Processor
%X Discusses the Array Unit, Array Control Unit, Staging Memory, interfaces to
the front-end computers, and the software elements of the MPP system.

%T MPP User's Guide
%D April 1983
%R GER-17141
%Q Goodyear Aerospace
%K Massively Parallel Processor
%X Introduction to the use and programming of the MPP.  Provides the first-time
user with the information needed to understand the MPP system software
components and how they are related.  Also informs the new user how to
begin to use the MPP to solve applications problems with MPP programs.  The
experienced system programmer will find detailed specification information
in this manual to help in understanding how the principal MPP system software
components work together.

%T MPP I/O Control Unit
%D April 1983
%R GER-16679, Rev 2
%Q Goodyear Aerospace
%K Massively Parallel Processor
%X The Input/Output (I/O) Control Unit generates all control signals required
to move data between the Staging Memory and the Array Unit.  The components and
instruction set of the I/O Control Unit are described.

%T MPP Main Control Language \(em MCL
%D April 1983
%R GER-16672
%Q Goodyear Aerospace
%K Massively Parallel Processor
%X Describes the Main Control Unit Assembler Language (MCL) provided to
program MPP's Main Control Unit.  This language supports development of
application programs.  MCL features a macro capability and the ability to
specify scalar-variables and array-variables as either integer, cardinal
(unsigned integer) or floating point values.

%T CAD User's Manual
%D April 1983
%R GER-17142
%Q Goodyear Aerospace
%K Massively Parallel Processor
%X The Control And Debug (CAD) program is an interactive program that permits
the user to control the MPP from the PDP11 host computer.  There are two
major parts: the service portion which handles MPP requests for debug
services such as breakpoints, error recovery functions and I/O initiation,
and the debug portion which enables a programmer to load and run MPP
programs, display data, and detect, locate and patch errors.  The 20 CAD
commands are described with flow charts and at several levels of detail.

%T MPP Staging Memory Manager
%D April 1983
%R GER-17062
%Q Goodyear Aerospace
%K Massively Parallel Processor
%X The Staging Memory Manager is a program which computes sets of parameters
used to initialize the Staging Memory.  Given a logical description of a data
array and its format at a Staging Memory input port and output port, the
manager computes the parameters which make the Staging Memory hardware
perform the required data reformatting.  The algorithm used by the Staging
Memory Manager is presented and described.

%T MPP System Software Manual
%D April 1983
%R GER-17145
%Q Goodyear Aerospace
%K Massively Parallel Processor
%X Provides an experienced RSX-11M programmer with sufficient information to
recreate the MPP system software package from sources.  Each of the eleven
system software components is discussed in a separate chapter.

%T Functional Description of the MPP PE
%D February 1983
%R GER-16624
%Q Goodyear Aerospace
%K Massively Parallel Processor
%X A description of the functions in one Processing Element (PE) of the MPP.

%T MPP PE Control Unit
%D June 1983
%R GER-16650, Rev 4
%Q Goodyear Aerospace
%K Massively Parallel Processor
%X
The Processing Element (PE) Control Unit generates all instructions to the
Array Unit.  The components and instruction set of the PE Control Unit are
described.

%T MPP PE Array Language \(em PRL
%D March 1983
%R GER-17142
%Q Goodyear Aerospace
%K Massively Parallel Processor
%X Describes the micro-assembly language (PE Array Language, PEARL)
provided to develop the microcoded routines for the PE Control Unit.

%Q Goodyear Aerospace Corp.
%T Application of STARAN to Fast Fourier Transforms
%R GER 16109
%D May 1974

%T Computing Tree Functions on Mesh-Connected Computers
%A P. S. Gopalakrishnan
%A I. V. Ramakrishnan
%A L. N. Kanal
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 703-710
%K Mesh-Structured Systems

%T An Efficient Connected Components Algorithm on a Mesh-Connected
Computer
%A P. S. Gopalakrishnan
%A I. V. Ramakrishnan
%A L. N. Kanal
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 711-714
%K Mesh-Structured Systems

%A M. Goroff
%A M. Newton
%A A. Sagnotti
%T Use of Concurrent Processor for Computer Algebra for Two Loop Gravity
%R Hm75
%D May 1984
%I California Institute of Technology
%C Pasadena, CA
%K Caltech Cosmic Cube, hypercube, C^3P

%A M. Gossel
%A B. Rebel
%T Parallel Memory with Recursive Address Computation
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 515-520
%D 1984

%A K. P. Gostelow
%A R. E. Thomas
%T A View of Dataflow
%J Proceedings of the 1979 National Computer Conference (NCC)
%I AFIPS Press
%V 48
%D June 1979
%P 629-636

%A Kim P. Gostelow
%A Robert E. Thomas
%T Performance of a Simulated Dataflow Computer
%J IEEE Transactions on Computers
%V C-29
%N 10
%D October 1980
%P 905-919
%K Asynchronous execution, concurrency, dataflow, distributed computer,
functionality, large-scale integration, locality, multiprocessor
architecture, parallel computer
%O Parallel computing

%A R. W. Gostick
%T A Simple Efficient System for DAP Program Development
%I ICL

%A R. W. Gostick
%T DAP Trace Post-Processor
%I ICL

%A R.W. Gostick
%T Timing DAP Programs
%I ICL

%A R.W. Gostick
%T Software and Algorithms for the Distributed Array Processor
%J ICL Technical Journal
%V 1
%P 116
%I ICL
%D 1979

%A R. W. Gostick
%T Supercomputer diagnostics
%B Supercomputers
%I Infotech, State of the Art Report
%D 1979

%A R. W. Gostick
%T Software and Hardware technology for ICL DAP
%I ICL
%J Australia Comp. Journal
%V 13
%N 1
%D 1981

%A E. Goto
%A T. Ida
%T Parallel Hashing Algorithms
%J Information Processing Letters
%V 6
%N 1
%D February 1977
%P 8-13

%A Eiichi Goto
%A Tetsuo Ida
%A Kei Hiraki
%T FLATS, a Machine for Numerical, Symbolic, and Associative Computing
%J Proceedings of 6th Annual Symposium on Computer Architecture
%D 1979
%K Institute of Physical and Chemical Research, U. of Tokyo
%P 102-110

%A A. Gottlieb
%A B. D. Lubachevsky
%A L. Rudolph
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Coordinating Large Numbers of Processors
%P 341-349
%O Scheduling

%A A. Gottlieb
%T A Historical Guide to the Ultracomputer Literature
%R Ultracomputer Note #36
%I New York University
%C NYC, NY
%D Oct. 1981

%A A. Gottlieb
%A R. Grishman
%A C. P. Kruskal
%A K. P. McAuliffe
%A L. Rudolph
%A M. Snir
%T The NYU Ultracomputer \(em Designing a MIMD, Shared-Memory Parallel
Machine
%J Proceedings of 9th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 10
%N 3
%D April 1982
%P 27-42
%K Recommended,

%A Allan Gottlieb
%T Comments on "Concurrent Search and Insertion in AVL Trees"
%R ULTRACOMPUTER NOTE #17
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University

%A Allan Gottlieb
%A B. D. Lubachevshy
%A Larry Rudolph
%T Basic Techniques for the Efficient Coordination of Very Large Numbers
of Cooperating Sequential Processors
%R TR #28, ULTRACOMPUTER NOTE #16
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D 1980

%A Allan Gottlieb
%T WASHCLOTH \(em The Logical Successor to SOAPSUDS
%R TR 029, ULTRACOMPUTER NOTE #12
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D December 1980

%A Allan Gottlieb
%T MOP \(em A (Minimal) Multiprocessor Operating System Extending
WASHCLOTH
%R ULTRACOMPUTER NOTE #13
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D December 8, 1980

%A Allan Gottlieb
%A Clyde Kruskal
%T MULT \(em A Multitasking Ultracomputer Language with Timing, I & II
%R ULTRACOMPUTER NOTE #15
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D December 28, 1980

%A Allan Gottlieb
%A Clyde Kruskal
%T A Data-Motion Algorithm
%R ULTRACOMPUTER NOTE #7
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D January, 24 1980

%A Allan Gottlieb
%T Another Remark on the Planarity of the Shuffle-Exchange Network of Sizes 16
and 32
%R ULTRACOMPUTER NOTE #9
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D May 1980

%A Allan Gottlieb
%T PLUS: A PL/I Based Ultracomputer Simulator, I
%R ULTRACOMPUTER NOTE #10
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D September 12, 1980

%A Allan Gottlieb
%A Clyde Kruskal
%T Supersaturated Ultracomputer Algorithms
%R TR 024, ULTRACOMPUTER NOTE #11
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D September 1980

%A Allan Gottlieb
%T WASHCLOTH 81
%R ULTRACOMPUTER NOTE #21
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D January 21, 1981

%A Allan Gottlieb
%A Clyde P. Kruskal
%T Coordinating Parallel Processors: A Partial Unification
%R ULTRACOMPUTER NOTE #34
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D September 1981

%A Allan Gottlieb
%A J. T. Schwartz
%T Networks and algorithms for very-large-scale parallel computation
%J Computer
%V 15
%N 1
%D January 1982
%P 27-36

%A Allan Gottlieb
%A B. D. Lubachevsky
%A Larry Rudolph
%T Basic Techniques for the Efficient Coordination of Very Large Numbers
of Cooperating Sequential Processors
%J ACM Transactions on Programming Languages and Systems
%V 5
%N 2
%D April 1983
%P 164-189
%K Parallel processing, replace-add, synchronization, ultracomputers,
Omega network
Categories: B.3.2 [Memory Structures]: design styles - shared memory;
B.4.3 [Input/Output and Data Communications]:
interconnection (subsystems) - topology; C.1.? [Processor Architectures]:
Multiple Data Stream Architectures
(multiprocessors) - multiple instruction stream, multiple data stream (MIMD);
D.1.3 [Programming Techniques]: concurrent programming;
D.4.1 [Operating Systems]:
process management - multiprocessing, multiprogramming, scheduling

%A Allan Gottlieb
%T Comparing the NYU Ultracomputer with other Large-Scale Parallel Processors
%R DOE/ER/03077-205, ULTRACOMPUTER NOTE #32
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D November 1983
%X This paper is similar to one (ULTRACOMPUTER NOTE #62) presented
at Spring 1984 COMPCON.

%A Allan Gottlieb
%A Cylde P. Kruskal
%T Complexity Results for Permuting Data and Other Computations on Parallel
Processors
%J Journal of the ACM
%V 31
%N 2
%D April 1984
%P 193-209
%K Categories and subject descriptors: C.1.2 [Processor Architectures]:
multiple data stream architecture - parallel processors; F.1.2
[Computation by Abstract Devices]: modes of computation - parallelism;
F.2.2 [Analysis of Algorithms and Problem Complexity]
Nonnumerical algorithm and problems - routing and layout, sorting and searching
General Terms: Algorithms, theory
Additional key words and phrases: lower bounds, parallel computation,
permutations, routing, shuffle-exchange machine

%A Allan Gottlieb
%T Avoiding Serial Bottlenecks in Ultraparallel MIMD Computers
%r ULTRACOMPUTER NOTE #64
%d December 1983
%J Digest of Papers COMPCON, Spring 84
%I IEEE
%D Feb. 1984
%P 354-359
%K Very high-end architectures
%X Short introduction to the NYU Ultracomputer multiprocessor.
Covers Fetch-and-Add instruction and Fetch-and-phi operation.

%A D. Gottlieb
%A E. Turkel
%T Boundary Conditions for Multistep Finite Difference Methods for Time
Dependent Equations
%J J. Comp. Phys.
%V 26
%D 1976
%P 181-196
%X Remove?

%A D. Gottlieb
%A S. Orszag
%T Numerical Analysis of Spectral Methods: Theory and Applications
%J CBMS Regional Conference Series in Applied Mathematics
%V 26
%I SIAM
%C Philadelphia, PA
%D 1977
%X Remove?

%A D. Gottlieb
%A M. Hussaini
%A S. Orszag
%T Theory and Applications of Spectral Methods
%E R. Voigt
%E D. Gottlieb
%E M. Hussaini
%B Spectral Method for Partial Differential Equations
%I SIAM
%P 1-54
%D 1984
%X Remove?

%A M. Gouda
%A C. K. Chang
%T A Technique for Proving Liveness of Communicating Finite State
Machines, With Examples
%J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing
%I ACM
%D August 1984

%A M. G. Gouda
%A M. K. Molloy
%T Modeling and analysis of LAN protocols using labeled petrinets
%O 12 REFS. Treatment APPLICATIONS, THEORETICAL
%D Sept. 1984
%R Rep No. TR-84-15
%I Univ. Texas at Austin, USA
%K local area networks protocols graph theory
local area network LAN protocol autonomous stations
positive integer value labeled Petri nets token ring nonpersistent CSMA
virtual time CSMA P persistent CSMA Capetanakis' collision resolution algorithm

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T An Algorithm for the Concurrent Update of Multiple-Copy Database
%A Mohamed G. Gouda
%A Robert G. Arnold
%P 210
%O Synchronization
%X Summary only.

%A G. L. Goudreau
%A R. A. Bailey
%A J. O. Hallquist
%A R. C. Murray
%A S. J. Sackett
%T Efficient Large-Scale Finite Element Computations in a Cray Environment
%B Impact of New Computing Systems on Computational Mechanics
%E A. Noor
%I The American Society of Mechanical Engineers
%D 1983
%P 141-154

%A A. Goyal
%A J. Lipovski
%T Scheduling on a Light Pipe Simplex Ring
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 116-
%O Distributed Architectures

%A Deepak K. Goyal
%T Scheduling Equal Execution Time Tasks Under Unit Resource Restriction
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 188-192
%O Scheduling

%A G. S. Graham
%A E. D. Lazowska
%A K. C. Sevcik
%T Components of software packages for the solution of queueing
network models
%B Proceedings of the Computer Performance Evaluation Users Group
(CPEUG) 18th Meeting
%C Washington, DC, USA
%D 25-28 Oct. 1982
%P 183-187
%O 10 REFS. Treatment THEORETICAL
, xiii+448
%E C. B. Wilson
%K queueing theory computer testing computer installation
capacity planning software packages queueing network models computer systems

%A M. Graham
%T An Array Computer for the Class of Problems Typified by the General
Circulation Model of the Atmosphere
%I University of Illinois at Urbana-Champaign
%R PhD Thesis
%D 1976

%A M. D. Graham
%T The diff4: A Second Generation Slide Analyser
%E M. J. B. Duff
%B Computing Structures for Image Processing
%I Academic Press
%D 1983
%P 179-194

%A R. L. Graham
%T Bounds for Certain Multiprocessing Anomalies
%J Bell System technical Journal
%V 45
%D 1966
%P 1563-1581

%A R. L. Graham
%T Bounds on Certain Multiprocessing Timing Anomalies
%J SIAM Journal of Applied Mathematics
%D March 1969
%N 2
%P 416-429
%V 17
%X This is the paper that re-directed our 'Utility of Meta-level
Effort' paper! Very interesting multiprocessor scheduling results, especially
upper limits on 'worst schedule'.

%A R. L. Graham
%T Bounds on multiprocessing anomalies and related packing algorithms
%J Proc. AFIPS SJCC
%V 40
%D 1972
%K theoretical results
%X Surveys theoretical results in multiprocessing and discusses algorithms for
improving multiprocessor performance.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A J. L. Grange
%T A Mass Transport Service on High Transmission Rate Satellite Circuits-
Some Design Considerations
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 461-466
%K
%O Communications Networks

%A Goesta H. Granlund
%T GOP: A Fast and Flexible Processor for Image Analysis
%B Languages and Architectures for Image Processing
%E M. J. B. Duff
%E S. Levialdi
%I Academic Press
%C New York, NY
%D 1981
%P 179-188

%A A. Grant
%A D. Hutchison
%A W. D. Shepherd
%T A gateway for linking local area networks and X.25 networks
%J Comput. Commun. Rev. (USA), SIGCOMM '83 Symposium on Communications
Architectures & Protocols
%V 13
%N 2
%C Austin, TX, USA
%P 234-239
%O 14 REFS
Treatment PRACTICAL
%D 8-9 March 1983
%K computer networks data communication systems
local area networks X.25 networks hardware software
gateway Strathnet X.25 packet switched network
PSS
%X Describes the hardware and software architecture of a gateway between
an Ethernet-style local area network called Strathnet and an X.25
packet switched network (British Telecom's PSS). The hardware is
based on a Motorola 68000 processor using the VME bus, and peripheral
boards based on an 8-bit 68120/1 processor for the local network and
the X.25 interfaces. The software is layered from the low-level
executive, through the three X.25 levels and the transport layer, and
through the corresponding layers on the local network side, to the
bridging software itself. Both hardware and software are designed so
that the system can be a general-purpose gateway: for example, the
local area network peripheral board could be replaced by a ring type
interface, and the software within the local network layers could
similarly be replaced

%A J. S. Grant
%T Multilink-an open network for personal computers
%J Comput. Commun. (GB)
%V 8
%N 1
%P 27-34
%O 10 REFS. Treatment PRACTICAL
%D Feb. 1985
%K local area networks microcomputers multi access systems
multilink open network personal computers local area network
user terminals peripherals multiple access computing
telecommunications facilities shared disc facilities support software

%A Enrique Grapa
%A Geneva G. Belford
%T Some Theorems to Aid in Solving the File Allocation Problem
%J Communications of the ACM
%V 20
%D November 1977
%P 878-882
%K file allocation, computer networks, distributed data management,
CR categories: 4.33
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A R. Graves
%T Partial Implicitization
%J J. Comp. Phys.
%V 13
%D 1973
%P 439-444
%X Remove?

%A F. Gail Gray
%A W. M. McCormack
%A Robert M. Haralick
%T Significance of problem solving parameters on the performance of
combinatorial algorithms on multi-computer parallel architectures
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 185-192
%K
Va Polytech
%O Non-numeric algorithms
%X Consistent labeling Problem; applicable to combinatorial
problems in general; best strategy found -- depth-first search,
transmit large problems; transmit 50% of processor's load; Processor
detects free neighbors by polling; Architecture (e.g., ring or boolean
cube connection) is important for performance (not studied in detail
yet). No free messages considered; Does not use communication cost in
finding optimal strategy explicitly; Cutoff for stopping distribution
of subtasks not found important here!!!

%A J. N. Gray
%T Notes on database operating systems
%B Operating Systems: An Advance Course
%I Springer-Verlag
%V 60
%D 1978
%P 393-481

%A J.N. Gray
%T Transaction Model
%B Automata, Languages and Programming
%V 80
%D 1980
%I Springer Verlag

%A J.N. Gray
%T The Transaction Concept: Virtues and Limitations
%J Proc. Seventh International Conference on Very Large Databases
%D Sept. 1981

%A J. P. Gray
%T Line control procedures
%J Proc. IEEE
%V 60
%N 11
%D November 1972
%P 1301-1312

%A J. Grear
%A S. Sameh
%T On Certain Parallel Toeplitz Linear System Solvers
%J J. Sci. Stat. Comput.
%V 2
%I SIAM
%P 238-256
%D 1981

%A Michael L. Green
%A Edward Y. S. Lee
%A Samprakash Majumdar
%A Douglas C. Shannon
%T A Distributed Real Time Operating System
%J Proc. IEEE Distributed Data Acquisition Computer Control Symp.
%D 1980
%P 175-184
%K d-RTOS, TRW,
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A P. E. Green, Jr.
%A R. W. Lucky \f2(eds.)\f1
%T Computer Communications
%I IEEE Press
%C New York, New York
%D 1975

%A Peter E. Green
%T Distributed acoustic surveillance and tracking
%J Proceedings of the Distributed Sensor Networks Workshop
%P 117-141
%D January 1982
%X Copies may be available from MIT Lincoln Laboratory, Lexington,
Massachusetts, 02173.

%A A. Greenbaum
%A G. Rodrigue
%T The Incomplete Choleski Conjugate Gradient Method for the STAR (5 point
Operator)
%I Lawrence Livermore Laboratory
%D 1977

%A Albert G. Greenberg
%A Michael J. Fischer
%T On computing weak transitive closure on O(log N) expected random parallel
time
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 199-204
%K
%O Non-numeric algorithms

%A Albert G. Greenberg
%A Udi Manber
%T A Probabilistic Pipeline Algorithm For K-Selection on the Tree Machine
%R TR #558
%I Computer Sciences Dept., University of Wisconsin
%C Madison, WI
%D September 1984

%T A Probabilistic Pipeline Algorithm for K-Selection on the Tree Machine
%A Albert G. Greenburg
%A Udi Manber
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 1-5
%K Parallel Algorithms

%A F. Gregoretti
%T An Experimental Real Time Kernel for a Multimicroprocessor
Prototype
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 226-231
%K
%O Microprocessor Networks

%A Francesco Gregoretti
%A Zary Segall
%T Analysis and evaluation of VLSI design rule checking implementation
in a multiprocessor
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 7-14
%K Cm*, multiprocessor application,
%O scientific computation
%X This paper presents an application programmed on a multiprocessor
including performance analysis.

%A J. Gregory
%A R. McReynolds
%T The SOLOMON Computer
%J IEEE Transactions on Electronic Computers
%V EC-12
%N 5
%D December 1963
%P 774-781

%A D. Gries
%T An exercise in proving parallel programs correct
%J Comm. ACM
%V 20
%N 12
%D December 1977
%P 921-930
%K theoretical results
%X Provides a formal proof of a parallel algorithm and discusses the
problems in generating and understanding such proofs.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%T Performance Modeling of Database Recovery Protocols
%A Nancy Griffeth
%A John A. Miller
%J IEEE Transactions on Software Engineering
%V SE-11
%N 6
%I IEEE Computer Society
%D June 1985
%O Special Issue on Reliability in Distributed Software and Database
Systems
%P 564-572
%K Atomic actions, concurrency control, database systems, Markov
processes, performance modeling, queueing models, reliability,
transaction systems

%A R. L. Grimsdale
%A D. M. Johnson
%T A modular executive for multiprocessor systems
%J Proc. Conf. Trends in On-Line Computer Control Systems
%C Sheffield, England
%D April 1972
%K multiprocessor architectures and operating systems
%X An operating system for a symmetric multiprocessor is described.  The
reliability and error recovery features of this system are emphasized.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A R. L. Grimsdale
%T Intercommunication in Multimodule Systems
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 283-286
%K multi-processors and parallel computers
%X Another bus multiprocessor.

%A R. L. Grimsdale
%A F. Halsall
%A F. Martin-Polo
%A G. C. Shoja
%T POLYPROC II-The University of Sussex Multiple Microprocessor System
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 95-103
%K
%O Architecture

%A R. L. Grimsdale
%T Programming Languages
%B Distributed Computing - Part IV Closely-Coupled Systems
%E Fred B. Chambers
%E David A. Duce
%E Gillian P. Jones
%I Academic Press
%S APIC Studies in Data Processing
%V 20
%D 1984
%P 231-237
%K monitor, rendezvous, deadlock,

%A R. L. Grimsdale
%T Run-time Support
%B Distributed Computing - Part IV Closely-Coupled Systems
%E Fred B. Chambers
%E David A. Duce
%E Gillian P. Jones
%I Academic Press
%S APIC Studies in Data Processing
%V 20
%D 1984
%P 239-250

%A Jan Grinberg
%A Graham R. Nudd
%T A Cellular VLSI Architecture
%J Computer
%V 17
%N 1
%D January 1984
%P 69-81
%K VHSIC, image processing, 3-D computer

%A M. Grinhofs
%A A. Spalvins
%T An Analog Processor Accuracy Analysis in the Case of Hybrid Computer
for Solving Boundary Field Problems
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 165-169
%K advanced hybrid systems
%X A rare USSR paper

%A Jose M. Llaberia Grino
%A Mateo Valero Cortes
%A Enrique Herrada Lillo
%A Jesus Labarta Mancho
%T Analysis and Simulation of Multiplexed Single-Bus Networks with and
without Buffering
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%C Boston, MA
%P 414-421
%K Multiprocessor Performance

%A D. H. Grit
%A P. L. Page
%T Eager evaluation of functional programs and a supporting
interconnection structure
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 811-816
%K
%O Parallel Processing

%A Dale H. Grit
%A P. L. Page
%T A Multiprocessor Model for Parallel Evaluation of Applicative
Programs
%J Journal of Digital Systems
%V 4
%N 2
%D Summer 1980
%P 135-151

%A Dale H. Grit
%A Rex L. Page
%T Deleting Irrelevant Tasks in an Expression-Oriented Multiprocessor
System
%J ACM Transactions on Programming Languages and Systems
%V 3
%N 1
%D January 1981
%P 49-59
%K Multiprocessor, garbage collection, applicative programming, functional
programming, data-driven computation, data flow, recursive program
CR Categories: 4.1, 4.2, 4.3, 6.2

%A Dale H. Grit
%A James R. McGraw
%T Programming Divide and Conquer on a Multiprocessor
%R UCRL-88710
%I Lawrence Livermore National Laboratory
%C Livermore, CA
%D May 1983
%X Test programming the Denelcor HEP using HEP asynchronous FORTRAN.
Has interesting insights to MIMD programming of the future.

%A A. Grnarov
%A M. Gerla
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Multiterminal Reliability Analysis of Distributed Processing Systems
%P 79-86
%O Distributed Systems and Networks

%A Gregory F. Grohoski
%A Janak H. Patel
%T A performance model for instruction prefetch in pipelined instruction units
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 248-252
%K
%O Large-scale scientific processing

%A William I. Grosky
%A Frank Tsui
%T Parallel-sequential processing of finite patterns
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 61-68
%K
%O Parallel processing techniques

%l proceedings-article
%A Thomas Gross
%A John Hennessy
%A Norman Jouppi
%A Steven Przybylski
%A Christopher Rowen
%A Anant Agarwal
%A Peter Steenskiste
%T A Perspective on High-Level Language Architecture (extended abstract)
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%M May
%D 1984
%K risc reduced instruction set computer restricted architecture

%A Thomas Gross
%A John Hennessy
%A Norman Jouppi
%A Steven Przybylski
%A Christopher Rown
%A Anant Agarwal
%A Peter Steenskiste
%T A Perspective on High-Level Language Architecture (extended abstract)
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 3.12-3.14
%O RISCs

%A M. S. Grushcow
%T The kernel of the SUE operating system
%J Proc. Canadian Computer Conf.
%C Montreal, Quebec
%D June 1972
%K multiprocessor architectures and operating systems
%X SUE is an experimental multiprocessor operating system based on the notion
of virtual parallel processors-each process considers itself to be running on
its own, private processor.  The multiplexing of the actual hardware between
processes, the initiation and termination of processes, and low-level
operating system functions such as I/O and timing are performed by the kernel.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Gao Guang-Rong
%T An Implementation Scheme for Array Operations in Static Data Flow
Computers
%R MIT/LCS/TR-280
%D May 1980
%I MIT
%C Cambridge, MA
%K parallel processing, flow dependency graph, pipelined computation,
data flow architecture, functional programming, VAL, thesis

%A Mario F. de La Guardia
%A James A. Field
%T A high level language oriented multiprocessor
%J Proceedings of the 1976 International Conference on Parallel Processing
%I IEEE
%C Walden Woods, Michigan
%D August 1976
%P 256-262
%K multiprocessor architectures and operating systems, language issues

%A B. Gudmundsson
%T Overview of the High-level Language for PICAP
%B Languages and Architectures for Image Processing
%E M. J. B. Duff
%E S. Levialdi
%I Academic Press
%C New York, NY
%D 1981
%P 147-156

%A Concettina Guerra
%A Stefano Levialdi
%T Reflections on Local Computations
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 221-229
%K SIMD

%A R. Gueth
%A J. Kriz
%A S. Zueger
%T Broadcasting Source-Addressed Messages
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Communication Protocols, BSM
%P 108-115

%A Liu Gui-zhong
%A Hu Shou-ren
%T Vector Streams and Vector Cache
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 233-235
%K cache-main memory hierarchy, AP-601,
%O queueing analysis

%A R. Guililand
%T Solution of the Shallow Water Equations on the Sphere
%J Journal of Computational Physics
%V 43
%P 79-94
%D 1981
%X Remove?

%A M. Guillemont
%E P. Ravasio
%E G. Hopkins
%E N. Naffah
%T The CHORUS distributed operating system: design and implementation
%B Local Computer Networks. Proceedings of the IFIP TC 6 International
In-Depth Symposium
%C Florence, Italy
%P 207-223
%O 10 REFS. Treatment PRACTICAL
%I North-Holland
Amsterdam, Netherlands, p: xii +504, ISBN: 0-444-86386-9
%E Calcolo Autom., et al
%D 19-21 April 1982
%K distributed processing operating systems computer networks
CHORUS distributed operating system exchange of messages
communication/synchronization mechanism
%X CHORUS is an architecture for distributed systems. It includes a
method for designing a distributed application, a structure for its
execution and the (operating) system to support this execution. One
important characteristic of CHORUS is that the major part of the
system is built with the same architecture as applications. In
particular, the exchange of messages, which is the fundamental
communication/synchronization mechanism, has been extended to the
most basic functions of the system

%A J. L. Gula
%T Operating system considerations for multiprocessor architectures
%J Proc. 7th Texas Conf. on Computing Systems
%C Houston, Texas
%D November 1978
%P 7-1 to 7-6
%K multiprocessor architectures and operating systems

%A A. Gupta
%A H. M. D. Toon
%T Enhanced concurrency in M-N multiprocessor systems
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 146-151
%K
%O Bus Oriented multiprocessor systems

%A Anoop Gupta
%T Implementing OPS5 production systems on DADO
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 83-91
%K SIMD, application
%O artificial intelligence

%A Anoop Gupta
%T Parallelism in Production Systems: The Sources and the Expected Speedup
%R CMU-CS-84-169
%I CS Dept. Carnegie Mellon University
%D Dec. 1984

%T Monte Carlo Calculations of Elementary Particle Properties
%A G. Guralnik
%A T. Warnock
%A C. Zemach
%J CYBER 200 Applications Seminar
%R NASA Conference Publication 2295
%D October 1983
%E J. Patrick Gary, Compiler
%I NASA Goddard Space Flight Center
%C Greenbelt, Maryland
%P 291-296

%A J. Gurd
%A I. Watson
%T A multilayered data flow computer architecture
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 94
%K
%O Data-flow architectures

%A J. Gurd
%A I. Watson
%T Data Driven System for High Speed Parallel Computing \(em Part 2:
Hardware Design
%J Computer Design
%D July 1980
%P 97-106

%A J. Gurd
%A I. Watson
%T Data Driven System for High Speed Parallel Computing \(em Part 1:
Structuring Software for Parallel Execution
%J Computer Design
%V 19
%D June 1980
%P 91-100

%A J. Gurd
%A I. Watson
%T Preliminary Evaluation of a Prototype Dataflow Computer
%B Proc. IFIP World Computer Congress
%C North Holland
%D 1982
%P 545-551

%A J. R. Gurd
%T Fundamentals of Dataflow
%B Distributed Computing - Part I The Dataflow Approach
%E Fred B. Chambers
%E David A. Duce
%E Gillian P. Jones
%I Academic Press
%S APIC Studies in Data Processing
%V 20
%D 1984
%P 3-19
%K VAL, SISAL,

%A J. R. Gurd
%A C. C. Kirkham
%A I. Watson
%T The Manchester Prototype Dataflow Computer
%J Communications of the CACM
%V 28
%N 1
%D January 1985
%P 34-52
%K CR Categories and Subject Descriptors:
C.1.3 [Processor Architectures]: Other Architecture Styles;
C.4 [ Performance of Systems]; D.3.2 [Programming Languages]: Language
Classifications
General Terms: Design, Languages, Performance
Additional Key Words and Phrases: tagged-token dataflow,
single assignment programming, SISAL
%X A special issue on Computer Architecture.  Mentions SISAL, but not LLNL.

%A Adolfo Guzman
%T A Parallel Heterarchical Machine for High-Level Language Processing
%B Languages and Architectures for Image Processing
%E M. J. B. Duff
%E S. Levialdi
%I Academic Press
%C New York, NY
%D 1981
%P 229-244

%A Adolfo Guzman
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T A Parallel Hierarchical Machine for High Level Language Processing
%P 64-71
%O Languages and Compilers

%A J. M. Gwynn
%A R. J. Raynor
%T Scheduling in a multiprocessor environment
%J Proc. 1973 Sagamore Computer Conference
%C Sagamore, New York
%I IEEE
%P 139
%D August 1973
%K scheduling
%X Examines interrupt handling techniques in multiprocessor systems.
Describes schemes such as master-slave control and floating executive
control and discusses their impact on the queueing delays in handling
interrupts.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A V. B. Gylys
%A J. A. Edwards
%T Optimal Partitioning of Workload for Distributed Systems
%J Digest of Papers COMPCON 76
%I IEEE Computer Society
%D September 1976
%P 353-357

%A A. N. Habermann
%T Prevention of System Deadlocks
%J Communications of the ACM
%V 12
%D July 1969
%P 373-377
%K multiprogramming, time-sharing, scheduling, resource allocation,
CR categories: 3.72, 4.32, 6.20
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A W. Hackbusch
%T On the Multigrid Method Applied to Difference Equations
%J Computing
%V 20
%D 1978
%P 291-306
%X Remove?

%A W. Hackbusch
%A U. Trottenberg, (Ed.)
%T Multigrid Methods
%J Springer-Verlag
%C Berlin
%D 1982
%X Remove?

%A M. Hafez
%A E. Murman
%T Artificial Compressibility Methods for Numerical Solution of Transonic
Full Potential Equation
%J AIAA 11th Fluid and Plasma Dynamics Conference
%C Seattle, WA
%D 1978
%X Remove?

%A M. Hafez
%A J. South
%T Vectorization of Relaxation Methods for Solving Transonic Full
Potential Equations
%I Flow Research, Inc.
%C Kent, WA
%D 1979
%X Remove?

%A M. Hafez
%A D. Lovell
%T Improved Relaxation Schemes for Transonic Potential Calculations
%I AIAA
%R 83-0372
%D 1983
%X Remove?

%A P. Haff
%A B. Werner
%T Dynamics of Earth Materials on a Concurrent Processor
%R Internal Memo, Hm41
%I California Institute of Technology
%C Pasadena, CA
%D November 1983
%K Caltech Cosmic Cube, hypercube, C^3P

%A P. K. Haff
%A R. Scott
%T NSF Proposal to Support Grain Dynamics Research
%R Internal memo, Hm61
%I California Institute of Technology
%C Pasadena, CA
%D March 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%A Roger Hagafors
%T The character of organizational problems: A classification system for
organizational decision-making
%R Technical Report 317
%I Department of Psychology, University of Uppsala
%C Uppsala, Sweden
%D 1982

%T Parallel Signal Processing Research on the HEP
%A Martin T. Hagan
%A Howard B. Demuth
%A Paul H. Singgth
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 599-606
%K Parallel Systems

%A Hiroshi Hagiwara
%A Shinji Tomita
%A Shigeru Oyanagi
%A Kiyoshi Shibayama
%T A Dynamically Microprogrammable Computer with Low Level Parallelism
%J IEEE Transactions on Computers
%V C-29
%N 7
%D July 1980
%P 577-595
%K Computer animation, emulation, firmware, microprogramming, parallel
processing, real-time applications, virtual control storage,
Computer architecture

%A J. Hagouel
%A M. Schwartz
%T A Distributed Failsafe Route Table Update Algorithm
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 755-762
%K
%O Communication Protocols

%A L. Halada
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T A Parallel Algorithm for solving Band Systems of Linear Equations
%P 159-160
%O

%A L. Halada
%T A Parallel Algorithm for Solving Band Systems and Matrix Inversion
%J CONPAR 81, Conference Proceedings
%S Lecture Notes in Computer Science
%V III
%E W. Handler
%I Springer-Verlag
%P 433-440
%D 1981

%T Vibrational Relaxation of Diatomic Molecules in Solids at Low
Temperatures
%A L. Halcomb
%A D. Diestler
%J CYBER 200 Applications Seminar
%R NASA Conference Publication 2295
%D October 1983
%E J. Patrick Gary, Compiler
%I NASA Goddard Space Flight Center
%C Greenbelt, Maryland
%P 85-99

%A Milton Halem
%T Computer Simulations of Space-Borne Meteorological Systems on the CYBER
205
%J CYBER 200 Applications Seminar
%R NASA Conference Publication 2295
%D October 1983
%E J. Patrick Gary, Compiler
%I NASA Goddard Space Flight Center
%C Greenbelt, Maryland
%P 17

%A Zahran Halim
%A Ian Watson
%T An OR-Parallel Data-Driven Model for Logic Programs
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 1.26-1.36
%O Data flow machines

%A H. Halin
%A R. Buhrer
%A W. Halg
%A H. Benz
%A B. Bron
%A H. Brundiers
%A A. Isaccson
%A M. Tadian
%T The ETHM Multiprocessor Project: Parallel Simulation of Continuous
System
%J Simulation
%V 35
%P 109-123
%D 1980

%T Pipelining of Arithmetic Functions
%A Thomas G. Hallin
%A Michael J. Flynn
%J IEEE Transactions on Computers
%N 8
%D August 1972
%P 880-886
%K Addition, computational bandwidth, multiplication,
overlapped execution, pipelining,
Short notes

%A J. Halpern
%T Knowledge and Common Knowledge in a Distributed Environment
%J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing
%I ACM
%D August 1984

%A F. Halsall
%T Development Aids
%B Distributed Computing - Part IV Closely-Coupled Systems
%E Fred B. Chambers
%E David A. Duce
%E Gillian P. Jones
%I Academic Press
%S APIC Studies in Data Processing
%V 20
%D 1984
%P 251-266

%A F. Halsall
%T Polyproc
%B Distributed Computing - Part IV Closely-Coupled Systems
%E Fred B. Chambers
%E David A. Duce
%E Gillian P. Jones
%I Academic Press
%S APIC Studies in Data Processing
%V 20
%D 1984
%P 277-288

%A Robert H. Halstead, Jr.
%T Multiple Processor Implementations of Message-Passing Systems
%D January 1978
%I Massachusetts Institute of Technology
%R MIT/LCS/TR-198
%X QFUDGE and rubber band ideas for event distribution strategies; pp. 127-136

%A Robert H. Halstead, Jr.
%A Stephen A. Ward
%T The Munet:  A Scalable Decentralized Architecture for Parallel
Computation
%J Proceedings of 7th Annual Symposium on Computer Architecture
%D 1980
%I IEEE
%P 139-145

%A Robert H. Halstead, Jr.
%T Architecture of a myriaprocessor
%J Proceedings \(em Spring 1981 Compcon
%I IEEE
%D September 1981
%P 299-302

%T Exception Handling in Multilisp
%A Robert H. Halstead, Jr.
%A Juan R. Loaiza
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 822-830
%K Functional/Numeric Programming

%A V. C. Hamacher
%A J. Gavilan
%T High-speed multiplier/divider iterative arrays
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 91-100
%K
%O Processor components

%A V. Carl Hamacher
%A Gerald S. Shedler
%T Performance of a Collision-Free Local Bus Network Having Asynchronous
Distributed Control
%J Proceedings of 7th Annual Symposium on Computer Architecture
%D 1980
%K University of Toronto, IBM Research Laboratory
%P 80-87

%A G. Hamlin
%A J. E. Georgte
%T Experiences with Distributing Graphic Software between processors
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 486-492
%K
%O Distributed Systems-Practices and Experiences

%T Reliability Mechanisms for SDD-1: System for Distributed Databases
%A Michael Hammer
%A David Shipman
%J ACM Transactions on Database Systems
%V 5
%N 4
%D December 1980
%P 431-466
%K Distributed databases, reliability, recovery, atomicity
CR Categories: 4.33

%A Richard A. Hammond
%T Experiences with the Series/1 Distributed System
%J Proc. of 21st IEEE COMPCON
%D Fall 1980
%P 585-589
%K IBM
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%T Exploitation of Parallelism in Array Loopback Test
%A Sang H. Han
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 225-231
%K Parallel Computation

%T A Family of Parallel Sorting Algorithms
%A Yijie Han
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 851-853
%K Sorting

%A S. Hanaki
%T An Interactive Image Processing and Analysis System
%E Morio Onoe
%E Kendall Preston, Jr.
%E Azriel Rosenfeld
%B Real-Time/Parallel Computing: Image Analysis
%I Plenum Press
%C New York, NY
%D 1981
%P 219-226
%X Nothing involving parallelism, a real time image processing system.

%A Shin-ichi Hanaki
%A Tsutomu Temma
%T Template-Controlled Image Processor (TIP) Project
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 343-352

%A W. Handler
%T A unified associative and von-Neumann processor: EGPP and EGPP array
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 97-99
%K
%O Associative processors

%A W. Handler
%A E. Hofmann
%A H. Schneider
%T A General Purpose Array with a Broad Spectrum of Applications
%J Informatik-Fachbrichte Berlin-Heidelbergs
%I Springer-Verlag
%D 1976

%A W. Handler
%T The Impact of Classification Scheme on Computer Architecture
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 7-15
%K
%O

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T Computation Structures Reflected in General Purpose and Special
Purpose Multi-Microprocessor Systems
%A W. Handler
%A H. Schreiber
%A V. Sigmund
%P 95-102
%O Performance Evaluation

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T Complexity Measures of Computer Structures
%A W. Handler
%A V. Sigmund
%P 211
%O Reconfigurable Systems
%X Summary only.

%A Wolfgang Handler
%T Aspects of Parallelism in Computer Architecture
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 1-8
%X A thoughtful look at the future directions of multiprocessor
architecture: including data flow (positive) and associative processors
(somewhat negative).

%T Dirmu Multiprocessor Configurations
%A Wolfgang Handler
%A Erik Maehle
%A Klaus Wirl
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 652-656
%K Multiprocessor Systems

%A W. Hankey
%A J. Shang
%T Vector Processors and CFD
%J Proceedings of a Cray Research Inc. Symposium
%P 49-66
%I Cray Research, Inc.
%D 1982

%A A. C. Hanlon
%T Content-Addressable and Associative memory Systems: A Survey
%J IEEE Transactions on Electronic Computers
%D August 1966
%P 509-521

%l journal-article
%A Hansen
%A Mayo
%A Linton
%A Murphy
%A Patterson
%T A Performance Evaluation of the Intel iAPX432
%J Computer Architecture News
%M June
%D 1982
%K risc reduced instruction set computer architecture restricted
%X bench marks the 432 on the same test programs used to test RISC

%A P. Brinch Hansen
%T The nucleus of a multiprogramming system
%J Commun. ACM (USA)
%V 13
%N 4
%P 238-241
%D April 1970
%K multiprogramming multiprogramming (nucleus of system)
%X Describes the philosophy and structure of a multi-programming system that
can be extended with a hierarchy of operating systems to suit diverse
requirements of program scheduling and resource allocation. The system
nucleus simulates an environment in which program execution and
input/output are handled uniformly as parallel, cooperating processes. A
fundamental set of primitives allows the dynamic creation and control of a
hierarchy of processes as well as the communication among them.

%A Allen R. Hanson
%A Edward M. Riseman
%T VISIONS: A computer system for interpreting scenes
%E Allen R. Hanson
%E Edward M. Riseman
%B Computer Vision Systems
%P 303-333
%I Academic Press
%D 1978

%A T. Hanson
%A F. Smith
%A D. Summers
%A C.B. Wilson
%T Computer Simulation of Wind flow around buildings
%I Edinburgh University

%A K. Hao
%A R. T. Yeh
%T Detection of Inherent Deadlocks in Distributed Programs
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 518-524
%K
%O Deadlock Detection

%A H. Happ
%A C. Potte
%A K. Wirgan
%T Parallel Processing for Large Scale Transient Stability
%J Proc. IEEE Can. Conf. Comm. Power
%P 204-207
%D 1978

%A R. M. Haralick
%T Some Nearest Neighbor Operations
%E Morio Onoe
%E Kendall Preston, Jr.
%E Azriel Rosenfeld
%B Real-Time/Parallel Computing: Image Analysis
%I Plenum Press
%C New York, NY
%D 1981
%P 11-35
%X Paper and book title say it all.

%A Samuel P. Harbison
%T A Computer Architecture for the Dynamic Optimization of High-Level Language
Programs
%R CMU-CS-80-143
%I Carnegie-Mellon University
%C Pittsburgh, PA
%D Sept. 1980
%X A high-level language machine which had a tree-machine architecture
(simple).

%A A. R. K. Hardcastle
%T Multi-Minis versus Large Mainframes
%B Minis versus Mainframes, State of the Art Report
%I Infotech, Ltd.
%C Maidenhead, England
%D 1978
%K miscellaneous topics in multiprocessing
%X Discusses the pros and cons of using multi-miniprocessors in lieu of
large mainframes for commercial data processing.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A A. Harding
%A J. Carling
%T The Three-Dimensional Solution of the Equations of Flow and Heat
Transfer in Glass-Melting Tank Furnaces: Adapting to the DAP
%E D. Paddon
%B Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford
%D 1984
%P 115-133

%A A. F. Harding
%A J. C. Carling
%T The Three-Dimensional Solution of the Equations of Flow and Heat
Transfer in Glass-Melting Talk Furnaces: Adpating to the DAP
%E D. J. Paddon
%B Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford, England
%D 1984
%P 115-133
%K SOR, (alternating direction implicit) ADI methods,

%A J. Archer Harris
%A David R. Smith
%T Hierarchical multiprocessor organizations
%J Proc. 4th Ann. Symp. on Computer Architecture
%C Silver Spring, Maryland
%D March 1977
%P 41-48
%K miscellaneous topics in multiprocessing, multicomputer systems
%X Examines the benefits of multi-microprocessor organizations and the
problems encountered in such systems.  Describes a specific multiprocessor
design, based on microprocessors, and investigates its suitability
for some classes of problems.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A J. Archer Harris
%A David R. Smith
%T Simulation Experiments on a Tree Organized Minicomputer
%J Proceedings of 6th Annual Symposium on Computer Architecture
%D 1979
%K University of Southern Illinois, SUNY
Brook
%P 83-89

%A M. C. Harrison
%A J. T. Schwartz
%T SHARER, a Time Sharing System for the CDC 6600
%J Comm. ACM
%V 10
%P 659-664
%D 1967

%A M. J. Harrison
%A W. H. Harrison
%T The implementation of APL on an associative processor
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 75-96
%K
%O Associative processors

%A Malcolm C. Harrison
%T An Ultracomputer Switch Design Using Circuit and Packet Switching
%R ULTRACOMPUTER NOTE #57
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D June 1983

%A T. J. Harrison
%T IEEE project 802: Local Area Network Standard-a March 1982 Status
Report
%B Electro/82 Conference Record
%C Boston, MA, USA
%P 17-1/1-11
%O 10 REFS
Treatment GENERAL OR REVIEW
%I Electron. Conventions, El Segundo, CA, USA
%D 25-27 May 1982
%K computer networks data communication systems standards
data communication systems local area networks computer networks LAN
standards IEEE project 802 Local Area Network Standard March 1982 Status Report
%X The author discusses Project 802 of the Computer Society of the
Institute for Electrical and Electronic Engineers (IEEE). Project 802
is defining a standard for local area networks in which 'intelligent'
terminals and other devices are coupled on a peer-to-peer basis. A
brief history and rationale for the effort and an overview of the
current draft standard are provided

%A L. Hart
%T For network managers, finding faults is no easy task
%J Data Commun. (USA)
%V 13
%N 10
%P 189-192
%O 0 REFS
Treatment GENERAL OR REVIEW
%D 1984
%K computer maintenance computer networks data communication systems
DP management fault location
network managers locating faults central computer network histories
fault isolation test procedures
%X Looks at the increasing complexity of networks and the corresponding
difficulty in locating faults. The solution put forward is to monitor
the various terminals from a central computer which maintains a
database of network histories and configurations used, and fault
isolation and test procedures which can be made available at the
terminal reporting the fault. To enable appropriate action

%T Termination of Probabilistic Concurrent Programs
%A Sergiu Hart
%A Micha Sharir
%A Amir Pnueli
%J ACM Transactions on Programming Languages and Systems
%V 5
%N 3
%D July 1983
%P 356-380
%K Algorithms, theory, verification, program analysis, Markov chains,
ergodic sets
Categories: D.1.3 [Programming Techniques] concurrent programming; D.2.4
[Software Engineering]: program verification - correctness proofs; D.4.1
[Operating Systems]: process management - concurrency; mutual exclusion;
scheduling; synchronization; G.3 [Mathematics of Computing]: probability and
statistics - probabilistic algorithms (including Monte Carlo)

%A Paul K. Harter, Jr.
%A Dennis M. Heimbigner
%A Rogger King
%T IDD: An Interactive Distributed Debugger
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Distributed Debugging & monitoring
%P 498-506

%A M. Hasegawa
%A T. Nakamura
%A Y. Shiegei
%T Distributed Communicating Media \(em A Multitrack Bus \(em Capable
of Concurrent Data Exchanging
%J Proceedings of 8th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 9
%N 3
%D May 1981
%P 367-371
%O interconnection

%A M. Hatori
%A Y. Taki
%T Interpolation to Reduce Difficulty in D/A Conversion
%E Morio Onoe
%E Kendall Preston, Jr.
%E Azriel Rosenfeld
%B Real-Time/Parallel Computing: Image Analysis
%I Plenum Press
%C New York, NY
%D 1981
%P 227-240
%X Nothing involving parallelism, a real time image processing system.

%A M. Hatzopoulos
%T Parallel Linear System Solvers for Tridiagonal Matrices
%E D. J. Evans
%B Parallel Processing Systems
%P 389-394
%D 1982
%X I must move this entry into another file with other papers from Evans.

%A E. A. Hauck
%A B. A. Dent
%T Burroughs' B6500/B7500 Stack Mechanism
%J Proc. AFIPS Spring Joint Computer Conf.
%D 1968
%P 245-251

%A W. A. Havranek
%T A New Digital Peripheral Computer for Simulation Problems and Its Influence
on Real-Time Computer Techniques
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 197-200
%K AD-10, simulation,
industrial and industrial like projects

%A B. Hawe
%A A. Kirby
%A B. Stewart
%T Transparent interconnection of local area networks with bridges
%J J. Telecommun. Networks (USA)
%V 3
%N 2
%P 116-130
%O 17 REFS. Treatment APPLICATIONS
%D Summer 1984
%K local area networks protocols
local area networks bridges protocol transparent interconnection architecture
operating principles services flat address space resource model
hybrid network

%A J. K. Hawkins
%A C. J. Munsey
%T A Parallel Computer Organization and Mechanizations
%J IEEE Transactions on Electronic Computers
%V EC-12
%N 3
%D June 1963
%P 251-265
%K image processing, bit-serial processor

%A John Alfred Hawley, III
%A Walter de Brito Meyer
%T MUNIX, a Multiprocessing Version of UNIX
%R Master's Thesis, Naval Postgraduate School
%C Monterey, CA
%D June 1975
%K MUNIX, UNIX
%X A dual processor (DEC PDP-11/50) shared memory design for signal processing.

%A J. P. Hayes
%A R. Yanney
%T Fault recovery in multiprocessor networks
%J 8th Ann. Int. Conf. on Fault-Tolerant Computing
%C Toulouse, France
%D June 1978
%K reliability and error recovery
%X Uses graph theory to describe dynamic reconfiguration and error recovery
in multiple processor networks.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A L. Hayes
%T Comparative Analysis of Iterative Techniques for Solving Laplace's
Equation on the Unit Square on a Parallel Processor
%I University of Texas at Austin
%R M.S. Thesis
%D 1974

%A L. Hayes
%A P. Devloo
%T An Overlapping Block Iterative Scheme for Finite Element Methods
%I Dept. of Aerospace Engineering and Engineering Mechanics,
University of Texas at Austin
%D 1984
%X Remove?

%A Leonard S. Haynes
%T The Architecture of an ALGOL 60 Computer Implemented with Distributed
Processors
%J Proceedings of 4th Annual Symposium on Computer Architecture
%D 1977
%P 95-104
%K Naval Surface Weapons Center
Distributed Systems

%A Leonard S. Haynes
%A R. L. Lau
%A Daniel Siewiorek
%A David Mizell
%T A Survey of Highly Parallel Computing
%J Computer
%V 15
%N 1
%D January 1982
%P 9-24

%A Bill R. Hays
%T A language for controlling parallel processes
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 37
%K
%O Languages
%X Summary.

%A A. Hazra
%T A description method and a classification scheme for data flow
architectures
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 645-652
%K
%O Data Flow Architectures

%T Open Predicate Path Expressions and Their Implementation in Highly
Parallel Computing Environments
%A Mark R. Headington
%A Arthur E. Oldehoeft
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 239-246
%K Languages for Parallel Processing

%A A. R. Healey
%A S. T. Davies
%T Statistical Model Fitting on the ICL Distributed Array Processor
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 311-317
%D 1984
%K Poisson, regression, scaling, DAP,

%A L. D. Healy
%A others
%T The Architecture of a Context Addressed Segment-Sequential Storage
%J Proc. AFIPS Fall Joint Computer Conf.
%D 1972
%P 691-701

%A F. E. Heart
%A R. E. Kahn
%A S. M. Ornstein
%A W. R. Crowther
%A D. C. Walden
%T The interface message processor for the ARPA computer network
%J Proc. Spring Joint Computer Conf.
%I AFIPS Press
%C Montvale, New Jersey
%D 1970
%P 551-567
%X Reproduced in Advances in Computer Commun., Chu,W.W.,(Ed.), (1974)
300-316; in Computer Commun., Green,P.E., and Lucky,R.W.,, (Eds.)
(1976), 375-392).

%A F. E. Heart
%A S. M. Ornstein
%A W. R. Crowther
%A W. B. Barker
%T A New Minicomputer/Multiprocessor for the ARPA Network
%J Proc. AFIPS National Computer Conf.
%I AFIPS Press
%V 42
%D June 1973
%P 529-537
%X Reproduced in Advances in Computer Commun., Chu,W.W.,(Ed.)
(1974), 329-337; in Computer Commun., Green,P.E., and Lucky
R.W., (Eds.), (1976), 366-374).

%A F. E. Heart
%A et al
%T The PLURIBUS Multiprocessor System
%B Multiprocessor Systems
%I Infotech
%C Maidenhead, England
%D 1976
%P 307-330

%l journal-article
%A J. L. Heath
%T Re-Evaluation of RISC 1
%J Computer Architecture News
%D 1984
%M March
%P 3-10
%V 12
%N 1
%K reduced instruction set computer benchmarks 68000 16000
%X comparison of performance

%A J. R. Heath
%A G. D. Broomell
%A A. Hurt
%T A distributed computer architecture for real-time, data driven
applications
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 630-638
%K
%O Data Flow Architectures

%T A Data Flow Approach to Procedural Modeling
%A H. Hedelman
%J IEEE Computer Graphics and Applications
%V 3
%D January 1984
%P 16-26

%A K. S. Hedlund
%T Wafer Scale Integration of Parallel Processors
%I CS Dept., Purdue Univ.
%C West Layfayette, IN
%D 1982?

%A Kye S. Hedlund
%A Lawrence Snyder
%T Wafer scale integration of Configurable, Highly Parallel (CHiP) processors
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 262-264
%K
Purdue, CHiP
%O Array processors

%T Queueing Network Models for Parallel Processing with Asynchronous Tasks
%A Philip Heidelberger
%A Kishor S. Trivedi
%J IEEE Transactions on Computers
%V C-31
%N 11
%D November 1982
%P 1099-1109
%K Approximate solution, computer systems modeling, multiprogramming,
multitasking, parallel processing, performance evaluation, queueing
network models
Special issue on parallel and distributed processing

%A W. L. Heimerdinger
%A G. F. Muething
%A S. J. Nuspl
%A L. B. Wing
%T Architectural considerations in interfacing a parallel processor to the air
traffic control system
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 372-382
%K
%O Parallel processor architectures for air traffic control

%A D. Hekimi
%T ECMA-the European Computer Manufacturers Association
%I ECMA, Geneva, Switzerland
%J Comput. & Stand. (Netherlands)
%V 1
%N 1
%P 13-16
%O 0 REFS. Treatment GENERAL
%D Jan. 1982
%K DP industry standards
international cooperation standards
European Computer Manufacturers Association ECMA

%A D. Heller
%T A Determinant Theorem with Applications to Parallel Algorithms
%J J. Numer. Anal.
%V 11
%I SIAM
%P 559-568
%D 1974

%A D. Heller
%A D. Stevenson
%A J. Traub
%T Accelerated Iterative Methods for the Solution of Tridiagonal Linear
Systems on Parallel Computers
%J Journal of the ACM
%V 23
%P 636-654
%D 1976

%A D. Heller
%J Some aspects of the cyclic reduction algorithm for block tridiagonal
linear systems
%V 13
%N 4
%D September 1976
%P 484-496

%A D. Heller
%T A Survey of Parallel Algorithms in Numerical Linear Algebra
%r CMU CS Tech. Report
%J SIAM Review
%V 20
%D 1978
%P 740-77

%A D. Heller
%A I. Ipsen
%T Systolic Networks for Orthogonal Decompositions
%J J. Sci. Stat. Comput.
%V 4
%P 261-269
%D 1983

%A D. Hellier
%T Minimal parallelism for computation under time constraints
%I Pennsylvania State University

%A R. Hellier
%T DAP Implementation of the WZ Algorithm
%J Comp. Phys. Comm.
%V 26
%P 321-323
%D 1982

%A Richard Hellier
%T Quindiagonal Systems
%I Kent University

%A G. Hellman
%A K. F. Larsen
%A L. Lilja
%T Using an X.21 circuit-switched service:
network, protocols, implementations, and benefits of Datex
%J J. Telecommun. Networks (USA)
%V 3
%N 3
%P 251-267
%O 18 REFS. Treatment APPLICATIONS
%D Fall 1984
%K protocols computer networks data communication systems
X.21 circuit switched service network protocols Datex
public data communication service Nordic Public Data Network network structure availability
security response times

%A Udo Helmbrecht
%T Greens-Function Monte Carlo on the CYBER 205
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 319-324
%D 1984

%A P. Hemker
%A R. Kettler
%A P. Wesseling
%A P. de Zeeuw
%T Multigrid Methods: Development of Fast Solvers
%J Appl. Math. & Comp.
%V 13
%P 311-326
%D 1983
%X Remove?

%A P. W. Hemker
%A P. Wesseling
%A P. M. de Zeeuw
%T A Portable Vector-Code for Autonomous Multigrid Modules
%R NW 154/83
%D June 1981
%I Stichting Mathematisch Centrum
%C Krusilaan 413 1098 SJ, Amsterdam

%T Lazy Evaluation and Cancellation of Computations
%A David Hemmendinger
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 840-842
%K Functional/Numeric Programming

%A R. Hemmersbach
%A D. Schutt
%T On the evaluation of array computers
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 116
%K
%O System performance
%X Summary only.

%A C. Hemrick
%T The internal organization of the OSI network layer: concepts, applications,
and issues
%J J. Telecommun. Networks (USA)
%V 3
%N 3
%P 222-232
%O 20 REFS. Treatment APPLICATIONS
%D Fall 1984
%K data communication systems computer networks protocols
internal organization OSI network layer ISO/TC97/SC6/WG2
concatenated manner OSI communications IONL protocol
standards

%A P. B. Henderson
%A Y. Zalcstein
%T A Graphic-Theoretic Characterization of a Class of Synchronizing
Primitives
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 203
%K
%O operating systems
%X Summary only.

%A R. Henderson
%A J. H. Morris
%T A Lazy Evaluator
%J Conference Record of the Third ACM Symposium on Principles of Programming
Languages (POPL)
%D January 1976
%P 95-103

%A R. Henderson
%T Functional Programming: Application and Implementation
%I Prentice-Hall International
%C Englewood Cliffs, NJ
%D 1980

%A J. Hendry
%A L. Delves
%T GEM Calculations on the DAP
%E D. Paddon
%B Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford
%P 185-194
%D 1984

%A J. A. Hendry
%A L. M. Delves
%T GEM Calculations on the DAP
%E D. J. Paddon
%B Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford, England
%D 1984
%P 185-194
%K SIMD, Global Element Method (GEM),

%A Volker Henkel
%T BVZP Braunschweiger Virtueller Zellularprozessor Ein Emulator Fur
Zellulare Netze
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 325-333
%D 1984

%l manuscript
%T Hardware/Software Tradeoffs for Increased Performance
%A J. Hennessy
%A N. Jouppi
%A F. Baskett
%A T. Gross
%A J. Gill
%O unknown publication
%K risc reduced instruction set computer restricted architecture

%l book-article
%A J. Hennessy
%A N. Jouppi
%A F. Baskett
%A J. Gill
%T MIPS: A VLSI Processor Architecture
%D 1981
%B VLSI Systems and Computations
%E H. T. Kung
%E R. Sproull
%e G. Steele
%I Computer Science Press
%P 337-346
%K pipelines delayed branch jump reduced instruction set computer risc

%l proceedings-article
%A J. Hennessy
%A et al
%T MIPS: A VLSI Processor Architecture
%J Proc of the CMU Conference on VLSI systems And Computations
%P 337-346
%M October
%K RISC
%D 1981

%l proceedings-article
%A J. Hennessy
%A et al
%T The MIPS Machine
%J Proceedings of COMPCON Spring 82
%P 2-7
%M February
%K RISC
%D 1982

%l proceedings-article
%A J. Hennessy
%A N. Jouppi
%A S. Przybylski
%A C. Rowen
%A T. Gross
%A F. Baskett
%A J. Gill
%T MIPS: A Microprocessor Architecture
%J 15th Ann. Workshop on Microprogramming
%M November
%D 1982
%P 17-22
%K risc reduced instruction set computer architecture restricted
%X ... note:  related paper above, in VLSI Systems and Computations

%l proceedings-article
%A J. Hennessy
%A N. Jouppi
%A S. Przybylski
%A C. Rowen
%A T. Gross
%T Performance Issues in VLSI Processor Design
%J Proc. Intl. Conf. on Computer Design (ICCD)
%D 1983
%P 153-156
%K mips risc reduced restricted instruction set computer architecture
%K pipelining microcoding

%A John Hennessy
%A Norman Jouppi
%A Forest Baskett
%A Thomas Gross
%A John Gill
%T Hardware/Software Tradeoffs for Increased Performance
%J Symposium on Architectural Support for Programming Languages and
Operating Systems, Computer Architecture News
%V 10
%N 2
%C Palo Alto, CA
%D March 1982
%P 2-11
%K RISC, pipeline architecture,
%O hardware/software trade

%A M. Hennessy
%A W. Li
%A G. Plotkin
%T A First Attempt at Translating CSP into CCS
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 105-115
%K
%O Semantics of Parallel Programming

%A W. Henning
%A J. Volkert
%T Programming EGPA Systems
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%P 552-

%A W. Henning
%A J. Volkert
%T Programming EGPA Systems
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%P 552-559
%K MIMD
%X This paper has an ALGOL-68-like matrix multiplication.  It is one of
several on the EGPA systems.

%A D. Hennings
%A S. Schindler
%A M. Steinacker
%T A Linear Scheduling Algorithm for a Forest on a Multiprocessor System
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 202
%K
%O operating systems
%X Summary only.

%A D. Hennings
%A S. Schindler
%A M. Steinacker
%T Schedules for general monitor systems with a minimal number of processors
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 26
%K
%O

%T Parallel Garbage Collection with Associative Tag
%A Heonshik
%A Miroslaw Malek
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 369-375
%K Parallel Algorithms

%A D. Heppner
%T Can DDA-like Computer Replace the Analog Computer?
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 143-146
%K advanced hybrid systems

%A A. Herbert
%T The User Interface to the Cambridge Model Distributed System
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 503-508
%K
%O Distributed System Structure

%A A. J. Herbert
%A R. M. Needham
%T Sequencing Computation Steps in a Network
%J Proceedings of the 8th Symposium on Operating Systems Principles,
Operating Systems Review
%V 15
%N 5
%D December 1981
%P 59-63
%O computer-computer communications

%A Uwe Hercksen
%A Rainer Klar
%A Wolfgang Kleinoder
%T Hardware measurements of storage access conflicts in the processor array
EGPA
%J Proceedings of 7th Annual Symposium on Computer Architecture
%I IEEE
%D April 1980
%P 317-324

%T Atomicity vs. Availability: Concurrency Control for Replicated Data
%A Maurice Herlihy
%I Department of Computer Science
%R CMU-CS-85-108
%D February 1985

%A D. Herman
%A J. P. Verius
%T An Algorithm for Maintaining the Consistency of Multiple Copies
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 625-631
%O Distributed data bases applications and techniques

%A D. Herman
%T Controle Repati Des Sunchronisations Entre Processus
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 24-30
%K
%O

%A Daniel Herman
%T Towards a Systematic Approach to Implement Distributed Control of
Synchronization
%E Y. Paker
%E J.-P. Jerjus
%B Distributed Computing Systems (Synchronization, Control and Communication)
%I Academic Press
%D 1983
%P 51-65

%T A General-Purpose High-Speed Logical Transform Image Processor
%A J. M. Herron
%A J. Farley
%A K. Preston, Jr.
%A H. Sellner
%J IEEE Transactions on Computers
%V C-31
%N 8
%D August 1982
%P 795-805
%K Array processing, cellular logic, image processor, neighborhood
transform, parallel processor, peripheral processor
Correspondence

%A Friedrich R. Hertweck
%T Using a Vector Processor in a Research Environment
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 57-66
%D 1984
%X Cray environment with IBM front-end for fusion research.
Has an interesting commentary on the future of high speed, but mostly a
dog-and-pony show paper.

%A L. Hertzberg
%A D. Gosman
%A G. Kieft
%A G. Por
%A M. Schoorel
%A L. Wiggers
%T FAMP System
%J Comp. Phys. Comm.
%V 22
%P 253-260
%D 1981

%A J. Herzberger
%T Some Multipoint-Iteration Methods for Bracketing a Zero with Application to
Parallel Computation
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 231-234
%K root finding,
parallel numerical algorithms

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T Performance Modeling and Evaluation for hierarchically Organized
Multiprocessor Computer Systems
%A U. Herzog
%A W. Hoffmann
%A W. Kelinoder
%P 103-114
%O Performance Evaluation

%A Hellmut Hessenauer
%T Support of Vertical Data Processing by Additional Hardware
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 83-86
%K microprogramming,
structure for parallel and associative processing

%A M. Hestenes
%A E. Stiefel
%T Methods of Conjugate Gradients for Solving Linear Systems
%J J. Res. Nat. Bur. Standards Sect. B.
%V 49
%P 409-436
%D 1952
%X Remove?

%T Improved Time and Parallel Processor Bounds for Fortran-Like Loops
%A Richard W. Heuft
%A Warren D. Little
%J IEEE Transactions on Computers
%V C-31
%N 1
%D January 1982
%P 78-81
%K Data dependence, data flow, parallel computation, program analysis,
shared variables, time and processor bounds
Correspondence

%A Alan R. Hevner
%A S. Bing Yao
%T Query Processing in Distributed Database Systems
%J IEEE Transactions on Software Engineering
%V SE-5
%N 5
%D May 1979
%P 177-187
%K computer networks, database, distributed data base systems,
distributed processing, distribution strategy, heuristic algorithms,
query processing, redundant data, relational data model,
system modeling
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A C. Hewitt
%A others
%T Security and Modularity in Message Passing
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 347-358
%O Specification and Design of Communication Systems

%A C. E. Hewitt
%A H. Baker
%T Actors and continuous functionals
%E E. J. Neuhold
%B IFIP Working Conf. Formal Description of Programming Concepts
%I Elsevier North-Holland
%D 1977
%C New York, NY
%P 16.1-16.21

%A Carl Hewitt
%A Henry Lieberman
%T Design Issues in Parallel Architectures for Artificial Intelligence
%J Digest of Papers COMPCON, Spring 84
%I IEEE
%D Feb. 1984
%P 418-423
%K Actors, Apiary,
AI architectures,

%A Carl E. Hewitt
%T Viewing Control Structures as Pattern of Passing Messages
%J Artificial Intelligence: An International Journal
%V 8
%N 3
%D June 1977
%P 323-364

%A P. G. Hibbard
%A A. Hisgen
%A T. Rodeheffer
%T A language implementation design for a multiprocessor computer system
%J Proc. 5th Annual Symp. on Computer Architecture
%I IEEE
%D April 1978
%P 66-72
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%A P. G. Hibbard
%A N. S. Ostlund
%T Numerical computations on Cm*
%J Proc. 1980 Parallel Processing Symp.
%I IEEE
%D August 1980
%P 135-136

%A P. G. Hibbard
%A A. Hisgen
%A others
%T Studies in Ada Style
%I Springer-Verlag
%D 1981
%P 81-95

%A Peter G. Hibbard
%T Multiprocessor Software Design
%J Proc. 1980 Annual Conference ACM
%D 1980
%I ACM
%P 527-536
%X Excellent source for references, but dated.
$Revision: 1.2 $ $Date: 84/07/05 16:50:10 $

%A Yasushi Hibino
%T A Practical Parallel Garbage Collection Algorithm and its
Implementation
%J Proceedings of 7th Annual Symposium on Computer Architecture
%D 1980
%K Nippon Telegraph and Telephone Public Corp.
%P 113-120

%A D. L. Hicks
%T Hydrocodes on the HEP
%E Janusz S. Kowalik
%B Parallel MIMD Computation: HEP Supercomputer and Its Applications
%I MIT Press
%C Cambridge, MA
%D 1985
%P 309-330
%K Applications, block parallelization,

%A Lee Higbee
%T A vector processing tutorial
%J Datamation
%V 29
%N 8
%P 180-200
%D August 1983
%K Cray-1, Cyber-205, FORTRAN, vectorization
%X Basic tutorial introduction to vector processing on the Cray-1 and
Cyber 205 systems.

%A L. Higbie
%T Speeding Up FORTRAN (CFT) Programs on the CRAY-1
%I CRAY Research, Inc.
%R 2240207
%D 1978

%A L. C. Higbie
%T The OMEN Computers:  Associative Array Processors
%J IEEE Computer Society International Conf., COMPCON 72
%D 1972
%P 287-290

%A L. C. Higbie
%T Supercomputer Architecture
%J Computer
%V 6
%N 1
%D December 1973
%P 48-58

%T Vector Floating-Point Data Format
%A L. C. Higbie
%J IEEE Transactions on Computers
%V C-25
%N 1
%D January 1976
%P 25-32
%K A programming language (APL), array processor, floating point,
orthogonal processor, pipeline processor, vector floating point,
Computer arithmetic

%A L. C. Higbie
%T Overlapped Operation with Microprogramming
%J IEEE Transactions on Computers
%V C-27
%N 3
%D March 1978
%P 270-275
%K Microprogramming, overlapped operation, parallel computation,
Correspondence

%A R. E. Higginbotham
%A P. G. Wiley
%T Real-Time Signal Processing with FPS Array Processors
%J Conf. Record, Electro/80
%D 1980
%R 1-11
%P 26/3

%A P. Higginson
%A R. Cole
%T Issues in interconnecting local and wide area networks
%J Business Telecom. Proceedings of the International Conference
%C London, England
%P 231-241
%O 14 REFS. Treatment APPLICATIONS, PRACTICAL
%I Online Conferences Ltd., Online Conferences Ltd, ISBN: 0-903796-95-3
Northwood, England, p: ix+344
%D 25-27 May 1983
%K communication networks computer networks packet switching protocols
computing networks communication networks
interconnecting local and wide area networks packet switching networks
protocol set
%X Local networks have now progressed to the point where they are
becoming commercially available. This has come at the same time as
national and international packet switching networks are beginning to
provide easy wide-area communications between computers. These
developments lead to problems where systems must communicate with
both local and remote systems. The authors examine some of the issues
raised by the need to interconnect systems with both local and wide-area
networks. They also discuss how they have tackled these problems
at UCL by using relays to convert between one protocol set and
another

%A C. R. Hill
%T A real-time microprocessor debugging technique
%B SIGPLAN Not. (USA), ACM SIGSOFT/SIGPLAN Software Engineering
Symposium on High-Level Debugging
%V 18
%N 8
%C Pacific Grove, CA, USA
%P 145-148
%O 5 REFS
Treatment PRACTICAL
%D 20-23 March 1983
%K program debugging real time microprocessor debugging technique
remotely executed debugger source level trace history high level language
microprocessor
%X Describes RED, a remotely executed debugger capable of generating a
real-time source level trace history of a high level language program
executing on a microprocessor. The author outlines two possible
implementation schemes for generating the real-time trace history

%A Frederick S. Hillier
%A Gerald J. Lieberman
%T Introduction to Operations Research
%I Holden-Day, Inc.
%C San Francisco
%D 1967
%X Holden-Day is also of Cambridge, London and Amsterdam

%A Bruce K. Hillyer
%A David Elliot Shaw
%A Anil Nigam
%T NON-VON's Performance On Certain Database Benchmarks
%I Dept. of Computer Science, Columbia Univ.
%C New York, NY 10027
%D November 20, 1983
%K associative processor, computer architecture, database machine,
database management, parallel processor, performance analysis, SIMD machine,
tree machine
%X This paper might be published somewhere.  I have yet to determine where.

%A Bruce K. Hillyer
%A David Elliot Shaw
%T Rapid Execution of AI Production Systems on the NON-VON Supercomputer
%I Computer Science Dept., Columbia University
%C New York, NY 10027
%D March 1984

%A F. P. Hiner, III
%T Pseudo associative linking: a high speed searching algorithm for parallel
processors
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 226-231
%K
SIMD, PAL, ATS
non-numerical algorithms

%A Frank P. Hiner, III
%T Distributed processing for signal processor using the building block
signal processor
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 140-144
%K
%O Applications

%A Frank P. Hiner, III
%T The Tracking Array Processor
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 122-124
%O Special Purpose Architectures

%A Geoffrey F. Hinton
%A Terrence J. Sejnowski
%A David H. Ackley
%T Boltzmann Machines: Constraint Satisfaction Networks that Learn
%R CMU-CS-84-119
%I Department of Computer Science, Carnegie-Mellon University
%C Pittsburg, PA 15213
%D May 1984

%A R. G. Hintz
%A D. P. Tate
%T Control Data STAR-100 Processor Design
%J Digest of Papers, 6th Annual IEEE Computer Society International Conf.
%D 1972
%P 1-7
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%A Paul Hipes
%A Aron Kuppermann
%T Simulation of Atom-Diatom Collisions on Parallel Computers
%R Hm94
%I California Institute of Technology
%C Pasadena, CA
%D 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%A Kai Hiraki
%A Toshio Shimada
%A Kenji Nishida
%T A hardware design of the SIGMA-1, a data flow computer for scientific
computations
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 524-531
%O dataflow
%X Yet another Japanese high performance dataflow proposal.

%A Kei Hiraki
%A Kenji Nishida
%A Toshio Shimada
%T Evaluation of Associative Memory Using Parallel Chained Hashing
%J IEEE Transactions on Computers
%V C-33
%N 9
%D September 1984
%P 851-855
%K Associative memory, hashing hardware, parallel hashing,
Correspondence,

%A Robert Hiromoto
%T Parallel-Processing a Large Scientific Program
%J National Computer Conference \(em Proceedings
%I AFIPS
%V 51
%D 1982
%P 233-237
%K Particle-in-cell model, Univac 1100/84, FORTRAN, linear speedup
LANL
%X This type of study might become common in the near future as applications
programmers try to explicitly parallelize codes and rediscover the problems
of parallel processing.  A similar study was done at Ames.  Little new
information is gained other than "see for yourself."

%A Robert Hiromoto
%T Results of parallel processing a large scientific problem on a commercially
available multiple-processor computer system
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 243-244
%K
LANL, Univac 1100/84, particle-in-cell (PIC) code,
%O Large-scale scientific processing

%A D. S. Hirschberg
%A J. B. Sinclair
%T Decentralized Extrema-Finding in Circular Configurations of Processes
%J CACM 23
%D Nov 1980
%P 627-628

%A A. D. Hirschman
%A G. Ali
%A R. Swan
%T Standard Modules Offer Flexible Multiprocessor System Design
%J Computer Design
%D May 1979
%P 181-189

%A Irving T. Ho
%A Tien Chi Chen
%T Multiple Addition by Residue Threshold Functions and Their
Representation by Array Logic
%J IEEE Transactions on Computers
%V C-22
%N 8
%D August 1973
%P 762-767
%K Algorithms, array logic, high-speed multipliers, multiple addition,
parallelism, READ-ONLY memory, symmetric Boolean function,
symmetry-adapted logic, universal Boolean function,
Special issue on parallel computation, implementation 

%A Lawrence Y. Ho
%A Keki B. Irani
%T An algorithm for processor allocation in a data flow multiprocessing
environment
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 338-340
%K
U Michigan
data flow

%A C. A. R. Hoare
%T Towards a Theory of Parallel Programming
%E C. A. R. Hoare
%E R. H. Perrott
%B Operating System Techniques
%I Academic Press
%D 1972

%A C. A. R. Hoare
%T Monitors:  An Operating System Structuring Concept
%J Comm. ACM
%V 17
%N 10
%P 549-557
%D October 1974
%O 15 refs
treatment: applic; practical
%K operating systems multiprogramming
monitors operating system structuring concept structuring synchronization
semaphores proof rule single resource scheduler bounded buffer
alarm clock buffer pool disc head optimizer readers
writers scheduling mutual exclusion structured multiprogramming
%X This paper develops brinch-hansen's concept of a monitor as a method of
structuring an operating system. It introduces a form of synchronization,
describes a possible method of implementation in terms of semaphores and
gives a suitable proof rule. Illustrative examples include a single
resource scheduler, a bounded buffer, an alarm clock, a buffer pool, a disk
head optimizer, and a version of the problem of readers and writers.

%A C. A. R. Hoare
%T Communicating Sequential Processes
%J Communications of the ACM
%V 21
%N 8
%P 666-677
%D August 1978
%K programming, programming languages, programming primitives,
program structures, parallel programming, concurrency, input, output,
guarded commands, nondeterminacy, coroutines, procedures, multiple entries,
multiple exits, classes, data representations, recursion,
conditional critical regions, monitors, iterative arrays
CR categories: 4.20, 4.22, 4.32
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A L. C. Hobbs
%A Douglas J. Theis
%T Survey of Parallel Processor Approaches and Techniques
%J Parallel Processor Systems, Technologies, and Applications
%E Douglas J. Theis
%E L. C. Hobbs
%I Spartan Books
%C New York
%D 1970
%P 3-20

%A L. C. Hobbs
%A D. J. Theis
%A Joel Trimble
%A Harold Titus
%A Ivar Highberg, ed.
%T Parallel Processor Systems, Technologies and Applications
%I Spartan Books
%C New York, New York
%D 1970

%A R. Hockney
%T A Fast Direct Solution of Poisson's Equation Using Fourier Analysis
%J Journal of the ACM
%V 12
%P 95-113
%D 1965
%X Remove?

%A R. Hockney
%T The Potential Calculation and Some Applications
%J Methods Computational Phys.
%V 9
%D 1970
%P 135-211

%A R. Hockney
%T Characterisation of Parallel Computers
%I Univ. of Reading
%J Conference Proceedings for CONPAR 1981
%D 1977

%A R. Hockney
%T Computers, Compilers and Poisson Solvers
%I Univ. of Reading
%D 1977

%A R. Hockney
%T Supercomputer Architecture
%B Supercomputers
%I Infotech, state of the art report
%D 1979

%A R. Hockney
%T The Large Parallel Computer and University Research
%J Cont. Phys.
%V 20
%P 149-185
%D 1979
%X Political statement.

%A R. Hockney
%T Poisson Solving on Parallel Computers
%J IBM Symposium on Vector Computers and Scientific Computing
%C Rome
%D 1982

%A R. Hockney
%T Characterization of Parallel Computers and Algorithms
%J Comp. Phys. Comm.
%V 26
%P 285-291
%D 1982

%A R. Hockney
%T Characterization of Parallel Computers
%J Proceedings of World Congress on System Simulation and Scientific
Computation, International Association for Mathematics and Computers in
Simulation
%V 1
%P 269-271
%D 1983

%A R. Hockney
%T Optimizing the FACR(1) Poisson-Solver on Parallel Computers
%E D. Paddon
%B Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford
%D 1984
%P 45-65

%A R. Hockney
%T Performance of Parallel Computers
%B Proceedings of the NATO Workshop on High Speed Computations
%E J. Kowalik
%S NATO ASI Series
%V F-7
%I Springer-Verlag
%P 159-176
%D 1984

%A R. W. Hockney
%T The Large Parallel Computer and University Research
%I British Association for the Advancement of Science
%D 1978

%A R. W. Hockney
%A C. R. Jesshope
%T Parallel Computers
%I Adam Hilger Ltd
%C Bristol, England
%D 1981
%K Recommended
%X Older text covering architectures, programming and algorithms.
Classifies Cray-1, CYBER 205, and FPS AP-120B as pipelined computers,
ICL DAP and Burroughs BSP under arrays.  Has good coverage of software
and algorithms.

%A R. W. Hockney
%T A structural notation for computer architecture
%I Univ. of Reading
%D 1981

%A R. W. Hockney
%T A Structural Taxonomy of Computers
%I Reading University
%D February 1981

%A R. W. Hockney
%T Optimizing the FACR(????) Poisson-solver on parallel computers
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 62-71
%K ???? is a script l (ell)
Reading U, Cray-1, Cyber 205
%O Numerical algorithms

%A R. W. Hockney
%A D. F. Snelling
%T Characterizing MIMD Computers: e.g. the Denelcor HEP
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 521-526
%D 1984
%K SIMD, MIMD,

%A R. W. Hockney
%T Optimizing the FACR(l) Poisson-Solver on Parallel Computers
%E D. J. Paddon
%B Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford, England
%D 1984
%P 45-65
%X Originally published in the 1982 Parallel Processing Conference
Proceedings.

%A R. W. Hockney
%T Performance Characterization of the HEP
%E Janusz S. Kowalik
%B Parallel MIMD Computation: HEP Supercomputer and Its Applications
%I MIT Press
%C Cambridge, MA
%D 1985
%P 59-90
%K Performance, HEP FORTRAN, pipelines, barrier synchronization,
speedup,
%X Several short examples of HEP FORTRAN.  It appears to take a bit of
getting used to.

%A Roger W. Hockney
%T Characterising Computers and Optimizing the FACR(l) Poisson-Solver on
Parallel Unicomputers
%J IEEE Transactions on Computers
%V C-32
%N 10
%D October 1983
%P 933-941
%K Computer performance, optimizing algorithms, parallel algorithms,
parallel computers, parallelism, pipelined computer, Poisson solvers,
processor array, vector computer
Parallel computation
%X Paper looks at typical "Class 6" machines [Cray-1, CYBER 205, ICL DAP].
It views architecture and parallel algorithms for performance measures
before getting to the meaty problem of the Poisson solver.

%A D. Hoey
%A C. E. Leiserson
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T A Layout for the Shuffle-Exchange Network
%P 329-336
%O Interconnections

%T Development of a Voice Funnel System, Quarterly Technical Report No. 3
%A M. Hoffman
%I BBN Laboratories
%R 4149
%D 29 June 1979
%K Voice funnel, digitized speech, packet switching, butterfly switch,
multiprocessor, pluribus, wideband satellite network, PSATNET, flow
control

%A R. H. Hoffman
%A R. W. Smith
%A J. T. Ellis
%T Simulation Software Development for the BMDATA DDP Underlay Experiment
%J Computer Software and Applications Conference (COMPSAC80)
%I IEEE
%D October 1980
%P 569-577
%O case study, experiment, distributed simulation

%A Werner Hoffman
%T Implementation and Evaluation of Vertical Algorithms on a Microprogrammable
Computer
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 79-82
%K microprogramming,
structure for parallel and associative processing

%A Eugene B. Hogenauer
%A Richard F. Newbold
%A Yul J. Inn
%T DDSP \(em A data flow computer for signal processing
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 126-133
%K
ESL
%O Data flow and reduction machines

%T Specialized Merge Processor Networks for Combining Sorted Lists
%A Lee A. Hollaar
%J ACM Transactions on Database Systems
%V 3
%N 1
%D September 1978
%P 272-284
%K Computer system architecture, full text retrieval systems,
inverted file databases, sorted list merging, nonnumeric processing,
binary tree networks, backend processors, pipelined networks,
CR Categories: 3.74, 6.22

%A Lee A. Hollaar
%T A Design for a List Merging Network
%J IEEE Transactions on Computers
%V C-28
%N 6
%D June 1979
%P 406-413
%K Backend processors, binary tree networks, computer system architecture,
inverted file databases, nonnumeric processing pipelined networks,
sorted list merging, special-purpose LSI processors, system design,
Special issue on database machines

%A J. H. Holland
%T A Universal Computer Capable of Executing an Arbitrary Number of
Sub-Programs Simultaneously
%J Proc. Eastern Joint Computer Conference
%I AFIPS Press
%D 1959
%P 108-113

%A G. L. Hollander
%T Architecture for Large Computing Systems
%J Proc. AFIPS Spring Joint Computer Conf.
%D 1967
%P 463-466

%A Elmar Holler
%T Multiple copy update
%E B. W. Lampson
%E M. Paul
%E H. J. Siegert
%B Distributed Systems \(em Architecture and Implementation (An Advanced Course)
%S Lecture Notes in Computer Science
%V 105
%I Spring-Verlag
%D 1981
%P 284-307

%A Elmar Holler
%T The National Software Works (NSW)
%E B. W. Lampson
%E M. Paul
%E H. J. Siegert
%B Distributed Systems \(em Architecture and Implementation (An Advanced Course)
%S Lecture Notes in Computer Science
%V 105
%I Spring-Verlag
%D 1981
%P 421-445

%A L. H. Holley
%A others
%T VM/370 asymmetric multiprocessing
%J IBM Systems Journal
%V 18
%N 1
%D 1979
%P 47-70
%K multiprocessor architectures and operating systems
%X Describes the use of attached processing in IBM's Virtual Machine Operating
System.  Performance goals are discussed and compared with actual performance.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Victor P. Holmes
%A Bruce N. Malm
%A Tom H. Little
%T Island universes: distributing a single-user operating system
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 319-321
%K
%O Distributed processing

%A S. F. Holmgren
%T Resource sharing Unix
%Z Digital Technol. Inc., Champaign, IL, USA
%J Proceedings of COMPCON fall '78, computer communications networks
%P 302-305
%D 5-8 Sept. 1978
%C Washington, DC, USA
%I IEEE, New York, USA
xi+434 pp.
%O treatment: general,review
%K computer networks computer architecture
homogeneous network resource sharing network
%X Resource sharing Unix supports resource sharing in a homogeneous network
of Unix systems. Shared resources include data files, peripheral devices,
and processes. The Unix file system is extended to support this resource
sharing. These extensions permit remote resources to be used in the same
manner as local resources.

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T Scheduling Parallel Processes Without a Common Scheduler
%A George Holober
%A Lawrence Snyder
%P 186-195
%O Synchronization

%A Richard C. Holt
%T Some deadlock properties of computer systems
%J Computing Surveys
%V 4
%N 3
%D Sept. 1972
%P 179-196
%K deadlock, deadly embrace, knot, interlock, pre-emption, resource
allocation, operating system, graph reduction
CR categories: 4.31, 4.32
%X Covers a simple examples of deadlock in a modern programming
language (PL/1).  Details strategies, definitions (blocking), uses
a graph/Petri net theory illustration.  Covers a little about prevention.

%A Richard C. Holt
%T Concurrent Euclid, UNIX, and Tunis.
%I Addison-Wesley
%D 1983
%X An introductory text on operating systems.  It is a successor to Holt's
earlier text on Structured Concurrent Programming.  It covers the
issue of multiprocessors only on the level of physical distribution.

%A F. Hommes
%A H. Schlutter
%T Reduction Machine Systems User's Guide
%R Tech. Rept. ISF \(em Rep. 79
%I Gesellschaft fur Mathematik und Datenverarbeitung MBH
%C Bonn, WG
%D December 1979

%A Yang-Chang Hong
%T Efficient computing of relational join operations by means of specialized
hardware
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 315-318
%K
UC R, associative processing
database machine/signal processing

%T An Architecture for a Dataflow Multiprocessor
%A Yang-Chang Hong
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 349-355
%K Data Flow

%A U. Honschopp
%A W.-M. Lippe
%A F. Simon
%T Compiling Functional Languages for von Neumann Machines
%J Proceedings of the SIGPLAN '83 Symposium on Programming Language Issues
in Software Systems, SIGPLAN NOTICES
%C San Francisco, CA
%V 18
%N 6
%D June 1983
%P 22-28

%A Jackylene Hood
%A Maitang Mark
%A Jack Cotton
%T Architecture and simulation of an associative processor integrated
circuit
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 168
%K
%O Applications
%X Summary only.

%A C. H. Hoogendoorn
%T On the Use of Spin Locks in Multiprocessors
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 413-417
%D 1984
%K CHILL language, telephone switching systems,

%A Cornelis H. Hoogendoorn
%T Reduction of memory interference in multiprocessor systems
%J Proceedings of 4th Annual Symposium on Computer Architecture
%C Silver Spring, Maryland
%D March 1977
%P 179-183
%K performance, performance analysis
%X This paper describes various techniques for reducing memory interference
in multiprocessor systems and evaluates them using a trace-driven simulation
model.  The techniques considered fall into two classes \(em memory placement
schemes and private memory schemes.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Cornelis H. Hoogendoorn
%T A general model for memory interference in multiprocessors
%J IEEE Trans. on Computers
%V C-26
%N 10
%D October 1977
%P 998-1005
%K Analytic models, memory interference, multiprocessors,
performance evaluation, simulation
performance, memory systems
%X Presents a mathematical model of memory interference in multiprocessor
systems and validates it with simulation results and by comparison with
models described in the literature.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Albert L. Hopkins, Jr.
%T A Fault-Tolerant Information Processing Concept for Space Vehicles
%J IEEE Transactions On Computers
%V C-20
%N 11
%D November 1971
%P 1394-1402
%K Aerospace computers, distributed control computing systems, error
detection, error recovery, fault tolerance, multiprocessors,
Short notes

%A Albert L. Hopkins, Jr.
%A T. Basil Smith, III
%T The Architectural Elements of a Symmetric Fault-Tolerant Multiprocessor
%J IEEE Transactions on Computers
%V C-24
%N 5
%D May 1975
%P 498-505
%K Bus allocation and switching, digital control systems,
failure detection, fault-tolerant computers, highly reliable systems,
hybrid redundancy, multiprocessors, system test,
Special issue on fault-tolerant computing

%l proceedings-article
%A Martin E. Hopkins
%T A Definition of RISC
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%M May
%D 1984
%P 8-11
%K risc reduced instruction set computer restricted architecture
%X Tries to definite RISCs in the IBM 801 context in comparison to the IBM 370

%A Martin E. Hopkins
%T A Definition of RISC
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 3.8-3.11
%O RISCs
%X Tries to definite RISCs in the IBM 801 context in comparison to the IBM 370.

%A R. P. Hopkins
%A P. W. Rautenberg
%A P. C. Treleaven
%T A Computer supporting data flow, control flow and updateable memory
%R Tech. Report 156
%I Computing Lab, Univ. of Newcastle upon Tyne
%D September 1979

%A R. Michael Hord
%T The ILLIAC IV: The First Supercomputer
%I Computer Science Press
%D 1982
%K recommended
%X A collection of papers dealing with the ILLIAC IV.  These papers include
reminisences and applications on the ILLIAC.
It is slightly apologetic in tone.

%A Susumu Horiguchi
%A Yosihyuki Kawazoe
%A Hisashi Nara
%T A parallel algorithm of parallel processing for the integration of ordinary
differential equations
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 465-469
%K VLSI, Runge-Kutta, Euler's method
%O simulation

%A Ellis Horowitz
%T VLSI Architectures for Matrix Computations
%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%P 124-127
%O Arithmetic Processing

%A Ellis Horowitz
%A Alessandro Zorat
%T The Binary Tree An An Interconnection Network: Applications to
Multiprocessor Systems and VLSI
%J Workshop on Interconnection Networks for Parallel and Distributed
Processing
%D April 1980
%I IEEE
%P 1-10

%T The Binary Tree as an Interconnection Network: Applications to
Multiprocessor Systems and VLSI
%A Ellis Horowitz
%A Alessandro Zorat
%J IEEE Transactions on Computers
%V C-30
%N 4
%D April 1981
%P 247-253
%K Binary trees, multiprocessing, networks, parallelism, VLSI
%O Special issue on interconnection networks for parallel and distributed
processing

%A Robert W. Horst
%A Timothy C. K. Chou
%T An Architecture for High Volume Transaction Processing
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K Commercial Multiprocessors, Tandem, fiber optics,
%C Boston, MA
%P 240-245

%T Multicomputer Interconnection Using Word Parallel Shift Register Ring
Networks
%A Kurt Harold Horton
%I University of Illinois at Urbana-Champaign
%R UIUCDCS-R-84-1164
%D February 1984
%K multicomputer, multiprocessor, network, ring, distributed processing

%A E. C. Horvath
%A S. Lam
%A R. Sethi
%T A level algorithm for preemptive scheduling
%J Journ. ACM
%V 24
%N 1
%D January 1977
%P 32-43
%K scheduling
%X Extends earlier work on the preemptive scheduling of a set of tasks whose
precedence graph is a tree, on processors with different speeds.  Presents
an algorithm which is optimal for the two-processor case and shows that,
in other cases, the algorithm is optimal only when the tasks are independent.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A T. Hoshino
%A T. Kawai
%A T. Shirakawa
%A J. Higashino
%A A. Yamaoka
%A H. Ito
%A T. Sato
%A K. Sawada
%T PACS: A Parallel Microprocessor Array for Scientific Calculations
%J ACM Transactions on Computer Systems
%V 1
%D 1983
%P 195-221
%K (PAX)

%A Tsutomu Hoshino
%A Tomonori Shirahawa
%A Takeski Kamimura
%A Takahisa Kageyama
%A Kiyo Takenouchi
%A Yoshio Oyanagi
%A Toshio Kawai
%T High parallel processor array "PAX" for wide scientific applications
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 95-105
%K Recommended,
(PACS), 128 processors (PAX-128)
numerical algorithms

%T Parallelized ADI Scheme Using GECR (Gauss-Elimination-Cyclic-Reduction)
Method and Implementation of Navier-Stokes Equation in The PAX
Computer
%A Tsutomu Hoshino
%A Takeshi Kamimura
%A Toshihiro Iida
%A Tomonori Shirakawa
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 426-433
%K Numeric Computing

%A F. Hossfeld
%T Nonlinear Dynamics: A Challenge on High-Speed Computation
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 67-80
%D 1984
%K strange attractors, computational science, Lorenz attractor
%X Applications survey position paper.

%A S. Hotovy
%T Evaluation of A Vectorizable 2-D Transonic Finite Difference Algorithm
%I AIAA
%R 79-0276
%D 1979

%A S. House
%T Compiling in Parallel
%I Kent
%J Proceedings for CONPAR 81
%D 1981

%A S. R. House
%A D. C. Wood
%T An Introduction to Compiling on the DAP
%I Kent University
%J IUCC Bulletin
%V 3
%P 61
%D 1981

%A Steven R. House
%T Symbol Processing on the Distributed Array Processor
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 419-424
%D 1984
%K DAP,

%A E. Housors
%A O. Wing
%T Pseudo-Conjugate Directions for the Solution of the Nonlinear
Unconstrained Optimization Problem on a Parallel Computer
%J J. Optimization Theory and Applications
%V 42
%P 169-180
%D 1984

%A E. C. Housos
%A O. Wing
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Parallel Nonlinear Minimization by Conjugate Directions
%P 157-158
%O

%A P. Hsia
%T A Configurable Distributed Computing System
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 172-176
%O Testing and Evaluation

%A P. Hsia
%A T. G. Williams
%A J. D. Reynolds
%A W. C. McDonald
%T A Configurable Testbed for Distributed Data Processing Experiments
%J Computer Software and Applications Conference (COMPSAC80)
%I IEEE
%D October 1980
%P 578-583
%O case study, experiment, distributed simulation

%A Ching C. Hsiao
%A Lawrence Snyder
%T Omni-sort: a versatile data processing operating for VLSI
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 222-225
%K
non-numerical algorithms

%A D. X. Hsiao
%A D. K. Madnick
%T Data base machine architecture in the context of information technology
revolution
%J Proc. 3rd Very Large Data Base Conf.
%D October 1977

%A David K. Hsiao
%A Paula R. Strawser
%T The Predicate Machine \(em A High-Level Database Machine
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 6.33-6.45
%O Database computers

%T RSESS Interconnection Network
%A Tan Hsiao-Nan
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 466-473
%K Network Performance

%A Jian-tu Hsieh
%A Andrew R. Pleszkun
%A James R. Goodman
%T Performance Evaluation of the PIPE Computer Architecture
%I University of Wisconsin-Madison
%R Computer Sciences Technical Report #566
%D November 1984

%A C. P. Hsu
%A T. Feng
%T A reconfigurable parallel arithmetic unit
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 370-371
%K
%O System architecture and component design

%A Peter Y. T. Hsu
%A Joseph T. Rahmeh
%A Edward S. Davidson
%A Jacob A. Abraham
%T TIDBITS: Speedup via Time-Delay Bit-Slicing in ALU Design for VLSI
Technology
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K Pipelined CPUs
%C Boston, MA
%P 28-35

%A T. Hsu
%T On the performance and cost-effectiveness of some multiprocessor systems
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 136
%K
%O Performance evaluation

%A T. C. Hu
%T Parallel Sequencing and Assembly Line Problems
%J Operations Research
%V 9
%N 6
%D 1961
%P 841-848

%A C. Hua
%A B. Bhargava
%T Classes of Serializable Histories and Synchronization Algorithms
in Distributed Database Systems
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 438-446
%K
%O Concurrency Control Techniques

%A Alan Huang
%T Architectural Considerations Involved in the Design of an Optical Digital
Computer
%J Proceedings of the IEEE
%V 72
%N 7
%D July 1984
%P 780-786
%K von Neumann bottleneck, communication cost,
Special issue on optical computing
%X This paper and its special issue cover optical digital computing.
The author presents (in person) a very good case for optical computing as
THE method for parallel processing.  Also, see the survey by Sawchuk and Strand
in the same issue.  (ucbvax!vax135!alan).

%T Optical Digital Computers?
%A Alan Huang
%J Digest of Papers, Compcon85 Thirtieth IEEE Computer society
International Conference
%I IEEE Computer Society
%D February 25-28, 1985
%P 290-292

%A Chua-Huang Huang
%A Christian Lengauer
%T The Automated Proof of a Trace Transformation for A Bitonic Sort
%I Dept. of Computer Sciences, The University of Texas at Austin
%R TR-84-30
%D October 1984

%A J. Huang
%A O. Wing
%T Optimal Parallel Triangulation of a Sparse Matrix
%J IEEE Trans. Circuits and Syst.
%V CAS-26
%P 726-732
%D 1979

%A Kuang-Hua Huang
%A Jacob A. Abraham
%T Efficient parallel algorithms for processor arrays
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 268-279
%K
U of Ill, MPP, CLIP, systolic arrays
%O Array processors

%A Kuang-Hua Huang
%A Jacob A. Abraham
%T Fault-tolerant algorithms and their application to solving LaPlace Equations
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 117-122
%K PDE, concurrent error detection,
%O numeric computation

%T Efficient Distributed Evaluation of Functional Programs Using Serial
Combinators
%A Paul Hudak
%A Benjamin Goldberg
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 831-839
%K Functional/Numeric Programming

%A Eva Hudlicka
%A Victor R. Lesser
%T Diagnosing the behavior of a distributed problem solving system
%R Technical Report
%I Department of Computer and Information Science, University of Massachusetts
%C Amherst, Massachusetts
%D June 198

%A W. Huen
%A O. El-Dessouki
%A E. Huske
%A M. Evans
%T A Pipelined dynamo compiler
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 57-
%K
%O Operating systems and compilers

%A Robert W. Huff
%A John M. Dawson
%A G. J. Culler
%T Computer Modeling in Plasma Physics on the Parallel-Architecture CHI
Computer
%E Garry Rodrigue
%B Parallel Computations
%I Academic Press
%D 1982
%P 365-396

%A S. P. Hufnagel
%T Comparison of Selected Array Processor Architectures
%J Computer Design
%V 18
%N 3
%D March 1979
%P 151-158

%A C. J. Hughes
%A J. Garrett
%T Software for distributed processor controlled switching systems
%J Proc. Computer Software & Applications Conf. (COMPSAC 77)
%D November 1977
%P 168-172

%A H. D. Hughes
%A L. Li
%T Simulation model of an Ethernet
%J Comput. Performance (GB)
%V 3
%N 4
%P 210-217
%O 16 REFS
Treatment PRACTICAL
%D 1982
%K computer networks packet switching scheduling
simulation model Ethernet performance packet delay collision frequency
CSMA/CD scheduling policy
%X A simulation model is described which can be used in experiments to
evaluate Ethernet performance. The results of these experiments can
be used to investigate the packet delay at each node, the collision
frequency, the network's capacity, the stability of the network and
the fairness of network access. This simulation model also allows
modifications to the CSMA/CD scheduling policy to be studied. A
discussion of the design and implementation of the model is
presented. Examples are provided to illustrate some possible uses of
the model, and the results obtained from the model are verified

%A Robert A. Hummel
%T Image Processing on the NYU Ultracomputer
%R ULTRACOMPUTER NOTE #72
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D November 1984
%X Describes needs of local neighborhood image processing with
respect to a 4K processor Ultra.

%A D. Hunt
%A S. Webb
%A A. Wilson
%T Applications of a Parallel Processor to the Solution of Finite
Difference Problems
%E M. Schultz
%B Elliptic Problem Solvers
%I Academic Press
%C New York
%P 339-344
%D 1981

%A D. J. Hunt
%T Application Techniquest for Parallel Hardware
%B Supercomputers
%I Infotech, state of the art report
%D 1979

%A D. J. Hunt
%T The ICL DAP and its Application to Image Processing
%B Languages and Architectures for Image Processing
%E M. J. B. Duff
%E S. Levialdi
%I Academic Press
%C New York, NY
%D 1981
%P 275-282
%X Submitted to proceedings of the workshop on "New Computer
Architecture & Image Processing"

%A D.J. Hunt
%T Solution of a large system of equations on the DAP using the Hybrid
Gauss Gauss/Jordan method
%I ICL
%D 1981

%A David J. Hunt
%T Tracking of LSI Chips and Printed Circuit Boards Using The ICL
Distributed Array Processor
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 425-430
%D 1984

%A A. R. Hurson
%A B. Shirazi
%T A Systolic Multiplier Unit and its VLSI Design
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K systolic arrays, systolic multiplier unit, VLSI design,
pipeline architecture
%C Boston, MA
%P 302-309

%A A. D. Hurt
%A J. R. Heath
%T The Design of a Fault-Tolerant Computing Element for Distributed
Data Processors
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 171-176
%K
%O Design of Fault Tolerant systems

%A D. Hutchison
%A D. Shepherd
%T Strathnet-a local area network.
%J Software & Microsyst. (GB)
%V 1
%N 1
%P 21-27
%D 1981
%O 17 Refs.
Treatment PRACTICAL.
%K computer networks data communication systems.
software data communication systems Strathnet local area network
Department of Computer Science Strathclyde University Ethernet system
local network architectures
ring system.
%X Outlines the design and implementation of Strathnet, a local area
network in the Department of Computer Science at Strathclyde
University. Strathnet is based on the Ethernet system and will be
used for experimental work on local network architectures,
particularly in comparison with a ring system, before eventually
providing a network service within the department.

%A D. Hutchison
%A S. Yacoob
%T Interfacing PDP-11s and LSI-11s to local area networks
%J DECUS UK and Ireland. Conference 1983 Proceedings
%C Lancaster, England
%D 1983
%P 13-20
%O 10 REFS. Treatment PRACTICAL
%I DECUS UK & Ireland. Reading, England, 85
%K computer networks computer interfaces
PDP 11s LSI 11s local area networks Cambridge Ring
Ethernet like local network Strathnet hardware aspects interfacing
DEC computers

%A D. Hutchison
%T Local area networks. An introduction
%J Software & Microsyst. (GB)
%V 2
%N 4
%P 87-95
%O 30 Refs.
Treatment PRACTICAL.
%D 1983
%K computer networks.
computer networks local network high data rates Ethernet
token ring standardisation Cambridge Ring slotted ring architecture
local area network.
%X The term local network first began to appear in print as long as ten
years ago. In the second half of the 1970s there was a great deal of
interest in techniques for implementing this type of network, namely
to link together computers over a restricted area at low cost and at
high data rates. It is now becoming apparent that two local network
architectures in particular will become internationally the most
prominent: these are the Ethernet and the token ring, both backed by
US and European standards bodies and by competing and large
industrial interests. A token bus is also being adopted for
standardisation but seems likely to be in a somewhat secondary role.
In the UK the Cambridge Ring, a slotted ring architecture, has made
its own impact, but its future appears limited in a wider context.
Nevertheless a large research and development effort is associated
with the Cambridge Ring and has resulted in a set of UK local
networking standards. The purpose of the paper is to give an
introduction to each of these local area network structures,
particularly by means of their associated standards. A comprehensive
list of references is provided as a basis for further reading into
the subject.

%A D. Hutchison
%A S. Yacoob
%T Interfacing PDP-11 and LSI-11 computers to local area networks
%J Interfaces Comput. (Switzerland)
%V 1
%N 3
%P 245-254
%O 10 REFS. Treatment PRACTICAL
%D Aug. 1983
%K computer interfaces computer networks
computer interfaces PDP 11 LSI 11 computers local area networks
Ethernet style network Strathnet protocols general purpose network access unit

%A D. Hutchison
%A D. Coffield
%T Simple token ring local area network
%J Microprocess. & Microsyst. (GB)
%V 8
%N 4
%P 171-176
%O 10 Refs.
Treatment PRACTICAL.
%D 1984
%K computer networks.
token ring local area network communications medium monitor station
access time upper bounds initialization recovery.
%X The implementation of a simple token ring system is described. A
token ring is a form of local area network in which hosts must
capture the token, a unique bit pattern, to use the communications
medium. Many existing token ring implementations designate a separate
host as a monitor station for the ring. Thus ring initialization and
recovery are centralized, so if the monitor is down the ring becomes
unusable. The authors describe a simple cheap token ring which has
advantages over an Ethernet-style local area network in terms of
guaranteed access time upper bounds. They attempted to decentralize
initialization and recovery by giving each host the ability to
initialize and repair the ring.

%A D. Hutchison
%A J. Balfour
%A J. Mariani
%T A dual interface to Cambridge ring and Ethernet-type local networks
%J Microprocess. & Microprogram. (Netherlands)
%V 13
%N 2
%P 97-104
%D 1984
%O Treatment PRACTICAL.
%K computer interfaces computer networks data communication systems.
Strathnet Polynet PDP 11 dual interface
Cambridge ring Ethernet type local networks UMC Z80 based boards PDP 11 UNIBUS.
%X In the Computer Science Department at Strathclyde University an
Ethernet-type local network (called Strathnet) and a Cambridge Ring
are being installed in parallel, to allow comparisons and experiments
on the dual network. The Cambridge Ring is a 'Polynet' supplied by
Logica VTS Ltd., in this system the interfaces to our PDP-11s are
UMC-Z80 based boards, operating in DMA mode, each UMC board equipped
with two ports. The first port is interfaced to a Ring node, using
standard Polynet hardware, whereas the second is connected to
Strathnet by means of an interface board which the authors have
designed and built to implement a simple subset of the Polynet node
register set. This configuration gives an ideal dual access to the
two local networks from the PDP-11 hosts in the Department, and
avoids the expense of building DMA interfaces to the PDP-11 UNIBUS
for Strathnet. This paper describes the design and implementation of
the hardware and software involved in the Strathnet to UMC-Z80
interface, and outlines the way in which the dual system will be used
for initial experiments.

%A John H. Huttenhoff
%A Richard R. Shively
%T Arithmetic Unit of a Computing Element In a Global, Highly Parallel
Computer
%J IEEE Transactions on Computers
%V C-18
%N 8
%D August 1969
%P 695-698
%K arithmetic unit design, cellular processor organization, global processor,
LSI application, parallel processing, variable field length storage
IEEE Computer group conf. proc.

%A F. K. Hwang
%T Rearrangeability of Multi-Connection Three-Stage Clos Networks
%J Networks
%V 2
%N 4
%D Winter 1972
%P 301-306

%A F. K. Hwang
%T Balanced Networks
%J Proc. 1976 Intl. Conf. Communication
%D June 1976
%I IEEE
%P (7-13)-(7-16)
%C New York, NY

%A K. Hwang
%A Y-H Cheng
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T VLSI Computing Structures for Solving Large-Scale Linear System of
Equations
%P 217-230
%O Numerical Algorithms and Applications

%A K. Hwang
%A S. Su
%A L. Ni
%T Vector Computer Architecture and Processing Techniques
%J Advances in Computers
%V 20
%I Academic Press
%C New York
%P 115-197
%D 1981

%A K. Hwang
%A B. W. Wah
%A F. A. Briggs
%T Engineering computer network (ECN): a hardwired network of UNIX
computer systems
%J AFIPS Conference Proceedings, 1981 National Computer
Conference
%C Chicago, IL, USA
%I AFIPS Arlington, VA, USA
xv+719
%V 50.
%D 1981.
%O Treatment PRACTICAL.
%K computer networks packet switching.
engineering computer network ECN packet switched local computer network
Purdue University network architecture protocol hierarchy UNIX
load balancing.
%X Reports the design and operational experiences of a packet-switched
local computer network developed at Purdue University. Hardwired
communication links (1 megabaud) are used to interconnect seven UNIX
computer systems. Over 20 microprocessors and 210 timesharing CRT
terminals are connected to the seven hosts. The author describes the
network architecture, system components, protocol hierarchy, local
UNIX extension, load balancing methods, and performance evaluation of
the Purdue ECN network.

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T Performance Evaluation and Resource Optimization of Multiple SIMD
Computer Organizations
%A Kai Hwang
%A Lionel M. Ni
%P 86-94
%O Performance Evaluation

%T Resource Optimization of a parallel Computer for Multiple Vector
Processing
%A Kai Hwang
%A Lionel M. Ni
%J IEEE Transactions on Computers
%V C-29
%N 9
%D September 1980
%P 831-841
%K M/M/k/l queueing system, multiple SIMD (MSIMD) computer, multiprocessor
architecture, parallel vector processing, performance optimization
%O Special issue on Parallel Processing

%A Kai Hwang
%T Partitioned Matrix Algorithms for VLSI Arithmetic Systems
%J IEEE Transactions on Computers
%V C-31
%D 1982
%P 1215-1224

%A Kai Hwang
%A Yeng-Hend Cheng
%T Partitioned Matrix Algorithms for VLSI Arithmetic Systems
%J IEEE Transactions on Computers
%V C-31
%N 12
%D December 1982
%P 1215-1224
%K Computer architecture, computer arithmetic, linear systems of equations,
matrix computations, numerical analysis, parallel processing,
real-time applications, very large scale integration (VLSI)
%X
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984 pp. 549-558.

%A Kai Hwang
%A Faye A. Briggs
%T Computer Architecture and Parallel Processing
%I McGraw-Hill
%C New York, NY
%D 1984
%X This text is quite weighty.  It covers much about the interconnection
problem.  It's a bit weak on software and algorithms.

%A Kai Hwang, ed.
%T Supercomputers: Design and Application
%I IEEE
%D 1984
%X Yet another IEEE tutorial collection of papers.  This time the 1984
Parallel Processing Conference.

%A Kai Hwang
%T Modern Super Computers
%E Kai Hwang
%B Supercomputers: Design and Application
%I IEEE
%D 1984
%P 5-8
%X Yet another IEEE tutorial collection of papers.  This time the 1984
Parallel Processing Conference.  This is the introductory paper.

%T Remps: A Reconfigurable Multiprocessor for Scientific Supercomputing
%A Kai Hwang
%A Zhiwei Xu
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 102-111
%K Systolic Systems

%A Kai Hwang
%T Multiprocessor Supercomputers for Scientific/Engineering
Applications
%J Computer
%I IEEE
%V 18
%N 6
%D June 1985
%P 57-73
%X Multinational efforts are needed to lower development overhead so
that new supercomputers can be used to advance science, engineering,
and technology
%K parallel processing cray c.mmp cm* x-mp hep heterogeneous element
processor mimd remps dataflow data flow interconnection networks

%A L. Hyafil
%A H. Kung
%T Parallel Algorithms for Solving Triangular Linear Systems with Small
Parallelism
%I Carnegie-Mellon University
%D 1974

%A L. Hyafil
%A H. Kung
%T Bounds on the Speed-ups of Parallel Evaluation of Recurrences
%J Proc. Second USA - Japan Comp. Conf.
%P 178-182
%D 1975

%A L. Hyafil
%A H. Kung
%T The Complexity of Parallel Evaluation of Linear Recurrences
%J Journal of the ACM
%V 24
%P 513-521
%D 1977

%A R. N. Ibbett
%T The MU5 Instruction Pipeline
%J The Computer Journal
%V 15
%N 1
%D February 1972
%P 42-50

%A R. N. Ibbett
%A P. C. Capon
%T The Development of the MU5 Computer System
%J Communications of the ACM
%D January 1978
%V 21
%N 1
%P 13-24

%A R. N. Ibbett
%A P. C. Capon
%A N. P. Topham
%T MU6V: A Parallel Vector Processing System
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K multiprocessors, MUSS
%C Boston, MA
%P 136-144
%X Reports on 68000 based prototype and issues such as the hardware
and software of this vector multiprocessor.

%A IBM
%T IBM System/360 and System/370 Attached Support Version 3 Asymmetrical
Multiprocessor System: General Information Manual
%R CH20-1173

%Q IBM Corp.
%T Vector Processing Subsystem (VPSS) Programmers Guide
%R Ref. Manual GC24-3716-0
%D 1978

%A T. Ichikawa
%A H. Aiso
%T A Computing System Organization for Image Data Retrieval
%E Morio Onoe
%E Kendall Preston, Jr.
%E Azriel Rosenfeld
%B Real-Time/Parallel Computing: Image Analysis
%I Plenum Press
%C New York, NY
%D 1981
%P 241-255
%K ARES, SIMD, MIMD
%X Other descriptions of ARES can be founds in the 1977 and 1978 NCC
AFIPS Proc.

%A Y. Ichioka
%A S. Kawata
%T Hybird Image Processing using a Simple Optical Technique
%E Morio Onoe
%E Kendall Preston, Jr.
%E Azriel Rosenfeld
%B Real-Time/Parallel Computing: Image Analysis
%I Plenum Press
%C New York, NY
%D 1981
%P 171-183
%X Nothing involving parallelism, but real time image processing is covered.

%T Iterative methods for solving Poisson equation
%Q ICL

%T Finite Element Analysis on the DAP
%Q ICL

%T Contouring on the DAP
%Q ICL

%T 1-D bit pattern matching on the DAP
%Q ICL

%T Producing histograms on the DAP
%Q ICL

%T Data segmentation on the DAP
%Q ICL

%T FFT on the DAP
%Q ICL

%T Data Cross Correlation on DAP
%Q ICL

%T Galactic Simulation on the DAP
%Q ICL

%T Study of the ASAS finite element package on DAP
%Q ICL

%T An Operational Meteorological Suite on the DAP
%Q ICL

%T Pattern matching on the DAP
%Q ICL

%T 3-D Magnetohydrodynamics on the DAP
%Q ICL

%T The Assignment problem on DAP
%Q ICL

%T Table look-up on the DAP
%Q ICL

%T A Surveying Problem on the DAP
%Q ICL

%T A General method for data movement in the DAP
%Q ICL

%T Solution of sets of equations on the DAP
%Q ICL

%T Technical description of the DAP system
%Q ICL

%T Software and algorithms for the DAP
%Q ICL

%T Radar data processing on the DAP
%Q ICL

%T Simulation of galactic Evolution on the DAP
%Q ICL

%T Implementing FFT's and Convolutions on the DAP
%Q ICL

%T Application of a Parallel Processor to the Solution of Finite
Difference Problem
%J RADC
%Q ICL
%D 1980

%A IEEE
%T Special Issue on Computer Communications
%J Proc. IEEE
%V 60
%N 11
%D November 1972

%A IEEE
%T Special Issue on Packet Communication Networks
%J Proc. IEEE
%V 66
%N 11
%D November 1978

%T A Multicriteria Approach to Supersystem Architecture Definition
%A James P. Ignizio
%A David F. Palmer
%A Catherine M. Murphy
%J IEEE Transactions on Computers
%V C-31
%N 5
%D May 1982
%P 410-418
%K Distributed processing, goal programming, large-scale systems,
operations research, optimization, resource allocation, supersystems
Special issue on supersystems

%A Hirokazu Ihara
%A Kinji Mori
%T Autonomous Decentralized Computer Control Systems
%J Computer
%I IEEE
%V 17
%N 8
%D August 1984
%P 57-66
%K Special issue on fault-tolerant computers

%A John P. Ihnat
%A Tomlinson G. Rauscher
%A Barry P. Shay
%A Harold H. Smith
%A William R. Smith
%T The use of two levels of parallelism to implement an efficient programmable
signal processing computer
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 113-119
%K
%O Processor organizations

%A Karel Culik II
%A Ivan Fris
%T Topological Transformations As a Tool in the Design of Systolic
Networks
%I University of Waterloo
%R CS-84-11
%D April, 1984

%T Fault-Tolerant Schemes for Some Systolic Systems
%A Karel Culik II
%A Sheng Yu
%I University of Waterloo
%R CS-84-39
%D October, 1984

%T Iterative Tree Arrays with Logarithmic Depth
%A Karel Culik II
%A Oscar H. Ibarra
%A Sheng Yu
%I University of Waterloo
%R CS-85-03
%D March, 1985
%K Iterative arrays, iterative tree arrays, bounded nondeterminism,
systolic systems, parallel computing

%A Brian E. Corrigan\ III
%A Everett L. Johnson
%T An Evaluation of 8085-Based Multiprocessing on a Timeshared Bus
%J Micro
%I IEEE
%V 5
%N 2
%D June 1985
%P 11-21
%X A GPSS simulation of a dual processor system showed effects of
instruction type, bus access length, guard band length, clock
frequency, and clock synchronization on its operation.
%K gpss simulation performance multiprocessor bus utilization access
delay

%A J. Iisaka
%A S. Ito
%A T. Fujisaki
%A Y. Takao
%T A Compound Computer System for Image Data Processing
%E Morio Onoe
%E Kendall Preston, Jr.
%E Azriel Rosenfeld
%B Real-Time/Parallel Computing: Image Analysis
%I Plenum Press
%C New York, NY
%D 1981
%P 257-265
%K ETIOLE, pipeline

%T Effects of the Dynamic Processor Scheduling in a Function Distributed System
%A Satoru Ikehara
%J Journal of Information Processing
%D 1978
%V 1
%N 2
%P 85-91

%A H. Ikeman
%A E. S. Lee
%A P. I. P. Boulton
%T High-speed network uses fiber optics [Hubnet LAN]
%J Electron. Week (USA)
%V 57
%N 28
%P 95-100
%O 0 REFS. Treatment GENERAL
%D 22 Oct. 1984
%K optical fibres optical links local area networks packet switching
optical fibres packet switching high speed LAN data rate 50 Mb/s
contention based network Hubnet LAN fiber optic transmission Hubnet
rooted tree topology point to point fiber optic links central hub

%A J. K. Illiffe
%T Advanced Computer Design
%I Prentice-Hall
%C London, England
%D 1982
%K MPP, Massively Parallel Processor

%A Masaharu Imai
%A Yuuji Tateizumi
%A Yuuji Yoshida
%A Teruo Fukumura
%T The Architecture and Efficiency of DON: A Combinational Problem Oriented
Multicomputer System
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 174-182
%O Parallel algorithms
%K The DOM system, combinational problem oriented multicomputer system,
parallel branch-and-bound algorithm, single-tree machine,
double-tree machine, Acceleration Effect

%T Connectivity of Regular Direct Graphs with Small Diameters
%A Makoto Imase
%A Terunao Soneoka
%A Keiji Okada
%I IEEE Computer Society
%R
%D March 1985
%K Communication networks, connectivity maximization, directed graphs,
interconnection networks.

%A Hiroshi Ina
%A Sachio Kamiya
%A Jiro Mikami
%T Languages and Software Development Tools for Supercomputers
%I Fujitsu Limited
%C Shizuoka, Japan

%A Infotech
%B Multiprocessor Systems
%I Infotech
%C Maidenhead, England
%D 1976

%A A. Ingle
%A D. P. Siewiorek
%T Reliability modeling of multiprocessor structures
%J Computers...by the Millions, for the Millions \(em Digest of Papers \(em
COMPCON Fall 76
%C Washington, D.C.
%D September 1976
%K reliability and error recovery
%X Discusses the reliability and robustness of multiprocessor systems.
Reliability models of two multiprocessor systems, C.mmp and Cm* are
presented and used to compare the reliability of these systems with that
of their uniprocessor counterparts.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A A. Ingle
%A D. P. Siewiorek
%T Reliability models for multiprocessor systems
with and without periodic maintenance
%J Proc. 7th Int. Conf. on Fault-Tolerant Computing
%C Los Angeles, California
%D June 1977
%K reliability and error recovery
%X Examines the effects of integrity checks and periods maintenance on the
reliability of multiprocessor systems whose performance degrades gracefully
in the event of failure.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A K. J. Ingram
%T MAXLIK3 \(em Supervised Maximum Likelyhood Classification
%B Demonstration User' Guide
%D September 1983
%K MPP, Massively Parallel Processor

%A Mamarou Inouye
%T Future Computer Requirements for Computational Aerodynamics
%I NASA Ames Research Center
%R Conf. Publ. No. 2032
%D 1977

%A W. Inskeep
%T The Array Processor; A Floating Point Computer with High Throughput
%J Amer. Laboratory
%V 10
%N 9
%D September 1978
%P 41-49

%A I. Ipsen
%T A Parallel QR Method Using Fast Givens' Rotations
%I Yale University
%R RR 299
%D 1984

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T Modelling of Conflicts, Priority Hierarchies and Reentrancy in
Concurrent Synchronization Structures
%A K. B. Irani
%A C. R. Zervos
%P 196-205
%O Synchronization

%A K. B. Irani
%A N. G. Khabbaz
%T A Model for a Combined Communication Network Design and File Allocation
for Distributed Data Bases
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 15-21
%O Design and requirements specification methodology

%A K. B. Irani
%A N. G. Khabbaz
%T A Combined Communication Network design and File Allocation
for Distributed Databases
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 197-210
%K
%O Distributed Databases

%A K. B. Irani
%A K. W. Chen
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Minimization of Interprocessor communication for Parallel Computation
%P 274-281
%O Array Processors and Processing

%A Keki B. Irani
%A Daniel S. Lo
%T Plasma Simulation Using an Associative Processor
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 242
%K STARAN
%O algorithms and applications
%X Summary only.

%A Keki B. Irani
%A Jamshed D. Mulla
%T Multiple Instruction Associative Pipelines
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 25-35
%O General Purpose Architectures

%T A Methodology for the Design of Communication Networks and the
Distribution of Data in Distributed Supercomputer Systems
%A Keki B. Irani
%A Nicholas G. Khabbaz
%J IEEE Transactions on Computers
%V C-31
%N 5
%D May 1982
%P 419-434
%K Availability, computer communication, data allocation, distributed
databases, networks, reliability
Special issue on supersystems

%T Minimization of Interprocessor Communication for Parallel Computation
%A Keki B. Irani
%A Kuo-Wei Chen
%J IEEE Transactions on Computers
%V C-31
%N 11
%D November 1982
%P 1067-1075
%K Data storage schemes, interconnection networks, interprocessor
communication, parallel computation, SIMD computer
Special issue on parallel and distributed processing

%A Keki B. Irani
%A William S. Wu
%T Minimization of interprocessor communication for parallel
computations on an SIMD multicomputer interconnected with an omega
network
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 63-65
%K non-static data mapping
%O interconnection

%A Keki B. Irani
%A Ibrahim H. Onyuksel
%T A Closed-Form Solution for the Performance Analysis of Multiple-Bus
Multiprocessor Systems
%J IEEE Transactions on Computers
%V C-33
%N 11
%D November 1984
%P 1004-1012
%K Bus contention, Markov chains, Markovian queueing networks, memory
contention, multiple buses, multiprocessor systems, performance
analysis, processing efficiency,
Communications

%A Mary Jane Irwin
%A Don Heller
%T Online Pipeline Systems for Recursive Numeric Computations
%J Proceedings of 7th Annual Symposium on Computer Architecture
%D 1980
%K Penn State U
%P 292-299

%A H. Ishida
%A S. Nomoto
%A H. Ozawa
%T Graphic monitoring of the performance of a large 4-CPU
multiprocessor system
%J 2nd USA-Japan Computer Conference
%C Tokyo, Japan
%D August 1975
%P 271-275
%K performance
%X Describes a software system for collecting and displaying performance
data for a large multiprocessor system.  Presents performance figures for this
system and discusses the use of these results to improve the design of its
operating system.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%T Towards the Parallel Execution of Rules in Production System Programs
%A Toru Ishida
%A Salvatore J. Stolfo
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 568-575
%K Logic Programming/Production Systems

%A Mitsuo Ishii
%A Yasushi Inamoto
%T Memory Structures for an Image Processor
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 353-360

%A Yukata Ishikawa
%A Mario Tokoro
%T The Deisng of an Object Oriented Architecture
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%D June 1984
%P 178-187
%K ZOOM, object oriented processing system (OOPS), distributed processing
systolic arrays

%A S. S. Isloor
%A T. A. Marsland
%T System Recovery in Distributed Databases
%J Computer Software and Applications Conference (COMPSAC79)
%I IEEE
%D November 1979
%P 421-426
%O distributed systems

%A S. S. Isloor
%A T. A. Marsland
%T The deadlock problem: an overview
%J Computer
%V 13
%N 9
%D September 1980
%P 58-78

%A J. E. Israel
%A J. G. Mitchell
%A H. E. Sturgis
%T Separating data from function in a distributed file system
%J Second colloque international sur les systemes d'exploitation
(Second international conference on operating systems)
%C Le Chesnay, France
%D 2-4 Oct. 1978
%P 11pp
%O 4 REFS. Treatment Practical
%I Institut de Recherche d'Informatique et d'Automatique. Le Chesnay,
France 1978
%K file organisation distributed processing
data function distributed file system independent file facility
communications network division of responsibility

%A H. von Issendorff
%A W. Grunewald
%T An Adaptable Network for Functional Distributed Systems
%J Proceedings of 7th Annual Symposium on Computer Architecture
%D 1980
%I IEEE
%P 196-20l

%A Noriyoshi Ito
%A Kanae Masuda
%T Parallel Inference Machine Based on the Data Flow Model
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 4.31-4.40
%O PROLOG machines

%T Fault Location in Distribution Control Interconnection Networks
%A Nathaniel J. Davis IV
%A William Tsun-Yun Hsu
%A Howard Jay Siegel
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 403-410
%K Numeric Computing

%A E. Iwabuchi
%A K. Soga
%A Y. Kawai
%T Structured design of electronic switching system software
%J Proc. Computer Software & Applications Conf. (COMPSAC 77)
%D November 1977
%P 179-185

%A Balakrishna R. Iyer
%A J. B. Sinclair
%T Dynamic Memory Interconnections for Rapid Access
%J Workshop on Interconnection Networks for Parallel and Distributed
Processing
%D April 1980
%I IEEE
%P 107-115

%A Balakrishna R. Iyer
%A J. Bartlett Sinclair
%T Dynamic Memory Interconnections for Rapid Access
%J IEEE Transactions on Computers
%V C-33
%N 10
%D October 1984
%P 923-927
%K Access algorithm, access times, dynamic memories,
interconnection networks,
Correspondence

%T A Statistical Failure/Load Relationship: Results of a Multicomputer
Study
%A Ravishankar K. Iyer
%A Steven E. Butner
%A Edward J. McCluskey
%J IEEE Transactions on Computers
%V C-31
%N 7
%D July 1982
%P 697-706
%K Computer failure data, performance-reliability models, statistical
failure models
Special Issue on Reliable and Fault-Tolerant Computing

%A Jackson
%A Sykes
%A Blake
%T Drooling \(em A Non-Parametric Multi dimensional clustering algorithm
for the DAP
%I NPRL
%C Pretoria, S. Africa

%A K. Jackson
%A C. Moir
%T Parallel Processing in Software and Hardware \(em The MASCOT Approach
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 71-78
%O multiprocessors

%A Ken Jackson
%T MASCOT and Multiprocessors Systems
%E Y. Paker
%E J.-P. Jerjus
%B Distributed Computing Systems (Synchronization, Control and Communication)
%I Academic Press
%D 1983
%P 225-248
%K PALE (Extended Pascal Notation),
%X Includes a program example.

%A Stevens M. Jacobs
%A Larry V. Johnson
%A Odette Khedr
%T A Technique for Systems Architecture Analysis and Design Applied to the
Satellite Ground System (SGS)
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 131-140
%O Resource allocation

%A R. Jacobsen
%A D. Misunas
%T Analysis of structures for packet communication
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 38-
%K
%O Distributed function architectures

%A H. J. Jafari
%A J. Spragins
%A T. Lewis
%T A new modular loop architecture for distributed computer systems
%J Trends and Applications 78: Distributed Processing
%D 1978
%P 72-77

%T Simulation of a Class of Ring-Structured Networks
%A Hossein Jafari
%A T. G. Lewis
%A John D. Spragins
%J IEEE Transactions on Computers
%V C-29
%N 5
%D May 1980
%P 385-392
%K Computer communications, computer network, distributed control, loop
network, multiserver queue, network architecture, network concurrency,
network performance, network throughput, packet network, response time,
ring network, transmission delay
%O Performance evaluation

%A J. M. Jaffe
%A F. H. Moss
%T A Responsive Distributed Routing Algorithm for Computer Networks
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 348-352
%K
%O Distributed Scheduling

%A J. M. Jaffe
%T Distributed Multi-Destination Routing: The Constraints of Local Information
%T Language Constructs and Support Systems for Distributed Computing
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 49-54

%A R. Jaganathan
%A E. A. Ashcroft
%T Easyflow: a hybrid model for parallel processing
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%P 514-523
%K Lucid, rediflow, lucode,
%D August 1984
%O dataflow
%X An excellent analysis of this version of dataflow.

%A J. R. Jagannathan
%A R. Vasudevan
%T A Distributed Deadlock Detection and REsolution Scheme: Performance Study
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 496-501
%K
%O Deadlock Detection

%A J. R. Jagannathan
%A R. Vasudevan
%T Comments on 'Protocols for deadlock detection in distributed database
systems'
%J IEEE Trans. Software Eng. (USA)
%V SE-9
%N 3
%P 371
%O 4 REFS
Treatment PRACTICAL
%D 1983
%K protocols system failure and recovery database management systems
distributed processing
DBMS system failure and recovery protocols deadlock detection
distributed database systems deadlock detection protocols false deadlocks
%X The authors comment on a paper by G. S. Hoo and C. V. Ramamoorthy
(ibid., vol. 8, p.554-7 1982). The two-phase deadlock detection
protocols in the above paper detects false deadlocks. This is
contrary to what the authors claim. The false detection of deadlocks
is shown using a counter example

%A A. Jain
%T A distributed file system with query processing facility over
PRIMENET
%B NETWORKS India 84. International Symposium on Data Communication
and Computer Networks
%C Madras, India
%D 19-21 Oct. 1984
%P 196-197
%O 6 REFS. Treatment PRACTICAL
%E H. N. Mahabala
%E K. B. Lakshmanan
%E S. Srinivasan
%I Comput. Soc. India, IFIP, UNESCO
%K distributed processing computer networks file organisation
query processing facility PRIMENET distributed file system DFS
transparent file handling network defence environment skeleton files
Cambridge File Server Felix File Server Sanchay automatic update
validation network transparent query facility
%X Summary form only given, substantially as follows. The distributed
file system (DFS) is implemented to provide a transparent file
handling mechanism so that any authorized user can access any file
in the network by simply mentioning the name without knowing the
physical location. To retrieve data the user submits a query which
the DFS broadcasts to all the nodes where the query is executed. The
results are then transmitted back to the originating node, where
they are compiled and displayed to the user. The DFS is designed
after considering the various requirements and specifications
peculiar to the defence environment. In view of the hierarchic
organisational structure of the defence services, a distributed data
storage system was envisaged in which skeleton files with the same
record structure are automatically generated at all available
lateral nodes, whenever the new file is created at any node, i.e
the data is partitioned horizontally. The distributed file system
described differs from existing file servers, namely Cambridge File
Server, Felix File Server, Sanchay, etc., in the important aspect
that whereas all the above systems provide primitive facilities at
the file and page level, the presented system provides additional
facilities for automatic update of files after validation and a
network transparent query facility

%A Pankaj Jalote
%A Robert H. Campbell
%T Atomic Actions in Concurrent Systems
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Distributed Database Design concepts
%P 184-191

%A R. A. James
%T Simulation of particle problems in astrophysics
%I Manchester University

%A R. A. James
%A D. Parkinson
%T Simulation of Galactic Evolution on the ICL DAP
%J IUCC Bulletin
%D September 1980

%A R. A. James
%T Simulating Galactic Evolution on the ICL DAP
%I ICL CUA
%C Manchester
%D September 1981

%A A. Jameson
%A E. Turkel
%T Implicit Schemes and LU Decompositions
%J Math. Comp.
%V 37
%P 385-397
%D 1979
%X Remove?

%A Karel Janac
%T Absolutely Stable Method for Partial Differential Equations that Do Not
Require Matrix Inversions
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 303-308
%K application of hybrid computer systems

%A R. Janicki
%T On the Design of Concurrent Systems
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 455-466
%K
%O Languages Constructs & Semantics of Parallel Programming

%A Pierre G. Jansen
%A Joep L. W. Kessels
%T The DIMOND: A Component for the Modular Construction of Switching Networks
%J IEEE Transactions on Computers
%V C-29
%N 10
%D October 1980
%P 884-888
%K Cellular logic, crossbar, distributed processing, FIFO buffer,
sorting network, switching component, switching network
%O Computer networks
%X
Reproduced in the 1984 tutorial: "Interconnection Networks for parallel
and distributed processing" by Wu and Feng.

%T CPAC - Concurrent Processor Architecture for Control
%A Vijay C. Jaswa
%A Charles E. Thomas
%A John T. Pedicone
%J IEEE Transactions on Computers
%V C-34
%N 2
%D February 1985
%P 163-169
%K Computer architecture, concurrent processing, controls, programmable
control, real-time, real-time control, VLSI
%O Real-Time Architecture

%A B. Jayaraman
%A R. M. Keller
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Resource Control in a Demand-Driven Data-Flow Model
%P 118-130
%O Resource Control and Allocation

%A Bharadwaj Jayaraman
%A Robert M. Keller
%T Resource expressions for applicative languages
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 160-167
%K
U of NC, Chapel Hill and U of Utah, successor to FGL?
%O Languages

%A Bharadwaj Jayaraman
%T Constructing a parallel implementation from high-level specifications: a
case study using resource expressions
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 416-420
%K
U NC
scheduling resources

%A B. Jayarman
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Dataflow Approach to Discrete Simulation
%P 158-159
%O

%A Anura P. Jayasumana
%A P. David Fisher
%T TSPS: A Token-Skipping Priority Scheme for Bus Networks
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Channel Access Protocols, rings,
%P 56-63

%A M. Jazayeri
%A C. Ghezzi
%A D. Hoffman
%A D. Middleton
%A M. Smotherman
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Design and Implementation of a Language for Communicating Sequential
Processes
%P 173-180
%O Distributed Processing

%A D. L. Jeanes
%E M. B. Williams
%T Interconnection of public and private packet networks
%B Pathways to the Information Society. Proceedings of the Sixth
International Conference on Computer Communication
%C London, England
%P 987-992
%O 9 REFS
Treatment PRACTICAL
%I North-Holland, Amsterdam, Netherlands, p: xx+1018
ISBN: 0-444-86464-4
%D 7-10 Sept. 1982
%K packet switching data communication systems data communication equipment
communication networks packet networks public packet switching networks
private data networks international standards
X.25 interfaces addressing routing SL 10
%X Outlines the emerging requirements for connection to public packet
switching networks in those countries where private data networks
exist. The author reviews the progress of international standards
discussions regarding such connections. Connection methods using
standard X.25 interfaces are described, together with ways for
private networks to resolve addressing and routing problems. These
methods appear to be a viable alternative to private systems using
dedicated lines. When an administration will provide the necessary
interfaces and address assignments, the private network must still
have additional capabilities for the interconnection to be effective
These are feasible with Northern Telecom's SL-10 packet switching
system, which is now in widespread use as the basis of both public
and private data networks

%A D. Jefferson
%A H. Sowizral
%T Fast Concurrent Simulation using the Time Warp Mechanism, Part I:
Local Control
%D December 1982
%r Hm64
%R Note N-1906AF
%I Rand Corporation
%C Santa Monica, CA
%K Caltech Cosmic Cube, hypercube, C^3P

%A D. Jefferson
%A A. Witkowski
%T An Approach to Performance Analysis of Time Warp and Other
Timestamp-Oriented Synchronization Mechanisms
%J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing
%I ACM
%D August 1984

%A David Jefferson
%T Virtual time
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 384-394
%K
USC
models

%A R. Jenevein
%A D. Degroot
%A G. J. Lipovski
%T A Hardware Support Mechanism for Scheduling Resources in a Parallel
Machine Environment
%J Proceedings of 8th Annual International Symposium on Computer
Architecture
%V 9
%N 3
%D May 1981
%P 57-63
%K SIGARCH Newsletter, Architecture

%A R. M. Jenevein
%A J. C. Browne
%T A Control Processor for a Reconfigurable Array Computer
%J Proceedings of 9th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 10
%N 3
%D April 1982
%P 81-89

%A A. Jennings
%T A Compact Storage Scheme for the Solution of Symmetric Linear
Simultaneous Equations
%J Computer Journal
%V 9
%P 281-285
%D 1966
%X Remove?

%A C. J. Jenny
%T Process Partitioning in Distributed Systems
%J NTC '77 Conference Record Volume 2
%I IEEE
%D 1977
%P 31:1-1 to 31:1-10

%T Digital Convolution Algorithm for Pipelining Multiprocessor Systems
%A Yih-Chyun Jenq
%J IEEE Transactions on Computers
%V C-30
%N 12
%D December 1981
%P 966-973
%K Dedicated processor, digital convolution algorithm, multiprocessing,
pipelining, tree machine

%A P. Jensch
%A W. Ameling
%T A Computer Architecture for Multiple Data Flow Programs
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 187-190
%K join,
industrial and industrial like projects

%A C. Jensen
%T Taking Another Approach to Supercomputering
%J Datamation
%V 24
%N 2
%D February 1978
%P 159-172

%A E. D. Jensen
%T Mixed-Mode and multi-dimensional memories
%J IEEE Computer Society International Conference
%D 1972
%P 287-290

%A E. D. Jensen
%T A Distributed Function Computer for Real-Time Control
%J Proceedings 2nd Annual Symposium on Computer Architecture
%D January 1975
%C Houston, TX
%P 176-182

%A E. D. Jensen
%A K. J. Thurber
%A G. M. Schneider
%T A Review of Systematic Methods in Distributed Processor Interconnection
%J IEEE International Conference on Communications
%I IEEE
%D 1976

%A E. D. Jensen
%A W. E. Boebert
%T Partitioning and Assignment of Distributed Processing Software
%J Compcon 76
%I IEEE
%D 1976

%A E. D. Jensen
%T Decentralized Executive control of computers
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 31-35
%K
%O Scheduling and control in Distributed operating systems

%A E. Douglas Jensen
%T The Honeywell Experimental Distributed Processor \(em
An Overview
%J Computer
%I IEEE
%V 11
%N 1
%D January 1978
%P 28-38
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.
Reprinted in "Tutorial: Distributed Processing," IEEE,
compiled by Burt H. Liebowitz and John H. Carson, 1981, 3rd edition.
Also in Tutorial on Local Computer Networks, Thurber,K.J.
and Freeman,H.A., (Eds.), (1981)).

%A E. Douglas Jensen
%T Distributed Computer Systems
%J Computer Science Research Review 1979-1980
%I Computer Science Department, Carnegie-Mellon University
%D 1980

%A E. Douglas Jensen
%T Hardware/software relationships in distributed systems
%E B. W. Lampson
%E M. Paul
%E H. J. Siegert
%B Distributed Systems \(em Architecture and Implementation (An Advanced Course)
%S Lecture Notes in Computer Science
%V 105
%I Spring-Verlag
%D 1981
%P 413-420

%A J. E. Jensen
%A J. L. Baer
%T A model of interference in a shared resource multiprocessor
%J Proc. 3rd Ann. Symp. on Computer Architecture
%C Clearwater, Florida
%D January 1976
%P 52-57
%K performance
%X Considers contention for resources in multiprocessor systems.  A noteworthy
aspect of this paper is that it considers general shared resources and not just
contention for memory.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A J. E. Jensen
%T A fixed-variable scheduling model for multiprocessors
%J Proc. 1977 Int. Conf. on Parallel Processing
%C Detroit, Michigan
%D August 1977
%P 108-117
%K scheduling
%X This adaptive scheduling algorithm selects a scheduling strategy appropriate
to the load on the system.  The algorithm uses a simplistic but computationally
cheap approach when processor cycles are scarce.  It adopts more complex
scheduling strategies as processor cycles become available.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%J Proceedings of 3rd Annual Symposium on Computer Architecture
%D 1976
%T A Model of Interference in a Shared Resource Multiprocessor
%A John E. Jensen
%A Jean-Loup Baer
%K U of Washington
%P 52-27
%K Performance Evaluation and Modeling

%A Frank Jeschonnek
%T A New Type of Parallel Computer Using Microprocessors
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 527-532
%D 1984
%K VIGD (variable instruction, global data), flexible architecture,
%X 8 - 68000s.

%T A Data Structure for Parallel L/U Decomposition
%A Jochen A. G. Jess
%A H. G. M. Kees
%J IEEE Transactions on Computers
%V C-31
%N 3
%D March 1982 
%P 231-239
%K Elimination-tree, L/U decomposition, parallel processing, schedule,
sparse matrix pivoting, task graph, tearing, triangulated graph
Parallel computation

%A C. Jesshope
%T Evaluation of ILLIAC: Overlap, Non-Overlap
%J Institute for Advanced Computation Newsletter
%V 1
%P 4-5
%D 1977

%A C. Jesshope
%A J. Craigie
%T Some Principles of Parallelism in Particle and Mesh Modelling
%V 2
%E C. Jesshope
%E R. Hockney
%B Infotech State of the Art Report: Supercomputers
%I Maidenhead: Infotech Int. Ltd.
%P 221-236
%D 1979

%A C. Jesshope
%A R. Hockney, (Ed.)
%T Infotech State of the Art Report: Supercomputers
%V 1 and 2
%I Maidenhead: Infotech Int. Ltd.
%D 1979

%A C. R. Jesshope
%A J. A. I. Craigie
%T Small is O.K. Too (another matrix algorithm for the DAP)
%I Univ. of Reading

%A C. R. Jesshope
%T Programming Techniques in Highly Parallel FORTRAN based
Languages

%A C. R. Jesshope
%T Programming with a high degree of parallelism in Fortran
%I Southhampton University

%A C. R. Jesshope
%T Data Routing and Transpositions in Processor Arrays
%J ICL Technical Journal
%V 2
%P 191
%D 1980

%A C. R. Jesshope
%T Implementation of Fast RADIX 2 Transforms on Array Processors
%J IEEE Transactions on Computers
%V C-29
%N 1
%D January 1980
%P 20-27
%K Array processors, complexity, fast Fourier transform, parallel
computation
%O Array processing

%A C. R. Jesshope
%T Some Results Concerning Data Routing in Array Processors
%J IEEE Transactions on Computers
%V C-29
%N 7
%D July 1980
%P 659-662
%K Array processors, data rotation, data routing,
ICL distributed array processor (DAP), k-dimensional cyclic networks,
parallel processors,
Correspondence

%A C. R. Jesshope
%T A Reconfigurable Processor Array for VLSI
%E D. J. Paddon
%B Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford, England
%D 1984
%P 35-40
%K Bit serial processors,

%A A. Jhunjhunwala
%A H. N. Mahabala
%A M. Mukunda Rao
%A T. Alexander
%T Infra-red light beam link of two distant computers
%B NETWORKS India 84. International Symposium on Data Communication
and Computer Networks
%C Madras, India
%D 19-21 Oct. 1984
%P 41-45
%O 0 REFS. Treatment PRACTICAL
%E H. N. Mahabala
%E K. B. Lakshmanan
%E S. Srinivasan
%I Comput. Soc. India, IFIP, UNESCO
%K optical links atmospheric light propagation mobile communication systems
infrared detectors local area networks
infrared light beam link IR light beam link atmospheric optical links
distant computers mobile data link LAN 10 MHz bandwidth Lasers detectors

%T Automatic Vectorization of Printed Maps and Drawings
%A J. Jimenez
%A J. L. Navalon
%A R. E. A. Mason
%J Anonymous, Ed., Session 84 Proc. (CIPS)
%D 1984
%P 53-58

%A Lan Jin
%A Wei-min Zheng
%T Analysis of a splitted-bus distributed multiprocessor system
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 345-346
%K
%O Distributed processing

%A Lan Jin
%A Yi Pan
%T A Kind of Interconnection Network with Mixed Static and Dynamic
Topologies
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Distributed Programming, THUDS,
%P 160-166

%A A. E. Joel, Jr.
%T On Permutation Switching Networks
%J Bell System Technical Journal
%V 47
%N 5
%D May-June 1968
%P 813-822

%A A. E. Joel, Jr.
%T Circuit switching: Unique architecture and applications
%J IEEE Computer
%V 12
%N 6
%D June 1979
%P 10-22

%A Mathai Joesph
%A V. R. Prasad
%A N. Natarajan
%T A Multiprocessor Operating System
%I Prentice-Hall
%D 1984

%A D. Johnson
%A others
%T Automatic Partitioning of Programs in Multiprocessor Systems
%J COMPCON Spring 80
%I IEEE
%D February 1980
%P 175-178

%A Dave Johnson
%T The Intel 432: A VLSI Architecture for Fault-Tolerant Computer Systems
%J Computer
%I IEEE
%V 17
%N 8
%D August 1984
%P 40-48
%K Special issue on fault-tolerant computers

%A Howard W. Johnson
%T Crossbar Circuit Switch
%J Byte
%V 10
%N 5
%D May 1985
%P 180-181
%O Special issue on multiprocessing
%X A side bar to Rich Krajewski's survey in the same issue.

%A J. Johnson
%T ETA Leaves Home
%J Datamation
%V 29
%N 10
%P 74-86
%D 1983
%X A 'Rag' article.  No technical value.
%X Remove?

%A Mark Alan Johnson
%T A Statistical Physics Simulation on the Hypercube
%R Hm86
%I California Institute of Technology
%C Pasadena, CA
%D July 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%A O. Johnson
%T Vector Function Chainer Software for Banded Preconditioned
Conjugate Gradient Calculations
%J Advances in Computer Methods for Partial Differential Equations - IX,
Proc. 10th IMACS World Congress on Systems Simulation and Scientific
Computation
%V 1
%I IMACS
%D 1981
%P 243-245

%A O. Johnson
%A M. Edwards
%T Progress on the 3D Wave Equation Program for the CDC Cyber 205
%I Seismic Acoustics Lab
%J Fourth Year Semi-Annual Prog. Rep.
%V 7
%P 11-15
%D 1981

%A O. Johnson
%A G. Paul
%T Optimal Parametrized Incomplete Inverse Preconditioning for Conjugate
Gradient Calculations
%I IBM
%C Yorktown Heights, NY
%R RC 8644
%D 1981
%X Remove?

%A O. Johnson
%A G. Paul
%T Vector Algorithms for Elliptic Partial Differential Equations Based on
the Jacobi Method
%E M. Schultz
%B Elliptic Problem Solvers
%I Academic Press
%C New York
%D 1981
%P 345-351
%X Remove?

%A O. Johnson
%A M. Lewitt
%T PPCG Software for the CDC CYBER 205
%I Control Data Corp.
%J Proceedings Symposium CYBER 205 Applications
%C Ft. Collins, CO
%D 1982

%A O. Johnson
%A C. Micchelli
%A G. Paul
%T Polynomial Preconditioners for Conjugate Gradient Calculations
%J J. Numer. Anal.
%V 20
%I SIAM
%P 362-376
%D 1983
%X Remove?

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T A Generalized Instrumentation Procedure for Concurrent Pascal
Systems
%A O. G. Johnson
%P 205-208
%O Synchronization

%A Olin G. Johnson
%T Three-Dimensional Wave Equation Computation on Vector Computers
%J Proceedings of the IEEE
%V 72
%N 1
%K Special issue -- Supercomputers - Their Impact on Science and Technology
%P 90-95
%D January 1984

%A P. M. Johnson
%T An Introduction to Vector Processing
%J Computer Design
%V 17
%D February 1978
%P 89-97

%A R. Johnson
%T Network reliability and acyclic orientations
%J Networks (USA)
%V 14
%N 4
%P 489-505
%O 32 REFS. Treatment APPLICATIONS, THEORETICAL
%D Winter 1984
%K reliability computer networks graph theory
backtrack algorithms acyclic orientations undirected graph
perfectly reliable vertices edges probability network reliability complexity
all terminal network reliability search structures spanning trees

%A L. Johnsson
%T Highly Concurrent Algorithms for Solving Linear Systems of Equations
%E G. Birkhoff
%E A. Schoenstadt
%B Elliptic Problem Solvers
%I Academic Press
%C New York
%D 1984
%P 105-126

%A L. Johnsson
%T Odd-Even Cyclic Reduction on Ensemble Architectures and the Solution of
Tridiagonal Systems of Equations
%I Yale University Dept. of Computer Science
%R YALEU/CSD/RR-339
%D 1984

%A Lennart Johnsson
%T Highly Concurrent Algorithms For Solving Linear Systems of Equations
%I California Institute of Technology
%R 5079:TR:83
%D January 1983
%K Tree machines,
%X Caltech survey of methods: LU decomposition, QR, conjugate gradient,
preconditioning

%A S. Lennart Johnsson
%T Combining parallel and sequential sorting on a Boolean n-cube
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 444-448
%K MIMD, cyclic sort, consecutive sort, bucket sort,
%O algorithms

%A S. W. Johnston
%A P. L. Schuhmann
%T Design and optimization of packet networks
%B Second International Network Planning Symposium. Networks 83
%C Brighton, England
%P 124-129
%O 0 Refs, Treatment APPLICATIONS, PRACTICAL
%I IEE, London, England, p: viii+315
%D 21-25 March 1983
%K packet switching communication networks data communication systems
data communications X.25 digital channels packet networks
packet switches Bell Laboratories software automated design
optimization algorithms
%X While early applications may have only a few packet switches, the
difficulty of network design increases when we contemplate future
networks with many tens of high-capacity packet switches. Design
procedures suitable for a wide range of network sizes have been
developed at Bell Laboratories and implemented in software tools
This paper describes the design process and presents an illustrative
example. The packet network design process relies on the judgement of
a knowledgeable engineer, who uses automated design aids to handle
data manipulation and carry out heuristic optimization algorithms for
sub-programs within the network designs. The human designer can
exercise various options in the process, override intermediate
results, and test alternative designs. The overall design procedure
provides a logical framework for network engineering

%A Rene Joly
%T Interconnexion par Bus en Environnement Multiprocesseur, "Principe de
Communication et Techniques d' Arbitrage"
%R PhD thesis
%I Ecole Nationale Superieure des Telecommunications
%D June 1983
%X In the original French.

%A A. K. Jones
%T The object model: a conceptual tool for structuring software
%Z Dept. of Computer Sci., Carnegie Mellon Univ., Pittsburgh, PA, USA
%E R. Hayer
%E R. M. Graham
%E G. Seegmuller
%B Operating Systems. An advanced course
%P 7-16
%D 28 July -5 Aug. 1977
%C Munich, Germany
%I Springer-Verlag, Berlin, Germany
x+593 pp. isbn 3 540 08755 9
%O 14 Refs.
treatment: general,review
%K structured programming operating systems
object model conceptual tools dependency relations abstract entities
operating systems
%X Computers are programmed to simulate complex physical and abstract
systems. To design, construct, and communicate these programmed systems to
others, human being need appropriate conceptual tools. The object model is
both a concept and a tool. Use of the object model can lead to clear and
explicit expression of the dependency relations between abstract entities
in a way that is conducive to rendering them as programs. An example
benefit is that different programmers can be assigned different parts of a
design to program, and their products can be integrated with a minimum of
inconsistencies. The object model provides a framework in terms of which to
think about and communicate designs for programmed systems. The author
explains the model generally, and considers some of its ramifications with
respect to operating systems.

%A A. K. Jones
%A Robert J. Chansler
%A I. Durham
%A P. Feiler
%A K. Schwans
%T Programming issues raised by a multiprocessor
%J Proc. IEEE
%V 66
%N 2
%D February 1978
%P 229-237
%K multiprocessor applications
%X There are problems inherent in writing software for Cm*.  Describes the
StarOS operating system and the implementation of a specific application
under it.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Anita K. Jones
%A Robert J. Chansler
%A Ivor Durham
%A Peter Feiler
%A Karsten Schwans
%T Software management of Cm* \(em A distributed multiprocessor
%J AFIPS Conf. Proc. NCC
%V 46
%D 1977
%P 657-663
%K multiprocessor architectures and operating systems
%X Contains an exposition of the software issues involved in building an
operating system for Cm*.  StarOS, one of the two operating systems for Cm*
evolved from the ideas and strategies developed here.
Text reproduced with the permission of Prentice-Hall \(co 1980.
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A Anita K. Jones
%A Robert J. Chansler, Jr.
%A Ivor Durham
%A Karsten Schwans
%A Steven R. Vegdahl
%T StarOS, a multiprocessor operating system for the support of task forces
%J Proc. 7th Symp. on Operating System Principles
%C Pacific Grove, California
%I ACM
%P 117-127
%D December 1979
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A Anita K. Jones
%A Edward F. Gehringer, eds.
%T The Cm* Multiprocessor Project: A Research Review
%R CMU-CS-80-131
%I Carnegie-Mellon University
%C Pittsburgh, PA
%D July 1980

%A Anita K. Jones
%A Peter Schwarz
%T Experience using multiprocessor systems \(em a status report
%J Computing Surveys
%V 12
%N 2
%D June 1980
%P 121-165
%K multiprocessors, parallel solutions, physical and logical
distribution, resource scheduling, reliability, synchronization
CR Categories: 1.3, 4.0, 4.3, 4.6, 6.20

%A Anita K. Jones
%A Peter Schwarz
%T Experience Using Multiprocessor Systems: A Status Report
%J Computing Surveys
%V 12
%N 2
%D June 1980
%P 121-165
%r CMU-CS-79-146
%i Dept. of Computer Science, Carnegie-Mellon University
%c Pittsburgh, PA
%d October 1979
%K miscellaneous topics in multiprocessing
multiprocessors, paralel solutions, physical and logical distribution,
resource scheduling, reliability, synchronization
CR Categories: 1.3, 4.0, 4.3, 4.6, 6.20
%X The discussion here is based on actual experience in building and
using multiprocessors: it thus falls into a relatively small group of
experience-oriented papers.  This paper was published in "Computing
Surveys."
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Anita K. Jones
%A Zary Segall
%A Chuck Seitz
%A Andrew Wilson, eds.
%T Workshop on Multiprocessors for High Performance Parallel Computation
%R CMU-CS-83-164
%I Carnegie-Mellon University
%C Pittsburg, PA 15213
%D June 1983

%A Anita K. Jones
%A K. Schwans
%T TASK forces: Distributed software for solving problems of substantial sizes
%J 4th Int. Conf. on Software Engineering
%I IEEE. New York, USA 1979
%P 315-330
%D September1979
%C Munich, Germany
%O 26 REFS. Treatment APPLICATIONS
%K distributed processing procedure oriented languages
TASK forces distributed software specification language
%X Contains a sample image processsing problem written in the TASK language.
This provides a nice contrast to the Computational Structures Language
at U Texas by Jim Browne.

%T Tentative Steps Toward a Development Method for Interfering Programs
%A C. B. Jones
%J ACM Transactions on Programming Languages and Systems
%V 5
%N 4
%D October 1983
%P 596-619
%K Design, languages, verification, rely-conditions, guarantee-conditions,
communicating sequential processes
Categories: D.1.3 [Programming Techniques] concurrent programming; D.2.4
[Software Engineering]: program verification; D.3.2 [Programming Languages]:
Languages Classification - Ada; F.3.1 [Logics and Meanings of
Programs]: Specifying and Verifying and Reasoning about Programs

%A J. R. Jones
%T Emerging trends in local area networks
%B Telecommunications (USA)
%V 17
%N 12
%P 54, 59-60, 96
%O 0 Refs.
Treatment GENERAL OR REVIEW.
%D 1983
%K computer networks data communication systems.
local area networks transmission technology LAN computer networks
cost reductions topology signaling access method
transmission medium ring bus star.
%X Discusses how the transmission technology known as the local area
network (LAN) is at present attracting a lot of attention. Many users
of large computer networks are expressing a need for such systems,
and there are many businesses being formed with the intention of
filling that need. There has been significant growth in the number of
companies that supply LAN-related products. One source estimated that
there were more than 230 companies already in this infant industry.
Several factors are behind the rapid growth of the use of local
networks. The first has to do with the dramatic cost reductions that
have occurred in computer technology in the past several years. These
cost reductions have led to the widespread use of computers. The
author discusses four parameters which characterize local networks:
topology, signaling technique, access method, and transmission
medium. The most common topologies presently in use-ring, bus, and
star-are illustrated.

%A R. Joobbani
%A D. P. Siewiorek
%T Reliability Modeling of Multiprocessor Architectures
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 384-398
%O Distributed Computing, Reliability and Fault Tolerance

%A H. Jordan
%T The Finite Element Machine Programmer's Reference Manual
%I University of Colorado
%C Boulder
%R CSDG 78-2
%D 1978
%K FEM

%A H. Jordan
%A P. Sawyer
%T A Multimicroprocessor System for Finite Element Structural Analysis
%B Trends in Computerized Structural Analysis and Synthesis
%E A. Noor
%E H. McComb
%I Pergamon Press
%C New York, NY
%P 21-29
%D 1979
%K FEM

%A H. Jordan
%A D. Podsiadlo
%T A Conjugate Gradient Program for the Finite Element Machine
%I University of Colorado
%C Boulder
%R CSDG
%D 1980
%K FEM

%A H. Jordan
%T Parallelizing a Sparse Matrix Package
%I University of Colorado
%C Boulder
%R CSDG 81-1
%D 1981

%A Harry F. Jordan
%T A Special Purpose Architecture for Finite Element Analysis
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 263-266
%K
%O Arithmetic processors
%X Detailed summary.

%A Harry F. Jordan
%A Maria Scalabrin
%A Wynne Calvert
%T A comparison of three types of multiprocessor algorithms
%J Proc. 1979 Int. Conf. on Parallel Processing
%C Bellaire, Michigan
%D August 1979
%P 231-238
%K performance, array processors
%X Evaluates the performance, on a multiprocessor of specified architecture,
of three different algorithms for a specific problem.  Also discusses hardware
extensions to improve performance.
Text reproduced with the permission of Prentice-Hall \(co 1980.
This paper was reproduced in Kuhn and Padua's (1981)
"Tutorial on Parallel Processing."

%A Harry F. Jordan
%T Programming on the HEP Multiple Instruction Stream Computer
%I Denelcor
%R Tech. Report.
%C Denver, Colorado
%D Aug. 1981

%A Harry F. Jordan
%T Combining partial results in an MIMD computer
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 287-289
%K
Colorado, HEP
%O MIMD processing

%A Harry F. Jordan
%T Performance Measurements on HEP \(em A Pipelined MIMD Computer
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 11
%N 3
%D 1983
%P 207-212
%O Performance Evaluation of Scientific Computers

%A Harry F. Jordan
%T Experience with Pipelined Multiple Instruction Streams
%J Proceedings of the IEEE
%V 72
%N 1
%P 113-123
%D January 1984
%K Special issue -- Supercomputers - Their Impact on Science and Technology
%X
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%A Harry F. Jordan
%T HEP Architecture, Programming and Performance
%E Janusz S. Kowalik
%B Parallel MIMD Computation: HEP Supercomputer and Its Applications
%I MIT Press
%C Cambridge, MA
%D 1985
%P 1-40
%K Architecture, PEM, connection network, parallel programming, pipelining,

%A T. Jordan
%T A New Parallel Algorithm for Diagonally Dominant Tridiagonal Matrices
%I Los Alamos National Laboratory
%D 1974

%A T. Jordan
%A K. Fong
%T Some Linear Algebraic Algorithms and Their Performance on the CRAY-1
%E D. Kuck
%E D. Lawrie
%E A. Sameh
%B High Speed Computer and Algorithm Organization
%I Academic Press
%C New York
%D 1977
%P 313-316

%A T. Jordan
%T Vector Reduction process on CRAY-1 and their Performance
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 215
%K
%O Algorithms and Applications

%A T. Jordan
%T A Performance Evaluation of Linear Algebra Software in Parallel
Architectures
%B Performance Evaluation of Numerical Software
%E L. Fosdick
%I North Holland
%P 59-76
%D 1979

%A T. Jordan
%T CALMATH: Some Problems and Applications
%J Proceedings of a Cray Research Inc. Symposium
%D 1982
%P 5-8

%A T. Jordan
%T Conjugate Gradient Preconditioners for Vector and Parallel Processors
%E G. Birkhoff
%E A. Schoenstadt
%B Elliptic Problem Solvers
%I Academic Press
%C New York
%D 1984
%P 127-139

%A T.L. Jordan
%T Gaussian elimination for dense systems on STAR and a new parallel
algorithm for diagonally dominant tridiagonal systems
%I Los Alamos Lab
%R UC-32

%A T. L. Jordan
%T A Guide to Parallel Computation and Some Cray-1 Experiences
%E Garry Rodrigue
%B Parallel Computations
%I Academic Press
%D 1982
%P 1-50

%A S. Joshi
%A V. Iyer
%T Impact of protocols on VLSI implementations of LANS
%B Wescon 83. Electronic Show and Convention
%C San Francisco, CA, USA
%D 8-11 Nov. 1983
%P 23/3/1-9
%O 0 REFS. Treatment PRACTICAL
%K VLSI local area networks protocols data communication equipment
monolithic integrated circuits
monolithic ICs data communication equipment protocols VLSI
LANS data rates media access link layer protocols
system bottlenecks local distributed data interface

%A N. D. Jotwani
%A J. Robert Jump
%T Step-wise Refinement in Parallel Program Design
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 77-78
%O Language and control
%X Summary only.

%A M. J. Kascic Jr.
%T Anatomy of a Poisson Solver
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 173-179
%D 1984
%K Cyber 205, CDC,

%A Philip H. Enslow, Jr., ed.
%T Multiprocessors and Parallel Processing
%I John Wiley and Sons
%C New York, New York
%D 1974
%K miscellaneous topics in multiprocessing
%X Describes hardware and software issues involved in multiprocessing.
An appendix includes brief descriptions of a number of multiprocessing
systems.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Otto C. Juelich
%A Clinton R. Foulk
%T Compilation of Acyclic Smooth Programs for Parallel Execution
%J ACM Transactions on Programming Languages and Systems
%V 3
%N 1
%D January 1981
%P 24-48
%K Parallel execution, expression-parallel computer, program analysis, code
optimization
CR Categories: 4.29, 5.24

%A J. G. Juhl
%A S. M. Reddy
%T Distributed Fault-Tolerance for Large Multiprocessor Systems
%J Proceedings of 7th Annual Symposium on Computer Architecture
%D 1980
%K University of Iowa
%P 23-30

%A S. N. Jukreja
%A I-Ngo Chen
%T Combinational and Sequential Cellular Structures
%J IEEE Transactions on Computers
%V C-22
%N 9
%D September 1973
%P 813-823
%K Crossbar switch, cubic cellular arrays, fault detection,
machine realization, synchronous sequential, universal logic arrays,
Cellular arrays

%A J. Egil Juliussen
%A Frederic J. Mowle
%T Multiple Microprocessors with Common Main and Control Memories
%J IEEE Transactions on Computers
%V C-22
%N 11
%D November 1973
%P 999-1007
%K Common control memory, emulation, microprogramming, multiprocessor,
simulation,
Computer systems

%A J. Robert Jump
%T Asynchronous Control Arrays
%J IEEE Transactions on Computers
%V C-23
%N 10
%D October 1974
%P 1020-1029
%K Asynchronous control systems, concurrent operations, control structure,
marked graph, programmable cellular array,
Cellular arrays

%A J. Robert Jump
%A Sudhir R. Ahuja
%T Effective Pipelining of Digital Systems
%J IEEE Transactions on Computers
%V C-27
%N 9
%D September 1978
%P 855-865 
%K Cellular arrays, cost-effectiveness, logic design, multiplication,
parallelism, pipelining,
Pipeline systems

%A Thaddeus F. Kadela
%A James H. Graham
%T New parallel algorithms and architectures for optimal state
estimation
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 481-489
%K Kalman-Bucy filter, VLSI, parallel assembly language, systolic array,
vector processing,
%O combinatorial algorithms
%X An analysis of various architectures on ceratin filtering algorithms.

%A D. G. Kafura
%A V. Y. Shen
%T Scheduling Independent Processors with Different Storage Capacities
%J Proceedings ACM Natl. Conference
%V 1
%I ACM
%C N. Y.
%D 1974
%P 161-166

%A D. G. Kafura
%T Relationship between worst-case and expected scheduling performance
for a Model of a Multiprocessor System
%J Proc. Computer Science Conf.
%C Washington, D.C.
%D February 1975
%K scheduling

%A D. G. Kafura
%A V. Y. Shen
%T Task scheduling on a multiprocessor system with independent memories
%J SIAM Journ. on Computing
%V 6
%N 1
%D March 1977
%P 167-187
%K scheduling
%X Considers scheduling in a multiple processor system where all processors are
identical and each processor has its own, private memory.  Examines preemptive
and non-preemptive scheduling schemes for tasks with known resource
requirements and evaluates these schemes both analytically and by system.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A G. Kahn
%T The Semantics of a Simple Language for Parallel Programming
%J Information Processing 74: Proceedings of IFIP Congress 74
%D August 1974
%P 471-475

%A G. Kahn
%A D. MacQueen
%T Coroutines and networks of parallel processes
%J Proc. IFIP 77
%D August 1977
%P 993-998

%A Kevin C. Kahn
%A William M. Corwin
%A T. Don Dennis
%A Herman D'Hooge
%A David E. Hubka
%A Linda A. Hutchins
%A John T. Montague
%A Fred J. Pollack
%A iMAX: A Multiprocessor Operating System for an Object-Based Computer
%J Proceedings of the 8th Symposium on Operating Systems Principles,
Operating Systems Review
%V 15
%N 5
%D December 1981
%P 127-136
%O iMAX-432 operating system

%A R. E. Kahn
%A S. A. Gronemeyer
%A J. Burchfiel
%A R. C. Kunzelman
%T Advances in packet radio technology
%J Proceedings of the IEEE
%V 66
%N 11
%D November 1978
%P 1468-1496

%A Robert E. Kahn
%T Resource-sharing computer communications networks
%J Proceedings of the IEEE
%V 60
%N 11
%D November 1972
%P 1397-1407
%K ARPAnet,
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.
Reprinted in "Tutorial: Distributed Processing," IEEE,
compiled by Burt H. Liebowitz and John H. Carson, 1981, 3rd edition.
Also reproduced in Computer Networks: A Tutorial, Abrams.M., Blanc,R.P.
and Cotton,I., (Eds.), (1980)).

%A R. Y. Kain
%A W. R. Franta
%T Interprocess Communication Schemes Supporting System Reconfiguration
%J Computer Software and Applications Conference (COMPSAC80)
%I IEEE
%D October 1980
%P 365-371
%O distributed systems

%A Richard Y. Kain
%A others
%T Multiprocessor Scheduling Policies
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 660-668
%O Distributed operating systems

%T Lattice-Mesh: A Multi-bus Architecture
%A L. V. Kale
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 700-702
%K Mesh-Structured Systems

%A E. Kalnay
%A L. Takocs
%T A Simple Atmospheric Model on the Sphere with 100% Parallelism
%I NASA-Goddard Modeling and Simulation Facility Research
%R Research Review 1980-81
%P 89-95
%D 1982

%A E. Kalney-Rivas
%A A. Bayliss
%A J. Storch
%T Experiments with the Fourth Order GISS Model of the Global Atmosphere
%J Proc. Conf. on Simulation of Large-Scale Atmospheric Processes
%C Hamburg, Germany
%D 1976
%X Remove?

%A M. H. Kalos
%A Gabi Leshem
%A B. D. Lubachevshy
%T Molecular Simulation of Equilibrium Properties. Parallel Implementation
%R ULTRACOMPUTER NOTE #27
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%K Monte Carlo algorithms

%A M. H. Kalos
%T The NYU Ultracomputer
%R ULTRACOMPUTER NOTE #48
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D 1983

%A T. Kamae
%A T. Hoshino
%A M. Okada
%A M. Nagura
%T Interactive Techniques for Producing and Encoding Color Graphics
%E Morio Onoe
%E Kendall Preston, Jr.
%E Azriel Rosenfeld
%B Real-Time/Parallel Computing: Image Analysis
%I Plenum Press
%C New York, NY
%D 1981
%P 267-278
%K Television
%X Real time graphics, nothing parallel.

%A C. Kamath
%A H. Sameh
%T The Preconditioned Conjugate Gradient Algorithm on a Multiprocessor
%E R. Vichnevetsky
%E R. Stepleman
%B Advances in Computer Methods for Partial Differential Equations,
Proc. of the Fifth IMACS International Symposium
%V V
%I Lehigh University
%D June 1984
%P 210-217

%A T. Kamiuchi
%A H. Nakanishi
%T H-80 \(em A loadsharing, N:1 backup multisystem
%J Computer Technology: Status, Limits, Alternatives \(em
Digest of Papers \(em COMPCON Spring 78
%C San Francisco, California
%D March 1978
%P 261-264
%K multiprocessor architectures and operating systems
%X Intended for on-line control applications, this system uses multiprocessing
for improving throughput and enhancing reliability and availability.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Sachio Kamiya
%A Fumio Isobe
%A Hideo Takashima
%A Masaaki Takiuchi
%T Practical Vectorization Techniques for the "FACOM VP"
%I Fujitsu Limited
%C Shizuoka, Japan

%A Shigeo Kamiya
%A Susumu Matsuda
%A Kazuhide Iwata
%A Shigeki Shibayama
%A Hiroshi Sakai
%A Kunio Murakami
%T A Hardware Pipelining Algorithm for Relational Operation and Its
Implementation Using Dedicated Hardware
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K data retrieval architectures, delta (machine's name), RDBE
relational database engine,
%C Boston, MA
%P 250-257

%A F. Kamoun
%A L. Kleinrock
%A R. Muntz
%T Queueing Analysis of the Ordering Issue in a Distributed Database
Concurrency Control Mechanism
%J 2nd International Conference on Distributed Computing Systems
%C Paris, France
%D April 1981
%P 13-23
%O 7 REFS. Treatment APPLICATIONS, THEORETICAL
%I IEEE. New York, USA, 1981, xi+524
%K distributed processing database management systems queueing theory
distributed database concurrency control queueing theoretic analysis
ticketing algorithm
request sequence data distribution internal consistency mutual consistency

%A F. Kamoun
%A M. B. Djerad
%A G. Le Lann
%T Queueing Analysis of the ordering issue in a distributed database
concurrency control mechanism: A General Case
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 447-453?
%K
%O Concurrency Control Techniques

%A M. Kanai
%T Total Energy Management in a Factory Through Distributed Processing
%J Computer Software and Applications Conference (COMPSAC79)
%I IEEE
%D November 1979
%P 542-546
%O distributed systems

%A Y. Kaneda
%A M. Kohata
%T Highly Parallel Computing of Linear Equations on the Matrix-Broadcast
Memory Connected Array Processor System
%J Proc. 10th IMACS World Congress on Systems Simulation and Scientific
Computation
%V 1
%I IMACS
%D 1982
%P 320-322

%A Y. Kaneda
%A N. Tamura
%A K. Wada
%A H. Matsuda
%T Sequential PROLOG Machine PEK: Architecture and Software System
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 4.1-4.6
%O PROLOG machines

%A A. Kaneko
%A others
%T Logical Clock Synchronization Method for Duplicated Data Base Control
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 601-611
%O Distributed data bases applications and techniques

%A P. C. Kanellakis
%A C. H. Papadimitriou
%T The Complexity of Distributed Concurrency Control
%J Symposium on Foundations of Computer Science
%D October 1981
%P 185-197

%A K. Kant
%A A. Silberschatz
%T Error Recovery in Concurrent Processes
%J Computer Software and Applications Conference (COMPSAC80)
%I IEEE
%D October 1980
%P 608-614
%O fault tolerance/quality assurance

%A Rajani M. Kant
%A Takayuki Kimura
%A University of Delaware
%T Decentralized Parallel Algorithms for Matrix Computation
%J Proceedings of 5th Annual Symposium on Computer Architecture
%D 1978
%P 96-100
%K Language-Oriented Architectures

%A J. D. Kao
%A J. T. Wang
%A T. S. Kuo
%A G. C. Chow
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Design of a Mixed Voice/Data Computer network for Packet-Switching
Communication
%P 289-291
%O

%A Alejandro Kapauan
%A Ko-Yang Wang
%A Dennis Gannon
%A Janice Cuny
%A Lawrence Snyder
%T The PRINGLE: An experimental system for parallel algorithm and
software testing
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 1-6
%K CHiP, MIMD,
%O scientific computation
%X An overview of the PRINGLE.  Includes some hand performance analysis.

%A Alejandro A. Kapauan
%A J. Timothy Field
%A Dennis B. Gannon
%A Lawrence Snyder
%T The Pringle Parallel Computer
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%D June 1984
%P 12-20
%O array processors
%K CHiP
%X This is an elaboration of Snyder's prototype CHiP archiecture.   It uses
64 Intel 8031 processsors controlled via an 8086 controlled via a VAX.
It also details the "wisdom of experience" and " single instance" problems
of developing multiprocessors. The appendix describes CHiP processor arrays
in general.

%A C. H. Kaplinsky
%T Parallel processing by virtual instruction
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 308-318
%K
%O System architecture and component design

%A R. Kapur
%A J. Browne
%T Techniques for Solving Block Tridiagonal Systems on Reconfigurable
Array Computers
%J SIAM J. Sci. Stat. Comp.
%V 5
%P 701-719
%D 1984

%A R. N. Kapur
%A U. V. Premkumar
%A G. J. Lipovski
%T Organization of the TRAC processor-memory subsystem
%J AFIPS Proc. of the NCC
%V 49
%D 1980
%P 623-629

%A R. N. Kapur
%A J. C. Browne
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Block Tridiagonal System Solution on Reconfigurable Array Computers
%P 92-99
%O Numerical Algorithms

%A Scott C. Karlin
%T The Travelling Salesman Problem
%R Hm93
%I California Institute of Technology
%C Pasadena, CA
%D 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%A Ehud D. Karnin
%T A Parallel Algorithm for the Knapsack Problem
%J IEEE Transactions on Computers
%V C-33
%N 5
%D May 1984
%P 404-408
%K Cryptography, knapsack problem, parallel architecture,
time-memory-processor tradeoff, VLSI complexity,
Parallel algorithms,

%A P. M. Karp
%T Origin, development and current status of the ARPA network
%J Digest of papers from the 7th annual IEEE computer society international
conference
%P 49-52
%D 27 Feb. -1 March 1973
%C San Francisco, Calif., USA
%I IEEE, New York, USA
xviii+246 pp pp.
%O 19 refs
treatment: general,review, practical
%K data communication systems
origin development status arpa network
resource sharing network computers
%X The advanced research project agency computer network (arpanet) is a
resource sharing network that has been under development since 1969.
Detailed expositions covering various technical aspects of the network have
appeared in recent literature, a subset of which is included in the list of
references. This paper presents an overview of the network's development
and describes some of the current usage.

%A R. M. Karp
%A R. E. Miller
%T Properties of a Model for Parallel Computation: Determinacy, Termination,
and Queueing
%J SIAM Journal of Applied Mathematics
%V 14
%N 6
%D November 1966
%P 1390-1411

%A R. M. Karp
%A R. E. Miller
%T Parallel Program Schemata
%J J. Comput. Syst. Sci
%V 3
%N 4
%D May 1969
%P 147-195

%A Richard Alan Karp
%T Proving Failure-Free Properties
%J ACM Transactions on Programming Languages and Systems
%V 6
%N 2
%D April 1984
%P 239-253
%K Verification, temporal logic, deadlock, starvation, semaphores,
monitors
Categories: D.2.1 [Software Engineering]:
requirements/specification - methodologies;
D.4.1 [Operating Systems]: process management - concurrency;
deadlocks; mutual exclusion; synchronization;
D.2.4 [Software Engineering]: program verification - correctness proofs;

%A W. J. Karplus
%T Peripheral Processors for High Speed Simulation
%J Simulation
%V 29
%N 5
%D November 1977
%P 143-153

%A Walter J. Karplus
%A Danny Cohen
%T Architectural and Software Issues in the Design and Application of
Peripheral Array Processors
%J Computer
%V 14
%N 9
%D September 1981
%P 11-17
%K

%A Walter J. Karplus
%T Peripheral Array Processors
%J Society for Computer Simulation
%D October 1982
%K ??

%T An Approach for Error Detection and Error Correction in Distributed
Systems Computing Numerical Functions
%A Mark Karpovsky
%J IEEE Transactions on Computers
%V C-30
%N 12
%D December 1981
%P 947-953
%K Distributed systems, error-correcting codes, error correction, error
detection, numerical computations

%A A. I. Karshmer
%A J. Phelan
%A B. Kempton
%A D. J. DePree
%E H. K. Berg
%E W. E. Howden
%E R. R. Panko
%E R. H. Spraque, Jr.
%E B. Shriver
%E T. M. Walker
%E T. R. Cousins
%T The New Mexico State University distributed Unix system: evaluation
and extension
%B Proceedings of the Sixteenth Hawaii International Conference on
System Sciences 1983
%C Honolulu, HI, USA
%P 225-233
%O 22 REFS
Treatment PRACTICAL
%I Hawaii Int. Conference Syst. Sci., Univ. Hawaii,
Univ. Southwestern Louisiana, 2 vol. (x +686+xii+604)
%D 5-7 Jan. 1983
%K distributed processing operating systems
distributed Unix system New Mexico State University
The Hebrew University of Jerusalem microprocessor version
PDP 11 LSI 11 star configuration communication ring
software hardware performance measurements
%X Through a joint effort between New Mexico State University and The
Hebrew University of Jerusalem, a distributed version of the Unix
operating system is currently being developed. A microprocessor
version of the Unix kernel has been designed and implemented to run
on any member of the PDP-11/LSI-11 family of processors and allows
programs to run in a 'Unix-like' environment. As the kernels running
in the distributed processing elements present a 'Unix-like'
environment, all processes in the system are fully transportable from
one processor to another. While the original version of the system
was built in a star configuration, the system is currently being
enhanced through the addition of a communication ring which uses
8-bit microprocessors as ring interface units. The paper describes the
software and hardware structure of the system as well as some
performance measurements taken on the basic star version of the
implementation

%A Svetlana P. Kartaschev
%T Performance of Reconfigurable Buses for Dynamic Architectures
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 261-273
%O Distributed Architectures

%A S. I. Kartashev
%A S. P. Kartashev
%T Distributed dynamic hardware operating system for multiport
reconfigurable memory
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 122-127
%K
%O Distributed operating systems

%A S. P. Kartashev
%A S. I. Kartashev
%T Software Problems for Dynamic Architectures: Adaptive Assignment of
Hardware Resources
%J Computer Software and Applications Conference (COMPSAC78)
%I IEEE
%D November 1978
%P 775-780
%O software techniques for reconfigurable and dynamic architecture

%A S. P. Kartashev
%A S. I. Kartashev
%T Architectures for supersystems of the '80s
%J Proc. Nat. Computer Conf.
%I AFIPS Press
%C Montvale, New Jersey
%D 1980
%P 165-180

%A S. P. Kartashev
%A S. I. Kartashev
%T Software Problems for Dynamic Pipeline Architecture
%J Computer Software and Applications Conference (COMPSAC80)
%I IEEE
%D October 1980
%P 469-475
%O software problems of adaptable architectures

%A S. P. Kartashev
%A S. I. Kartashev
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Reconfiguration of Dynamic Architecture into Multicomputer Networks
%P 133-140
%O Multiprocessor Architectures

%A Steven I Kartashev
%A Svetlana P. Kartashev
%T A Multicomputer System with Dynamic Architecture
%J IEEE Transactions on Computers
%V C-28
%N 10
%D October 1979
%P 704-721
%K Dynamic architecture, dynamic computer group, memory allocation,
modular control, multicomputer, universal module
Computer architecture

%T Problems of Designing Supersystems with Dynamic Architectures
%A Steven I. Kartashev
%A Svetlana P. Kartashev
%J IEEE Transactions on Computers
%V C-29
%N 12
%D December 1980
%P 1114-1132
%K Dynamic architecture, powerful parallel system, reconfigurable hardware
resource, reconfigurable memory processor
%O Special issue on distributed processing systems

%A Steven I. Kartashev
%A Svetlana P. Kartashev
%T A Distributed Operating System for a Powerful System with Dynamic
Architecture
%J National Computer Conference \(em Proceedings
%I AFIPS
%V 51
%D 1982
%P 103-116

%A Svetlana I. Kartashev
%A Steven I. Kartashev
%T Synthesis of a Modular Dedicated Network Assembled from Microcomputers
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 108-114
%O Special Purpose Architectures

%T On Modular Networks Satisfying the Shift-Register Rule
%A Svetlana P. Kartashev
%A Steven I. Kartashev
%J IEEE Transactions on Computers
%V C-27
%N 12
%D December 1978
%P 1153-1176
%K Augmentation of original program, computer-aided design,
interconnections satisfying shift-register rule, modular decomposition
of programs, modular network,
Sequential machines

%A Svetlana P. Kartashev
%A Steven I. Kartashev
%T Adaptable Pipeline System with Dynamic Architecture
%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%P 222-230
%O Reconfigurable Systems

%T Distribution of Programs for a System with Dynamic Architecture
%A Svetlana P. Kartashev
%A Steven I Kartashev
%J IEEE Transactions on Computers
%V C-31
%N 6
%D June 1982
%P 488-514
%K Adaptive assignment of the available resources, dynamic architecture,
hardware resource for a user program, multicomputer system, processor
resource, program graph for a high-level language program
Computer systems

%A Svetlana P. Kartashev
%A Steven I. Kartashev
%T Optimal routing algorithms in multicomputer networks organized as
reconfigurable binary trees
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 206-213
%K
tree structured systems

%A Svetlana P. Kartashev
%A Steven I. Kartashev
%T Memory Allocations for Multiprocessor Systems that Incorporate
Content-Addressable Memories
%J IEEE Transactions on Computers
%V C-33
%N 1
%D January 1984
%P 28-44
%K Conflict-free memory allocation, content-addressable memory,
file interference, noninterfering processor set, relational database,
Memory allocation,

%T Efficient Internode Communications in Reconfigurable Binary Trees
%A Svetlana P. Kartashev
%A Steven I. Kartashev
%J IEEE Transactions on Computers
%V C-33
%N 11
%D November 1984
%P 977-990
%K Efficient internode communications, multicomputer networks,
reconfigurable binary trees,
Communications

%A Jack I. Karush
%A Niel K. Madsen
%A Garry H. Rodrigue
%T Matrix Multiplication by Diagonals on Vector/Parallel Processors
%I NTIS
%R UCID-16899
%D August 1975
%K STAR-100
%K A method for storing arrays by diagonals of varying length.  The method
has problems.

%A A. Kasahara
%T Recent Mathematical and Computational Developments in Numerical Weather
Prediction
%E S. Parter
%B Large Scale Scientific Computation
%I Academic Press
%C Orlando, FL
%D 1984
%P 85-126
%X Remove?

%A Hironori Kasahara
%A Seinosuke Narita
%T Practical Multiprocessor Scheduling Algorithms for Efficient Parallel
Processing
%J IEEE Transactions on Computers
%V C-33
%N 11
%D November 1984
%P 1023-1029
%K Approximation, branch-and-bound method, heuristic algorithm,
MIMD system, multiprocessor scheduling algorithm, optimization,
parallel processing, strong NP-hard, task graph,
Scheduling

%A M. Kascic
%T A Direct Poisson Solver on STAR
%J Proc. 1978 LASL Workshop on Vector and Parallel Processors
%D 1978

%A M. Kascic
%T Vector Processing on the CYBER 200
%E C. Jesshope
%E R. Hockney
%B Infotech State of the Art Report: Supercomputers
%I Maidenhead: Infotech Int. Ltd.
%P 237-270
%D 1979

%A M. Kascic
%T Vector Processing on the CYBER 200 and Vector Numerical Linear Algebra
%J Proc. 3rd GAMM Conf. on Numeric Mathematics in Fluid Dynamics
%D 1979

%A M. Kascic
%T Anatomy of a Poisson Solver
%J Proc. Parallel 83 Conference
%C Berlin
%D 1983

%A M. Kascic
%T Syntactic and Semantic Vectorization: Whence Cometh Intelligence
in Supercomputing?
%J Proc. 1983 Summer Computer Simulation Conference
%C Vancouver
%D 1983

%A M. Kascic
%T A Performance Survey of the CYBER 205
%B Proceedings of the NATO Workshop on High Speed Computations
%E J. Kowalik
%S NATO ASI Series
%V F-7
%I Springer-Verlag
%P 191-210
%D 1984

%A M. Kascic
%T Interplay Between Computer Methods and Partial Differential Equations:
Iterative Methods as Exemplar
%E R. Vichnevetsky
%E R. Stepleman
%B Advances in Computer Methods for Partial Differential Equations,
Proc. of the Fifth IMACS International Symposium
%V V
%I Lehigh University
%D June 1984
%P 379-382

%A M. J. Kascic, Jr.
%T Vorton Dynamics: A Case Study of Developing a Fluid Dynamics Model for
a Vector Processor
%J Parallel Computing
%V 1
%N 1
%D August 1984
%P 35-44
%K CYBER-205, computational fluid dynamics, vorton model, programming

%A H. Kashiwagi
%T Japanese Super-Speed Computer Project
%B Proceedings of the NATO Workshop on High Speed Computations
%E J. Kowalik
%S NATO ASI Series
%V F-7
%I Springer-Verlag
%P 117-125
%D 1984

%A J. M. Kasson
%T The Rolm Computerized Branch Exchange: An advanced digital PBX
%J IEEE Computer
%V 12
%N 6
%D June 1979
%P 24-31

%A F. E. Kast
%A J. E. Rosenzweig
%T Organization and Management
%I McGraw-Hill
%D second edition 1974
%P 574-575

%l journal-article
%A M. G. H. Katevenis
%A R. W Sherburne
%A D. A. Patterson
%A C. H. Sequin
%T The RISC II Micro-Architecture
%J VLSI 83
%D August 1983
%K risc reduced instruction set computer architecture restricted

%l dissertation
%T Reduced Instruction Set Computer Architectures for VLSI
%A Manolis G. H. Katevenis
%O UCB/CSD 83/141
%D 1983
%S Computer Science Division
%I University of California
%C Berkeley, CA 94720
%K risc reduced instruction set computer architecture
%X This is the Ph. D. thesis written by one of the designers of the RISC I & II.
There is a nice summary of the RISC project, the rationale behind
it, and implementation details of the RISC II chip.

%A E. Katona
%T String Pattern Matching Algorithms for Cellular Processors
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 431-436
%D 1984

%A David Katsuki
%A Eric S. Elsam
%A William F. Mann
%A Eric S. Roberts
%A John G. Robinson
%A F. Stanley Skowronski
%A Eric W. Wolf
%T Pluribus \(em An Operational Fault-Tolerant Multiprocessor
%J Proceedings of the IEEE
%V 66
%N 10
%D October 1978
%P 1146-1159
%K reliability and error recovery
%X Describes the error recovery aspects of a multiprocessor with high
availability requirements; the system discussed is used for message switching
in the Arpanet communication subnetwork.
Text reproduced with the permission of Prentice-Hall \(co 1980.
Reprinted in "Tutorial: Distributed Processing," IEEE,
compiled by Burt H. Liebowitz and John H. Carson, 1981, 3rd edition.

%A Jesse. H. Katz
%T Matrix Computations on an Associative Processor
%E L. C. Hobbs
%E D. J. Theis
%E Joel Trimble
%E Harold Titus
%E Ivar Highberg
%B Parallel Processor Systems, Technologies and Applications
%I Spartan Books
%C New York, New York
%D 1970
%P 131-149
%K Device technology utilization in parallel processors

%A R. H. Katz
%A S. J. Eggers
%A D. A. Wood
%A C. L. Perkinsk
%A R. G. Sheldon
%T Implementing a Cache Consistency Protocol
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K Multiprocessor Issues
%C Boston, MA
%P 276-283
%K shared bus multiprocessors cache consistency, single chip implementation,
snooping chaces, ownership-based protocols

%A Robert Katz
%T Analysis of the AWACS passive tracking algorithms on the RADCAP STARAN
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 177-186
%K
%O STARAN and related topics

%A H. Katzan, Jr.
%T Computer Organization and the System/370
%I Van Nostrand Rheinhold Co.
%C New York
%D 1971

%A J. A. Katzman
%T The Tandem 16: A Fault-tolerant Computing System
%J 11th Hawaii Conf. on System Sciences
%P 85-102
%D 1978
%X Reproduced in D. P. Siewiorek,  C. G. Bell, A. Newell
"Computer Structures: Principles and Examples,"
McGraw-Hill, 1982, pp. 470-480

%A W. H. Kaubisch
%A R. H. Perrott
%A C. A. R. Hoare
%T Quasiparallel Programming
%J Software \(em Practice and Experience
%V 6
%D 1976
%P 341-356

%A Marc T. Kaufman
%T An Almost-Optimal Algorithm for the Assembly Line Scheduling Problem
%J IEEE Transactions on Computers
%V C-23
%N 11
%D November 1974
%P 1169-1174
%K Assembly line problem, multiprocessing, optimal scheduling,
parallel processing, tree graphs,
Parallel processing

%A W. H. Kautz
%T An Augmented Content-Addressed Memory Array for Implementation with
Large-Scale Integration
%J Journal of the ACM
%D January 1971
%P 19-33

%A W. H. Kautz
%A M. C. Pease
%T Cellular Logic-in-Memory Arrays
%I National Technical Information Service
%R AD763701
%D November 1971

%A William H. Kautz
%T A Cellular Threshold Array
%J IEEE Transactions on Electronic Computers
%V EC-16
%N 5
%D October 1967
%P 680-682
%K Cellular logic, large-scale integration, logic arrays,
pattern classification machines, switching functions, threshold logic,
%X Short notes

%A William H. Kautz
%A Karl N. Levitt
%A Abraham Waksman
%T Cellular Interconnection Arrays
%J IEEE Transactions on Computers
%V C-17
%N 5
%D May 1968
%P 443-451
%K Cellular arrays, logic in memory arrays, permutation networks,
Automata & switching theory
%X
Reproduced in the 1984 tutorial: "Interconnection Networks for parallel
and distributed processing" by Wu and Feng.

%A William H. Kautz
%T Cellular Logic-in-Memory Arrays
%J IEEE Transactions on Computers
%V C-18
%N 8
%D August 1969
%P 719-727
%K cellular logic, large-scale integration, logic arrays, login in memory,
push-down memory, sorting, switching functions
Logical design

%A Krishna M. Kavi
%A Edward W. Banios
%A Bruce D. Shriver
%T Message Repository Definitional Facility: An Architectural Model for
Interprocess Communication
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%D June 1984
%P 271-278
%K multiprocessor issues

%A Z. Kedem
%A A. Silberschatz
%T Controlling concurrency using locking protocols
%J 20th Annual Symposium on Foundations of Computer Science
%D October 1979
%P 274-285

%A Z. Kedem
%A A. Silberschatz
%T A Characterization of Database Graphs Admitting a Simple Locking Protocol
%J Acta Informatica
%V 16
%D 1981
%P 1-13.

%A Hj. Keller
%A A. Favre
%A A. Comazzi
%T VAP \(em An Array Processor Architecture using Cascaded Look-up Tables
%E M. J. B. Duff
%B Computing Structures for Image Processing
%I Academic Press
%D 1983
%P 143-156

%A J. Keller
%A A. Jameson
%T Preliminary Study of the Use of the STAR-100 Computer for Transonic
Flow Calculations
%I AIAA
%R 78-12
%D 1978

%A R. M. Keller
%T A fundamental theorem of asynchronous computation
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 102-112
%K
%O Modelling and parallelism detection

%A R. M. Keller
%T Denotational Models for Parallel Programs with Indeterminate Operators
%B Formal Description of Programming Concepts: Proceedings of the IFIP
Working Conference on Formal Description of Programming Concepts
%E E. J. Neuhold
%D August 1977
%P 337-366

%A R. M. Keller
%T Semantics of Parallel Program Graphs
%I Computer Science Dept., Univ. of Utah
%R UUCS-77-110
%C Salt Lake City, UT
%D July 1977

%A R. M. Keller
%A others
%T A Loosely Coupled Applicative Multiprocessing System
%J Proc. of the NCC
%I AFIPS Press
%C Arlington, VA
%D 1978
%P 861-870

%A R. M. Keller
%A S. Patil
%A G. Lindstrom
%T An Architecture for a Loosely Coupled Parallel Processor
%R Tech. Rep. UUCS-78-105
%I Dept. of Computer Science, U. of Utah
%D October 1978

%A R. M. Keller
%A G. Lindstrom
%A S. Patil
%T A Loosely-Coupled Applicative Multi-Processing System
%J Proceedings AFIPS National Computer Conference
%I AFIPS Press
%D 1979
%P 613-622

%A R. M. Keller
%T Semantics and Applications of Function Graphs
%R UUCS-80-112
%I Computer Science Dept., Univ. of Utah
%C Salt Lake City, UT
%D 1980

%A R. M. Keller
%T Divide and CONCer: Data Structuring in Applicative Multiprocessing
Systems
%J Conference Record of the 1980 LISP Conference
%D August 1980
%P 196-202

%A R. M. Keller
%A G. Lindstrom
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Hierarchical Analysis of a Distributed Evaluator
%P 299-310
%O Distributed Processing

%A R. M. Keller
%A G. Lindstrom
%A S. S. Patil
%T Data-Flow Concepts for Hardware Design
%J COMPCON Spring 80
%D February 1980
%P 105-111

%A R. M. Keller
%A B. Jayaraman
%A D. Rose
%A G. Lindstrom
%T FGL Programmer's Guide
%R AMPS Technical Memorandum No. 1
%I Dept. of Computer Science, Univ. of Utah
%C Salt Lake City, UT
%D July 1980

%A R. M. Keller
%A G. Lindstrom
%T Applications of Feedback in Functional Programming
%J Proceedings of the 1981 Conference on Functional Programming
Languages and Computer Architecture
%D October 1981
%P 123-130

%A R. M. Keller
%A M. R. Sleep
%T Applicative Caching: Programmer Control of Object Sharing and Lifetime
in Distributed Implementations of Applicative Languages
%J Proceedings of the 1981 Conference on Functional Programming
Languages and Computer Architecture
%D October 1981
%P 131-140

%A Robert M. Keller
%T A novel method of constructing sorting networks
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 90
%K
%O Processor components
%X Summary.

%A Robert M. Keller
%T Towards a Theory of Universal Speed-Independent Modules
%J IEEE Transactions on Computers
%V C-23
%N 1
%D January 1974
%P 21-33
%K Asynchronous, module, networks, parallel, speed-independent, switching,
Asynchronous machines

%A Robert M. Keller
%T Look-ahead processors
%J Computing Surveys
%V 7
%N 4
%D Dec. 1975
%P 177-195
%K asynchronous computation, computer architecture, computer organization, look-ahead, parallelism, pipelining, schemata
CR categories: 5.24, 5.5, 6.32, 6.33

%A Robert M. Keller
%A W. J. Yen
%T A graphical approach to software development using function graphs
%J Spring 1981 Compcon
%I IEEE
%D 1981
%P 156-161

%A Robert M. Keller
%A Frank C. H. Lin
%A Jiro Tanaka
%T Rediflow Multiprocessing
%J Digest of Papers COMPCON, Spring 84
%I IEEE
%D Feb. 1984
%P 410-417
%K Reduction, data flow,
AI architectures
%X Describes Keller's idea of Xputers (Pronounced trans-puters).

%A Robert M. Keller
%A Frank C. H. Lin
%T Simulated Performance of a Reduction-Based Multiprocessor
%J Computer
%I IEEE
%V 17
%N 7
%D July 1984
%P 70-81
%K Transputer, rediflow, Xputer
Hardware-software interface: effect on performance
%X Keller's Rediflow concepts.

%A Robert M. Keller
%A Gary Lindstrom
%T Approaching Distributed Database Implementations through Functional
Programming Concepts
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%P 192-200
%K Distributed Database Design Concepts,
applicative programming, functional programming, lenient data constructors,
distributed databases, primary site model, concurrency, distributed systems,
transparency,

%A T. W. Keller
%A K. M. Chandy
%T Computer models with constrained parallel processors
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 207-208
%K
%O Scheduling

%A K. Kemmler
%A W. Martson
%T The Array Processor AP-120B/190L for Simulation Applications
%J Proc., Military Electronics Defence Expo
%D 1978
%P 43-53

%A E. Kempken
%A W. Ameling
%T Parallel DDA Based on Universal Microprogrammable Computing Units
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 139-142
%K advanced hybrid systems

%A R. Kendall
%A G. Morrell
%A D. Peaceman
%A W. Silliman
%A J. Watts
%T Development of a Multiple Application Reservoir Simulator for Use on a
Vector Computer
%J SPE Middle East Oil Tech. Conf.
%C Bahrain
%R SPE Paper 11483
%D 1983

%A Richard P. Kendall
%A James S. Nolen
%A Patricia L. Stanat
%T The Impact of Vector Processors on Petroleum Reservoir Simulation
%J Proceedings of the IEEE
%V 72
%N 1
%K Special issue -- Supercomputers - Their Impact on Science and Technology
%P 85-89
%D January 1984

%A M. Kenichi
%T A Vector-Oriented Finite-Difference Scheme for Calculating
Three-Dimensional Compressible Laminar and Turbulent Boundary Layers on
Practical Wing on Figurations
%I AIAA
%R Paper 81-1020
%D 1981

%A J. R. Kennaway
%A M. R. Sleep
%T Applicative Objects as Processes
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 718-723
%K
%O Data Flow Languages

%T The 'Language First' Approach
%A J. R. Kennaway
%A R. Sleep
%B Distributed Computing - Part II Declarative Systems
%E Fred B. Chambers
%E David A. Duce
%E Gillian P. Jones
%I Academic Press
%S APIC Studies in Data Processing
%V 20
%D 1984
%P 111-124
%K Declarative languages, functional languages,

%A J. R. Kennaway
%A M. R. Sleep
%T Towards a Successor to von Neumann
%B Distributed Computing - Part II Declarative Systems
%E Fred B. Chambers
%E David A. Duce
%E Gillian P. Jones
%I Academic Press
%S APIC Studies in Data Processing
%V 20
%D 1984
%P 125-137

%A J. R. Kennway
%A M. R. Sleep
%T Parallel implementation of functional languages
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 168-170
%K
Process nets
%O Languages

%A J.G. Kent
%T Highlights of a study of Floating point instructions
%J IEEE Trans.. on Computers
%V C-26
%N 7

%A J. Kepecs
%A M. Solomon
%T SODA: A Simplified Operating System for Distributed Applications
%J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing
%I ACM
%D August 1984

%T A Tradeoff Study of Switching Systems in Computer Communication Networks
%A Parviz Kermani
%A Leonard Kleinrock
%J IEEE Transactions on Computers
%V C-29
%N 12
%D December 1980
%P 1052-1060
%K Circuit switching, computer communication networks, cut-through
switching, message switching, packet switching, performance evaluation,
store-and-forward
%O Special issue on distributed processing systems

%T The UNIX programming environment
%A B. W. Kernighan
%A J. R. Mashey
%Z Bell Labs., Murray Hill, NJ, USA
%J Computer (USA)
%V 14
%N 4
%P 12-24
%D April 1981
%O 38 Refs.
treatment: applic
%K programming operating systems time sharing programs
programming environment Unix programmers
%X Since complex Unix tools are built from simple, single-function
components, programmers see their work as the creation and use of tools.
This view encourages growth, not reinvention.

%A David Kershaw
%T Solution of Single Tridiagonal Linear Systems and Vectorization of the
ICCG Algorithm on the Cray-1
%E Garry Rodrigue
%B Parallel Computations
%I Academic Press
%D 1982
%P 85-99

%A J. L. Kessels
%T The soma: A programming construct for distributed processing
%J IEEE Trans. on Software Engineering
%V SE-7
%N 5
%D September 1981
%P 502-509

%A R. W. Keyes
%T Physical limits on computer devices
%J Spring 1978 Compcon
%I IEEE
%D 1978
%P 294-296

%A Mohammad G. Khayat
%T A Concurrency Measure
%I IEEE Transactions on Software Engineering
%V SE-10
%N 6
%D November 1984
%K Compatibility, concurrency control, degree of concurrency,
dining philosophers problem, interprocess communication,
maximal compatibility, parallel processing, readers/writers problem,
synchronization policies, update synchronization,
Theory

%T Algorithm Implementation on Reconfigurable Mixed Systolic Arrays
%A Anwar Khurshid
%A P. David Fisher
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 748-755
%K Systolic Systems

%A M. Kidode
%A H. Asada
%A H. Shinoda
%A S. Watanable
%T Image Processing Unit Hardware Implementation
%E Morio Onoe
%E Kendall Preston, Jr.
%E Azriel Rosenfeld
%B Real-Time/Parallel Computing: Image Analysis
%I Plenum Press
%C New York, NY
%D 1981
%P 279-296
%K Pattern Information Processing System (PIPS), FFT, butterfly processing

%A R. B. Kieburtz
%T A Hierarchical Multicomputer for Problem Solving
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 63-71
%O Testing and Evaluation

%A R. B. Kieburtz
%T A Distributed Operating System for the Stony Brook Multicomputer
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 67-78
%K
%O Distributed Systems Structure

%T Comments on "Communicating Sequential Processes"
%A Richard B. Kieburtz
%A Abraham Silberschatz
%J ACM Transactions on Programming Languages and Systems
%V 1
%N 2
%D October 1979
%P 218-225
%K Concurrency, interprocess communication, message-passing,
synchronization
CR Categories: 4.20, 4.22, 4.32

%A Werner Kiessling
%T Tuneable Dynamic Filter Algorithms for High Performance Database Systems
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 6.1-6.20
%O Database computers

%A G. Kildall
%T Dual \(em processor hardware bridges the gap between 8 \(em bit and
16 \(em bit microcomputers
%J Wescon \(em Mini/Micro82 Conference
%I IEEE
%D Sept. 1982

%A J. Killough
%T The Use of Vector Processors in Reservoir Simulation
%J Proc. SPE Symposium Reservoir Simulation
%C Denver, CO
%D 1979

%A W. L. Kilmer
%A W. S. McCulloch
%A J. Blum
%T A model of the vertebrate central command system
%J International Journal of Man-Machine Studies
%V 1
%N 3
%P 279-309
%D July 1969

%A B. G. Kim
%T An adaptive token ring network serving real-time traffic
%B Proceedings COMPSAC 83: The IEEE Computer Society's Seventh
International Computer Software and Applications Conference
%C Chicago, IL, USA
%P 105-107
%O 7 REFS. Treatment PRACTICAL
%I IEEE Comput. Soc. Press
Silver Spring, MD, USA, p: xxi+648
%D 7-11 Nov. 1983
%K computer networks
computer networks adaptive token ring network real time traffic
resource sharing mechanism
%X Consideration is given to an adaptive strategy on a token-passing
ring network, which allows for possible losses of traffic when
real-time messages are involved. The aims of the adaptive strategy are to
provide a fair resource-sharing mechanism among distributed stations
and a simple yet versatile means of meeting delay constraints of
real-time messages at as little loss as possible. Simulation studies
are performed on the proposed adaptive strategy and shown to be
effective particularly at a high utilization rate of the ring

%A Jung Kook Kim
%T Deadlock Detection Algorithms in Distributed Database Systems
%R UIUCDCS-R-84-1162
%D February 1984
%I U. Ill
%K Masters thesis

%A K. Kim
%A M. Jenson
%T Performance Evaluation of a parallel system processing fault-tolerant
programs
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 118-
%K
%O Performance Evaluation

%A K. H. Kim
%T An Approach to Programmer-Transparent Coordination of Recovering
Parallel Processes and its Efficient Implementation Rules
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 58-68
%O Language and control

%A K. H. Kim
%T Error Detection, Reconfiguration and Recovery in Distributed Processing
Systems
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 284-295
%O Distributed Architectures

%A K. H. Kim
%T An Implementation of a Programmer-Transparent Scheme for Coordinating
Concurrent Processes in Recovery
%J Computer Software and Applications Conference (COMPSAC80)
%I IEEE
%D October 1980
%P 615-621
%O fault tolerance/quality assurance

%A K. H. Kim
%T Distributed Execution of Recovery Blocks: An Approach to Uniform
Treatment of Hardware and Software Faults
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 526-532
%O Recovery in fault-tolerant distributed systems

%T Highly Available Systems for Database Applications
%A Won Kim
%J Computing Surveys
%I ACM
%V 16
%N 1
%D March 1984
%P 71-98
%K A.1 [General Literature]: Introductory and survey;
C.1.2 [Processor architectures]: Multiple data stream architectures
(multiprocessors) - interconnection structures; C.4
[Computer systems organization]: performance of systems - reliability,
availability, and serviceability; H.2.4 [Database Management]:
systems - distributed systems, transactions processing;
Reliability, database concurrency control and recovery, relational
database

%A S. R. Kimbleton
%A G. M. Schneider
%T Computer communications networks:
Approaches, objectives, and performance considerations
%J Computing Surveys
%V 7
%N 3
%D September 1975
%P 129-173
%X Must add keywords and summary to this entry.

%A S. R. Kimbleton
%A H. M. Wood
%A M. L. Fitzgerald
%T Network Operating Systems-an implementation approach
%Z Nat. Bur. of Stand., Washington, DC, USA
%J AFIPS conference proceedings
1978 national computer conference
%V 47
%P 773-782
%D 5-8 June 1978
%C Anaheim,CA, USA
%I AFIPS Press, Montvale, NJ, USA, xxxiv+1279 pp.
%O 18 Refs.
treatment: applic, general,review
%K computer networks operating systems
network operating system user/system interface
%X This paper discusses the required enduser support which must be provided
by a network operating system, identifies the two major resulting
implementation issues and describes the constraints which affect the
complexity of nos implementation. Thereafter, the next section describes
major nos design decisions guiding the implementation of an experimental
nos (xnos) being implemented at the national bureau of standards (nbs) as
part of a joint radc/nbs effort. The third section then discusses the
implementation of the user-system interface while the fourth section
discusses the system-system interface. The fifth section provides some
concluding remarks.

%A Stephen R. Kimbleton
%A Pearl Wang
%A Butler W. Lampson
%T Applications and protocols
%E B. W. Lampson
%E M. Paul
%E H. J. Siegert
%B Distributed Systems \(em Architecture and Implementation (An Advanced Course)
%S Lecture Notes in Computer Science
%V 105
%I Spring-Verlag
%D 1981
%P 308-370

%A C. R Kime
%A C. S. Holt
%A J. A. McPherson
%A J. E. Smith
%T Fault Diagnosis of Distributed Systems
%J Computer Software and Applications Conference (COMPSAC80)
%I IEEE
%D October 1980
%P 355-364
%O distributed systems

%A D. B. Kimsey
%A L. E. Hand
%A H. T. Nagle, Jr.
%T Application of PEPE to Real-time digital filtering
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 169
%K
%O Applications
%X Summary only.

%A T. Kimura
%T Gauss-Jordan Elimination by VLSI Mesh-Connected Processors
%E C. Jesshope
%E R. Hockney
%B Infotech State of the Art Report: Supercomputers
%I Maidenhead: Infotech Int. Ltd.
%V 2
%D 1979
%P 271-290

%A D. Kincaid
%A T. Oppe
%A D. Young
%T Adapting ITPACK Routines for Use on a Vector Computer
%I Control Data Corp.
%J Proceedings Symposium CYBER 205 Applications
%C Ft. Collins, CO
%D 1982

%A D. Kincaid
%A T. Oppe
%T ITPACK on Supercomputers
%E A. Dold
%E B. Eckman
%B Numerical Methods
%I Springer-Verlag
%C New York
%P 151-161
%D 1983

%T Adapting Iterative Algorithms for Solving Large Sparse Linear Systems
for Efficient Use on the CDC CYBER 205
%A D. Kincaid
%A D. Young
%J CYBER 200 Applications Seminar
%R NASA Conference Publication 2295
%D October 1983
%E J. Patrick Gary, Compiler
%I NASA Goddard Space Flight Center
%C Greenbelt, Maryland
%P 147-160

%A D. Kincaid
%A T. Oppe
%A D. Young
%T Vector Computations for Sparse Linear Systems
%I University of Texas at Austin
%R Center for Numerical Analysis Report No. CNA 189
%D 1984

%A D. Kincaid
%A G. Carey
%A T. Oppe
%A K. Sepehenoori
%A D. Young
%T Combining Finite Element and Iterative Methods for Solving Partial
Differential Equations on Advanced Computer Architectures
%E R. Vichnevetsky
%E R. Stepleman
%B Advances in Computer Methods for Partial Differential Equations,
Proc. of the Fifth IMACS International Symposium
%V V
%I Lehigh University
%D June 1984
%P 375-378

%A R. M. King
%T Research on Synthesis of Concurrent Computing
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 11
%N 3
%D 1983
%P 39-47
%O Architecture Design methods

%A Richard M. King
%A Robert A. Wagner
%T Combining Speed with Alpha-Particale Induced Memory Error Tolerance in a
Large Boolean Vector Machine
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%D June 1984
%P 256-262
%K algorithms for array processors
%X This is an extended abstract.

%A W. K. King
%T Design of an Associative Memory
%J IEEE Transactions on Computers
%D June 1971
%P 671-674

%A L. L. Kinney
%A R. G. Arnold
%T Analysis of a multiprocessor system with a shared bus
%J Proc. 5th Ann. Symp. on Computer Architecture
%C Palo Alto, California
%D April 1978
%P 89-95
%K performance, language oriented architectures
%X Investigates the performance, on a set of tasks having little interaction,
of a multiprocessor system with a shared bus interconnection scheme.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A L. L. Kinney
%A others
%T MMBC Hardware Modules
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 736-746
%O Application of distributed computing to modular missile-borne computers

%A P. Kirby
%T A Moving-mesh plasma equilibrium problem on the ICL DAP
%I Culham Laboratory
%J ICL Technical Journal
%D 1981

%A Franz Kirchheimer
%T Zwei Vektorisierte Routinen Aus Einem Geophysikalischen
Anwendungsprogramm
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 335-340
%D 1984

%A C. C. Kirkham
%T Assembler Level Programming
%B Distributed Computing - Part I The Dataflow Approach
%E Fred B. Chambers
%E David A. Duce
%E Gillian P. Jones
%I Academic Press
%S APIC Studies in Data Processing
%V 20
%D 1984
%P 33-42
%K Manchester,

%T Poolpo - A Pool of Processors for Process Control Applications
%A Hubert D. Kirrmann
%A Flex Kaufmann
%J IEEE Transactions on Computers
%V C-33
%N 10
%D October 1984
%P 869-878
%K Common bus, embedded systems, modula 2, parallel processing,
performance evaluation, pool of processors, real-time operating system,
tightly coupled multiprocessor,
Distributed computing

%A P. T. Kirstein
%A D. King
%A J. Burren
%A C. McDowell
%A R. Daniels
%A R. Needham
%A J. W. R. Griffiths
%E M. B. Williams
%T The UNIVERSE project
%J Pathways to the Information Society. Proceedings of the Sixth
International Conference on Computer Communication
%C London, England
%P 442-447
%O 9 REFS. Treatment PRACTICAL
%I North-Holland, Amsterdam, Netherlands, p: xx+1018
ISBN: 0-444-86464-4
%D 7-10 Sept. 1982
%K computer networks satellite relay systems satellite ground stations
data communication systems UNIVERSE project concatenated Cambridge rings
small dish satellite earth stations OTS satellite
metropolitan transmission business communication computer communications
%X Gives the motivation and progress of a project to investigate the use
of concatenated Cambridge rings and small dish satellite earth
stations accessing the OTS satellite. Both metropolitan transmission
at Mbps speeds and wide area terrestrial transmission at Kbps speeds
are also incorporated. The basic components of the system are
described, and the planned applications discussed. Some indications
are given of the scope of the applications for business communication
and for computer communications

%T Mixed Text and Graphics and Distributed Systems
%A P. T. Kirstein
%J IEEE Colloqium on Local Area Networks - How Computers Talk to Each
Other
%V Digest No. 50
%D 1984
%P 8/1-4

%A M. Kishi
%A H. Yasuhara
%A Y. Kawamura
%T DDDP: A Distributed Data Driven Processor
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%D 1983
%V 11
%N 3
%P 236-242
%K
Data flow architectures

%A Masaru Kitsuregawa
%A Hidehiko Tanaka
%A Tohru Moto-oka
%T Architecture and performance of relational algebra machine GRACE
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 241-250
%K rings, sorting, pipelined bucket processing,
%O databases

%A Y. Kiyoki
%A M. Isoda
%A K. Kojima
%A K. Tanaka
%A A. Minematsu
%A H. Aiso
%T Performance Analysis for Parallel Processing Schemes of Relational
Operations and a Relational Database Machine Architecture with Optimal Scheme
Selection Mechanism
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 196-205
%K
%O Database Machines

%A D. Klappholz
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Stochastically Conflict-Free Data-Base Memory Systems
%P 283-292
%O Database Architecture and Software

%A D. Klappholz
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T The Symbolic High-Level Language Programming of an MIMD Machine
%P 61-63
%O Languages and Compilers

%A David Klappholz
%A Haeng-Chul Park
%T Parallelized Process scheduling for a tightly-coupled MIMD machine
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 315-321
%K random level-order scheduling, simulation,
%O scheduling

%A David Klappholz
%A Yingsha Liao
%A Da-Jin Wang
%A Alexander Brodsky
%A Amos Omondi
%T Toward a Hybrid Data-Flow/Control-Flow MIMD Architecture
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Data Flow Systems
%P 10-15

%A Alan R. Klayton
%T Concept for a computer architecture research facility
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 189-190
%K
%O STARAN and related topics
%X Summary only.

%T Asymptomically Optimal Circuit for a Storage Access Function
%A Peter Klein
%A M. S. Paterson
%J IEEE Transactions on Computers
%V C-29
%N 8
%D August 1980
%P 737-738

%A L. Kleinrock
%T Analytic and simulation methods in computer network design
%V AFIPS Conference proceedings 1970 spring joint computer conference
%V 36
%C Atlantic City, NJ, USA
%D 5-7 May 1970
%P 569-579
%O 12 Refs
%I American Federation for Information Processing. Montvale, NJ, USA, 717pp
%K Digital communication systems
Reproduced in Advances in Computer Commun., Chu,W.W., (Ed.)
(1974),219-229.

%A L. Kleinrock
%A G. Estrin
%A M. Malkanoff
%A R. R. Muntz
%T Computer network research
%D 30 June 1971
%O Treatment General, Practical
%R Rep No. unnumbered
Contract No. DAHC15-69-C-0285. NTIS, Springfield, Va. 22151, USA
%I Univ. California, Los Angeles, USA
%K computer metatheory time sharing systems digital communication systems
input output programs
computer network research mathematical modelling analysis computer systems
measurement computer communication network software protocol
time shared systems

%A L. Kleinrock
%T Computer networks
%P 241-284
%O 40 REFS. Treatment Theoretical
%I Wiley-Interscience. Chichester, Sussex, England, Std Book No.0 471 13468 6
%E A. F. Cardenas
%E L. Presser
%E M. A. Martin
%D 1972
%K digital communication systems time sharing systems
time shared system computer networks modelling network flows
delays performance analysing synthesising
structure operation user environment communication networks

%T Scheduling, queueing, and delays in time-shared systems and
computer networks
%A L. Kleinrock
%B Computer-communication networks
%P 95-141
%O 64 REFS. Treatment Theoretical
%I Prentice-Hall. Englewood Cliffs, N.J., USA.
%D 1973
%E N. Abramsom
%E F. F. Kuo
%K time sharing systems scheduling queuing theory delays
scheduling queuing delay computer network
time shared systems

%A L. Kleinrock
%T Performance models and measurements of the ARPA computer network
%B Computer communication networks
%P 63-87
%O 29 REFS. Treatment PRACTICAL
%I Noordhoff Internat. Publishing. Groningen, Netherlands, 1975,
Std Book No.90 286 0593 2
%E R. L. Grimsdale
%E F. F. Kuo
%D 1975
%K computer networks
analytical modelling procedures predicting the performance
ARPA Computer Network simulation measurement results

%A L. Kleinrock
%T Issues in the design of packet-switching networks
%B Bull. Oper. Res. Soc. Am. (USA) ORSA/TIMS National Meeting
%C Las Vegas, Nev., USA
%D 17-19 Nov. 1975
%V 23, suppl.2
%P B293
%O Treatment APPLICATIONS
%I Operations Res. Soc. America, Inst. Management Sci
%K computer networks scheduling operating systems
computer/communication networks resource sharing network topology
channel capacity assignment
routing procedures flow control ARPANET packet switching networks
scheduling operating systems

%A L. Kleinrock
%A W. E. Naylor
%A H. Opderbeck
%T A study of line overhead in the ARPANET
%J Commun. ACM (USA)
%V 19
%N 1
%P 3-13
%O 23 REFS. Treatment PRACTICAL
%D Jan. 1976
%K computer networks
line overhead ARPANET communication line protocol hierarchy
line efficiency heavily loaded network
%X Reproduced in "Computer Networks: A Tutorial"
Abrams.M., Blanc,R.P., and Cotton,I., (Eds.), (1980).

%A L. Kleinrock
%A W. E. Naylor
%A H. Opderbeck
%T A study of line overhead in Arpanet
%J Comm. ACM
%V 19
%N 1
%D January 1976
%P 3-13

%A L. Kleinrock
%T Principles and lessons in packet communications
%J Proc. IEEE
%V 66
%N 11
%D November 1978
%P 1320-1329

%A Leonard Kleinrock
%T Analytic and Simulation Methods in Computer Network Design
%J AFIPS Conference Proceedings, SJCC 1970
%I AFIPS
%D 1970
%P 569-579

%A Leonard Kleinrock
%T Queuing Systems Volume 2: Computer Applications
%I John Wiley and Sons
%D 1976
%V 2

%A Leonard Kleinrock
%T On Communications and Networks
%J IEEE Transactions on Computers
%V C-25
%N 12
%D December 1976
%P 1320-1329
%K 25th Anniversary Issue

%A W. E. Kludge
%T The Architecture of a Reduction Language Machine Hardware Model
%R Tech. Rept. ISF \(em Rep. 79.03
%I Gesellschaft fur Mathematik und Datenverarbeitung MBH
%C Bonn, WG
%D August 1979

%A Werner E. Kluge
%T Cooperating Reduction Machines
%J IEEE Transactions on Computers
%V C-32
%N 11
%D November 1983
%P 1002-1012
%K Concurrent program execution, cooperating machines, reduction languages,
reduction machines, virtual machines

%A Morris A. Knapp
%A Gary M. Ackins
%A John Thomas
%T Application of ILLIAC IV to Urban Defense Radar Problem
%E L. C. Hobbs
%E D. J. Theis
%E Joel Trimble
%E Harold Titus
%E Ivar Highberg
%B Parallel Processor Systems, Technologies and Applications
%I Spartan Books
%C New York, New York
%D 1970
%P 23-70
%K Applications

%A D. Knight
%T A Hybrid Explicit-Implicit Numerical Algorithm for the
Three-Dimensional Compressible Navier-Stokes Equations
%J 21st Aerospace Sciences Meeting
%I AIAA
%R Paper No. 83-0223
%C Reno, NV
%D January, 1983
%X Remove?

%A J. Knight
%A W. Poole
%A R. Voight
%T System Balance Analysis for Vector Computers
%J Proc. 1975 ACM National Conference
%P 163-168
%D 1975

%A J. Knight
%A M. Itzkowitz
%T THC-A Dimple High-Performance Local Network
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 354-359
%K
%O Local Area Networks Applications

%A J. Knight
%A D. Dunlop
%T On the Design of a Special Purpose Scientific Programming Language
%J Software Practice and Experience
%V 13
%P 893-907
%D 1983

%A J. C. Knight
%A R. G. Voigt
%A W. G. Poole, Jr.
%T System balance analysis for vector computers
%J Proceedings of the ACM National Conference
%D October 1975
%P 163-168
%r ICASE Report No. 75-6
%d March 21, 1975

%A J. C. Knight
%A D. D. Dunlop
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Measurements of an Optimizing Complier for a Vector Computer
%P 58-60
%O Languages and Compilers

%A J. Knott
%T A Performance Analysis of the PASLIB Version 2.1 SEND and RECV Routines
on the Finite Element Machine
%I NASA Langley Research Center
%R Contractor Report 172205
%D 1983
%K FEM

%A P. J. Knueven
%T A Survey of Languages on SIMD Computers
%I CMU
%D 1979

%A D. E. Knuth
%r CS-186
%i CS Dept., Stanford, University
%T An Empirical Study of FORTRAN Programs
%J Software: Practice and Experience
%V 1
%N 2
%D April-June 1971
%P 105-133

%A R. Kober
%T The multiprocessor system SMS 201 \(em
Combining 128 microprocessors to a powerful computer
%J Micros, Minis, & Maxis,
Technology Thrust vs. User Requirement \(em
Digest of Papers \(em COMPCON Fall 77
%C Washington, D.C.
%D September 1977
%P 225-230
%K multiprocessor architectures and operating systems
%X A Multi-microprocessor system designed by Siemens is described.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A R. Kober
%A Ch. Kuznia
%T SMS \(em A Multiprocessor Architecture for High Speed Numerical
Calculations
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 18-24
%O General Purpose Architectures
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%A A. Koch
%A T. S. E. Maibaum
%T A message oriented language for system applications
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 824-832
%K
%O Message Oriented Mechanisms

%A L. J. Koczela
%T The Distributed Processor Organization
%E F. L. Alt
%E M. Rubinoff
%B Advances in Computers
%V 9
%D 1968
%I Academic Press
%P 285-353

%A L. J. Koczela
%T Study of Spaceborne Multiprocessing
%V II
%R C6-1476.22/23, Part II
%I North American Rockwell Corp., Autonetics Division
%C Anaheim, CA
%D May 1968

%A Louis J. Koczela
%A Gary Y. Wang
%T The Design of a Highly Parallel Computer Organization
%J IEEE Transactions on Computers
%V C-18
%N 6
%D June 1969
%P 520-529
%K computer architecture, digital computer organization,
distributed processing, global control, logical design, parallel computation

%A N. Kodaira
%A K. Kato
%A T. Hamada
%T Man-Machine Interactive Processing for Extracting Meteorological Information
from GMS Images
%E Morio Onoe
%E Kendall Preston, Jr.
%E Azriel Rosenfeld
%B Real-Time/Parallel Computing: Image Analysis
%I Plenum Press
%C New York, NY
%D 1981
%P 297-323
%X Real time image processing, nothing parallel.

%A H. Kodera
%A I. Ikushima
%T Optical transmitter and receiver modules
%C Tokyo, Japan
%J Hitachi Rev. (Japan)
%V 33
%N 4
%P 203-208
%O 7 REFS. Treatment PRACTICAL
%D Aug. 1984
%K optical communication equipment optical links transmitters receivers
optical fibres optical receivers optical fibres
optical communication equipment control systems
computer networks optical transmitter signal processing amplification
regeneration modulation demodulation CMOS LSI
CMI coder decoder digital PLL retiming circuit
timing clock communication networks synchronization
%X Optical fiber transmission technology has been introduced into
various industrial fields, including measurement and control systems
and computer networks. The utilization of optical transmitter and
receiver modules is vital for these applications, which perform
signal processing such as amplification, regeneration, and
modulation/demodulation, in addition to electrical-optical and
optical-electrical conversion. These modules have to be compact
reliable, economical, and versatile. 3R optical transmitter and
receiver module technology, which features the use of a CMOS LSI
with CMI coder/decoder and a digital PLL for a retiming circuit are
described. The developed modules can transmit data with speeds up to
2 Mb/s which can extract the timing clock for a wide range of
applications, including communication networks that require
synchronization

%A P. Kogge
%T Maximal Rate Pipelined Solutions to Recurrence Problems
%J Proc. First Ann. Symp. on Comp. Arch.
%P 71-76
%D 1973

%A P. Kogge
%T The Microprogramming of Pipelined Processors
%J Proc. 4th Annual Symp. Computer Architecture
%D 1977
%P 63-69

%A P. Kogge
%T Algorithm development for Pipelined processors
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 217
%K
%O Algorithms and applications

%A P. Kogge
%T Parallel Solution of Recurrence Problems
%J IBM Journal of Research and Development
%V 18
%D 1981
%P 138-148

%A P. M. Kogge
%T The Architecture of Pipelined Computers
%I McGraw-Hill Books
%D 1981

%A Peter M. Kogge
%A Harold S. Stone
%T A Parallel Algorithm for the Efficient Solution of a General Class of
Recurrence Equations
%J IEEE Transactions on Computers
%V C-22
%N 8
%D August 1973
%P 786-793
%K Parallel algorithms, parallel computation, recurrence problems,
recursive doubling
Special issue on parallel computation, parallel algorithms

%A Walter H. Kohler
%T Preliminary Evaluation of the Critical Path Method for Scheduling Tasks
on Multiprocessor Systems
%J IEEE Transactions on Computers
%V C-24
%N 12
%D December 1975
%P 1235-1238
%K Acyclic directed graph model, branch-and-bound algorithm, critical path
priority method, multiprocessor scheduling
scheduling
%X Expresses the problem of scheduling tasks on a set of independent, identical
processors in a graph-theoretic framework and using a critical path method,
derives an approximation to the optimal solution.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Walter H. Kohler
%T A survey of techniques for synchronization and recovery in decentralized
computer systems
%J Computing Surveys
%V 13
%N 2
%P 149-183
%D June 1981

%A Leslie Kohn
%T Distributed Processing with the NS16000 Family
%J National Computer Conference \(em Proceedings
%I AFIPS
%V 51
%D 1982
%P 199-204
%K <Sales pitch>

%T MAN-YO: A Special Purpose Parallel Machine for Logic Design Automation
%A Nobuhiko Koike
%A Kenji Ohmori
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 583-590
%K Parallel Systems

%A Peter Koles
%T The Realization of a Simplified Assembler in Cellular Space
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 437-442
%D 1984

%A Bernd K. Kolmegies
%T A Fast, Highly Flexible Array Processor
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 533-539
%D 1984
%K MISD (!), analogic AP500,

%A R. B. Kolstad
%A R. H. Campbell
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Directions for User Defined Communication for Distributed Software
%P 188-192
%O Distributed Processing

%A Robert B. Kolstad
%T Distributed Path Pascal: A Language For Programming Coupled Systems
%I University of Illinois at Urbana-Champaign
%R UIUCDCS-R-83-1136
%D August 1983
%K distributed processing, software engineering, programming languages,
concurrency, networks, synchronization
%X The system is available by ARPAnet ftp with 4.2BSD license or
contacting Rob at Convex computer corp.

%A S. Konechy
%T What are the restrains of wider applications of micrography?
%J Mech. Autom. Adm. (Czechoslovakia)
%V 24
%N 3
%P 116
%O 0 REFS
Treatment GENERAL OR REVIEW
%D 1984
%K human factors microforms visual perception
micrography economic human factors stresses
visual perception design workstations
%X Technical and economic advantages of micrography are first outlined
and human factors which are at the core of users resistance to this
technology are discussed. These include influence of operator
stresses due to visual perception problems, unsuitable design of
micrographic workstations and the effects of monotonous tasks or lack
of motivation

%A M. Kong
%T Implementation of the CLASSY Program on the Massively Parallel Processor
%I CSC
%D August 1983
%C NASA Goddard Space Flight Center, Greenbelt, MD
%K MPP

%A Thomas H. Kong
%T Measuring Time for Performance Evaluation of Multiprocessor Systems
%R EE technical report
%I Carnegie-Mellon University
%C Pittsburgh, PA 15121
%D November 1982

%A Kurt Konolige
%A Nils J. Nilsson
%T Multiple-Agent Planning Systems
%J Proceedings of The First Annual National Conference on Artificial
Intelligence
%I The American Association for Artificial Intelligence
%D August 1980
%P 138-142
%C Stanford, California

%A D. J. Kopetzky
%T An Array Simulator Generator
%I Dept. of Computer Science, Univ. of Ill., Urbana-Champaign
%R UIUCDCS-R-80-1031
%D September 1980
%K MPP, Massively Parallel Processor

%A Herbert Kopp
%T Numerical Weather Forecast with the Multi-Microprocessor System SMS 201
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 265-268
%K SMS 201,
applications

%A E. Korach
%A S. Moran
%A S. Zaks
%T Tight Lower and Upper Bounds for Distributed Algorithms for a Complete
Network of Processors
%J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing
%I ACM
%D August 1984

%A Israel Koren
%A Gabriel M. Silberman
%T A direct mapping of algorithms onto VLSI processing arrays based on the
data flow approach
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 335-337
%K
data flow

%A Israel Koren
%A Melvin A. Breuer
%T On Area and Yield Considerations for Fault-Tolerant VLSI Processor Arrays
%J IEEE Transactions on Computers
%V C-33
%N 1
%D January 1984
%P 21-27
%K Area utilization, computational availability, fault-tolerance,
processor array, reconfiguration strategies, redundancy, VLSI, wafer yield,
Fault-tolerant systems

%A David Korn
%T Timing Simulations for Ellipitic PDE's run Under WASHCLOTH
%R ULTRACOMPUTER NOTE #31
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D June 29, 1981

%A David Korn
%T Timing Analysis for Scientific Codes run under WASHCLOTH Simulation
%R ULTRACOMPUTER NOTE #24
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D March 28, 1981

%A David Korn
%A Norman Rushfield
%T WASHCLOTH Simulation of Three-Dimensional Weather Forecasting Codes
%R ULTRACOMPUTER NOTE #55
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D May 10, 1983
%X A NASA GSFC code running on an Amdahl, written in FORTRAN, and very memory
intensive was moved to the WASHCLOTH simulator.

%A Granino A. Korn
%A Robert Vichnevetsky
%T Analog/Hybrid Computation and Digital Simulation
%J IEEE Transactions on Computers
%V C-25
%N 12
%D December 1976
%P 1312-1320
%K Continuous-system simulation, analog/hybrid computation,
interactive computers, simulation,
25th Anniversary Issue

%A William A. Kornfeld
%T EITHER: A parallel problem solving system
%J IJCAI-79
%P 490-492

%A William A. Kornfeld
%T The Use of Parallelism to Implement a Heuristic Search
%I IJCAI
%J Proceedings of IJCAI
%D 1981
%P 575
%X Bibliography may be useful

%A Thomas Korte
%A Andreas Luebbert
%T Applying a Small Array-Processor in Flow Structure Research in Chemical
Reactors
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 341-347
%D 1984

%A H. F. Korth
%T Edge Locks and Deadlock Avoidance in Distributed System
%T Language Constructs and Support Systems for Distributed Computing
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 173-182

%T Deadlock Freedom Using Edge Locks
%A Henry F. Korth
%J ACM Transactions on Database Systems
%V 7
%N 4
%D December 1982
%P 632-652
%K Concurrency control, locking, serializability.
H.2.4 [Database Management]: Systems-transaction processing
General terms: algorithms, theory

%A S. Rao Kosaraju
%T On Come Open Problems in the Theory of Cellular Automata
%J IEEE Transactions on Computers
%V C-23
%N 6
%D June 1974
%P 561-565
%K Cellular automata, complexity tradeoffs, interconnection complexity,
machine complexity, neighborhood reduction, packing, parallel processing,
pattern recognition, pattern transformation,
Cellular automata

%A P. R. Kosinski
%T A Data Flow Programming Language
%R Tech. Report RC 4264
%I IBM T. J. Watson Research Center
%C Yorktown Heights, NY
%D March 1973

%A P. R. Kosinski
%T A Data Flow Language for Operating System Programming
%J ACM SIGPLAN Notices
%V 8
%N 9
%D September 1973
%P 89-94

%A P. R. Kosinski
%T Mathematical Semantics and Data Flow Programming
%J Conference Record on the Third ACM Symposium on the Principles of
Programming Languages (POPL)
%D January 1976
%P 95-103

%A P. R. Kosinski
%T Straightforward Denotational Semantics for Non-Deterministic Data Flow
Programs
%J Conference Record on the Fifth ACM Symposium on the Principles of
Programming Languages (POPL)
%D January 1978
%P 214-221

%A P. R. Kosinski
%T Denotational Semantics of Determinate and Non-Determinate Data Flow
Programs
%R TR-220
%I Laboratory for Computer Science, MIT
%C Cambridge, MA
%D May 1979

%A S. C. Kothari
%A S. Lakshmivarahan
%T A condition known to be sufficient for rearrangeability of the Benes
class of interconnection networks with 2x2 switches is also necessary
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 76-78
%K
multistage networks

%A V. E. Kotov
%A A. Ershov
%A V. A. Nepomniaschy
%T Toward automatical construction of parallel programs
%J Proc. Int. Symp. on Theoretical Programming
%C Novosibirsk, USSR
%D 1974
%K theoretical results
%X Discusses issues in recognizing parallelism in sequential programs.
Presents models of sequential and parallel programs for use in high-level
language constructs.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A S. A. Koubias
%A G. D. Papadopoulos
%T Performance Analysis of the Adaptive Multiple Access Protocol ATP-2
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Channel Access Protocols
%P 64-69

%A J. Kowalik
%T Preliminary Experience with Multiple-Instruction Multiple Data
Computation
%B Impact of New Computing Systems on Computational Mechanics
%E A. Noor
%I The American Society of Mechanical Engineers
%D 1983
%P 49-54

%A J. Kowalik
%T An Implementation of the Fast-Givens Transformations on a MIMD Computer
%J Appl. Math.
%I Polish Academy of Science
%D 1984
%X To appear

%A J. Kowalik, (Ed.)
%T Proceedings of the NATO Workshop on High Speed Computations
%S NATO ASI Series
%V F-7
%I Springer-Verlag
%C Berlin
%D 1984

%A J. Kowalik
%T Design and Performance of Algorithms for MIMD Parallel Computers
%B Proceedings of the NATO Workshop on High Speed Computations
%E J. Kowalik
%S NATO ASI Series
%V F-7
%I Springer-Verlag
%P 257-276
%D 1984

%A J. S. Kowalik
%A S. P. Kumar
%T An efficient parallel block conjugate method for linear equations
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 47-52
%K
WSU, Pullman, U of Miami, Denelcor HEP,
%O Numerical algorithms

%A J. S. Kowalik
%A S. P. Kumar
%T Parallel Algorithms for Recurrence and Tridiagonal Equations
%E Janusz S. Kowalik
%B Parallel MIMD Computation: HEP Supercomputer and Its Applications
%I MIT Press
%C Cambridge, MA
%D 1985
%P 295-307
%K Applications,
%X Short paper on two algorithms.

%A Janusz S. Kowalik, (ed.)
%T Parallel MIMD Computation: HEP Supercomputer and Its Applications
%I MIT Press
%D 1985

%A Janusz S. Kowalik, ed.
%T Parallel MIMD Computation: HEP Supercomputer and Its Applications
%I MIT Press
%C Cambridge, MA
%D 1985

%A R. Kowalski
%T Algorithms = Logic + Control
%J Communications of the ACM
%V 22
%N 7
%D July 1979
%P 424-436

%A E. W. Kozdrowicki
%A D. J. Theis
%T Second Generation of Vector Supercomputers
%J Computer
%V 13
%N 11
%D November 1980
%P 71-83

%A E. W. Kozdrowicki
%T Supercomputers for the Eighties
%J Digital Design
%D May 1983
%P 94-103
%K MPP, Massively Parallel Processor

%A Edward W. Kozdrowicki
%A Douglas J. Theis
%T Second Generation of Vector Supercomputers
%J Computer
%I IEEE
%V 13
%N 11
%D November 1980
%P 71-83
%X Dated survey which looks at Cyber 205, Cray-1, and BSP.
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984, pp. 9-21.

%A Rich Krajewski
%T Multiprocessing: An Overview
%J Byte
%V 10
%N 5
%D May 1985
%P 171-181
%O Special issue on multiprocessing
%X Very shallow survey.  No special systems mentions.  It does talk
about dataflow.  Other papers do better surveys.

%A M. F. Kraley
%T The Pluribus multiprocessor
%J Digest of Papers \(em 1975 Int. Symp. on Fault-Tolerant Computing
%C Paris, France
%D June 1975
%P 251
%K multiprocessor architectures and operating systems
%X This fault-tolerant multiprocessor is designed primarily for message
routing and buffering in the Arpanet.  It used multiprocessing for
reliability as well as to allow modular performance growth.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A J. Kramer
%A R. J. Cunningham
%T Towards a Notation for the Functional Design of Distributed Processing
Systems
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 69-76
%O Language and control

%A J. Kramer
%A J. Magee
%A M. Sloman
%T Intertask Communication Primitives for Distributed Computer Control
Systems
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 404-411
%K
%O Distributed Systems in Specific Applications

%A Valere J. Kransky
%A E. Dick Giroux
%A Gary A. Long
%T Parallel implementations of a two-dimensional model
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 69-77
%K
%O Parallel processing techniques

%A P. W. Kraska
%T Parallelism Exploitation and Scheduling
%R PhD Thesis, Report 69-344
%D August 1969
%I Computer Science Dept., University of Illinois
%C Urbana-Champaign

%A P. W. Kraska
%T Parallelism Exploitation and Scheduling
%R UIUCDCS-R-72-518
%I CS Dept., Univ. of Ill.
%D June 1972
%X Postdoc work?  Similar TR is PhD thesis, 69-344.

%A Matthias Kratz
%T Some Aspects of Using Vector Computers for Finite Element Analyses
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 349-354
%D 1984

%A R. R. Kressler
%A et al.
%T Development of an LS Associative Processor
%I National Technical Information Service
%R Air Force Report AFAL-TR-70-142
%D August 1970

%A Barnet Krinsky
%A Joseph Thames
%T The Structure of Synthetic Calculus
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 2.18-2.28
%O Architecture dependent computation

%A C. M. Krishna
%A K. G. Shin
%T Performance Measures for Multiprocessor Controllers
%R CRL-TR-1-82
%I Univ. of MI, Computing Research Lab.
%C Ann Arbor, MI
%D October 1982
%X Funded by NASA LaRC

%A C. M. Krishna
%A K. G. Shin
%T Queueing Analysis of a Canonical Model of Real-Time Multiprocessors
%R CRL-TR-8-83
%I Univ. of MI, Computing Research Lab.
%C Ann Arbor, MI
%D February 1983
%X Funded by NASA LaRC

%A E. V. Krishnamurthy
%T Error-Free Parallel High-Order Convergent Iterative Matrix Inversion
Based on p-Adic Approximation
%R TR-1229
%I Computer Vision Laboratory, Computer Science Center, University of
Maryland
%D November 1982
%K parallel computation, matrix inversion, p-adic approximation

%A K. Kronlof
%T Execution Control and Memory Management of a Data Flow Signal Processor
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%D 1983
%V 11
%N 3
%P 230-235
%O Data flow architectures

%A W. J. Kropfl
%T An Experimental Data Block Switch
%J Bell System Technical Journal
%D July/August 1972

%A Philip Krueger
%A Raphael Finkel
%T An Adaptive Load Balancing Algorithm for a Multicomputer
%R Computer Sciences Technical Report #539
%I CS Dept., Univ. of Wisc.
%D April 1984
%K Categories and Subject Descriptors: C.2.4 [Computer-Communication Networks]:
distributed systems - network operating systems; D.4.1 [Operating Systems]:
process management - scheduling; D.4.7 [Operating Systems]:
organization and design - distributed systems
General Terms: algorithms, performance
Additional Key Words and Phrases: distributed operating system,
dynamic load balancing, process migration, processor scheduling,
resource allocation
%X A description of a simulation study of the "Above-average" algorithm.

%A Bjorn Kruse
%T A Parallel Picture Processing Machine
%J IEEE Transactions on Computers
%V C-22
%N 12
%D December 1973
%P 1075-1087
%K Digital picture processing, feature extraction, local operations,
parallel processing, sequential machines,
Pattern recognition

%A Bjorn Kruse
%A Bjorn Gudmundsson
%A Dan Antonsson
%T PICAP and Relational Neighborhood Processing in FIP
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 31-46

%A Bjorn Kruse
%A Bjorn Gudmundsson
%T Parallelism in PICAP
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 231-240
%K MIMD, MSIMD

%A Clyde Kruskal
%A Larry Rudolph
%T Observations Concerning Multidimensional Ultracomputers
%R ULTRACOMPUTER NOTE #6
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D January 1980

%A Clyde Kruskal
%T Supersaturated Paracomputer Algorithms
%R TR 031, ULTRACOMPUTER NOTE #26
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D May 1981

%A Clyde Kruskal
%A Marc Snir
%T Some Results on Multistage Interconnection Networks for Multiprocessors
%R ULTRACOMPUTER NOTE #41, TR #51
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D May 1982

%A Clyde P. Kruskal
%T Results in parallel searching, merging, and sorting
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 196-198
%K
U of Ill
%O Non-numeric algorithms

%A Clyde P. Kruskal
%T Algorithms for replace-add based paracomputers
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 219-223
%K
U of ill
%O Non-numeric algorithms

%A Clyde P. Kruskal
%A Marc Snir
%T The Performance of Multistage Interconnection Networks for Multiprocessors
%J IEEE Transactions on Computers
%V C-32
%N 12
%D December 1983
%P 1091-1098
%K Bandwidth, banyan network, bidelta network, buffered network,
circuit-switching, delta network, dilated network, multistage interconnection
network, packet-switching network, performance analysis, replication network,
simulation, square network, throughput, unbuffered network, uniform network.

%A Clyde P. Kruskal
%T Searching, Merging, and Sorting in Parallel Computation
%J IEEE Transactions on Computers
%V C-32
%N 10
%D October 1983
%P 942-946
%K Comparison problems, computational complexity, merging,
parallel computation, searching, sorting
Parallel computation

%A Clyde P. Kruskal
%A Marc Snir
%A Alan Weiss
%T On the distribution of delays in buffered multistage interconnection
networks for uniform and nonuniform traffic (Extended Abstract)
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 215-219
%K buffered, multistaged networks, banyan networks,
%O queueing analysis

%A Clyde P. Kruskal
%A Alan Weiss
%T Allocating Independent Subtasks on Parallel Processors (Extended Abstract)
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 236-240
%K MIMD, scheduling, decomposition,
%O queueing analysis

%A Clyde P. Kruskal
%A Marc Snir
%T The Importance of Being Square
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%D June 1984
%P 91-98
%K multistage shuffle-exchange networks, square delta networks,
packet switching
%O interconnection networks
%X A cost-performance-area theoretical analysis.

%T The Power of Parallel Prefix
%A Clyde P. Kruskal
%A Larry Rudolph
%A Marc Snir
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 180-185
%K Parallel Algorithms/Simulation

%A Ronald L. Krutz
%A Bob Reynouard
%T A shared memory technique for different microprocessors
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 221
%K
%O Multiple-microprocessors
%X Summary only.

%A A. J. Krygiel
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Synchronous Nets for Single Instruction Stream - Multiple Data Stream
Computer
%P 266-273
%O Array Processors and processing

%A Annette J. Krygiel
%T An implementation of the Hadamard transform on the STARAN associative
array processor
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 34
%K
%O applications: image processing
%X Summary only.

%A A.J. Krzeczkowski
%T Seismic Migration Using the ICL DAP
%I National Coal Board
%J Proceedings of Chester Conference

%A M. Kubo
%A E. Toshima
%A N. Mori
%A H. Hoshino
%A K. Agusa
%A Y. Ohno
%T A parallel processor system dedicated to SIMD and its application to
three-dimensional color graphics
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 870-875
%K
%O Applications of Parallelism

%A M. Kubo
%A E. Toshima
%A H. Hoshino
%A Y. Ohno
%T Colour Graphics System With Multimicroprocessor Systems (In Japanese)
%J Trans. Inf. Process. Coc. Jpn. (Japan)
%V 24
%D 1983
%P 488-495

%T G- PSYCO: A Multi-microprocessor System for Generating
Three-dimensional Color Images (In Japanese)
%A M. Kubo
%A E. Toshima
%A A. Kamei
%A K. Agusa
%A Y. Ohno
%J Trans. Inf. Process. Coc. Jpn. (Japan)
%V 25
%D 1984
%P 10-18

%A Masatoshi Kubo
%A Tatsuya Kohmoto
%A Yukata Ohno
%T A Data Flow Machine with Optimization Driven Graph Reduction Mechanism
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 10-14
%O Data flow systems

%A D. Kuck
%A Y. Muraoka
%T Bounds on the Parallel Evaluation of Arithmetic Expressions using
Associativity and Commutativity
%J Acta Informatica
%V 3
%N 3
%D 1974
%P 203-216

%A D. Kuck
%T On the Speedup and Cost of Parallel Computation
%J Proc. on the Complexity of Computational Problem Solving
%D 1974

%A D. Kuck
%A K. Maruyama
%T Time Bounds on the Parallel Evaluation of Arithmetic Expressions
%J SIAM Journal of Computing
%V 21
%N 2
%D June 1975
%P 147-162

%A D. Kuck
%T Parallel Processing of Ordinary Programs
%J Advances in Computers
%V 15
%I Academic Press
%C New York
%P 119-179
%D 1976

%A D. Kuck
%A D. Gajski
%T Parallel Processing of Sparse Structures
%E J. Kowalik
%B Proceedings of the NATO Workshop on High Speed Computations
%S NATO ASI Series
%V F-7
%I Springer-Verlag
%P 229-244
%D 1984

%A D. Kuck
%A J. McGraw
%A M. Wolfe
%T A Debate: Retire FORTRAN?
%J Physics Today
%V 37
%N 5
%P 66-75
%D May 1984

%A D. J. Kuck
%A D. A. Padua
%T High-speed multiprocessors and their compilers
%J Proc. 1979 Parallel Processing Symp.
%I IEEE
%P 5-16
%X A later version of this paper is excerpted in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%A D. J. Kuck
%A A. H. Sameh
%T Parallel Computation of Eigenvalues of Real Matrices
%B Information Processing 71 Proc. IFIP Congress 71
%V II
%I North-Holland Publishing
%C Amsterdam, The Netherlands
%D 1972
%P 1266-1272

%A D. J. Kuck
%T Multioperation Machine Computational Complexity
%E J. F. Traub
%B Complexity of Sequential and Parallel Numerical Algorithms
%P 17-48
%I Academic Press, Inc.
%D 1973

%A D. J. Kuck
%A P. B. Budnik
%A S. -C. Chen
%A E. W. Davis
%A J. C. -C. Han
%A P. W. Kraska
%A D. H. Laurie
%A Y. Muraoka
%A R. E. Strebendt
%A R. A. Towle
%T Measurements of parallelism in ordinary FORTRAN programs
%J 1973 Sagamore Conf. on Parallel Processing
%I IEEE
%D August 1973
%P 23-36
%K sequential-parallel transformation and modeling

%A D. J. Kuck
%A P. B. Budnik
%A S. C. Chen
%A E. Davis, Jr.
%A J. Han
%A P. Kraska
%A D. Lawrie
%A Y. Muraoka
%A R. Strebendt
%A R. Towle
%T Measurements of Parallelism in Ordinary FORTRAN Programs
%J IEEE Trans. on Computers
%V C-23
%N 1
%P 37-46
%D January 1974
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%A D. J. Kuck
%T Parallel processor architecture \(em a survey
%J 1975 Sagamore Conf. on Parallel Processing
%I IEEE
%D August 1975
%P 15-39

%A D. J. Kuck
%T A Survey of Parallel Machine Organization and Programming
%J Computing Surveys
%V 9
%N 1
%P 29-59
%D 1977
%K alignment network, data-dependence graphs, linear recurrences,
parallel algorithms, parallel machine organization, parallel memories,
parallel programming, program speedup, tree-height reduction
CR categories: 4.12, 4.32, 4.6 5.24, 5.25, 6.1, 6.20

%A D. J. Kuck
%A D. H. Lawrie
%A A. H. Fameh
%T High Speed Computer and Algorithm Organization
%I Academic Press
%C New York, NY
%D 1977

%A D. J. Kuck
%T The Structure of Computers and Computation
%I Wiley
%C New York, NY
%D 1978

%A D. J. Kuck
%A D. A. Padua
%T High-Speed Multiprocessors and Their Compilers
%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%P 5-16
%O Languages and Translations

%A D. J. Kuck
%A R. H. Kuhn
%A D. A. Padua
%A B. Leasure
%A M. Wolfe
%T Dependence Graphs and Compiler Optimization
%J Proceedings of the Eighth Symposium on the Principles of
Programming Languages (POPL)
%D January 1981
%P 207-218

%A D. J. Kuck
%T Automatic Restructing for High-Speed Computation
%J CONPAR 81: Conference on Analysing Problem Classes and Programming for
Parallel Computing, Lecture Notes in Computer Science 111
%D June 1981
%P 66-84

%A D. J. Kuck
%A J-K. Peir
%A A. Veidenbaum
%A P-C. Yew
%T Notes on Machine Control Structures
%R Cedar Document No. 3
%I Computer Science Department, University of Illinois
%D April 22, 1983
%K

%A David J. Kuck
%T ILLIAC IV Software and Application Programming
%J IEEE Transactions on Computers
%V C-17
%N 8
%P 758-770
%D August 1968
%K applications of array computer, array computer, array language, compiler,
operating system
%X The early proposals for system software for the 256 PE ILLIAC IV.
Examples are given.

%A David J. Kuck
%T A Preprocessing High-Speed Memory System
%J IEEE Transactions On Computers
%V C-19
%N 9
%D September 1970
%P 793-802
%K Array processing, data prefetching, interleaved memories,
parallel processing, pipeline processing, sparse matrix operations,
table lookup,
Hardware and systems

%A David J. Kuck
%A A. Sameh
%T Parallel Computation of Eigenvalues of Real Matrices
%I NTIS
%R AD-737292
%D November 1971
%K ILLIAC IV, Jacobi, Householder, QR algorithm,

%A David J. Kuck
%A Yoichi Muraoka
%A Shyh-Ching Chen
%T On the number of operations simultaneously executable
in Fortran-like programs and their resulting speedup
%J IEEE Trans. on Computers
%D December 1972
%V C-21
%N 12
%P 1293-1310
%K Arithmetic expression evaluation, DO Loop analysis,
FORTRAN program measurement, parallel processing, program speedup,
tree height reduction

%A David J. Kuck
%A Robert H. Kuhn
%A Bruce Leasure
%A Michael Wolfe
%T The Structure of an Advanced Vectorizer for Pipelined Processors
%J Computer Software and Applications Conference (COMPSAC80)
%I IEEE
%D October 1980
%P 709-715
%K
Parafrase
%X A good description of the system but short on limitations.
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%A David J. Kuck
%A Richard A. Stokes
%T The Burroughs Scientific Processor (BSP)
%J IEEE Transactions on Computers
%V C-31
%N 5
%D May 1982
%P 363-376
%K Conflict-free array access, high-speed computer, parallel computer,
pipeline computer, scientific computing, vectorizing compiler,
Special issue on supersystems
%X
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%A David J. Kuck
%A Ahmed H. Sameh
%A Ron Cytron
%A Alexander V. Veidenbaum
%A Constantine D. Polychronopoulos
%A Gyungho Lee
%A Tim McDaniel
%A Bruce R. Leasure
%A Carol Beckman
%A James R. B. Davies
%A Clyde P. Kruskal
%T The effects of program restructuring, algorithm change, and
architecture choice on program performance
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 129-138
%K EISPACK, LINPACK, Parafrase, SIMD, MIMD, program modification, application
%O performance modeling
%X Subroutines from two existing FORTRAN libraries are converted to run
on vector and multiprocessors.  Some experimental results are presented
for Cray-1 and Cyber 205.  Most show either linear or log speed up.

%A James T. Kuehn
%A Howard Jay Siegel
%A Peter D. Hallenbeck
%T Design and simulation of an MC68000-based multi-microprocessor system
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 353-362
%K
Purdue, SIMD/MIMD,
%O Multi-microprocessors

%T Extensions to the C Programming Language for SIMD/MIMD Parallelism
%A James T. Kuehn
%A Howard Jay Siegel
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 232-235
%K Languages for Parallel Processing

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T Fast Evaluation of Arbitrary Decision Trees
%A Robert H. Kuhn
%P 267-268
%O Searching
%X Summary only.

%A Robert H. Kuhn
%T Efficient mapping of Algorithms to Single-stage Interconnection
%J Proceedings of 7th Annual Symposium on Computer Architecture
%D 1980
%I IEEE
%P 182-189

%A Robert H. Kuhn
%T Transforming Algorithms for Single-Stage and VLSI Architectures
%J Workshop on Interconnection Networks for Parallel and Distributed
Processing
%D April 1980
%I IEEE
%P 11-19

%A Robert H. Kuhn
%A David A. Padua, eds.
%T Tutorial on Parallel Processing
%I IEEE
%D August 1981
%K Required
%X This is a collection of noted papers on the subject, collected for
the tutorial given at the 10th conference (1981) on Parallel Processing.
It eases the search problem for many of the obscure papers.
Some of these papers might not be considered academic, others are
applications oriented.  Data flow is given short coverage.  Still, a
quick source for someone getting into the field.
Where ever possible, paper in this bibliography are noted as being in this
text.

%A U. Kulish
%T Mathematical Foundations of Computer Arithmetic
%I IEEE
%J Trans. on Computers
%V C-26
%N 7

%A Ashok V. Kulkarni
%A David W. L. Yen
%T Systolic Processing and an Implementation for Signal and Image
Processing
%J IEEE Transactions on Computers
%V C-31
%N 10
%D October 1982
%P 1000-1009
%K Discrete Fourier transform, image processing, inner products, matrix
multiplication, 1-D convolution, systolic array, signal processing,
systolic processor, 2-D convolution,
Special issue on computer architecture for pattern analysis and image
database management

%T The Two-Dimensional Inverse Omega Network
%A Takeshi Kumagai
%A Kazuo Ikegaya
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 325-327
%K Interconnection Networks

%A A. Kumar
%A R. Graves
%A K. Weilmuenster
%T User's Guide for Vectorized Code EQUIL for Calculating Equilibrium
Chemistry on Control Data STAR-100 Computer
%I NASA Langley Research Center
%R TM-80192
%D 1980

%A A. Kumar
%A D. Rudy
%A J. Drummond
%A J. Harris
%T Experiences with Explicit Finite Difference Schemes for Complex Fluid
Dynamics Problems on STAR-100 and CYBER 203 Computers
%J Proceedings Symposium CYBER 205 Applications
%C Ft. Collins, CO
%I Control Data Corp.
%D 1982

%A B. Kumar
%A Timothy A. Gonsalves
%T Modelling and Analysis of Distributed Software Systems
%J Proceedings of the 7th Symposium on Operating Systems Principles
%D December 1979
%P 2-7
%O system analysis and prediction

%A M. Kumar
%A D. M. Dias
%A J. R. Jump
%T Switching Strategies in a Class of Packet Switching Networks
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%D 1983
%V 11
%N 3
%P 284-300
%O interconnection networks

%A Manoj Kumar
%A J. R. Jump
%T Generalized delta nets
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 10-18
%K delta networks
multistage network performance

%T Switching Strategies in Shuffle-Exchange Packet-Switched Networks
%A Manoj Kumar
%A Daniel M. Dias
%A J. R. Jump
%J IEEE Transactions on Computers
%V C-34
%N 2
%D February 1985
%P 180-186
%K Interconnection networks, modular computing systems, packet switching,
parallel processing, shuffle connection
%O Correspondence

%A Rajesh Kumar
%A F. Gail Gray
%T A Fault-Tolerant One-Dimensional Cellular Structure
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 472-483
%O Fault-tolerant networks

%A S. Kumar
%T Parallel Algorithms for Solving Linear Equations on MIMD Computers
%I Washington State University
%R Ph. D. Thesis
%D 1982

%A Swarn P. Kumar
%A Janusz S. Kowalik
%T Parallel factorization of a positive definite matrices on an MIMD
computer
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 410-416
%K parallel Cholesky method, Gauss elimination,
%O matrix computations

%A Swarn P. Kumar
%A Robert E. Lord
%T Solving Ordinary Differential Equations on the HEP Computer
%E Janusz S. Kowalik
%B Parallel MIMD Computation: HEP Supercomputer and Its Applications
%I MIT Press
%C Cambridge, MA
%D 1985
%P 231-273
%K Applications, parallel predictor-corrector, Runge-Kutta, ODE, PC,
%X Covers about four different techniques with reference to the
parallel programming problem.

%A V. K. Prasanna Kumar
%A C. S. Raghavendra
%T Array Processor with Multiple Broadcasting
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K Array Processing, mesh connected computers (MCC), parallel algorithms
%C Boston, MA
%P 2-10

%A V. P. Kumar
%A S. M. Reddy
%T A Class of Graphs for Fault-Tolerant Processor Interconnections
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 448-460
%O Fault-tolerant networks

%A V. P. Kumar
%A S. M. Reddy
%T Design and Analysis of Fault-Tolerant Multistage Interconnection
Networks with Low Link Complexity
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K Interconnection Networks
%C Boston, MA
%P 376-386

%A Vipin Kumar
%T Some Thoughts on Parallel Processing
%J Byte
%V 10
%N 5
%D May 1985
%P 174-175
%O Special issue on multiprocessing
%X A side bar to Rich Krajewski's survey in the same issue.

%A H. Kung
%T Let's Design Algorithms for VLSI Systems
%J Proc. Conf. Very Large Scale Integration
%I California Institute of Technology
%P 65-90
%D 1979

%A H. Kung
%A C. Leiserson
%T Systolic Arrays (for VLSI)
%J Sparse Matrix Proc. (1978)
%I SIAM
%E I. Duff
%E G. Stewart
%P 256-282
%D 1979

%A H. Kung
%A S. Yu
%T Integrating High-Performance Special-Purpose Devices into a System
%J IBM Symposium on Vector Computers and Scientific Computing
%C Rome
%D 1982

%A H. Kung
%T Systolic Algorithms
%E S. Parter
%B Large Scale Scientific Computation
%I Academic Press
%C Orlando, FL
%D 1984
%P 127-140

%A H. T. Kung
%T Synchronized and asynchronous parallel algorithms for multiprocessors
%E J. F. Traub
%B New Directions and Recent Results in Algorithms and Complexity
%I Academic Press
%D 1976
%P 153-200
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."
Surveys synchronous and asynchronous root finding, iterative, and
differential algorithms

%A H. T. Kung
%T New Algorithms and Lower Bounds for the Parallel Evaluation of Certain
Rational Expressions and Recurrences
%J Journal of the ACM
%V 23
%N 2
%D April 1976
%P 252-261

%A H. T. Kung
%A D. Stevenson
%T A Software Technique for Reducing the Routing Time on a Parallel
Computer with a Fixed Interconnection Network
%B High Speed Computer and Algorithm Organization
%E D. J. Kuck
%E D. H. Lawrie
%E A. H. Sameh
%I Academic Press
%C New York, NY
%P 423-433
%D 1977

%A H. T. Kung
%A S. W. Song
%T An Efficient Garbage Collection System and its Correctness Proof
%J 18th Annual Symposium on Foundations of Computer Science
%D October 1977
%P 120-131

%A H. T. Kung
%T The structure of parallel algorithms
%E M. C. Yovits
%J Advances in Computers
%V 19
%I Academic Press
%D 1980

%A H. T. Kung
%A C. E. Leiserson
%T Algorithms for VLSI processor arrays
%E C. Mead
%E L. Conway
%B Introduction to VLSI Systems
%I Addison-Wesley
%D 1980
%P 271-292

%A H. T. Kung
%A Philip L. Lehman
%T Concurrent Manipulation of Binary Search Trees
%J ACM Transactions On Database Systems
%V 5
%N 3
%D September 1980
%P 354-382
%K Databases, data structures, binary search trees, concurrent algorithms,
concurrency controls, locking protocols, correctness, consistency
CR Categories: 3.73, 3.74, 4.32, 4.34, 5.24

%A H. T. Kung
%A R. Sproull
%A Guy Steele
%T VLSI Systems and Computations
%I Computer Science Press
%C Rockville, MD
%D 1981

%T On Optimistic Methods for Concurrency Control
%A H. T. Kung
%A John T. Robinson
%J ACM Transactions on Database Systems
%V 6
%N 2
%D June 1981
%P 213-226
%K Databases, concurrency controls, transaction processing
CR Categories: 4.32, 4.33

%A H. T. Kung
%A S. W. Song
%T A Systolic 2-D Convolution Chip
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 373-384

%A H. T. Kung
%T Why systolic architectures?
%J Computer
%V 15
%N 1
%D Jan. 1982
%P 37-46
%K Recommended

%A H. T. Kung
%A Monica S. Lam
%T Wafer-Scale Integration and Two-Level Pipelines Implementations of
Systolic Arrays
%J Journal of Parallel and Distributed Processing
%V 1
%N 1
%D August 1984
%X Covers serious issues such as fault tolerance, feedback cycles, rings,
defective cells, and so on.
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984, pp. 559-584.

%A Roberto Kung
%A Nachum Shacham
%T A distributed limited-depth probing protocol for a network
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 356-358
%O computer networks

%A S.-Y. Kung
%T A Matrix Data Flow Language/Architecture for Parallel Matrix Operations
based on Computational Wave Concept
%E H. T. Kung
%E R. Sproull
%E Guy Steele
%B VLSI Systems and Computations
%I Computer Science Press
%C Rockville, MD
%D 1981

%A Sun-Yuan Kung
%A K. S. Arun
%A Ron J. Gal-Ezer
%A D. V. Bhaskar Rao
%T Wavefront Array Processor: Language, Architecture, and Applications
%J IEEE Transactions on Computers
%V C-31
%N 11
%D November 1982
%P 1054-1066
%K Asynchrony, computational wavefront, concurrency, data-flow computing,
matrix data-flow language, signal processing, systolic array, VLSI
array processor, wavefront architecture
Special issue on parallel and distributed processing

%A Sun-Yuan Kung
%T On Supercomputing with Systolic/Wavefront Array Processors
%J Proceedings of the IEEE
%V 72
%N 7
%D July 1984
%P 867-884
%K FFT, signal processing, optical computing, VLSI, dataflow,
Special issue on optical computing
%X
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984, pp. 531-548.

%A Z. Kupla
%T PICASSO, PICASSO \*- SHOW and PAL \*- A development of a High-Level
Software System for Image Processing
%B Languages and Architectures for Image Processing
%E M. J. B. Duff
%E S. Levialdi
%I Academic Press
%C New York, NY
%D 1981
%P 13-24

%A A. Kurinckx
%A G. Pujolle
%T Analytic methods for multiprocessor modeling
%J Conf. Pre-Prints 4th Int'l Symp. Modelling and Performance Evaluation of
Computer Systems, Part II
%C Vienna, Austria
%D February 1979
%K performance
%X Reviews mathematical results useful for modeling multiprocessor systems.
Presents an approximate probabilistic model of such systems and describes
its use in evaluating multiprocessor performance.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%T Multiple-Access Protocols and Time-Constrained Communication
%A James F. Kurose
%A Mischa Schwartz
%A Yechiam Yemini
%J Computing Surveys
%I ACM
%V 16
%N 1
%D March 1984
%P 43-70
%K C.2.0 [Computer-communications networks]: General - data communications,
C.2.1 [Computer-communications networks]:
network architecture and design - distributed networks; network communications;
C.2.2 [Computer-communications networks]:
network protocols - protocol architecture;
C.2.5 [Computer-communications networks]: local networks - access schemes;
C.3 [Computer systems organization]:
special-purpose and application-based systems - real-time systems;
General terms: algorithms,  design,
Algorithms, Design, Computer networks, multiple-access protocols,
real-time communication, time-constrained communication

%A James F. Kurose
%A Mischa Schwartz
%A Yechiam Yemini
%T A Microeconomic Approach to Decentralized Optimization of Channel
Access Policies in Multiaccess Networks
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Channel Access Protocols
%P 70-77

%A J. M. Kurtzberg
%T On the memory conflict problem in multiprocessor systems
%J IEEE Trans. on Computers
%V C-23
%N 3
%D March 1974
%P 286-293
%K performance
%X Considers the problem of memory interference in multiprocessor systems
where each processor runs a different job.  Presents analytical models for such
situations and develops algorithms for assigning jobs to memory modules so as
to minimize memory interference.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%T A Balanced Pipelining Approach to Multiprocessing on an Instruction
Stream Level
%A Jerome M. Kurtzberg
%A Raymond D. Villani
%J IEEE Transactions on Computers
%V C-22
%N 2
%D February 1973
%P 143-148
%K Balanced pipelining, closely coupled processing units,
computer organization, CPU availability, instruction stream,
micromultiprocessing, microprogram control, multiprocessing,
parallel processing,
Computer systems

%A Jerome M. Kurtzberg
%T On the Memory Conflict Problem in Multiprocessor Systems
%J IEEE Transactions on Computers
%V C-23
%N 3
%D March 1974
%P 286-293
%K Allocation model, computer slowdown, feasible allocation,
job (program) assignment, memory conflict, multiprocessor systems,
quadratic programming model, shared storage environment,
storage allocation algorithms, storage interference, storage lockout,
Computer systems

%A T. Kusher
%A A. Y. Wu
%A A. Rosenfeld
%T Image Processing on the MPP
%I Computer Vision Laboratory, University of Maryland
%C College Park, MD
%D February 1980
%R TR-1007, AFOSR-3271
%K Massively Parallel Processor

%A E. J. Kushner
%T AP Performance on Applications Involving the Integration of Ordinary
Differential Equations
%R memorandum
%D February 1980
%I Floating Point Systems, Inc.
%C Portland, OR 97223

%T Image Processing on ZMOB
%A Todd Kushner
%A Angela Y. Wu
%A Azriel Rosenfeld
%J IEEE Transactions on Computers
%V C-31
%N 10
%D October 1982
%P 943-951
%K Image processing, parallel processing, ZMOB
Special issue on computer architecture for pattern analysis and image
database management

%T Type Checking in Vimval
%A Bradley C. Kuszmaul
%I Massachusetts Institute of Technology
%R MIT/LCS/TR-321

%T Type Checking In Vimval
%A Bradley C. Kuszmaul
%I Massachusetts Institute Of Technology
%R MIT/LCS/TR-321
%D June 1984
%K Polymorphism, Static Type Checking. VIMVAL, VAL, Finite State Automata,
Type Inference

%A S. Kutti
%A L. Cooper
%T A pulse driven synchronous access control mechanism for local area
networks
%B NETWORKS India 84. International Symposium on Data Communication
and Computer Networks
%C Madras, India
%D Oct. 1984
%P 1-6
%O 6 REFS. Treatment PRACTICAL
%E H. N. Mahabala
%E K. B. Lakshmanan
%E S. Srinivasan
%I Comput. Soc. India, IFIP, UNESCO
%K local area networks
pulse driven synchronous access control mechanism local area networks LAN
CSMA/CD token passing register insertion daisy chain simultaneous media access
ring LAN

%A C. H. Kuznia
%A R. Kober
%A H. Kopp
%T SMS 101 \(em A structured multimicroprocessor system
with Deadlock-Free Operation Scheme
%J Proceedings of 3rd Annual Symposium on Computer Architecture
%C Clearwater, Florida
%D January 1976
%P 122
%K multiprocessor architectures and operating systems
%X A multiprocessor design using microprocessors is described.  A distinctive
feature of this system is the use of simultaneously updatable private memories
instead of a shared global memory.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Ch. Kuznia
%A H. Kopp
%T A Model for Process Communication in Parallel Processor Systems
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 339-342
%K SMS 201,
multi-processors and parallel computers

%A S. C. Kwan
%A W. L. Ruzzo
%T Adaptive parallel algorithms for finding minimum spanning trees
(Extended Abstract)
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 439-443
%K edge density, processor adaptive, Concurrent read but only Exclusive
Write (CREW), shared memory, Kruskal's scheme, Prim's scheme, Sollin's
method,
%O algorithms

%A Y. S. Kwong
%A D. Wood
%T A New Method for Concurrency in B-Trees
%J IEEE Trans. on Software Engineering
%V SE-8
%D May 1982
%P 211-222

%A Yat-sang Kwong
%T On Reduction and Livelocks in Asynchronous Parallel Computation
%I UMI Research Press
%C Ann Arbor, MI
%D 1982
%K PhD thesis, fork, join, Petri nets,

%A R. Lacoss
%A R. Walton
%T Strawman design of a DSN to detect and track low flying aircraft
%J Proceedings of the Distributed Sensor Nets Workshop
%P 41-52
%D December 1978
%X Copies may be available from the Computer Science
Department, Carnegie-Mellon University, Pittsburgh, Pennsylvania, 15213.

%A R. Ladner
%A M. Fischer
%T Parallel prefix computation
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 218-
%K
%O Theory

%A R. E. Ladner
%T The Complexity of Problems in Systems of Communicating Sequential Processes
%J J. of Computer and System Sciences
%V 21
%D 1980
%P 179-194

%A W. G. LaFond
%T Pseudorandom Number Generator Program-Controlled Source of Three 15-Bit
Random Number Words per Microsecond for AP-120B Array Processors
%R AD-A056793/3ST
%I National Technical Information Service
%D June 1, 1978
%C Springfield, VA 22151

%A B. J. Lageweg
%A E. L. Lawler
%A J. K. Lenstra
%A A. H. G. Rinnooy Kan
%T Computer Aided Complexity Classification of Deterministic Scheduling Problems
%I Mathematisch Centrum
%R BW 137/81
%D 1981

%A Ten-Hwang Lai
%A Sartaj Sahni
%T Anomalies in parallel branch-and-bound algorithms
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 183-190
%K parallel algorithms, branch-and-bound, anomalous behavior
non-numerical algorithms

%T Performance of Parallel Branch-and-Bound Algorithms
%A Ten-Hwangk Lai
%A Alan Sprague
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 194-201
%K Parallel Algorithms/Simulation

%A T. W. Lake
%T Exception Handling in Array Languages
%I ICL
%J IFIP Working Group Meeting

%T An Improved Distribution Algorithm for Shortest Paths Problem
%A Gopal D. Lakhani
%J IEEE Transactions on Computers
%V C-33
%N 9
%D September 1984
%P 855-857
%K Distributed algorithms, pipelining, shortest paths computation,
systolic architecture, VLSI layout,
Correspondence,

%T New Parallel Algorithms for Solving First-Order and Certain Classes of
Second-Order Linear Recurrences
%A S. Lakshmivarahan
%A Sudarshan K. Dhall
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 843-845
%K Functional/Numeric Programming

%A Shui Lam
%A R. Sethi
%T Analysis of a Level Algorithm for Preemptive Scheduling
%J Proceedings of the 5th Symposium on Operating Systems Principles,
Operating Systems Review
%V 9
%N 5
%D 1975
%P 178-186

%T Packet Broadcast Networks - A Performance Analysis of the R-ALOHA
Protocol
%A Simon S. Lam
%J IEEE Transactions on Computers
%V C-29
%N 7
%D July 1980
%P 596-603
%K Broadcast channel, broadcast networks, contention algorithms, multiple
access protocols, packet broadcasting, performance analysis, queueing,
R-ALOHA, satellite networks
%O Computer networks

%T Congestion Control of Packet Communication Networks by Input Buffer
Limits - A Simulation Study
%A Simon S. Lam
%A Y. C. Luke Lien
%J IEEE Transactions on Computers
%V C-30
%N 10
%D October 1981
%P 733-742
%K Buffer management, congestion control, flow control, input buffer
limits, packet switching networks, performance analysis, resource
allocation, store-and-forward networks

%A Simon S. Lam
%A A. Udaya Shankar
%T Protocol Verification via Projections
%J IEEE Transactions on Software Engineering
%V SE-10
%N 4
%D July 1984
%P 325-342
%K communicating processes, communications protocols, distributed systems,
image protocols, message-passing networks, method of projections,
protocol analysis, verification,
distributed systems

%A J. Lambiotte
%A L. Howser
%T Vectorization on the STAR Computer of Several Numerical Methods for a
Fluid Flow Problem
%I NASA Langley Research Center
%R TM D-7545
%D 1974

%A J. Lambiotte
%T The Solution of Linear Systems of Equations on a Vector Computer
%I University of Virginia
%R Ph. D. Dissertation
%D 1975

%A J. Lambiotte
%T The Development of a STAR-100 Code to Perform a 2-D FFT
%J Proc. Lawrence Livermore Lab Conference Scientific Computation
%D 1979

%A J. Lambiotte, Jr.
%T Efficient Sparse Matrix Multiplication Scheme for the CYBER 205
%J CYBER 200 Applications Seminar
%R NASA Conference Publication 2295
%D October 1983
%E J. Patrick Gary, Compiler
%I NASA Goddard Space Flight Center
%C Greenbelt, Maryland
%P 243-256

%A J. J. Lambiotte, Jr.
%A R. G. Voigt
%T The solution of tridiagonal linear system on the CDC STAR-100 computer
%J ACM Transaction on Mathematical Software
%V 1
%N 4
%D December 1975
%P 308-329

%A J. J. Lambiotte, Jr.
%A D. Korn
%T Computing the fast Fourier Transform on a vector computer
%J Math. Comput.
%V 33
%N 147
%D July 1979
%P 977-992
%r ICASE Report No. 78-5
%d February 23, 1978

%A L. Lamport
%T The parallel execution of DO-loops
%J Comm. ACM
%V 17
%P 83-93
%D 1974

%A L. Lamport
%T The synchronization of independent processes
%J Acta Informatica
%V 7
%N 1
%D 1976
%P 15-34
%K theoretical results
%X Considers the problem of building a robust system using failure-prone
processes.  Defines a synchronization mechanism to accomplish this.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A L. Lamport
%T Proving the correctness of multiprocess programs
%J IEEE Trans. on Software Engineering
%V SE-3
%N 2
%D March 1977
%P 125-143
%K theoretical results
%X Extends the inductive assertion technique of proving sequential programs
to programs employing multiple processes.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A L. Lamport
%A P. M. Melliar-Smith
%T Byzantine Clock Synchronization
%J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing
%I ACM
%D August 1984

%A Leslie Lamport
%T The coordinate method for the parallel execution of DO loops
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 1-12
%K
%O Sequential-parallel transformation and modeling

%A Leslie Lamport
%T The hyperplane method for an array computer
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 113-131
%K
%O Modelling and parallelism detection

%A Leslie Lamport
%T Parallel Execution of Array and Vector Computers
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 187-191
%K
%O compiling techniques

%A Leslie Lamport
%T Garbage collection with multiple processes: an exercise in parallelism
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 50-54
%K
%O operating systems

%A Leslie Lamport
%T Time, clocks, and the ordering of events in a distributed system
%J Communications of the ACM
%V 21
%N 7
%D July 1978
%P 558-565
%K distributed systems, computer networks, clock synchronization,
multiprocess systems
CR categories: 4.32, 5.29
distributed processing computer networks multiprocessing programs
ordering of events distributed system synchronising total ordering
clocks computer networks multiprocessing
%O 4 Refs.
treatment: theoretical
%X The concept of one event happening before another in a distributed system
is examined, and is shown to define a partial ordering of the events. A
distributed algorithm is given for synchronising a system of logical clocks
which can be used to totally order the events. The use of the total
ordering is illustrated with a method for solving synchronisation problems.
The algorithm is then specialised for synchronising physical clocks, and a
bound is derived on how far out of synchrony the clocks can become.
%X A classic paper on synchronization.
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A Leslie Lamport
%A Robert Shostak
%A Marshall Pease
%T The Byzantine Generals Problem
%J ACM Transactions on Programming Languages and Systems
%V 4
%N 3
%D July 1982
%P 382-401
%K Algorithms, Reliability, interactive consistency
Categories: C.2.4 [Computer-Communication Networks]: Distributed Systems -
network operating systems; D.4.4 [Operating Systems]:
Communication Management - network communication; D.4.5 [Operating Systems]:
Reliability - fault tolerance

%A Leslie Lamport
%T Specifying Concurrent Program Modules
%J ACM Transactions on Programming Languages and Systems
%V 5
%N 2
%D April 1983
%P 190-222
%K Verification, Multiprocessing, temporal logic, communication protocols
Categories: D.2.1 [Software Engineering]:
requirements/specification - methodologies: D.2.4 [Software Engineering]:
program verification - correctness proofs;
F.3.1 [Logics and Meanings of Programs]:
Specifying and Verifying and Reasoning
about Programs - specification techniques

%T The "Hoare Logic" of CSP, and All That
%A Leslie Lamport
%A Fred B. Schneider
%J ACM Transactions on Programming Languages and Systems
%V 6
%N 2
%D April 1984
%P 281-296
%K languages, verification, invariance, safety properties, generalized
Hoare Logic, decomposition principle, noninterference, message-passing,
communicating sequential processes
Categories: D.2.4 [Software Engineering]:
program verification - correctness proofs; D.3.1 [Programming Languages]:
formal definitions and theory - semantics; D.3.3. [Programming Languages]:
Language Constructs - concurrent programming structures;
F.3.1 [Logics and Meanings of Programs]: Specifying and Verifying
and Reasoning about Programs; F.3.3 [Logics and Meanings of Programs]:
Studies of Program Constructs - control primitives

%T Using Time Instead of Timeout for Fault-Tolerant Distributed Systems
%A Leslie Lamport
%J ACM Transactions on Programming Languages and Systems
%V 6
%N 2
%D April 1984
%P 254-280
%K Design, reliability, clocks, transaction commit, timestamps,
interactive consistency, Byzantine Generals Problem
Categories: C.2.4 [Computer-Communication Networks]:
distributed systems - network operating systems;
D.1.3 [Programming Techniques] concurrent programming;
D.4.1 [Operating Systems]: process management - synchronization;
D.4.5 [Operating Systems]: reliability - fault tolerance;
D.4.7 [Operating Systems] Organization and Design - distributed systems;
real-time systems;

%A B. W. Lampson
%A D. D. Redell
%T Experience with processes and monitors in Mesa
%J Comm. ACM
%V 23
%N 2
%D February 1980
%P 106-117

%A B. W. Lampson
%A M. Paul
%A H. J. Siegel, eds.
%B Distributed Systems \(em Architecture and Implementation (An Advanced Course)
%S Lecture Notes in Computer Science
%V 105
%I Spring-Verlag
%D 1981

%A B. W. Lampson
%A E. E. Schmidt
%T Organizing software in a distributed environment
%J SIGPLAN Not. (USA), Proceedings of the SIGPLAN '83 Symposium on
Programming Language Issues in Software Systems
%V 18
%N 6
%C San Francisco, CA, USA
%P 1-13
%O 9 Refs.
Treatment PRACTICAL.
%D 27-29 June 1983
%K software engineering program processors distributed processing.
software engineering program processors distributed environment System Modeller
automatic support program development cycle Cedar programming system
distributed file system.
%X The System Modeller provides automatic support for several different
kinds of program development cycle in the Cedar programming system.
It handles the daily evolution of a single module or a small group of
modules modified by a single person, the assembly of numerous modules
into a large system with complex interconnections, and the formal
release of a system. The Modeller can also efficiently locate a large
number of modules in a big distributed file system, and move them
from one machine to another to meet operational requirements or
improve performance.

%T An instruction fetch unit for a high-performance personal computer
%A B. W. Lampson
%A G. McDaniel
%A S. M. Ornstein
%J IEEE Trans. Comput. (USA)
%V C-33
%N 8
%P 712-730
%O 25 REFS. Treatment PRACTICAL
%D Aug. 1984
%K satellite computers special purpose computers microcomputers
computer architecture parallel processing pipeline processing microprogramming
instruction emulation parallel processing 16 MIPS execution rate instruction
fetch unit Xerox Dorado personal computer microcoded processor
writable decoding memory specialized instruction sets
Mesa Lisp Smalltalk six stage pipeline

%A Butler W. Lampson
%T A Scheduling Philosophy for Multiprocessing Systems
%J Communications of the ACM
%V 11
%D May 1968
%P 347-360
%K time-sharing, multiprocessing, process, schedule, interlocks, protection,
priority, interrupt systems,
CR Categories: 4.31, 4.32, 6.21
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A Butler W. Lampson
%A Howard E. Sturgis
%T Crash Recovery in a Distributed Data Storage System
%R unpublished technical report
%I Xerox Palo Alto Research Center
%C Palo Alto, CA 94306
%D April 1979

%A Butler W. Lampson
%A David D. Redell
%T Experience with Processes and Monitors in Mesa
%J Proceedings of the 7th Symposium on Operating Systems Principles
%D December 1979
%P 43-44
%O System Construction Primitives

%A Butler W. Lampson
%T Atomic transactions
%E B. W. Lampson
%E M. Paul
%E H. J. Siegert
%B Distributed Systems \(em Architecture and Implementation (An Advanced Course)
%S Lecture Notes in Computer Science
%V 105
%I Spring-Verlag
%D 1981
%P 246-265
%K Recommended,

%A Butler W. Lampson
%T Ethernet, Pup and Violet
%E B. W. Lampson
%E M. Paul
%E H. J. Siegert
%B Distributed Systems \(em Architecture and Implementation (An Advanced Course)
%S Lecture Notes in Computer Science
%V 105
%I Spring-Verlag
%D 1981
%P 446-485

%A Butler W. Lampson
%A Eric E. Schmidt
%T Organizing Software in a Distributed Environment
%J Proceedings of the SIGPLAN '83 Symposium on Programming Language Issues
in Software Systems, SIGPLAN NOTICES
%C San Francisco, CA
%V 18
%N 6
%D June 1983
%P 1-13
%K Xerox PARC, System Modeller, software development, B-trees

%A Butler W. Lampson
%T Hints for Computer System Design
%J Proceedings of the 9th Symposium on Operating Systems Principles,
Operating Systems Review
%V 17
%N 5
%D October 1983
%P 33-48
%K Xerox PARC
%X An excellent paper touting the need for simplicity, functionality,
fault-tolerance, and speed.  It is the the operating systems equivalent
to Alan Perlis' "Epigrams on Programming."  Another paper of a similar
vein from Xerox is Lauer's 1981 SOSP paper on Operating systems development.
Also reproduced in "IEEE Software" (USA), v1, n1, pp. 11-28, 55 REFS.
Treatment PRACTICAL, Jan. 1984, digital computers, computer system design.

%A J. Lan
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T A New General-Purpose Distributed Multiprocessor System Structure
%P 153-154
%O

%T Multiple-Response Resolution in Associative Systems
%A DeWitt Landis
%J IEEE Transactions on Computers
%V C-26
%N 3
%D March 1977
%P 230-235
%K Associative memories (AM's) associative processors (AP's),
content-addressed memories, Fibonacci series,
multiple-response resolution, priority determination, response resolution,
Memory systems

%A L. Landweber
%A M. Litzkow
%A D. Neuhengen
%A M. Solomon
%T Architecture of the CSNET name server
%J Comput. Commun. Rev. (USA), SIGCOMM '83 Symposium on Communications
Architectures & Protocols
%V 13
%N 2
%C Austin, TX, USA
%P 146-153
%O 16 REFS
Treatment PRACTICAL
%D 8-9 March 1983
%K communications computing computer networks electronic mail
CSNET name server electron mail internetwork mail addressing database
accessing software service host machine programs data structures
member hosts architecture
%X An important function of CSNET, the Computer Science Research
Network, is to simplify communication by electron mail. To this end,
a name server facility is being implemented which will free users
from having to understand the complexities of internetwork mail
addressing. The name server includes a database and accessing
software on a central service host machine, as well as programs and
data structures on CSNET member hosts. The architecture of the name
server is described and considerations which lead to its design are
discussed

%A Charles Richard Lang, Jr.
%T The Extension of Object-Oriented Languages to a Homogeneous,
Concurrent Architecture
%r Hm20
%R PhD Thesis, 5014:TR:82
%I Computer Science, Dept., California Institute of Technology
%C Pasadena, CA
%D 1982
%K Caltech Cosmic Cube, hypercube, C^3P

%A T. Lang
%A E. B. Fernandez
%T Scheduling of unit length independent tasks with execution constraints
%J Information Processing Letters
%V 4
%N 4
%D January 1976
%P 95-98
%K scheduling

%A Tomas Lang
%A Harold S. Stone
%T A Shuffle-Exchange Network with Simplified Control
%J IEEE Transactions on Computers
%V C-25
%N 1
%D Jan. 1976
%P 55-66
%K Array computers, dynamic memories, parallel processing, permutation
networks, shuffle-exchange network,
Parallel computation

%A Tomas Lang
%T Interconnections Between Processors and Memory Modules Using the
Shuffle-Exchange Network
%J IEEE Transactions on Computers
%V C-25
%N 5
%D May 1976
%P 496-503
%K Array processors, parallel processing, permutation networks,
shuffle-exchange network,
Computer systems

%A Tomas Lang
%A Mateo Valero
%A Ingacio Alegre
%T Bandwidth of Crossbar and Multiple-Bus Connections for Multiprocessors
%J IEEE Transactions on Computers
%V C-31
%N 12
%D December 1982
%P 1227-1234
%K Bus arbitration, memory bandwidth, multiple buses, multiprocessors,
shared memory,
Correspondence

%T A Note on Associative Processors for Data Management
%A Glen G. Langdon, Jr.
%J ACM Transactions on Database Systems
%V 3
%N 2
%D June 1978
%P 148-158
%K Database machines, associative processors
CR Categories: 3.74, 6.22, 6.34

%A O. Lange
%A W. Ameling
%T The Approximation of Operators by Neighboring Operators and Their
Realization through DDA-Structures
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 119-122
%K digital differential analyzers (DDA),
parallel algorithms

%A R. G. Lange
%T High level language for associative parallel computation with
STARAN
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 170-176
%K
%O STARAN and related topics

%A R. G. Lange
%A et al
%T Specification for a STARAN Programming Language
%R GER-16347
%I Goodyear Aerospace Corporation
%D October 1976

%A L. J. Laning
%A M. S. Leonard
%T File allocation in a distributed computer communication network
%J IEEE Trans. Comput. (USA)
%V C-32
%N 3
%P 232-244
%O 27 REFS
Treatment THEORETICAL/MATHEMATICAL
%D March 1983
%K distributed processing computer networks file organisation
storage allocation
network delay distributed computer communication network storage locations
adaptive routing techniques p median problem
%X An algorithm is presented to determine locations for the storage of
copies of files in store-and-forward computer communications
networks. The algorithm determines storage locations that minimize
the sum of network file storage costs and message transmission costs
Networks that use adaptive routing techniques are the primary focus
Feasible file locations must satisfy network performance requirements
for file availability and delay by message class. An effective method
of evaluating delay constraints for networks using adaptive routing
techniques is introduced. The algorithm uses the solution to a
p-median problem to identify initial candidate file placements
Interaction between a set of file movement rules and a network
simulator is employed to modify initial placements to find
near-optimal locations which satisfy the network performance constraints

%A G. E. Le\ lann
%Z IRIA, le Chesnay, France
%T An Analysis of Different Approaches to Distributed Computing
%J 1st International Conference on Distributed Computing Systems
%D October 1979
%P 222-231
%C Huntsville, AL, USA
%I IEEE, New York, USA
x+782 pp.
%O 26 Refs.
treatment: applic, general,review
%K multiprocessing systems computer architecture
distributed computing interprocess synchronization
Design and Requirements Specification Methodology
%X This paper is primarily aimed at clarifying some basic concepts useful to
understand what distributed computing means. It includes a description of
the objectives of distributed interprocess synchronization techniques. Some
current techniques are classified and a list of criteria useful to assess
them is presented. Although achieving identical goals, distributed
synchronization techniques do not exhibit identical performances. Two
particular techniques are compared against two criteria, throughput and
response time. Finally, examples of what is viewed as unconvincing or
inconsistent approaches to distributed computing are given.

%A G. Le Lann
%T An Analysis of Different Approaches to Distributed Computing
%J Proc. 1st Int. Conf. on Distributed Computing Systems
%P 222-232
%I IEEE
%D 1979

%A G. le Lann
%T On real-time distributed computing
%B Information Processing 83. Proceedings of the IFIP 9th World
Computer Congress
%C Paris, France
%D 19-23 Sept. 1983
%P 741-753
%O 24 REFS. Treatment GENERAL
%I North-Holland. Amsterdam, Netherlands, xvi+976, Std Book No.0 444 86729 5
%E R. E. A. Mason
%K distributed processing real time systems protocols reliability
specification design real time distributed computing systems correctness
promptness robustness flexibility distributed algorithms
atomicity concurrency time dispersion determinism
deterministic multiple access protocol

%A Amy L. Lansky
%A Susan S. Owicki
%T Gem: A Tool for Concurrency Specification and Verification
%R TR No. 83-251
%D November 1983
%I Computer Systems Lab, Stanford University,
%C Stanford, CA 94305
%K Concurrency, specification, verification, events, partial ordering

%A C. Lantuejoul
%T An Image Analyser
%B Languages and Architectures for Image Processing
%E M. J. B. Duff
%E S. Levialdi
%I Academic Press
%C New York, NY
%D 1981
%P 165-177

%A Christian Lantuejoul
%T Geodesic Segmentation
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 111-124

%A K. A. Lantz
%A K. D. Gradischnig
%A J. A. Feldman
%A R. F. Rashid
%T Rochester's Intelligent Gateway
%J Computer (USA)
%V 15
%N 10
%P 54-68
%O 59 REFS
Treatment PRACTICAL
%D 1982
%K computer networks communications computing distributed processing
computer communications networks
multiple machine multiple network distributed system
RIG Rochester's Intelligent Gateway
%X This article describes the design and implementation of a
multiple-machine, multiple-network distributed system called RIG, or
Rochester's Intelligent Gateway. This system predates most of the
systems that resemble it and provides more facilities in a
substantially more coherent fashion

%A K. A. Lantz
%A I. I. Nowicki
%T Virtual terminal services in workstation-based distributed systems
%J Proceedings of the Seventeenth Hawaii International Conference on
System Sciences 1984
%C Honolulu, HI, USA
%D 4-6 Jan. 1984
%P 196-205
%V 1
%O 55 REFS. Treatment PRACTICAL, 2 vol(ix+678+vi+426)
%I Univ. of Hawaii
%E J. P. Fry
%E Panko, R. R.
%E Sprague, R. H., Jr.
%E Weissman, L.
%E Shriver, B. D.
%E Cousins, T. R.
%E Walker, T. H
%K distributed processing interactive terminals
virtual terminal services distributed systems intelligent workstation
user interface protocols

%A Keith A. Lantz
%A Richard F. Rashid
%T Virtual Terminal Management in a Multiple Process Environment
%J Proceedings of the 7th Symposium on Operating Systems Principles
%D December 1979
%P 86-97
%K personal computers and their user interface

%A John L. Larson
%T Multitasking on the CRAY X-MP-2 Multiprocessor
%J Computer
%I IEEE
%V 17
%N 7
%D July 1984
%P 62-69
%K Hardware-software interface: effect on performance
%X A summary of the paper on Multitasking FORTRAN.  It uses subroutine
calls and arrays to START, WAIT, LOCK processes and signal (POST) EVENTS.
The paper does not mention deadlock or blocking.

%A R. E. Larson
%A others
%T Foundations of Spatial Dynamic Programming
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 572-578
%O decentralized control

%A Robert E. Larson
%A Edison Tse
%T Parallel Processing Algorithms for the Optimal Control of Nonlinear
Dynamic Systems
%J IEEE Transactions on Computers
%V C-22
%N 8
%D August 1973
%P 777-786
%K Dynamic programming, nonlinear estimation, optimal control,
parallel algorithms, parallel computers, parallel filtering,
stochastic control,
Special issue on parallel computation,

%l journal-article
%A J. R. Larus
%T A Comparison of Microcode, Assembly Code, and High-Level Languages on the VAX-11 and RISC I
%J Computer Architecture News
%V 10
%N 5
%M September
%D 1982
%P  10-15
%K risc reduced instruction set computer architecture restricted

%T Chrysalis Programmers Manual, Version 2.1
%A James Larus
%A Walter Milliken
%A John Goodhue
%A Randy Rettberg
%A Bill Mann
%A Mort Hoffman
%I BBN Laboratories
%D November 5, 1984
%K Chrysalis Functions, data structures, PNC functions, buffer package,
Chrysalis tools, VAX tools

%A Richard H. Lathrop
%T Parallelism in Manipulator Dynamics
%I MIT Artificial Intelligence Laboratory
%R AI-TR-754
%D December 1984
%K Robots, robotics, industrial robots, cybernetics, parallel processing,
pipeline processing, large scale integration

%A H. C. Lauer
%A R. M. Needham
%Z Xerox Corp., Palo Alto,CA, USA
%T On the duality of operating system structures
%E D. Lanciaux
%B Operating systems. theory and practice
%P 371-384
%D 2-4 Oct. 1978
%C Rocquencourt, France
%I North-Holland, Amsterdam, Netherlands
viii+398 pp. isbn 0 444 85300 6
%O 9 Refs.
treatment: applic, practical
%K operating systems
duality operating system structures designs process
synchronization machine architecture
%X Many operating system designs can be placed into one of two very rough
categories, depending upon how they implement and use the notions of
process and synchronization. One category the 'message-oriented system', is
characterized by a relatively small, static number of processes with an
explicit message system for communicating among them. The other category,
the 'procedure-oriented system', is characterized by a large, rapidly
changing number of small processes and a process synchronization mechanism
based on shared data. It is demonstrated that these two categories are
duals of each other and that a system which is constructed according to one
model has a direct counterpart in the other. The principal conclusion is
that neither model is inherently preferable, and the main consideration for
choosing between them is the nature of the machine architecture upon which
the system is being built, not the application which the system will
ultimately support.

%A Hugh C. Lauer
%T Observations on the Development of an Operating System
%J Proceedings of the 8th Symposium on Operating Systems Principles,
Operating Systems Review
%V 15
%N 5
%D December 1981
%P 30-36
%K Xerox PARC, operating system, system development, software engineering,
Pilot, personal computer, system classification
CR categories: 4.35, 4.30
%O systems
%X Although not about multiprocessors per se, it does contain reflections
on design, comparisons, and hints for future developers (Also see Lampson's
1983 SOSP paper).

%A P. E. Lauer
%A M. W. Shields
%T Interpreted COSY Programs: Programming and Verification
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 137-147
%K
%O Semantics of Parallel Programming

%A P. E. Lauer
%T Synchronization of concurrent processes without globality assumptions
%J SIGPLAN Notices
%V 16
%N 9
%D September 1981
%P 66-80

%A Peter E. Lauer
%T Computer System Dossier
%E Y. Paker
%E J.-P. Jerjus
%B Distributed Computing Systems (Synchronization, Control and Communication)
%I Academic Press
%D 1983
%P 109-147
%K COSY (COncurrent SYstems), BCS (Basic COSY)
%X An interesting way to characterize computer systems [local nodes]
for purposes of verifications, etc.  A good reading list as well as references
(separate).

%A S. Lauesen
%T Debugging Techniques
%J Software \(em Practice and Experience
%V 9
%N 1
%D Jan. 1979
%P 51-63

%A I. Lavallee
%T An Efficient Parallel Algorithm for Computing a Minimum Spanning Tree
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 259-262
%D 1984

%A Simon H. Lavington
%A Gareth Thomas
%A David B. G. Edwards
%T The MU5 Multicomputer Communication System
%J IEEE Transactions on Computers
%V C-26
%N 1
%D January 1977
%P 19-28
%K Communications, exchange, MU5, memory systems, multicomputer,
bus systems, time-multiplex, crossbar switch, V-store, storage transfer unit
Computer systems

%A K. Law
%T Systolic Systems for Finite Element Methods
%I Carnegie-Mellon University
%R Civil Engineering R-82-139
%D 1982

%A E. L. Lawler
%A J. M. Moore
%T A functional equation and its application to resource allocation and
sequencing problems
%J Management Science
%P 77-84
%D 1969

%A Eugene L. Lawler
%A Karl N. Levitt
%A James Turner
%T Module Clustering to Minimize Delay in Digital Networks
%J IEEE Transactions on Computers
%V C-18
%N 1
%D January 1969
%P 47-57
%K graph decomposition, logic partitioning, minimization of longest delay

%A P. R. Lawrence
%A J. W. Lorsch
%T Organization and Environment: Managing differentiation and integration
%I Division of Research, Harvard Business School, Harvard University
%D 1967

%A D. Lawrie
%A C. Vora
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T The Prime Memory System for Array Access
%P 81-90
%O Interconnections

%A D. Lawrie
%A A. Sameh
%T The Computation and Communication Complexity of a Parallel Banded
System Solver
%B Impact of New Computing Systems on Computational Mechanics
%E A. Noor
%I The American Society of Mechanical Engineers
%D 1983
%P 56-64

%A D. H. Lawrie
%T Address Segment Access Attributes and Primitive Memory Operations in Cedar
%R Cedar Document No. 20
%I Computer Science Department, University of Illinois
%K
cache memory, global memory, shared memory, private memory, virtual memory

%A D. H. Lawrie
%T Memory-processor connection networks
%R UIUCDCS-R-73-557
%I Dept. of Computer Science, University of Illinois
%D February 1973

%A D. H. Lawrie
%A T. Layman
%A D. Baer
%A J. M. Randall
%T Glypnir \(em A Programming Language for the ILLIAC IV
%J Communications of the ACM
%V 18
%N 3
%D Mar. 1975
%P 157-164

%A D. H. Lawrie
%A D. A. Padua
%T Analysis of Message Switching with Shuffle-Exchanges in Multiprocessors
%J Workshop on Interconnection Networks for Parallel and Distributed
Processing
%D April 1980
%I IEEE
%P 116-123
%X
Reproduced in the 1984 tutorial: "Interconnection Networks for Parallel
and Distributed Processing" by Wu and Feng.

%A D. H. Lawrie
%A A. H. Sameh
%T The Computation and Communication Complexity of a Parallel Banded Systems
Solver
%J ACM Transactions on Mathematical Software
%V 10
%N 2
%D June 1984
%P 185-195
%K Categories and subject descriptors: C.1.2 [Processor Architectures]:
Multiple Data Stream Architectures - multiple-instruction stream
Multiple-Data-Stream Architectures (MIMD); F.2.1 [Analysis of Algorithms
and Problem Complexity]: Numerical algorithms and problems - computations
on matrices,
General terms: algorithms, performance,
Additional keywords and phrases: parallel computers, multiprocessor computer,
alignment networks, positive definite systems

%A Duncan H. Lawrie
%T Access and alignment of data in an array processor
%J IEEE Trans. on Computers
%V C-24
%N 12
%D Dec. 1975
%P 1145-1155
%K Alignment network, array processor, array storage, conflict-free access,
data alignment, indexing network, omega network, parallel processing,
permutation network, shuffle-exchange network, storage mapping,
switching network
recommended, U Ill, N log N nets,
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."
Reproduced in the 1984 tutorial: "Interconnection Networks for parallel
and distributed processing" by Wu and Feng.

%A Duncan H. Lawrie
%A Chandra R. Vora
%T The Prime Memory System for Array Access
%J IEEE Transactions on Computers
%V C-31
%N 5
%D May 1982
%P 435-442
%K Array access, Burroughs Scientific Processor (BSP), conflict-free array
memory, memory system, parallel computer system, SIMD computer memory
Special issue on supersystems
%X
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%A C. Lawson
%T Basic Linear Algebra Subprograms for FORTRAN Usage
%J ACM Trans. Mathematical Software
%V 5
%N 3
%D September 1978
%P 308-323

%A T. Layman
%A D. Baer
%T Glypnir Reference Manual
%R 263, ILLIAC IV Project, University of Illinois
%D 1972

%A E. D. Lazowska
%T Queueing network models of disk I/O subsystems
%J 10th IMACS World Congress on System Simulation and Scientific
Computation
%C Montreal, Canada
%D 8-13 Aug. 1982
%P 269-270
%V 4
%O 5 REFS. Treatment THEORETICAL
%I IMACS. New Brunswick, NJ, USA, 5 vol. (x+464+viii+300+ix+414+viii+327+56)
IMACS, Int. Assoc. Math. Modelling, Int. Soc. Comput. Methods
Eng., et al
%K queueing theory input output programs
queueing network models input output programs disk I/O subsystems
memory technology computer system performance

%T Quantitive system performance. Computer system analysis using
queueing network models
%A E. D. Lazowska
%A J. Zahorjan
%A G. S. Graham
%A K. C. Sevcik
%D 1984
%O 149 Refs
%I Prentice-Hall. Englewood Cliffs, NJ, USA, xiii+417,
Std Book No.0 13 746975 6
%K systems analysis queueing theory
case studies computer system performance evaluation
technology queueing network models cost
design implementation sizing acquisition
operational approach software packages Fortran Programs algorithms

%A Edward D. Lazowska
%A Henry M. Levy
%A Guy T. Almes
%A Michael J. Fischer
%A Robert J. Fowler
%A Stephen C. Vestal
%Z Dept. of Computer Sci., Univ. of Washington, Seattle, WA, USA
%T The Architecture of the Eden System
%J Proceedings of the 8th Symposium on Operating Systems Principles,
Operating Systems Review
%V 15
%N 5
%D December 1981
%P 148-159
%C Pacific Grove,CA, USA
%O 28 Refs.
treatment: practical
%K computer networks operating systems
computer networks eden system integrated distributed computing environment
personal computing hardware architecture ethernet local area network
intel iapx 432 processor software architecture
programming methodology distributed systems
%X The university of washington's eden project is a five-year research
effort to design, build and use an integrated distributed computing
environment. The underlying philosophy of eden involves a fresh approach to
the tension between these two adjectives. In briefest form, eden attempts
to support both good personal computing and good multi-user integration by
combining a node machine/local network hardware base with a software
environment that encourages a high degree of sharing and cooperation among
its users. The hardware architecture of eden involves an ethernet local
area network interconnecting a number of node machines with bit-map
displays, based upon the intel iapx 432 processor. The software
architecture is object-based, allowing each user access to the information
and resources of the entire system through a simple interface. This paper
states the philosophy and goals of eden, describes the programming
methodology that has been chosen to support, and discusses the hardware and
kernel architecture of the system.

%T A Load-Sharing Banyan Network
%A C. T. Lea
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 317-324
%K Interconnection Networks

%A P. J. Leach
%A B. L. Stumpf
%A J. A. Hamilton
%A P. H. Levine
%T UIDS as Internal Names in a Distributed File System
%T Language Constructs and Support Systems for Distributed Computing
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 34-41

%A B. Leas
%T IIS Support
%I NASA GSFC
%D September 1983
%K MPP, Massively Parallel Processor

%A R. J. LeBlanc
%A A. B. Maccabe
%T The design of a programming language based on connectivity networks
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 532-541
%K
%O High Level Languages for Distributed Processing

%A Richard J. LeBlanc
%A C. Thomas Wilkes
%T Systems Programming with Objects and Actions
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Communication Programming, Clouds project, fault tolerance,
%P 132-139

%A Richard J. LeBlanc
%A Arnold D. Robbins
%T Event-Driven Monitoring of Distributed Programs
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Distributed Debugging & Monitoring, Pronet, ALSTEN, NETSLA, RADAR,
%P 515-522

%A T. J. LeBlanc
%T The design and performance of high level language primitives
for distributed programming
%I Computer Science Department, Wisconsin University
%D 1982
%R TR-492

%A Thomas J. LeBlanc
%A Robert P. Cook
%T An Analysis of Language Models for High-Performance Communication in
Local-Area Networks
%J Proceedings of the SIGPLAN '83 Symposium on Programming Language Issues
in Software Systems, SIGPLAN NOTICES
%C San Francisco, CA
%V 18
%N 6
%D June 1983
%P 65-72
%K StarMod (*MOD), message passing, remote procedure call (RPC),
%X Communication tested on a system using 8 PDP-11/23s with a 1 Mb/s link.

%A Thomas J. LeBlanc
%A Robert P. Cook
%T Broadcast Communication in StarMod
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 319-325
%O Local area network case studies

%A Thomas J. LeBlanc
%A Robert P. Cook
%T High-level broadcast communication for local area networks
%J IEEE Software
%V 2
%N 3
%P 40-48
%D MAY 1985
%X Even for LANs without broadcast-supporting hardware, this program offers
improvements of from 1.1 to 7.8 over point-to-point message
transmission--and that's the worst-case gain.

%A Thomas J. LeBlanc
%A Stuart A. Friedberg
%T Hierarchial Process Composition in Distributed Operating Systems
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Distributed Operating Systems, HPC, domains, distributed file systems,
protection, message passing,
%P 26-34

%A P. Leca
%A P. Roy
%T Simulation Numerique de la Turbulence sur un systeme Multi-Processor
%J First Int. College on Vector and Parallel Methods
%C Paris
%D 1983

%A M. Lecouffe
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Architecture of a Multiprocessor Using Data Flow at a Program Block
Level
%P 160-161
%O

%A M. P. Lecouffe
%T MAUD: A Dynamic Single-Assignment System
%J IEEE Comput. Digital Tech.
%V 2
%N 2
%D April 1979
%P 75-79

%A B. Lecussan
%T A High Level Language Computer System (HLLCS) in a Multitasking
Environment
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 8.16-8.29
%K LTR

%A C. C. Lee
%A T. Y. Feng
%T Sorting Algorithms for Parallel Processing
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 239
%K
%O algorithms and applications
%X Summary only.

%A C. Y. Lee
%T Intercommunicating Cells Basis for a Distributed Logic Computer
%J Proceedings AFIPS Fall Joint Computer Conference
%D December 1962
%P 130-136

%A C. Y. Lee
%A M. C. Paull
%T A Content-Addressable Distributed Logic Memory with Application to
Information Retrieval
%J IEEE Proceedings
%D June 1963
%P 924-932

%T Queueing Analysis of Global Locking Synchronization Schemes for
Multicopy Databases
%A Chin-Hwa Lee
%J IEEE Transactions on Computers
%V C-29
%N 5
%D May 1980
%P 371-384
%K Distributed database, global locking, multicopy database, modeling,
queueing analysis, simulation, synchronization schemes
%O Performance Analysis

%A David C. H. Lee
%A John Paul Shen
%T Easily-testable (N,K) shuffle/exchange networks
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 65-70
%K
CMU, C-testable
multistage networks

%A Dik Lun Lee
%T A Distributed Multiple-Response Resolver for Value-ordered Retrieval
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K data retrieval architectures
%C Boston, MA
%P 258-265

%T The Effectiveness of Automatic Restructuring on Nonnumerical Programs
%A Gyungho Lee
%A Clyde P. Kruskal
%A David J. Kuch
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 607-613
%K Expressing Parallelism

%A J. Lee
%T Three-Dimensional Finite Element Analysis of Layered Fiber-Reinforced
Composite Materials
%J Computers and Structures
%V 12
%P 319
%D 1980

%A Johnny K. F. Lee
%A Alan Jay Smith
%T Branch Prediction Strategies and Branch Target Buffer Designs
%J Computer
%V 17
%N 1
%D January 1984
%P 6-22
%K Architecture, pipelines,

%A K. Y. Lee
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T On the Rearrangeability of a (2logN-1) Stage Permutation Network
%P 221-228
%O Interconnection Networks

%A K. Y. Lee
%A W. Abu-Sufah
%A D. J. Kuck
%T On modeling performance degradation due to data movement in vector
machines
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 269-277
%K SIMD, loop decomposition, Parafrase, pipelining, synchronization,
%O vector machines

%A Kyungsook Yoon Lee
%T A new Benes network control algorithm
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 51-58
%K complete residue partition tree
%O interconnection

%T On the Rearrangeability of 2(log2N) - Stage Permutation Networks
%A Kyungsook Yoon Lee
%I IEEE Computer Society
%R ISSN 0018-9340
%D June 1985
%K Control algorithm, hardware redundancy, hardware requirement,
interconnection network, multistage networks, passable permutations,
permutation, rearrangeability.

%A Manjai Lee
%A Chuan-lin Wu
%T Performance Analysis of Circuit Switching Baseline Interconnection
Networks
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%D June 1984
%P 82-90
%K baseline network, simulation
%O interconnection networks
%X
Reproduced in the 1984 tutorial: \fIInterconnection Networks for parallel
and distributed processing\fP by Wu and Feng.

%A Manjai Lee
%A Eric Fiene
%A Chuan-lin Wu
%A Geoffrey Brown
%A Nader Bagherzadeh
%T Network Facility for a Reconfigurable Computer Architecture
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Multiprocessor Systems, Starnet, SIMD, MIMD,
%P 264-271

%A R. Lee
%T Performance Bounds in Parallel Processor Organizations
%E D. Kuck
%E D. Lawrie
%E A. Sameh
%B High Speed Computer and Algorithm Organization
%I Academic Press
%C New York
%P 453-455
%D 1977

%A R. B. Lee
%T Performance Bounds for Parallel Processors
%R SU-SEL 77-002, TR No. 125
%I Stanford University
%C Stanford, CA
%D Nov. 1976

%A R. B. Lee
%T Empirical Results on the Speed, Efficiency, Redundancy and Quality
of Parallel Computations
%J Proceedings of the International Conference on Parallel Processing
%D August 1980
%I IEEE
%P 91-100
%K Performance

%A Ruby Boi?? Lee
%T Performance Characterisation of Parallel Processor Organisations
%R PhD dissertation, Stanford University
%I UMI Research Press
%D 1980

%A Wong-Hua Lee
%A Miroslaw Malek
%T MOPAC a partitionable and reconfigurable multicomputer array
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 506-510
%K
U Texas, Mesh Organized Partitionable Array Computer, SIMD, MIMD, VLSI
multiprocessor systems

%A Y. H. Lee
%A K. G. Shin
%T Rollback Propagation Detection and Performance Evaluation of FTMP M \(em
A Fault-Tolerant Multiprocessor
%J Proceedings of 9th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 10
%N 3
%D April 1982
%P 171-180

%A Yann-Hang Lee
%A Kang G. Shin
%T Design and Evaluation of a Fault-Tolerant Multiprocessors Using Hardware
Recovery Blocks
%J IEEE Transactions on Computers
%V C-33
%N 2
%D February 1984
%P 113-124
%r CRL-TR-6-82
%i Univ. of Michigan, Computing Research Lab.
%d August 1982
%K Fault-tolerant multiprocessors, hardware/software recover blocks,
performance of rollback recovery mechanisms, rollback propagation,
Fault-tolerant design,
%X Funded by NASA LaRC

%T An Embedded Software Design Simulator for ADA Multitasking
%A David Lefkovitz
%A Roger Lee
%A Philip R. Nelson
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 202-209
%K Parallel Computation

%A Thomas Legendi
%T Implementation and Application of Cellular Processors
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 443-446
%D 1984
%K Image processing, signal processing, data flow,

%A M. Lehman
%T A Survey of Problems and Preliminary Results Concerning Parallel
Processing and Parallel Processors
%J IEEE Proceedings
%V 54
%N 12
%D December 1966
%P 1889-1901

%A Philip L. Lehman
%A S. Bing Yao
%T Efficient Locking for Concurrent Operations on B-Trees
%J ACM Transactions On Database Systems
%V 6
%N 4
%D December 1981
%P 650-670
%K Database, data structures, B-Tree, index organizations, concurrent
algorithms, concurrency controls, locking protocols, correctness,
consistency, multiway search trees
CR Categories: 3.73, 3.74, 4.32, 4.33, 4.34, 5.24

%A D. Lehmann
%T Knowledge, Common Knowledge and Related Puzzles
%J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing
%I ACM
%D August 1984

%A M. Leiberman
%T To multiprocess or not to multiprocess
%J Proc. 14th CPEUG
%C Boston, Mass.
%D October 1978
%K miscellaneous topics in multiprocessing
%X Considers the decision to run multiple processors as a multiprocessing
system or as independent systems.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%T A Multi-Microprocessor Based Intelligent Graphics Terminal
%A H. Leich
%A F. V. Levchanovsky
%A V. I. Prikhodko
%J Microprocess. and Microprogram. (Netherlands)
%V 12
%D Oct.-Nov. 1983
%P 175-180

%A H. Leich
%A F. V. Levchanovsky
%A V. I. Prikhodko
%T Realisation of a Multiprocessor System for the Control of an
Intelligent Graphics Terminal (IGT) (In German)
%J Nachrichtentech. Elektron. (Germany)
%V 34
%D 1984
%P 218-223

%T Tight Bound on the Complexity of Parallel Sorting
%A Tom Leighton
%I IEEE Computer Society
%R ISSN 0018-9340
%D April 1985
%K Area-time tradeoffs, circuit complexity, communication complexity,
fixed-connection network, information transfer, packet routing,
parallel computation, sorting, universal computer, very large scale
integration.

%A D. Leinbaugh
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T High Level Specification of Resource Sharing
%P 162-163
%O

%A Dennis W. Leinbaugh
%T Selectors: High-Level Resource Schedulers
%I IEEE Transactions on Software Engineering
%V SE-10
%N 6
%D November 1984
%K Deadlock, nonprocedural language, process synchronization,
protected resource, resource scheduling, resource sharing, starvation,
Theory

%T Fat-Trees: Universal Networks for Hardware-Efficient Supercomputing
%A Charles E. Leiserson
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 393-402
%K Interconnection Networks

%A G. Leitner
%T Exploiting Parallelism in Image Synthesis Applications
%J Graphics Interface '84
%E S. MacKay
%D 1984
%P 179-180

%T On the Power of the Augmented Data Manipulator Network
%A Mary Diane Palmer Leland
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 74-78
%K Parallel Architectures

%T Dense Trivalent Graphs for Processor Interconnection
%A Will E. Leland
%A Marvin H. Solomon
%J IEEE Transactions on Computers
%V C-31
%N 3
%D March 1982 
%P 219-222
%K Cubic graphs, interconnection topology, multicomputer, undirected
graphs
Interconnection networks

%A Gerard LeLann
%T Motivations, objectives and characterization of distributed systems
%E B. W. Lampson
%E M. Paul
%E H. J. Siegel
%B Distributed Systems \(em Architecture and Implementation (An Advanced Course)
%S Lecture Notes in Computer Science
%V 105
%I Spring-Verlag
%D 1981
%P 1-9

%A Gerard LeLann
%T Link Level
%E B. W. Lampson
%E M. Paul
%E H. J. Siegert
%B Distributed Systems \(em Architecture and Implementation (An Advanced Course)
%S Lecture Notes in Computer Science
%V 105
%I Spring-Verlag
%D 1981
%P 86-93

%A Gerard LeLann
%T Synchronization
%E B. W. Lampson
%E M. Paul
%E H. J. Siegert
%B Distributed Systems \(em Architecture and Implementation (An Advanced Course)
%S Lecture Notes in Computer Science
%V 105
%I Spring-Verlag
%D 1981
%P 266-283

%A Gerard LeLann
%T Error recovery
%E B. W. Lampson
%E M. Paul
%E H. J. Siegert
%B Distributed Systems \(em Architecture and Implementation (An Advanced Course)
%S Lecture Notes in Computer Science
%V 105
%I Spring-Verlag
%D 1981
%P 371-376

%A Wm. Leler
%T A small, high-speed dataflow processor
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 341-343
%K
U NC
data flow

%A W. J. M Lemmens
%T The PAP Preprocessor
%R EUT Report 82-E-130
%I Eindehoven University of Technology
%C Eindehoven, The Netherlands
%D October 1982
%K Pascal Plus realtime extensions, semaphores, vector processing
%X A precompiler for a language for concurrent processing on a multiprocessor
system.

%A A. J. Lemoine
%A L. Meier
%T A stochastic network model with applications to distributed
computing systems
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 694-698
%K
%O Performance Evaluation of Distributed Computer Systems

%T Performance of Cooperative Loosely Coupled Microprocessor Architectures
in an Interactive Data Base Task
%A John J. Lenahan
%A Fergus K. Fung
%J IEEE Transactions on Computers
%V C-29
%N 2
%D February 1980
%P 161-180
%O Joint special issue on microprocessors and microcomputers

%A Douglas B. Lenat
%T Beings: Knowledge as interacting experts
%J IJCAI-75
%P 126-133

%A Jacques Lenfant
%T Fast Random and Sequential Access to Dynamic Memories of Any Size
%J IEEE Transactions on Computers
%V C-26
%N 9
%D September 1977
%P 847-855
%K Dynamic memories, memory architecture, perfect shuffle,
permutation network, shift-register memories,
Dynamic memories

%A Jacques Lenfant
%T Parallel Permutations of Data: A Benes Network Control Algorithm for
Frequently Used Permutations
%J IEEE Transactions on Computers
%V C-27
%N 7
%D July 1978
%P 637-647
%K Alignment network, Benes network, Clos network, divide-and-conquer
technique, memory-processor connection, parallel computer, permutation
network, switching network
%X
Reproduced in the 1984 tutorial: "Interconnection Networks for parallel
and distributed processing" by Wu and Feng.

%T A Versatile Mechanism to Move Data in an Array Processor
%A Jacques Lenfant
%I IEEE Computer Society
%R ISSN 0018-9340
%D June 1985
%K APL language, array processor, Benes network, parallel computer,
perfect shuffle, signal processor, switching network.

%A C. Lengauer
%T A methodology for programming with concurrency
%I Toronto University
%D 1982
%R CSRG-142, Systems Research Group

%A Eric. J. Lerne
%T Data-Flow Architecture
%J IEEE Spectrum
%V 21
%N 4
%D April 1984
%P 57-62
%X Current introductory survey to data flow concepts.  Surveys the work by
Arvind, Utah, and Japanese (Amamiya).

%A D.C. Leslie
%T Running Time Comparisons for 643 Large Eddy Simulator
%I Queen Mary College
%O Nuclear Engineering

%A V. Lesser
%A D. Corkill
%A J. Pavlin
%A L. Lefkowitz
%A E. Hudlicka
%A R. Brooks
%A S. Reed
%T A High-Level simulation Testbed for cooperative distributed
problem solving
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 341-350
%i Comp. and Info. Sci. Dept., University of Massachusetts, Amherst
%d 1981
%r COINS Tech rept. 81-16
%K
%O Distributed Computing Testbeds

%A V. R. Lesser
%T A Dynamically Reconfigurable Multiple Microprocessor
%J Proc. Int. Workshop on Computer Architecture
%C Grenoble
%P 1-16
%D 1973

%A V. R. Lesser
%A others
%T PCL-A Process Oriented Job Control Language
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 315-329
%O Network Language and System Software

%A Victor R. Lesser
%T An Introduction to the Direct Emulation of Control Structures by a
Parallel Microcomputer
%J IEEE Transactions On Computers
%V C-20
%N 7
%D July 1971
%P 751-764
%K Dynamic compilation, emulation, microprogramming, parallelism,
variable control structures,
Special issue on microprogramming

%A Victor R. Lesser
%A Lee D. Erman
%T An Experiment in Distributed Interpretation
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 553-571
%O distributed systems: simulation and modeling
%X A similar paper appeared in IEEE TOC, v C-29, #12, Dec. 1980, pp. 1144-1163.

%A Victor R. Lesser
%A Lee D. Erman
%Z Dept. of Computer and Information Sci., Univ. of Massachusetts, Amherst,
MA, USA
%T Distributed Interpretation: A Model and Experiment
%J IEEE Transactions on Computers
%V C-29
%N 12
%D December 1980
%P 1144-1162
%K Cooperative problem solving, distributed artificial intelligence,
distributed interpretation, distributed processing, knowledge-based
interpretation system
Special issue on distributed processing systems
uncertainty errors control data
network problem solving process
%O 23 Refs.
treatment: practical experimental
%X The range of application areas to which distributed processing has been
applied effectively is limited. In order to extend this range, new models
for organizing distributed systems must be developed. The authors present a
model in which the distributed system is able to function effectively even
though processing nodes have inconsistent and incomplete views of the
databases necessary for their computations. This model differs from
conventional approaches in its emphasis on dealing with distribution-caused
uncertainty and errors in control data, and algorithm as an integral part
of the network problem solving process. They show how this model can be
applied to the problem of distributed interpretation. Experimental results
with an actual interpretation system support these ideas.
A similar paper appeared in the 1st Intl. Conf. on Dist. Computing
Systems, Oct. 1979, pp. 553-571.

%A Victor R. Lesser
%A Daniel D. Corkill
%T Functionally accurate, cooperative distributed systems
%J IEEE Transactions on Systems, Man, and Cybernetics
%V SMC-11
%N 1
%P 81-96
%D January 1981

%A Victor R. Lesser
%A Daniel D. Corkill
%T The distributed vehicle monitoring testbed:
A tool for investigating distributed problem solving networks
%J To appear in AI Magazine
%D August 1983

%A Bruce P. Lester
%T Coherent flow of information in parallel systems
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 381-383
%K
models

%T Analysis of Firing Rates in Petri Nets Using Linear Algebra
%A Bruce P. Lester
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 217-224
%K Parallel Computation

%A M. Leszak
%A H. Breitwieser
%T A Fault-Tolerant Scheme for distributed transaction commitment
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 64-70
%K
%O Fault Tolerance Methods

%J Proceedings of 3rd Annual Symposium on Computer Architecture
%D 1976
%T A Computer Simulation Facility for Packet Communication Architecture
%A C. Leung
%A D. Misunas
%A A. Neezwid
%A J. Dennis
%I MIT
%P 58-63
%K Performance Evaluation and Modeling

%A C. K. C. Leung
%T Formal Properties of Well-Formed Data Flow Schemas
%R TR-66
%I Laboratory for Computer Science, MIT
%C Cambridge, MA
%D June 1975

%A C. K. C. Leung
%T ADL: An Architecture Description Language for Packet Communication
Systems
%J Proceedings of the Fourth International Symposium on Computer Hardware
Description Languages
%D October 1979
%P 6-13

%A C. K. C. Leung
%T Design of a Fault-Tolerant Packet Communication Computer Architecture
%J The 10th International Symposium on Fault-Tolerant Computing
%D October 1980
%P 328-335

%A C. K. C. Leung
%T Fault Tolerance in Packet Communication Computer Architecture
%R TR-250
%I Laboratory for Computer Science, MIT
%C Cambridge, MA
%D September 1980

%T On Minimum Cost Recovery from System Deadlock
%A Joseph Y.-T. Leung
%A Edmund K. Lai
%J IEEE Transactions on Computers
%V C-28
%N 9
%D September 1979
%P 671-677
%K Approximation algorithms, average-case performance,
minimum cost deadlock recovery, NP-complete problems, system deadlock,
time complexity, worst case performance,
Performance analysis

%A M. Leuze
%A L. Saxton
%T On Minimum Parallel Computing Times for Gaussian Elimination
%J Congressus Numerantium
%V 40
%P 169-179
%D 1983

%A M. Leuze
%T Parallel Triangularization of Substructured Finite Element Problems
%I NASA Langley Research Center
%R ICASE Report No. 84-47
%D 1984

%A M. Leuze
%T Parallel Triangularization of Symmetric Sparse Matrices by Gaussian
Elimination
%X To appear
%D 1984

%A Gavriela Freund Lev
%A Nicholas Pippenger
%A Leslie G. Valiant
%T A Fast Parallel Algorithm for Routing in Permutation Networks
%J IEEE Transactions on Computers
%V C-30
%N 2
%D February 1981
%P 93-100
%K Complexity, interconnection networks, parallel processing, permutation
networks, randomization, routing algorithm
%O Parallel computation

%A Hanoch Lev-Ari
%T Modular Computing Networks: A New Methodology for Analysis and Design
of Parallel Algorithms/Architectures
%R ISI Report 29
%I Integrated Systems, Inc.
%C Palo Alto, CA
%D December 1983
%K Petri nets,
%X Another notation for describing parallelism. Also available thru DTIC.

%A S. Leventis
%A G. Papadopoulos
%T Further simulation results on the performance of a new double-loop
computer network
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 467-472
%K
%O Communication Networks

%A J. Levesque
%A B. Brode
%T Efficient Fortran Techniques for Vector Processors
%I Pacific-Sierra Research Corp.
%D 1981
%K Cray, cyber
%X Seminar Workbook.

%A S. Levialdi
%A A. Maggiolo-Schettini
%A M. Napoli
%A G. Tortora
%A G. Uccella
%T On the Design and Implementation of PIXAL, a Language for Image Processing
%B Languages and Architectures for Image Processing
%E M. J. B. Duff
%E S. Levialdi
%I Academic Press
%C New York, NY
%D 1981
%P 89-98

%A S. Levialdi
%A A. Maggiolo-Schettini
%A M. Napoli
%A G. Uccella
%T PIXAL: a High Level Language for Image Processing
%E Morio Onoe
%E Kendall Preston, Jr.
%E Azriel Rosenfeld
%B Real-Time/Parallel Computing: Image Analysis
%I Plenum Press
%C New York, NY
%D 1981
%P 131-143
%X Includes a BNF of the PIXAL parallel language.

%T Suitability of a Data Flow Architecture for Problems Involving Simple
Operations on Large Arrays
%A E. Levin
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 518-520
%K Data Flow

%A K. Dan Levin
%T Adaptive Structuring of Distributed Databases
%J National Computer Conference \(em Proceedings
%I AFIPS
%V 51
%D 1982
%P 691-696

%A Martin D. Levine
%A Ahmed Nazif
%T An Experimental Rule-Based System for Testing Low Level Segmentation
Strategies
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 149-160

%A R. Levine
%T Supercomputers
%J Scientific American
%V 246
%D January 1982
%P 118-135

%A Adam Levinthal
%A Thomas Porter
%T Chap \(em A SIMD Graphics Processor
%J Computer Graphics, Proc. 1984 SIGRAPH Conference
%V 18
%N 3
%D July 1984
%P 77-82
%K CR Categories and Subject Descriptors: B.2.1 [Arithmetic and logic
 - parallel; B.3.2. [Memory structures]
design styles - interleaved memories; C.1.2 [processor architectures]:
Multiple data stream architectures - SIMD.  I.3.1 [computer graphics]:
hardware architectures - raster display devices. I.4.0 [Image processing]:
general - image displays.
General terms: Design
Additional Key Words and Phrases: digital film printers, composing,
computer graphics, parallel processing, SIMD architecture, tesselation.

%A S. P. Levitan
%A C. C. Foster
%T Finding an Extremum in a Network
%J Proceedings of 9th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 10
%N 3
%D April 1982
%P 321-325

%A S. P. Levitan
%T Algorithms for a Broadcast Protocol Multiprocessor
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 666-672
%K
%O Communication Protocol Modeling

%T Evaluation Criteria for Communication Structures in Parallel
Architectures
%A Steven P. Levitan
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 147-154
%K Operating System Problems

%A A. Lew
%T Optimal resource allocation and scheduling among parallel processes
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 187-202
%K
%O Scheduling

%A G. R. Lewis
%A J. S. Henry
%A B. P. McCune
%T The BTI 8000 \(em Homogeneous, General Purpose Multiprocessor
%J Proceedings AFIPS National Computer Conference
%D 1979
%P 513-528

%A C. -M. Li
%A M. T. Liu
%T DISLANG: A Distributed Programming Language/System
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 162-172
%K
%O Software Engineering for Distributed Systems

%A Guo-jie Li
%A Benjamin W. Wah
%T Computational efficiency of parallel approximate branch-and-bound
algorithms
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 473-480
%K anomalies, approximation, branch-and-bound algorithms,
domainance criteria, heuristic search, lower-bound test, NP-hard problems,
parallel processing,
%O combinatorial algorithms

%T MANIP-2: A Multicomputer Architecture for Evaluating Logic Programs
%A Guojie Li
%A Benjamin W. Wah
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 123-130
%K Logic Programming
AND/OR tree, AND parallelism, heuristic search, logic programming,
OR parallelism, pruning, success probability,

%A H. F. Li
%A C. C. Lau
%T A Distributed Multiprocessor Traffic Control System
%J Computer Software and Applications Conference (COMPSAC78)
%I IEEE
%D November 1978
%P 259-264
%O distributed processing

%A Hungwen Li
%T A VLSI modular architecture methodology for realtime signal processing
applications
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 319-324
%K
FFT, database machine/signal processing

%T Structured Process: A New Language Attribute for Better Interaction of
Parallel Architecture and Algorithm
%A Hungwen Li
%A Ching-Chy Wang
%A Mark Lavin
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 247-254
%r 11124 (#49950)
%Z IBM T. J. Watson Research Center
%c Yorktown Heights, NY
%d April 1985
%K Languages for Parallel Processing
%X Examples based on C using a process identification feature (PID).

%A Kuo-Cheng Li
%A Herb Schwetman
%T Vector C - A Vector Processing Language
%I Computer Science Dept., Purdue University
%C West Lafayette, IN 47907
%D May 1984
%K Cyber 205, vector processing, Language design, Vector C
%X A version of this paper may be published in Software - Practice
and Experience

%A Liang Li
%A Rao Cherukuri
%A R. Bergman
%T Performance characteristics of token bus networks
%B Local Networks. Strategy and Systems. Localnet '83 (Europe)
%C London, England
%I Online Publications, Northwood Hills, Middx., USA, p: x+535
%D 8-10 March 1983
%P 261-275
%O 11 Refs, Treatment PRACTICAL
%K computer networks protocols
token bus networks IEEE 802 local area network standards committee protocol
real time process control environment
maximum queuing delay bounds performance trade offs cable length packet sizes
round robin transmission discipline interconnected subnets
%X The IEEE 802 local area network standards committee has proposed a
token passing protocol on a bus network as one of its local network
standards. Because token passing can guarantee a maximum wait time to
each network station, it is also being considered as a standard
protocol in the real-time process control environment. To provide a
network implementor with guidelines and recommendations for
configuring networks, this paper examines the network requirements of
both real-time and non-real time applications, and studies the
behavior of a token bus network under different configurations and
constraints. The maximum queuing delay bounds, the performance trade-offs
of baseband vs. broadband, the effects of number of connecting
stations, cable length, packet sizes, and round-robin transmission
discipline are evaluated. A comparative study of an interconnected
subnets approach versus a single large local network is also
presented

%A Pey-yun Peggy Li
%A Lennart Johnsson
%T The Tree Machine: an evaluation of strategies for reducing program loading
time
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 202-205
%K
Caltech, Browning machine,
tree structured systems

%A Zhiyuan Li
%A Walid Abu-sufah
%T A Technique for Reducing Synchronization Overhead in Large Scale
Multiprocessors
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K Multiprocessor Issues, locking,
%C Boston, MA
%P 284-291

%A Richard C. Lian
%A Ming T. Liu
%T A concurrency control algorithm for nested atomic actions
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 255-259
%K transaction processing,
%O databases

%A A. Lichnewsky
%T Sur la Resolution de Systems Lineares Issus de la Method des Elements
Finis Par une Multiprocessors
%I INRIA
%R No. 119
%D 1982

%A A. Lichnewsky
%T Some Vector and Parallel Implementations for Linear Systems arising in
PDE Problems
%J SIAM Conference on Parallel Processing for Scientific Computing
%C Norfolk, VA
%D November 1983

%A H. Liddell
%T The Distributed Array Processor
%J IMANA Newsletter
%D April 1979

%A H. Liddell
%T The ICL Distributed Array Processor
%J Institute of Physics Newsletter
%D October 1979

%A H. Liddell
%T Progress of the DAP project
%J IMANA Newsletter
%D October 1979

%A H. Liddell
%T ICL Distributed Array Processor
%J IOP Computational Physics Group Newsletter
%D October 1979

%A H. Liddell
%T DAP
%J Institute of Physics Newsletter
%D September 1980

%A H. Liddell
%T DAP \(em Its Uses and Applications
%I ICL CUA
%D September 1981

%A H. M. Liddell
%T Performance measurements of the DAP on actual problems
%I IEEE
%D March 1982

%T Systolic Processing for Dynamic Programming Problems
%A Guo-Jie Lie
%A Benjamin W. Wah
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 434-441
%K Parallel Programming
AND/OR graph, dynamic programming, matrix multiplication, monadic,
multistaged graph, nonserial, parallel processing, polyadic, serial,
systolic arrays

%A Burt H. Liebowitz
%T Multiple Processor Minicomputer Systems - Part 2: Implementation
%J Computer Design
%D November 1978
%P 121-131
%X
Reprinted in "Tutorial: Distributed Processing," IEEE,
compiled by Burt H. Liebowitz and John H. Carson, 1981, 3rd edition.

%A Burt H. Liebowitz
%T High Reliable Multiple Processor Systems
%J Proc. National Engineering Consortium
%D October 1979
%X
Reprinted in "Tutorial: Distributed Processing," IEEE,
compiled by Burt H. Liebowitz and John H. Carson, 1981, 3rd edition.

%A Burt H. Liebowitz
%A John H. Carson
%T Tutorial: Distributed processing, 3nd edition
%I IEEE
%N Catalog No. EHO 176-8
%D 1981
%X See selected papers listed in the annotation fields of this bibliography.
The selection of papers ranged from good technical to poor low-level
(e.g. what is a micro?).

%A D. Liles
%A J. Mahaffy
%A P. Giguere
%T An Approach to Fluid Mechanics Calculations on Serial and Parallel
Computer Architectures
%E S. Parter
%B Large Scale Scientific Computation
%I Academic Press
%C Orlando, FL
%D 1984
%P 141-160

%A William C. Liles
%A James C. Demmel
%T Solving Large Positive Definite Hermitian Linear Systems Utilizing
Parallel/Pipeline Processors
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 261-262
%K
%O Arithmetic processors

%A William C. Liles
%A James W. Demmel
%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T A Parallel/Pipeline Multiprocessor Architecture for Solving
Systems of Linear Equations
%P 320
%O Pipelining

%A J. Edward Lilienkamp
%A Duncan H. Lawrie
%A Pen-Chung Yew
%T A fault tolerant interconnection network using error correcting codes
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 123-125
%K
U. Ill
%O Network diagnosis and fault tolerance
%X
Reproduced in the 1984 tutorial: \fIInterconnection Network for parallel
and distributed processing\fP by Wu and Feng.

%A Willie Y-P. Lim
%T A test strategy for packet switching networks
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 96-98
%K
MIT
%O Network diagnosis and fault tolerance
%X
Reproduced in the 1984 tutorial: \fIInterconnection Network for parallel
and distributed processing\fP by Wu and Feng.

%A Isabel Gouveia Lima
%A Richard Hopkins
%A Lindsay Marshsall
%A David Mundy
%A Philip Treleaven
%T Decentralized Control Flow \(em BASed on unIX
%J Proceedings of the SIGPLAN '83 Symposium on Programming Language Issues
in Software Systems, SIGPLAN NOTICES
%C San Francisco, CA
%V 18
%N 6
%D June 1983
%P 192-201
%K U Newcastle, BASIX, Newcastle connection, multi-computer system

%A H. S. Lin
%A M. T. Liu
%T Priority Driven Communication Protocol Design
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 371-378
%K
%O Mutual Exclusion and Synchronization

%A J. J. Lin
%A M. T. Liu
%T Software Design of a local data network for very large
distributed databases
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 86-91
%K
%O Database Management systems

%A K. S. Lin
%A Y. S. Shen
%A D. R. Smith
%T Parallel Processing in a Cellular Logic Array
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 126
%K
%O Associative/parallel processors
%X Summary only.

%T Tradeoffs in Mapping Algorithms to Array Processors
%A Tsair-Chin Lin
%A Dan I. Moldovan
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 719-726
%K Problem Mapping Techniques

%A W. T. K. Lin
%A J. Nolte
%T Communication Delay and Two Phase Locking
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 502-507
%K
%O Deadlock Detection

%A Woei Lin
%A Chuan-lin Wu
%T Design of a 2x2 Fault-Tolerant Switching Element
%J Proceedings of 9th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 10
%N 3
%D April 1982
%P 181-189
%X
Reproduced in the 1984 tutorial: \fIInterconnection Networks for parallel
and distributed processing\fP by Wu and Feng.

%A Woei Lin
%A Chuan-lin Wu
%T Configuring computation tree topologies on a distributed computing system
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 114-116
%K
U Texas
network interconnection capabilities
%X
Reproduced in the 1984 tutorial: \fIInterconnection Network for parallel
and distributed processing\fP by Wu and Feng.

%T Design of Configuration Algorithms of Commonly-used Topologies for a
Multiprocessor-STAR
%A Woei Lin
%A Chuan-Lin Wu
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 734-741
%K Problem Mapping Techniques

%A Neil R. Lincoln
%T Technology and Design Tradeoffs in the Creation of a Modern
Supercomputer
%J IEEE Transactions on Computers
%V C-31
%N 5
%D May 1982
%P 349-362
%K Architecture, parallelism, pipeline, supercomputer, technology,
vector processor,
recommended, Special issue on supersystems
%X Architectural survey of the STAR-100, Cyber 203/205 line
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984, pp. 32-45.

%A Neil R. Lincoln
%T Supercomputers = Colossal Computations + Enormous Expectations + Renowned
Risk
%J Computer
%I IEEE
%V 16
%N 5
%D May 1983
%P 38-47
%K CDC Star-100, Cyber-203, Cyber-205,
%X Another paper which is a retrospective (rather apologetic) on the
CDC Star-100, Cyber 203/205 development.

%A Goran Lindh
%A Ivan Kruzela
%A Don Speck
%T A Relational Algebra Machine
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 8.30-8.36

%A B. Lindsay
%T Object Naming and Catalog Management for a Distributed Database
Management System
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 31-39
%K
%O

%A Bruce G. Lindsay
%A Laura M. Haas
%A C. Mohan
%A Paul F. Wilms
%A Robert A. Yost
%T Computation & Communication on R*: A Distributed Database Manager
(Extended abstract)
%J Proceedings of the 9th Symposium on Operating Systems Principles,
Operating Systems Review
%V 17
%N 5
%D October 1983
%P 1-2
%O communication

%A B. Lindt
%A T. Agerwala
%T Communication Issues in the Design and Analysis of Parallel Algorithms
%J IEEE Transactions in Software Engineering
%V SE-7
%P 174-188
%D 1984

%A Harold A. Linstone
%A Murray Turoff
%T The Delphi Method: Techniques and Applications
%I Addison-Wesley Publishing Company
%D 1975

%A P. R. Lintz
%T Mixed Fourier Walsh Transforms with Applications to Seismic Array
Processing
%J Proc. Int'l Symp. Computer Aided Seismic Analysis and Discrimination
%D 1977
%P 101-118

%A E. Lipitakis
%T Solving Elliptic Boundary Value Problems on Parallel Processors by
Approximate Inverse Matrix Semi-Direct Methods Based on the Multiple
Explicit Jacobi Iteration
%J Computer Math.
%V 10
%P 171-184
%D 1984

%A G. Lipovski
%A A Tripathi
%T A reconfigurable Varistructure array processor
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 165-
%K
%O Architecture

%A G. Lipovski
%A K. Doty
%T Developments and Directions in Computer Architecture
%J Computer
%V 11
%N 8
%D August 1978
%P 54-67
%X A dated survey.

%A G. J. Lipovski
%T The Architecture of a Large, Distributed Logic Associative Memory
%I National Technical Information Service
%%R AD692195
%D July 1969

%A G. J. Lipovski
%T The Architecture of a Large Associative Processor
%J Proc. AFIPS 1970 Spring Joint Computer Conference
%V 36
%I AFIPS Press
%C Arlington, VA
%D May 1970
%P 385-396

%A G. J. Lipovski
%A S. Y. Su
%A J. K. Watson
%T A self-managing secondary memory system
%J Proc. 3rd Ann. Symp. on Computer Architecture
%D January 1976

%A G. J. Lipovski
%A A. Tripathi
%T A reconfigurable varistructure array processor
%J Proc. 1977 Int. Conf. on Parallel Processing
%D August 1977
%P 165-174
%K Required, U Texas, TRAC

%A G. J. Lipovski
%T Architectural features of CASSM:
A Context Addressed Segment Sequential Memory
%J Proc. 5th Ann. Symp. on Computer Architecture
%D April 1978
%P 31-38

%A G. J. Lipovski
%T On Some Parallel Programming Techniques
%J Computer Software and Applications Conference (COMPSAC78)
%I IEEE
%D November 1978
%P 7781-789
%O software techniques for reconfigurable and dynamic architecture

%A G. J. Lipovski
%T The Architecture of the Banyan Switch for TRAC
%R Tech. Report TRAC-7
%I Dept. CS and EE, Univ. of Texas
%D January 1979

%T B-LOG: A Branch and Bound Methodology for the Parallel Execution of
Logic Programs
%A G. J. Lipovski
%A M. V. Hermenegildo
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 560-567
%K Logic Programming/Production Systems

%A G. Jack Lipovski
%T On Virtual Memories and Micronetworks
%J Proceedings of 4th Annual Symposium on Computer Architecture
%D 1977
%K U Texas
%P 125-134
%K Distributed Systems

%A G. Jack Lipovski
%T On a Varistructured Array of Microprocessors
%J IEEE Transactions on Computers
%V C-26
%N 2
%D February 1977
%P 125-138
%K computer architecture, microprocessor array, reconfigurable computer,
SIMD computer, supercomputer, varistructure,
Architecture, special issue on parallel processor and processing

%A G. Jack Lipovski
%A Ambuj Goyal
%A Miroslaw Malek
%T Lookahead Networks
%J National Computer Conference \(em Proceedings
%I AFIPS
%V 51
%D 1982
%P 153-165

%A J. S. Liptay
%T Structural Aspects of the Systems/360 Model 85-11: The cache
%J IBM Systems Journal
%V 7
%N 1
%D 1968
%P 15-21

%A R. Lipton
%A F. Sayward
%T Response time of parallel programs
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 234-

%A R. J. Lipton
%A L. Snyder
%A Y. Zalcstein
%T Evaluation Criteria for Process Synchronization
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 245-250
%K
%O performance evaluation

%A B. Liskov
%A M. Herlihy
%T Issues in process and communication structure for distributed
programs
%J Proceedings Third Symposium on Reliability in Distributed Software
and Database Systems
%C Clearwater Beach, FL, USA
%P 123-132
%O 20 REFS. Treatment PRACTICAL
%I IEEE Comput. Soc. Press, ISBN: 0-8186-0501-4
Silver Spring, MD, USA, p: viii+195
%D 17-19 Oct. 1983
%K distributed processing programming software engineering
distributed programs structuring distributed programs
Argus programming language process structure communication
%X The authors examine one proposal for structuring distributed programs
embedded in the Argus programming language and system. They discuss
decisions made in the two major areas of process structure and
communication, and compare the chosen structures with alternatives
They emphasize the rationale for decisions and the issues that must
be considered in making such decisions

%A Barbara Liskov
%T Primitives for Distributed Computing
%J Proceedings of the 7th Symposium on Operating Systems Principles
%D December 1979
%P 33-42
%Z Lab. for Computer Sci., MIT, Cambridge, MA, USA
%C Pacific Grove,CA, USA
%I ACM, New York, USA
ix+163 pp. isbn 0 89791 009 5
%O 22 Refs.
treatment: practical
%K distributed processing data structures
distributed computing primitives distributed programs modularity
communication data structures
%X Distributed programs that run on nodes of a network are now
technologically feasible, and are well-suited to the needs of
organizations. However, knowledge about how to construct such programs is
limited. This paper discusses primitives that support the construction of
distributed programs. Attention is focused on primitives in two major
areas: modularity and communication. The issues underlying the selection of
the primitives are discussed, especially the issue of providing robust
behavior, and various candidates are analyzed. The primitives will
ultimately be provided as part of a programming language that will be used
to experiment with construction of distributed programs.

%A Barbara Liskov
%A Robert Scheifler
%T Guardians and Actions: Linguistic Support for Robust, Distributed
Programs
%J ACM Transactions on Programming Languages and Systems
%V 5
%N 3
%D July 1983
%P 381-404
%K Languages, Reliability, Atomicity, nested atomic actions, remote
procedure call
Categories: C.2.4 [Computer-Communication Networks]:
distributed systems - distributed applications, distributed databases;
D.1.3 [Programming Techniques] concurrent programming;
D.3.3 [Programming Languages]: Language Constructs - abstract data types,
concurrent programming structures, modules, packages;
D.4.5 [Operating Systems]: reliability - checkpoint/restart; fault-tolerance;
H.2.4 [Database Management]: systems - distributed systems;
transaction processing

%A A. M. Lister
%A P. J. Sayer
%T Hierarchical monitors
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 43-49
%K
%O Operating systems

%A Yury Litvin
%T Top-down data flow programming
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 252-254
%K
parallel programming and languages

%A A.-C. Liu
%A S.-K. Chang
%T Site Selection in Distributed Query Processing
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 7-12
%K
%O Database systems

%A C. L. Liu
%A J. W. Layland
%T Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
%J Journal of the ACM
%V 20
%N 1
%D January 1973
%P 46-61

%A C. S. Liu
%A L. W. Nolte
%T Performance Evaluation of Array Processors for Detecting Gaussian Acoustic
Signals
%J Conf. Record, IEEE Int'l Conf. Acoustics, Speech and Signal Processing
%D 1977
%P 691-694

%A J. Liu
%T The Solution of Mesh Equations on a Parallel Computer
%I Waterloo University
%R Dept. of Comp. Sci. CS-78-19
%D 1978

%A J. Liu
%A Y. Zhang
%T Parallel Processing for MIMD Systems
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 876-898
%K
%O Applications of Parallelism

%A J. W. S. Liu
%A A. T. Yang
%T Optimal Scheduling of Independent Tasks on Heterogeneous Computing
Systems
%J Proceedings ACM Natl. Conference
%V 1
%I ACM
%C N. Y.
%D 1974
%P 38-45

%A J. W. S. Liu
%A C. L. Liu
%A E. Gelenbe
%A R. Mahl
%T Performance analysis of heterogeneous multiprocessor computer systems
%J Proc. Conf. Computer Architecture and Networks
%C Rocquencourt, France
%D August 1974
%K performance
%X Discusses criteria for comparing the performance of different multiprocessor
systems and provides information on resource utilization in a multiprocessor
environment.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A J. W. S. Liu
%A C. L. Liu
%T Performance analysis of multiprocessor systems
containing functionally dedicated processors
%J Acta Informatica
%V 10
%N 1
%D 1978
%K scheduling
%X Presents models to describe the scheduling of multiprocessing systems having
specialized processors.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A J. W. S. Liu
%A I. Suwa
%A R. Stepp
%A S. M. Hinojosa
%A T. Utsuqi
%T A fail-safe distributed local network for data communication
%J Proc. Nat. Computer Conf.
%I AFIPS Press
%C Montvale, New Jersey
%D 1979
%P 917-925

%A K. Y. Liu
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T A Pipelined Digital Architecture for Computing a Multi-dimensional
Convolution
%P 109-111
%O Numerical Algorithms

%A M Liu
%A R. Pardo
%A G. Babic
%T A performance study of distributed control loop networks
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 137
%K
%O Performance evaluation

%A M. T. Liu
%T Distributed loop computer networks
%B Advances in Computers
%V 17
%I Academic Press
%D 1978
%P 163-221

%A M. T. Liu
%A others
%T System Design of the Distributed Double-Loop Computer Network
(DDLCN)
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 95-105
%O Network Design for Distributed Systems

%A M. T. Liu
%A D. M. Rouse
%E I. N. Dallas
%E E. B. Spratt
%T A study of ring networks
%B Ring Technology Local Area Networks. Proceedings of the IFIP WG 6.4.
%C University of Kent Workshop, Canterbury, England
%I North-Holland, Amsterdam, Netherlands,ix+269
ISBN: 0-444-86852-6.
%P 1-39
%O 47 Refs
Treatment GENERAL OR REVIEW.
%D 28-30 Sept. 1983
%K computer networks data communication systems maintenance engineering
protocols reliability
local area network topology LAN distributed computing system
distributed loop computer network distributed double loop computer network
ring networks Newhall ring
Pierce ring Hafner ring Burroughs ring Prime's Ringnet
IBM Zurich ring DCS Cambridge ring DLCN/DDLCN
TORNET data rates transmission media channel access protocols
ring synchronization ring supervision network applications reliability
maintenance ring access protocols CSMA CD bus access protocol.
%X The authors present a study of ten representative ring networks
developed during the past 14 years by research laboratories, industry
and universities. The networks selected for study are the Newhall
ring, the Pierce ring, the Hafner ring, the Burroughs ring, Prime's
Ringnet, the IBM Zurich ring, DCS, the Cambridge ring, DLCN/DDLCN,
and TORNET. The study considers data rates, transmission media,
topologies, channel access protocols, ring synchronization, ring
supervision, and network applications. Also discussed are reliability
and maintenance issues. Finally, a performance evaluation is made
between the three basic ring access protocols and a CSMA/CD bus
access protocol.

%A S. F. Liu
%A R. W. Parker
%A K. K. Okikawa
%T A Real-Time distributed computer network experiment for BMD terminal
defense
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 474
%K
%O Distributed Systems-Practices and Experiences

%T Shift Arithmetic on a Token Ring Network
%A Miron Livny
%A Udi Manber
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 301-304
%K Numeric Processing

%A G. R. Lloyd
%A R. E. Merwin
%T Evaluation of Performance of Parallel Processors in a Real-time
Environment
%J Proc. NCC Conf.
%P 101-108
%I AFIPS Press
%D 1973

%A P. Lloyd
%A J. Crowcroft
%T Routing issues in internetworking local area networks
%J Networks 84. Proceedings of the European Computer Communications
Conference
%C London, England Pinner
%P 217-230
%O 19 REFS
Treatment PRACTICAL
%D 3-5 July 1984
%I Online Publications Middx., England, p: xvi+747
ISBN: 0-86353-010-9
%K local area networks
multinetwork configuration internetworking local area networks
University College London routing ISO model
%X The multi-network configuration at University College London is
described and the network interconnection methods distinguished. The
fundamental activities involved in routing are identified. These are
examined for local area networks in both local and internetwork
environments. Conflicting requirements suggest a separation of
responsibilities. Aspects of logical routing at UCL are described
Finally, the relationship of routing to the ISO model is discussed

%A V. Lo
%A J. W. S. Liu
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Task Assignment in Distributed Multiprocessor Systems
%P 358-360
%O Scheduling

%A Virginia Mary Lo
%T Task Assignment in Distributed Systems
%R UIUCDCS-R-83-1144
%I U. Ill
%D October 1983
%K PhD thesis

%A Virginia Mary Lo
%T Heuristic Algorithms for Task Assignment in Distributed Systems
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 30-39
%O Distributed task scheduling

%A Virginia Mary Lo
%T Task Assignment to Minimize Completion Time
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Resource Allocation
%P 329-336

%A Bart Locanthi
%T The Homogeneous Machine
%R 3759:TR:80, Ph.D. thesis
%I Caltech
%C Pasadena, CA 91125
%D 1980

%A Douglas Logan
%A Creve Maples
%A Daniel Weaver
%A William Rathbun
%T Adapting scientific programs to the Midas multiprocessor system
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 15-24
%K multiprocessor applications, Monte Carlo, random number generation,
MIDAS,
LBL
%O scientific computation
%X A look at the MIDAS processor including three applications.

%A Raghavendra Rao Loka
%T A Note on Parallel Parsing
%J SIGPLAN Notices
%I ACM
%V 19
%N 7
%D July 1984
%P 22-24

%A H. Lomax
%T Some Prospects for the Future of Computational Fluid Dynamics
%J AIAA Computer Fluid Dynamics Conference
%D June 1981

%A Harvard Lomax
%A Thomas H. Pulliam
%T A Fully Implicit, Factored Code for Computing Three-Dimensional Flow on the
ILLIAC IV
%E Garry Rodrigue
%B Parallel Computations
%I Academic Press
%D 1982
%P 217-250

%A D. B. Lomet
%T Coping with Deadlock in Distributed Systems
%R RC 7460 #32196
%I IBM
%D 1978

%A T. N. Long
%A J. T. Randolph
%A M. J. Sinclair
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T A Parallel Processor Electronic Target Signal Generator for
Electro-Optical Seekers
%P 287-288
%O

%A R. E. Lord
%A J. S. Kowalik
%A S. P. Kumar
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Solving Linear Algebraic Equations on a MIMD Computer
%P 205-210
%O Numerical Algorithms and Applications

%A R. E. Lord
%A J. S. Kowalik
%A S. P. Kumar
%T Solving Linear Algebraic Equation on an MIMD Computer
%J Journal of the Association for Computing Machinery
%V 30
%N 1
%D January 1983
%P 103-117
%K Wash. State U, HEP,
CR Categories and Subject Descriptors: G.1.0 [Numerical Analysis]:
General - parallel algorithms; G.1.3 [Numerical Analysis]; Numerical
Linear Algebra - linear systems.
General Terms: Algorithms, Theory
Additional Key Word and Phrases: MIMD computer, Gaussian elimination, Givens
triangularization
%X Abstract. Two practical parallel algorithms for solving systems of dense
linear equations on an MIMD computer as presented.  They are based on Gaussian
elimination and Givens transformations.  The algorithms are numerically stable
and have been tested on the Denelcor HEP machine.

%A H. Lorin
%T Parallelism in Hardware and Software: Real and Apparent Concurrency
%I Prentice-Hall
%C Englewood Cliffs, NJ
%D 1972

%A J. Losq
%T Effects of failures on gracefully degradable systems
%J Proc. 7th Int. Conf. on Fault-Tolerant Computing
%C Los Angeles, California
%D June 1977
%P 29-34
%K reliability and error recovery
%X Considers multiprocessor systems designed to gracefully degrade after
hardware or software failure.  Presents a model of graceful degradation
and describes quantitative measures for comparing "gracefully degradable"
systems.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A W. M. Loucks
%A W. M. Snelgrove
%A S. G. Zaky
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T VASTOR:  A Microprocessor Based Associative Vector Processor for
Small Scale Applications
%P 37-46
%O Architecture

%A Robert M. Lougheed
%A David L. McCubbrey
%T The Cytocomputer: A Practical Pipelined Image Processor
%J Proceedings 7th Annual Symposium on Computer Architecture
%D May 1980
%C La Baule, France
%P 271-277

%A Thelma Louie
%T Array processors: a selected bibliography
%J Computer
%V 14
%N 9
%D September 1981
%P 53-57
%X This bibliography was the result of a bibliographic search
by a librarian.   It is included only for completeness and has
problems.
$Revision: 1.2 $ $Date: 84/07/05 16:51:18 $

%A H. H. Love
%A D. A. Savitt
%T An Iterative-Cell Processor for the ASP Language
%B Associative Information Techniques
%E E. L. Jacks
%I American Elsevier
%C New York
%D 1971
%P 147-172

%A Hubert H. Love, Jr.
%T An efficient associative processor using bulk storage
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 103-112
%K
%O Processor organizations

%A Hubert H. Love
%T Programming the Associative Linear Array Processor
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 124
%K
%O Associative/parallel processors

%A Hubert H. Love, Jr.
%T Radar data processing on the ALAP
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%D 1976
%P 161-167
%O Applications

%A Hubert H. Love, Jr.
%T A modified ALAP cell for parallel text searching
%J Proceedings of the 1977 International Conference on Parallel Processing
%C Long Beach, Calif.
%D August 1977
%I IEEE
%P 153-
%K Associative processors

%A Hubert H. Love, Jr.
%T The highly-parallel supercomputers: Definitions, applications and predictions
%J Proc. Nat. Computer Conf.
%I AFIPS Press
%C Montvale, New Jersey
%D 1980
%P 181-190

%A J. M. Loveluck
%A F. R. A. Hopgood
%T The ICL/Three Rivers PERQ and Distributed Interactive Computing
%J Comput. and Graphics (GB)
%V 7
%D 1983
%P 193-198

%A Eliezer L. Lozinskii
%T A Remark on Distributed Termination
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Program Verification, CSP,
%P 416-419

%A L. Y. Lu
%T Contextual naming, addressing and routing in interconnection
%B 8th Conference on Local Computer Networks
%C Minneapolis, MN, USA
%P 83-87
%O 6 REFS. Treatment PRACTICAL, THEORETICAL/MATHEMATICAL
%I IEEE Comput. Soc. Press, ISBN: 0-8186-0500-6
Silver Spring, MD, USA, p: vi+89
%D 17-19 Oct. 1983
%K computer networks
computer networks local networks addressing contextual naming scheme
naming tree directory Pathname NAR table
routing table naming neighbour physical neighbours gateway
multiple path optimization physical path
%X The contextual naming scheme means that the names are
context-relative in a naming tree in which each name associated with a
component system appears as a directory and the component system
stores just a small part of this tree. Any object can be named by the
use of Pathname. The NAR table, a sort of routing table designed for
addressing, reveals the relations between the naming neighbour
(adjacent in a naming path) and physical neighbours (in same address
space). The gateway is abstracted as an intersection between adjacent
address spaces and more attention is paid to it. The multiple path is
used as the routing algorithm. The optimization of physical path is
also discussed

%A P. M. Lu
%T A System for Resource Sharing in a Distributed Environment \(em RIDE
%J Computer Software and Applications Conference (COMPSAC79)
%I IEEE
%D November 1979
%P 427-433
%Z Bell Labs., Naperville, Il, USA
%C Chicago, IL, USA
%I IEEE, New York, USA
887 pp.
%O 12 Refs.
treatment: practical
%K distributed processing supervisory and executive programs
RIDE distributed computing resource sharing
distributed systems
%X RIDE (resource-sharing in a distributed environment) has been designed
and implemented for the Unix operating system to provide sharing of remote
files, remote process invocation and interprocess communication in a
distributed computing environment. The system is designed to support a
uniform interface for both local and remote access in a network. The user
programs can be executed in a single or multiple machine environment
without any program modification.

%A P. M. Lu
%A S. S. Yau
%T A Methodology for Representing the Formal Specification
of Distributed Computing System Software Design
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 212-221
%O Design and Requirements Specification Methodology

%A B. D. Lubachevshy
%T A Parallel Computer Implementation of the Ascend/Descend Types of
Vector Algorithms
%R ULTRACOMPUTER NOTE #37
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D December 1981

%A B. D. Lubachevshy
%T Verification of Several Parallel Coordination Programs Based on
Descriptions of their Reachability Sets
%R TR 036, ULTRACOMPUTER NOTE #33
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D July 1981

%A B. D. Lubachevshy
%T Review of Soviet Publications on Parallel Data Processing (1978-1980)
%R ULTRACOMPUTER NOTE #35
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D September 1981

%A B. D. Lubachevshy
%T Parallelizing an Algorithm of Charles S. Peskin for Describing
Incompressible Flow of a Fluid Coupled to an Elastic Membrane
%R ULTRACOMPUTER NOTE #42
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D May 1982

%A B. D. Lubachevshy
%T An Approach to Automating the Verification of Compact Parallel Coordination
Programs, I
%R ULTRACOMPUTER NOTE #45, TR #60
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D February 1983

%A B. D. Lubachevshy
%T An Approach to Automating the Verification of Compact Parallel Coordination
Programs, II
%R ULTRACOMPUTER NOTE #49, TR #64
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D February 1983

%A Boris Lubachevsky
%A Debasis Mitra
%T Chaotic parallel computations of fixed points of nonnegative matrices
of unit spectral radius
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 109-116
%K relaxation
%O numeric computation

%A O. M. Lubeck
%A P. O. Frederickson
%A R. E. Hiromoto
%A J. W. Moore
%T Los Alamos Experiences with the HEP Computer
%E Janusz S. Kowalik
%B Parallel MIMD Computation: HEP Supercomputer and Its Applications
%I MIT Press
%C Cambridge, MA
%D 1985
%P 331-347
%K Applications, PIC, TRAC, SIMPLE, Monte Carlo,

%A G. W. R. Luderer
%A H. Che
%A W. T. Marshall
%T A virtual circuit switch as the basis for distributed systems
%B Comput. Commun. Rev. (USA), Proceedings of the Seventh Data
Communications Symposium
%V 11
%P 4
%C Mexico City, Mexico
%D 1981
%O Treatment APPLICATIONS, GENERAL OR REVIEW.
%K packet switching operating systems
virtual circuit switch distributed systems hardware software
packet switching operating systems UNIX systems subscriber switch interface
reliability recoverability.
%X A communication system is presented which consists of a switch
(Datakit (Fraser 1979)) with associated control and interface
hardware and software. The switch offers virtual circuit service
which is internally implemented through packet switching. The users
of the communication system are operating systems; using their
communication system, the authors have implemented a network of UNIX
systems and a new distributed operating system derived from UNIX. The
work concentrated on the performance of the subscriber-switch
interface; on the reliability and recoverability of the switching
service; and on the exploitation of the circuit concept for operating
system design.

%A G. W. R. Luderer
%A H. Che
%A J. P. Haggerty
%A P. A. Kirslis
%A W. T. Marshall
%T A Distributed UNIX System Based on a Virtual Circuit Switch
%J Proceedings of the 8th Symposium on Operating Systems Principles,
Operating Systems Review
%V 15
%N 5
%D December 1981
%P 160-168
%K Bell Labs, F-UNIX, S-UNIX,
%O distributed systems

%A J. Y. S. Luh
%A C. S. Lin
%T Multiprocessors-Controllers for Mechanical Manipulators
%J Computer Software and Applications Conference (COMPSAC79)
%I IEEE
%D November 1979
%P 458-462
%K Purdue Univ.
%O robot manipulator control languages and systems

%A Franklin T. Luk
%T Computing the Singular-Value Decomposition on the ILLIAC IV
%J ACM Transactions on Mathematical Software
%V 6
%N 4
%D December 1980
%P 524-539
%K ILLIAC IV computer, singular-value decomposition, Golub-Reinsch
algorithm, Jacobi-like method, parallel matrix computations
%O CR Categories: 5.14

%A J. Lundelius
%A N. Lynch
%T A New Fault-Tolerant Algorithm for Clock Synchronization
%J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing
%I ACM
%D August 1984

%A Kenneth Lundgren
%A Goesta H. Granlund
%T Image Processing Applications Enabled by MIMD Processor Structures
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 19-30

%A Stephen F. Lundstrom
%A George H. Barnes
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T A Controllable MIMD Architecture
%P 19-27
%O Architecture
%K Recommended,
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."
This paper describes the proposed FMP "Flow Model Processor" follow on to
the Burroughs Scientific processor.  The FMP was to have 512 processors
and 521 memory modules connected by an Omega network.  The software
was to include a DOALL construct for FMP parallel FORTRAN, DOMAINS for
index sets.

%A Stephen F. Lundstrom
%T A Decentralized Control, Highly Concurrent Multiprocessor
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K multiprocessors, flow model processor (FMP), DOALL construct,
%C Boston, MA
%P 145-151

%A K. Lunn
%A K. H. Bennett
%T An algorithm for resource location in a loosely linked distributed
computer system
%Z Dept. of Computer Sci., Univ. of Keele, Keele, England
%J Oper. Syst. Rev. (USA)
%V 15
%N 2
%P 16
%D April 1981
%O 2 Refs.
treatment: practical
%K distributed processing computer networks operating systems
resource location distributed computer system message passing
demand computer networks os
%X Introduces an algorithm for locating resources in a distributed computer
system which is low on processing requirements and on message-passing
demand. The algorithm is intended for a loosely linked system with a
message-passing mechanism within and across nodes. Such a system might well
evolve as an integration of machines via a local area network.

%A K. Lunn
%A K. H. Bennett
%T A Highly Reliable Distributed Filestore Directory System
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 299-307
%K
%O Security and Reliability

%A E. L. Lusk
%A R. A. Overbeek
%T Implementation of Monitors with Macros: A Programming Aid for the HEP
and Other Parallel Processors
%R ANL-83-97
%I Argonne National Laboratory
%C Argonne, IL 60439
%D December 1983
%K FORTRAN, HEP OS, barrier synchronization, self-scheduling loops,
%X This research implemented higher-level synchronization primitives
on Denelcor HEP FORTRAN using the UNIX m4 macro preprocessor.

%A E. L. Lusk
%A R. A. Overbeek
%T Appendix: Use of Monitors in FORTRAN: A Tutorial on the Barrier,
Self-scheduling DO-Loop, and Askfor Monitors
%E Janusz S. Kowalik
%B Parallel MIMD Computation: HEP Supercomputer and Its Applications
%I MIT Press
%C Cambridge, MA
%D 1985
%P 367-411
%K HEP,
%X Several excellent examples of HEP code.

%A D. J. Lynch
%T Parallel Pascal User's Guide
%D September 1983
%I NASA GSFC
%K MPP, Massively Parallel Processor

%A D. J. Lynch
%T Parallel Pascal Code Generator Design Description
%D September 1983
%I NASA GSFC
%K MPP, Massively Parallel Processor

%A D. J. Lynch
%T Terminal Emulation
%I NASA GSFC
%D September 1983
%K MPP, Massively Parallel Processor

%A D. J. Lynch
%T VAX/MCU Parallel Pascal Integration
%R design document
%I NASA GSFC
%D September 1983
%K MPP, Massively Parallel Processor

%A D. J. Lynch
%T ISODATA \(em Unsupervised Classification
%B Demonstration User' Guide
%D September 1983
%K MPP, Massively Parallel Processor

%A N. A. Lynch
%T Fast Allocation of Nearby Resources in a Distributed System
%J Symposium on Theory of Computation
%D April 1980
%P 70-81

%A N. A. Lynch
%A M. J. Fischer
%T On Describing the Behavior and Implementation of Distributed Systems
%J Theoretical Computer Science
%V 13
%P 17-43
%D 1981

%A N. A. Lynch
%T Multilevel Atomicity
%J ACM Symposium on Principles of Database Systems
%D March 1982
%C Los Angeles
%P 63-69

%T The Impact of Synchronous Communication on the Problem of Electing a
Leader in a Ring
%A Nancy A. Lynch
%A Greg N. Frederickson
%I Massachusetts Institute of Technology
%R MIT/LCS/TM-259
%D April 1984

%A Greg Lyzenga
%T Index to worked examples from Caltech Concurrent Computation Project
%r Hm70
%I California Institute of Technology
%C Pasadena, CA
%K Caltech Cosmic Cube, hypercube, C^3P
%X Index of working concurrent programmings.  See Greg.

%A Greg Lyzenga
%T The Nearest Neighbor Concurrent Processor: A User's Tutorial Guide
%D August 1984
%I California Institute of Technology
%C Pasadena, CA
%K Caltech Cosmic Cube, hypercube, C^3P
%R Hm-68

%A P. R. Ma
%A E. Y. S. Lee
%A M. Tsuchiya
%T A Task Allocation Model for Distributed Computer Systems
%J IEEE Transactions on Computers
%D January 1982
%V C-31
%N 1
%P 41-47

%A Perng-Yi Richard Ma
%A Edward Y. S. Lee
%A Masahiro Tsuchiya
%T A Task Allocation Model for Distributed Computer Systems
%J IEEE Transactions on Computers
%V C-31
%N 1
%D January 1982
%P 41-47
%K Branch and bound, distributed processing, interprocessor communications,
load balance, NP hard, task allocation
Distributed computing
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A Richard Perng-Yi Ma
%T A Model to Solve Timing-Critical Application Problems in Distributed
Computer Systems
%J Computer
%V 17
%N 1
%D January 1984
%P 62-68
%K Branch and bound,

%A Y.-W. Ma
%A R. Krishnamurti
%T The Architecture of REPLICA \(em A Special Purpose Computer System for
Active Multi-Sensory Perception of 3-Dimensional Objects
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%D June 1984
%K reconfigurable partitionable highly parallel computer architecture
%O computer graphics
%P 30-37
%X Uses a pool of processors (1000s), an enhanced cross bar, and set of
rings to help with communications.  Inspired by TRAC and other reconfigurable
systems.  Paper presents little analysis of their basis for decisions.

%A R. MacCormack
%A K. Stevens
%T Fluid Dynamics Applications of the ILLIAC IV Computer
%B Computational Methods and Problems in Aeronautical Fluid Dynamics
%I Academic Press
%C New York
%P 448-465
%D 1976

%T Globally Optimum Selection of Memory Storage Patterns
%A Mary E. Mace
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 264-271
%K Memory Management

%A R. N. Machlin
%T Managing a local area network
%J Telecommunications (USA)
%V 18
%N 11
%P 84-88
%O 0 REFS. Treatment GENERAL
%D Nov. 1984
%K local area networks management
LAN CPU local area network network management devices
remote monitoring information processing

%A Bryan Gerard Mackay
%A Mary Jane Irwin
%T A digit online arithmetic simulator
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 304-306
%K
Penn State
%O Special purpose processors

%A D. B. Mackie
%A S. Michelson
%T Application of Special Purpose Digital Computers to Rotorcraft Real-Time
Simulation
%R NASA-TP-1267
%D July 1978
%I National Technical Information Service
%C Springfield, VA 22151

%A Jock Mackinlay
%T Intelligent Presentation: The Generation Problem for User Interfaces
%D 1983
%X Thesis proposal

%A R. A. MacKinnon
%T Advanced function extended with tightly-coupled multiprocessing
%J IBM Systems Journ.
%V 13
%N 1
%D 1974
%P 32-59

%A I. M. MacLeod
%T Data Consistency in Sensor-Based Distributed Computer Control Systems
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 440-446
%O Distributed database system

%A W. H. MacWilliams
%T Reliability of large real-time control software systems
%J Proc. IEEE Symp. on Computer Software Reliability
%C New York, New York
%D May 1973
%K reliability and error recovery
%X Discusses issues in designing reliable software for realtime
multiprocessor systems.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A N. Madsen
%A G. Rodrigue
%T A Comparison of Direct Methods for Tridiagonal Systems on the CDC
STAR-100
%I Lawrence Livermore National Laboratory
%R UCRL-76993, Rev. 1

%A N. Madsen
%A G. Rodrigue
%T Two Notes on Algorithm Design for the CDC STAR-100
%I Lawrence Livermore National Laboratory
%R Tech. Memo 75-1
%D 1975

%A N. Madsen
%T Cyclic odd-even reduction for symmetric circulant matrices
%R ICASE Report No. 78-20
%d February 23, 1978
%J \fRto appear in\fP J. Linear Algebra and Applications
%D June 1983

%A Niel K. Madsen
%A Garry H. Rodrigue
%T Odd-Even Reduction for Pentadiagonal Matrices
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 103-106
%K STAR-100,
parallel algorithms

%A A. Maeda
%A I. Yamazaki
%A A. Tanaka
%T A distributed file system for EPOS
%J Fall 1980 Compcon
%I IEEE
%D 1980
%P 50-54

%A M. Maekawa
%T Detection of Parallelism between Statements by Decomposing into Separate
Sequential Processes
%R TR 73-14
%I University of Iowa
%C Iowa City
%D 1973

%A Mamoru Maekawa
%A Donald L. Boyd
%T Two models of task overlap within jobs of multiprocessing multiprogramming
systems
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 83-91
%K
%O Scheduling

%A Mamoru Maekawa
%A I. Yamazaki
%A A. Maeda
%A M. Miyata
%A S. Kamiya
%A H. Kasai
%T Experimental Polyprocessor System (EPOS) \(em Architecture
%J Proceedings 6th Annual Symposium on Computer Architecture
%D April 1979
%I ACM and IEEE
%C Philadelphia, PA
%P 188-195

%A Mamoru Maekawa
%A I. Yamazaki
%A A. Tanaka
%A A. Nakamura
%A K. Ishida
%T Experimental Polyprocessor System (EPOS) \(em Operating System
%J Proceedings 6th Annual Symposium on Computer Architecture
%D April 1979
%I IEEE and ACM
%C Philadelphia, PA
%P 196-201

%A Mamoru Maekawa
%T Optimal processor interconnection topologies
%J Proc. 8th Annual Symp. on Computer Architecture
%I IEEE
%V 9
%N 3
%D May 1981
%P 171-185
%K SIGARCH Newsletter

%A A. Maggiolo-Schettini
%T Comparing Some High-Level Languages for Image Processing
%B Languages and Architectures for Image Processing
%E M. J. B. Duff
%E S. Levialdi
%I Academic Press
%C New York, NY
%D 1981
%P 157-164

%A N. Magid
%A G. Tjaden
%A H. Messinger
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Exploitation of Concurrency by virtual Elimination of Branch
Instructions
%P 164-165
%O

%A G. Mago
%A R. Pargas
%T Solving Partial Differential Equations on a Cellular Tree Machine
%J Proc. 10th IMACS World Congress on Systems Simulation and Scientific
Computation
%V 1
%I IMACS
%P 368-373
%D 1982

%A G. A. Mago
%T A Network of Microprocessors to Execute Reduction Languages, Part II
%J International Journal of Computer and Information Sciences
%V 8
%N 6
%D December 1979
%P 435-571

%A G. A. Mago
%T A Cellular Language Directed Computer Architecture
%J Proc. Conf. Very Large Scale Integration
%I Caltech
%C Pasadena, CA 91125
%D January 1979
%P 447-452

%A G. A. Mago
%T A Network of Microprocessors to Execute Reduction Languages, Part I
%J International Journal of Computer and Information Sciences
%V 8
%N 5
%D October 1979
%P 349-385

%A G. A. Mago
%T A cellular computer architecture for functional programming
%J Spring 1980 COMPCON
%I IEEE
%D February 1980
%P 179-185

%A G. A. Mago
%A D. E. Stanat
%A A. Koster
%T Program Execution on a Cellular Computer: Some matrix algorithms
%I Univ. of North Carolina
%R Tech. Rep.
%C Chapel Hill, NC
%D May 1981

%A G. A. Mago
%T Copying Operands Versus Copying Results: A Solution to the Problem of
Large Operands in FFP's
%J Proceedings of the 1981 Conference on Functional Programming
Languages and Computer Architecture
%D October 1981
%P 93-97

%A Gyula Mago
%A David Middleton
%T The FFP Machine \(em A Progress Report
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 5.13-5.25
%O Reduction language architectures

%T Making Parallel Computations Simple: The FFP Machine
%A Gyula Mago
%J Digest of Papers, Compcon85 Thirtieth IEEE Computer society
International Conference
%I IEEE Computer Society
%D February 25-28, 1985
%P 424-428

%A B. Mahbod
%A J. Howard
%T Performance analysis of a cooperative symmetric algorithm for
real-time local area computer communication networks
%J Proceedings of the Computer Networking Symposium
%C Silver Spring, MD, USA
%P 33-42
%O 6 REFS. Treatment THEORETICAL/MATHEMATICAL
%I IEEE Comput. Soc. Press& Technol
Silver Spring, MD, USA, p: iv+147
%D 13 Dec. 1983
%K computer networks protocols real time systems
soft networks synchronous networks channel capacity performance analysis
protocol computer communication networks hybrid algorithm
real time local area networks
buffering asynchronous networks Reservation Upon Collision technique
broadband broadcast medium
first in first out behaviour bounds mean waiting time
%X A hybrid algorithm for soft real-time local area networks is analysed
under conditions of no buffering and full buffering capability at
nodes, and for synchronous and asynchronous networks. This algorithm
is a variation of the Reservation Upon Collision technique which does
not require a synchronised slotted network, and it operates on a
broadband broadcast medium. It has the desirable first-in-first-out
behaviour, avoiding large variance in packet transmission times
Approximations to the upper and lower bounds on the capacity of the
channel and the mean waiting time at the nodes are found. The
performance figures of these algorithms attest to their suitability
for soft real-time environments

%T Optimal Allocation of Resources in Distributed Information Networks
%A Samy Mahmoud
%A J. S. Riordon
%J ACM Transactions on Database Systems
%V 1
%N 1
%D March 1976
%P 66-78
%K Information networks, data files, link capacities, resource sharing,
distributed computing
CR Categories: 3.81

%A P. A. D. de Maine
%A C. G. Davis
%T JOBLIST-A general data structure for communication, manipulating
and managing information in a distributed environment
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 98-104
%K
%O Database Management Systems

%A Marian Mairnescu
%T USA: Communication Mechanism for Local Networks
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 399-404
%O implementation schemes for interprocess communication systems

%A M. Maisonneuve
%A J. -P. Levy
%A J. -L. Konrat
%T Architecture du Logiciel d'un Autocommutateur construit sur un Reseau
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 388-396
%K
%O Distributed systems in Specific Applications

%A J. C. Majithia
%T Some Comments Concerning Design of Pipeline Arithmetic Arrays
%J IEEE Transactions on Computers
%V C-25
%N 11
%D November 1976
%P 1132-1134
%K Cellular arrays, figure of merit, parallel processes, pipelining,
Correspondence

%A Srinivas V. Makam
%A C. S. Raghavendra
%T Dynamic reliability modeling and analysis of computer networks
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 496-502
%K
associative processing/distributed systems

%A Srinivas V. Makam
%A Algirdas Avizienis
%T An Event-Synchronized System Architecture for Integrated Hardware and
Software Fault-Tolerance
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 357-365
%K Decision algorithms, design diversity, distributed system,
synchronous system, inexact voting, multi-version software,
N-version programming, real-time safety systems, software fault-tolerance,
software reliability
%O Synchronization in distributed fault-tolerant systems

%A B. A. Makrucki
%A T. N. Mudge
%T A Queueing Model of Delta Networks
%R CRL-TR-26-83
%I Univ. of MI, Computing Research Lab.
%C Ann Arbor, MI
%D August 1983

%A M. Malcolm
%A J. Palmer
%T A Fast Method for Solving a Class of Tridiagonal Linear Systems
%J Communication of the ACM
%V 17
%P 14-17
%D 1974
%X Remove?

%A M. Malek
%A J. C. Browne
%T Scheduling Problems for Multistage Network Interconnected Computer
Systems
%J Computer Software and Applications Conference (COMPSAC80)
%I IEEE
%D October 1980
%P 860-865

%A M. Malek
%A W. W. Myre
%T A Description Method of Interconnection Networks
%J IEEE Computer Society, Distrib. Process. Q.
%V 1
%N 1
%D February 1981
%P 1-6

%A Miroslaw Malek
%T A Comparison Connection Assignment for Diagnosis of Multiprocessor
Systems
%J Proceedings of 7th Annual Symposium on Computer Architecture
%D 1980
%K University of Texas
%P 31-36

%A Miroslaw Malek
%A William W. Myre
%T Figures of Merit for Interconnection Networks
%J Workshop on Interconnection Networks for Parallel and Distributed
Processing
%D April 1980
%I IEEE
%P 74-83

%A V. M. Malhotra
%A V. Rajaraman
%T A Data-Flow Language for Specifying Business Data Processing
Applications
%J Proceedings of the 1981 Conference on Functional Programming
Languages and Computer Architecture
%D October 1981
%P 203-?

%A Efrem G. Mallach
%T Job-Mix Modeling and Systems Analysis of an Aerospace Multiprocessor
%J IEEE Transactions on Computers
%V C-21
%N 5
%D May 1972
%P 446-454
%K Aerospace applications, computer system simulation, guidance computers,
Markov processes, multiprocessors, queuing theory,
Computer systems

%A B. N. Malm
%A G. M. Flachs
%T Algorithm Modeling on Distributed Systems
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 62-68
%O Distributed programming
%K (CMS) Concurrent multiprocess system model, Petri nets

%A T. W. Malone
%A R. E. Fikes
%T Enterprise: A Market-like Scheduler for Remote Processes in Interlisp-D
%I Xerox PARC, Cognitive and Instructional Sciences Group
%D April 1983
%X Working Paper, in preparation

%A S. A. Mamrak
%A Hong.-Chin. Kuo
%A D. Soni
%T Supporting Existing Tools in Distributed Processing Systems:
The Conversion Problem
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE New York, USA, P: xix+901
%P 847-855
%O 24 Refs
Treatment PRACTICAL
%D 18-22 Oct. 1982.
%K distributed processing operating systems
distributed processing systems conversion layered high level data objects
canonical forms abstract representations. Desperanto
%X If distributed processing support is to be layered on top of existing
autonomous and heterogeneous computer systems, then communication in
terms of high level data objects is desirable. Conversion of the
internal representation of data objects is required in order to
support such communication. The authors propose using abstract
representations of data objects as canonical forms. They demonstrate
that abstract representations possess the desirable characteristics
of existence, programming language independence, understandability,
and low programming effort for conversion. Conversion routines for
translating data objects to and from the canonical forms are
discussed. Efficiency and implementation issues are also considered.

%A S. A. Mamrak
%A P. Maurath
%A J. Gomez
%A S. Janardan
%A C. Nicholas
%T Guest Layer in Distributed Processing Support on Local Operating
Systems
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE New York, USA, P: xix+901
%P 854-859
%O 25 Refs
Treatment PRACTICAL
%D 18-22 Oct. 1982.
%K operating systems distributed processing.
distributed processing support local operating systems guest layering
Desperanto networking support.
%X In some distributed environments guest layering is the only viable
design option. The design of one such distributed support system,
Desperanto, is outlined. A general discussion is then presented of
how guest layering can be accomplished, based on what level of
networking support is offered by a local operating system.

%A S. A. Mamrak
%A W. E. Ayen
%A F. Gherfal
%A D. Leinbaugh
%T Performance Measurement and Exception Handling in Desperanto's
Distributed Environment
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 840-846
%I IEEE New York, USA, P: xix+901
%P 840-846
%O 29 Refs
Treatment PRACTICAL
%D 18-22 Oct. 1982
%K distributed processing operating systems computer networks.
exception handling Desperanto software system local operating system
hierarchical network architecture measurement distributed environment.
%X The software system resides on each network site between a local
operating system and the network layer of a hierarchical network
architecture. As such, its measurement requirements differ from
either of these two. The physical distribution of the software system
components has very little impact on the measurement facility itself
and consequently a simple, yet fully adequate facility can be easily
provided. Exception handling facilities desirable within a
distributed environment are also described. This distributed
environment is considered to consist of modules which communicate via
messages. Modules may require other modules to provide them service
and the same module can both be a requirer and a provider. The key to
the exception facility is providing choices for how to proceed after
an exception handler has completed successfully.

%A G. K. Manacher
%T Production and Stabilization of Real-Time Task Schedules
%J Journal of the ACM
%V 14
%N 3
%D July 1967
%P 439-465

%A R. Manara
%A L. Stringa
%T The EMMA System: An Industrial Experience on a Multiprocessor
%B Languages and Architectures for Image Processing
%E M. J. B. Duff
%E S. Levialdi
%I Academic Press
%C New York, NY
%D 1981
%P 215-227

%A U. Manber
%A R. E. Ladner
%T Concurrency Control in a Dynamic Search Structure
%J ACM Symposium on Principles of Database Systems
%D March 1982
%C Los Angeles
%P 268-282

%A U. Manber
%T Concurrent Maintenance of a Dynamic Search Structure
%R Tech Report #488
%I U. of Wisconsin-Madison, Department of Computer Science
%D Nov. 1982

%A Udi Manber
%T Concurrent Maintenance of Binary Search Trees
%I IEEE Transactions on Software Engineering
%V SE-10
%N 6
%D November 1984
%K Concurrent algorithms, data structures, distributed algorithms,
locking, transactions, trees,
Theory

%A Paolo Mancarella
%A Franco Turini
%T A high level analysis tool for concurrent programs
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 293-302
%K
CSP-L
expressing parallelism

%A D. M. Mancl
%T Numerical Algorithms for Array Computer
%R unpublished M.S. thesis
%I University of Illinois at Urbana-Champaign
%D May 1979
%K MPP, Massively Parallel Processor

%A D. M. Mancl
%T Programming Languages for Bit-Serial Array Machines
%I Dept. of Computer Science, Univ. of Ill., Urbana-Champaign
%R UIUCDCS-R-81-1071
%D August 1981
%K MPP, Massively Parallel Processor

%A K. Mani
%A James C. Browne
%A Charles W. Dissply
%A Werner R. Uhrig
%T Analytic Models for Rollback and Recovery Strategies in Data Base Systems
%J IEEE Transactions on Software Engineering
%V SE-1
%N 3
%D March 1975
%P 100-110
%K data base systems, graph theory, probabilistic models,
rollback and recovery strategies, software reliability, system modeling
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A William C. Mann
%T Design for dialogue comprehension
%J Proceedings of the Seventeenth Annual Meeting of the Association for
Computational Linguistics
%D August 1979

%A Reinhard Manner
%T Hardware Task/Processor Scheduling in a Polyprocessor Environment
%J IEEE Transactions on Computers
%V C-33
%N 7
%D July 1984
%P 626-636
%K Computer architecture, hardware support, interconnection set, MIMD,
multitasking, parallel processing, processor management, scheduling,
SYNCBUS, Heidelberg POLYP, POLYBUS,
multiprocessing systems,

%A Frank B. Manning
%T An Approach to Highly Integrated, Computer-Maintained Cellular Arrays
%J IEEE Transactions on Computers
%V C-26
%N 6
%D June 1977
%P 536-552
%K Cellular arrays, computer maintenance, fault-tolerance,
programmable logic, reliability, self-repairing machines,
very large-scale integration,
Cellular array

%A Tsang William Mao
%A Raymond T. Yeh
%T Communications Port-A Language Concept for Concurrent Programming
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 252-260
%O Programming Languages for Distributed Systems

%A Creve Maples
%A Daniel Weaver
%A Douglas Logan
%A Milan Tadian
%T Performance of a modular interactive data analysis system (MIDAS)
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 514-519
%K
LBL, front-end, graphics, processor arrays
multiprocessor systems

%A Creve Maples
%A Daniel Weaver
%A William Rathbun
%A Douglas Logan
%T The operation and utilization of the Midas multiprocessor
architecture
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 197-206
%K global memory, multiprocessor arrays, MIMD, circuit switching,
packet switching, Monte Carlo, tree search (alpha-beta pruning),
performance studies,
%O applications

%T Pyramids, Crossbars and Thousands of Processors
%A Creve Maples
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 681-688
%K Parallel Systems

%A Creve Maples
%T MIDAS - An Adaptive Multiprocessor System
%J Digest of Papers, Compcon85 Thirtieth IEEE Computer society
International Conference
%I IEEE Computer Society
%D February 25-28, 1985
%P 60-65

%A Creve Maples
%T Analyzing software performance in a multiprocessor environment
%J IEEE Software
%V 2
%N 4
%P 50-63
%D July 1985
%K modular interactive data analysis system MIDAS, 11 processors, cross bar,
ACAL,
issue on complex parallel systems,
%X efficient multiprocessing requires new methods of
problem decomposition--and new debugging and analysis tools
for developing and evaluating asynchronous
parallel programs.  This papers presents some interesting ideas about
different degrees of computational efficiency [empirical].

%A M. V. Marathe
%T Performance Evaluation at the Hardware Architecture Level and the
Operating System Kernel Design Level
%R doctoral thesis
%I Dept. of Computer Science, Carnegie-Mellon University
%C Pittsburgh, PA
%D December 1978
%K performance
%X One of the early experimental investigations on the hardware and operating
system performance of C.mmp. Gives measured data on the observed instruction
mix in the operating system and on overheads due to synchronization.  Develops
a model which describes performance speedup due to multiprocessing.
Text reproduced with the permission of Prentice-Hall \(co 1980.
Also published by UMI Research Press (1978).

%A Madhav Vinayak Marathe
%T Performance Evaluation at the Hardware Architecture Level and
the Operating System Kernel Design Level
%I UMI Research Press
%D 1978
%R PhD thesis
%K C.mmp,

%T Sorting and Selection in Multi-Channel Broadcast Networks
%A John M. Marberg
%A Eli Gafni
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 846-850
%K Sorting

%A James G. March
%A Herbert A. Simon
%T Organization
%I Wiley
%D 1958

%A R. Marcogliese
%A R. Novarese
%T Module and Data Allocation Methods in Distributed Systems
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 50-59
%K
%O Distributed Systems Structure

%A M. J. Marcus
%T Space-Time Equivalents in Connecting Networks
%J Proceedings of the 1970 Intl. Conf. on Communication
%D 1970
%P (35-25)-(35-31)

%A M. J. Marcus
%T Designs for Time Slot Interchangers
%J Proc. 1970 Natl. Electronics Conference
%D December 1970
%V 26
%P 812-817

%A M. J. Marcus
%T The Theory of Connecting Networks and Their Complexity: A Review
%J Proceedings of the IEEE
%V 65
%N 9
%D September 1977
%P 1263-1271

%A R. W. Marczynski
%A J. Milewski
%T A Data Driven System Based on a Microprogrammed Processor Module
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 11
%N 3
%D 1983
%P 98-106
%O Data Flow Architectures

%A Ines Margaria
%A Angelo Raffaele Meo
%A Maddalenda Zacchi
%T A New Scheme for Analyzing Parallel Processing Systems
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 182-185
%K
%O languages

%A A. S. Margulies
%T Array Processing Eases High-Speed Vector Computation
%J Digital Design
%V 8
%N 6
%D June 1978
%P 52-54

%A Peter B. Mark
%T The Sequoia Computer: A Fault-Tolerant Tightly-Coupled Multiprocessor
Architecture
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K Commercial Multiprocessors
%C Boston, MA
%P 232

%A P. Markenscoff
%T A Multiple Processor System for Real Time Control Tasks
%J Proceedings of 9th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 10
%N 3
%D April 1982
%P 274-282

%A Pauline Markenscoff
%T A Deterministic Model for Evaluating the Performance of a Multiple Processor
System with a Shared Bus
%J IEEE Transactions on Computers
%V C-33
%N 3
%D March 1984
%P 281-285
%K Multiple processor system, performance evaluation, real time control,
shared bus,
Correspondence,

%l journal-article
%A J. Markoff
%T RISC Chips
%J Byte
%V 9
%N 12
%P 191-206
%M November
%K RISC
%D 1984

%A Phil Marks
%A Bond
%T Scene Analysis Using the DAP
%I Queen Mary's College, Science
%D 1980

%A Phil Marks
%T Low Level Vision Using an Array Processor
%I Queen Mary's College Comp. Science
%J Computers Graphics and Image Processing
%V 14
%P 281-292
%D 1981

%A N. Maron
%T Array Processing on PDP-10
%R UCRL-81636
%I National Technical Information Service
%D August 25, 1978
%C Springfield, CA 22151

%A Neil Maron
%A Thomas A. Brengle
%T Integrating an Array Processor into a Scientific Environment
%J Computer
%V 14
%N 9
%D September 1981
%P 41-44
%K

%A M. A. Marsan
%A others
%T Architecture, Communication Procedures and Performance Evaluation of
the u* Multimicroprocessor System
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 106-115
%O Distributed Architectures

%A M. A. Marsan
%A M. Gerla
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Approximate Models for Multiple Bus Multiprocessor Systems
%P 329-332
%O Performance Evaluation

%T Comparative Performance Analysis of Single Bus Multiprocessor
Architectures
%A Marco Ajmone Marsan
%A Gianfranco Balbo
%A Gianni Conte
%J IEEE Transactions on Computers
%V C-31
%N 12
%D December 1982
%P 1179-1191
%K Bus contention, Markovian models, memory interference, message passing,
multiprocessors, performance comparison, performance evaluation,
Performance analysis

%T Markov Models for Multiple Bus Multiprocessor Systems
%A Marco Ajmone Marsan
%A Mario Gerla
%J IEEE Transactions on Computers
%V C-31
%N 3
%D March 1982 
%P 239-248
%K Bus contention, Markov chain models, memory interference,
multiprocessing, performance, simulation
Performance analysis

%A J. Marschak
%T Elements for a Theory of Teams
%J Management Science
%V 1
%D 1955
%P 127-137

%A J. M. Marsh
%T Program Development Software for Array Processors
%E D. J. Paddon
%B Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford, England
%D 1984
%P 67-72
%X Short survey, more oriented toward the small FPS type boxes.

%A D. Marshall
%T A Parallel processor approach for searching decision trees
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 199-
%K
%O Parallel array processors

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T The Multisensor Data Correlation and Handover Problem
%A Duane David Marshall
%P 147
%O Searching
%X Summary only.

%A T. A. Marshland
%A M. Cambell
%T Parallel Search of Strongly Ordered Game Trees
%J Computing Surveys
%V 14
%N 4
%D December 1982
%X It examines how game tree search may be split among multiple
parallel processors. Probably the bibliography would be useful
too.--Margot Flowers

%T Parallel Search of Strongly Ordered Game Trees
%A T. A. Marsland
%A M. Campbell
%J Computing Surveys
%I ACM
%V 14
%N 4
%D December, 1982
%P 533-552
%K Alpha-beta search, computer chess, game playing, parallel search, tree
decomposition
C.0{Computer Systems Organization}: General-system architectures;
C.1.2{Processor Architectures}: Multiple Data Stream Architectures
(Multiprocessors) - associative processors; parallel processors;
C.4{Computer Systems Organization}: Performance of Systems-design
studies; F.2.2{Analysis of Algorithms and Problem Complexity}:
Nonnumerical Algorithms and Problems - pattern matching;
I.2.8{Artificial Intelligence}: Problem Solving, Control Mehtods and
Search - heuristic methods; graph and tree search strategies,
Algorithms, Experimentation

%A M. A. Marson
%T Bounds on Bus and Memory Interference in a class of Multiple Bus
Multiprocessor Systems
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 792-798
%K
%O Performance Evaluation of Multiprocessor Systems

%A Giancarlo Martella
%A Barbara Pernici
%A Fabio A. Schreiber
%T An Availability Model for Distributed Transaction Systems
%J IEEE Transactions on Software Engineering
%V SE-11
%N 5
%D May 1985
%P 483-491
%K Availability, distributed databases, Markov models, performability,
reliability
%O Correspondence
%X Although this does not sound like it, the examples are vector oriented
and numerical, too!

%A B.R. Martin
%A E. Dunford
%T Processing Astronomical Images from Space
%I Rutherford Laboratory
%J Proceedings of Chester Conference
%D 1981

%A H. Martin
%A R. Lee
%T A Discourse on a New Supercomputer, PEPE
%E D. Kuck
%E D. Lawrie
%E A. Sameh
%B High Speed Computer and Algorithm Organization
%I Academic Press
%C New York
%P 101-112
%D 1977

%A J. Martin
%T Teleprocessing Network Organization
%I Prentice-Hall
%C Englewood Cliffs, New Jersey
%D 1970

%A J. Martin
%T Future Developments in Telecommunications
%I Prentice-Hall
%C Englewood Cliffs, New Jersey
%D 1971

%A J. Martin
%T Telecommunications and the Computer, 2nd Edition
%I Prentice-Hall
%C Englewood Cliffs, New Jersey
%D 1976

%A Joanne L. Martin, ed.
%T International parallel processing projects: a software perspective
%J IEEE Software
%V 2
%N 4
%P 65-80
%D July 1985
%K CMU Mach-1, SISAL, Arvind dataflow, NYU Ultracomputer, CIT Hypercube,
Cray, Berlin GMD-TUB FIRST, HEP/UPX, TRAC, Dongarra,
%X industrial and academic researchers provide a glimpse into efforts to
develop a faster, more powerful computer through methods beyond purely
technological advances.  collected short reports on different projects.

%A S. Martin
%T Programmable Array Processors Crunch Numbers Effortlessly
%J EDN
%V 25
%N 4
%D February 20, 1980
%P 107-115

%A T. Martin
%T Realtime Programming Language PEARL \(em Concept and Characteristics
%J Computer Software and Applications Conference (COMPSAC78)
%I IEEE
%D November 1978
%P 301-306
%O process computer software, languages and maintenance

%A L. A. Martin-Vega
%A H. D. Ratliff
%T Scheduling parallel processors
%J Bull. Operations Research Soc.of America
%V 23
%N Supplement 2
%D November 1975
%K scheduling
%X Investigates the differences between preemptive and non-preemptive
scheduling algorithms.  Shows that, for a subclass of scheduling problems,
the relationship between preemptive and non-preemptive optimal solutions is
isomorphic to the relationship among optimal solutions to a certain type of
linear programming problem.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A R. C. O. Martins
%A K. B. Irani
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Simultaneity of Events in Petri Nets
%P 143-144
%O

%A Akira Maruoka
%A Namio Honda
%T Logical Networks of Flexible Cells
%J IEEE Transactions on Computers
%V C-22
%N 4
%D April 1973
%P 347-358
%K Cellular logic, flexible logic, integrated circuit, Maitra cascade,
tree network
Cellular array

%A Kiyoshi Maruyama
%T On the Parallel Evaluation of Polynomials
%J IEEE Transactions on Computers
%V C-22
%N 1
%D January 1973
%P 2-5
%K Parallel algorithms, polynomial evaluation,
Applications

%A F. Maryanski
%E H. L. Morgan
%T Data-server design issues
%J AFIPS Conference Proceedings. 1982 National Computer Conference
%C Houston, TX, USA
%P 429-438
%O 29 REFS
Treatment PRACTICAL
%I AFIPS Press
Arlington, VA, USA, p: xi+843
%D 7-10 June 1982
%V 51
%K information services computer networks
information services computer networks local area networks
network database servers
backend database systems data server design issues security reliability
performance
%X The expected proliferation of local-area networks has created a need
for network database servers. It is reasonable to view local-area
network data servers as extensions of backend database systems. This
paper addresses several critical data-server design issues:
distribution of functionality, high availability, security, and
performance. Particular consideration is given to applying experience
with backend databases to the problems of data servers. Several
design alternatives are proposed and evaluated in terms of their
impact on reliability, security, and performance in a gross sense
The concluding section emphasizes the need for greater practical
experience with local-area networks in order to more accurately weigh
the tradeoffs of different data-server configurations

%A Fred J. Maryanski
%T A Survey of Developments in Distributed Data Base Management Systems
%J Computer
%I IEEE
%V 11
%N 2
%D February 1978
%P 28-38
%X Not bad for a brief survey.
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A J. G. Marzolf
%T AAPL: An Array Processing Language
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 230-237
%K
%O RADCAP - the RADC associative processor

%A P. H. Mason
%T Design tools for evaluating multiprocessor programs
%J doctoral thesis, Dept. of Computer Science, Carnegie-Mellon University
%C Pittsburgh, PA
%D July 1976
%K performance
%X Describes the design and implementation of a performance evaluation system
called STEPPS; this system evaluates multiprocessor programs along different
dimensions.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Philip H. Mason
%T The Design of Programs for Asynchronous Multiprocessors
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 127-129
%K CMU
%O Program decomposition and Petri nets
%X Summary only

%T Vectorizer User's Guide
%Q Massachusetts Computer Assoc. Inc.

%A G. M. Masson
%A B. W. Jordan
%T Realization of a Class of Multiple Connection Assignments with Asymmetric
Three-Stage Connection Networks
%J Proc. 5th Annual Princeton Conf. Information and Systems Science
%I Princeton Univ.
%C Princeton, NJ
%P 316-320
%D March 1971

%A G. M. Masson
%A B. W. Jordan
%T Generalized Multi-Staged Connection Networks
%J Networks
%V 2
%N 3
%P 191-209
%D Winter 1972

%A G. M. Masson
%T On Rearrangeable and Non-Blocking Switching Networks
%J Proc. 1976 Intl. Conference on Communication
%I IEEE
%D June 1976
%P (7-1)-(7-7)

%A G. M. Masson
%T Binomial Switching Networks for Connection and Distribution
%J IEEE Transactions on Communications
%V COM-25
%N 9
%D September 1977
%P 873-883

%A Gerald M. Masson
%A George C. Gingler
%A Shinji Nakamura
%T A sampler of circuit switching networks
%J IEEE Computer
%V 12
%N 6
%D June 1979
%P 32-48
%X
Reproduced in the 1984 tutorial: "Interconnection Networks for parallel and
distributed processing" by Wu and Feng.

%A Gerald M. Masson
%A S. Brent Morris
%T Expected capacity of (m 2)-networks
%J IEEE Transactions on Computers
%V C-32
%N 7
%D July 1983
%P 649-657
%K
actual capacity, binomial networks concentrator, expected capacity, (m 2)
networks, prime component counts, prime decomposition.

%A Mathew N. Matelan
%T Parallelism in Automatic Testing
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 100-104
%K LLNL, Distributed Electronic Test and Analysis (DELTA)
%O multiprocessors

%A Nicholas Matelan
%T The Flex/32 Microcomputer
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K Commercial Multiprocessors, ConCurrent C, ConCurrent FORTRAN,
%C Boston, MA
%P 209-213

%A Richard Mateosian
%A Janak Pathak
%T Distributed Processing with the Z8000 Family
%J National Computer Conference \(em Proceedings
%I AFIPS
%V 51
%D 1982
%P 53-57
%K <Sales pitch>

%A J. Matisoo
%A C. Seitz
%T Engineering Limits on Computer Performance
%R Hm72
%D May 1984
%I California Institute of Technology
%C Pasadena, CA
%K Caltech Cosmic Cube, hypercube, C^3P
%X Draft of "Physics Today" article.

%A H. Matsushima
%A T. Uno
%A M. Ejiri
%T An Array Processor for Image Processing
%E Morio Onoe
%E Kendall Preston, Jr.
%E Azriel Rosenfeld
%B Real-Time/Parallel Computing: Image Analysis
%I Plenum Press
%C New York, NY
%D 1981
%P 325-338
%X A system, it appears, for computer vision.

%A Y. Matsushita
%A M. Yoshida
%A A. Wakino
%A L. T. Beng
%T Allocation Schemes of multiple copies of data in distributed database
systems
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 250-256
%K
%O Replicated Databases

%A Yukata Matsushita
%T Sparse Matrix Inversion on ILLIAC-IV
%I NTIS
%R PB-180036
%K Gauss-Jordan elimination, Shipley's matrix inversion technique
%X A technique for inverting matrices of order 500-1000.
The reviewer [from EPRI] had some question on larger array usefulness.

%A Toshihiko Matsuura
%A Sachio Kamiya
%A Masaaki Takiuchi
%T Design Concept of the FACOM VP Based on Extensive Analyses of
Applications
%I Fujitsu Limited
%C Shizuoka, Japan

%A R. Mattheyses
%A S. Conry
%T Algorithmic Analysis of control structure behavior
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 243-
%K
%O Theory

%A Sven Mattison
%T MOS-VLSI Circuit Simulation Formulations for Concurrent Execution
%r Internal memo, Hm40
%R 5096:DF:83
%I California Institute of Technology
%C Pasadena, CA
%D August 1983
%K Caltech Cosmic Cube, hypercube, C^3P

%A J. Brucwe Mawson
%T PACER 600 Autopatch Computing System
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 147-159
%K advanced hybrid systems
%X Commercial presentation.

%A Nelson L. Max
%T Vectorized Procedural Models for Natural Terrain: Waves and Islands in the
Sunset
%J Computer Graphics, SIGGRAPH 81 Conference Proceedings
%V 15
%N 3
%P 317-324
%D August 1981
%K Ray tracing, vectorized, pipeline, height field, natural terrain,
color table animation, piercing, line buffer, reflection, procedural model,
water waves.
CR Categories 8.2, 3.14

%A E. W. Mayr
%T Well Structured Parallel Programs Are Not Easier to Schedule
%I Stanford University
%R STAN-CS-81-880
%D September 1981

%A G. Mazare
%T Multiprocessor systems
%J Proc. 1974 CERN School of Computing
%C Godysund, Norway
%D August 1974
%K miscellaneous topics in multiprocessing
%X A detailed description of the development and principles of
multi-processing systems.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Guy Mazare
%T A Few Examples of How to use a Symmetrical Multi-Micro-Processor
%J Proceedings of 4th Annual Symposium on Computer Architecture
%D March 1977
%P 57-62
%K multiprocessor applications, multicomputer systems
%X Describes a microprocessor-based multiprocessor system and illustrates
its use with two programs that exploit parallelism present in the system.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A T. McConnell
%A others
%T DUCS-1: A Reconfigurable Software Emulator System for DDP Development
and Algorithm Evaluation
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 166-171
%O Testing and Evaluation

%A W. M. McCormack
%A F. Gail Gray
%A Joseph G. Tront
%A Robert M. Haralick
%A Glenn S. Fowler
%T Multi-Computer Parallel Architectures for Solving Combinatorial Problems
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 431-451

%A B. H. McCormick
%A J. L. Divilbiss
%T Tentative Logical Realization of a Pattern Recognition Computer
%R 4031
%I Digital Computer Lab, Univ. of Illinois
%D 1969

%A Bruce H. McCormick
%T The Illinois Pattern Recognition Computer - ILLIAC III
%J IEEE Transactions on Electronic Computers
%V EC-12
%N 5
%D December 1963
%P 791-813
%K Computer Systems Issue

%A Bruce H. McCormick
%A Ernest Kent
%A Charles R. Dyer
%T A Visual Analyzer for Real-Time Interpretation of Time Varying Imagery
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 453-464

%A C. McCormick
%T Performance of MSC/NASTRAN on the CRAY Computer
%J Proceedings of a Cray Research Inc. Symposium
%D 1982
%P 88-98

%A T. D. McCreery
%T The X-Tree operating system: bottom layer
%J Spring 1980 Compcon
%I IEEE
%D 1980
%P 340-343

%A L. McCulley
%A G. Zaher
%T Heat Shield Response to Conditions of Planetary Entry Computed on the
ILLIAC IV
%R Unpublished manuscript under NASA/Ames Contract No. 6911
%D 1974

%A Warren S. McCulloch
%T What's in the brain that ink may character?
%E Warren S. McCulloch
%B Embodiments of Mind
%P 387-397
%I MIT Press
%D 1965

%A J. A. McDermid
%T Checkpointing and Error Recovery in distributed Systems
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 271-282
%K
%O Security and Reliability

%A B. McDonald
%T The Chebyshev Method for Solving Non-Self-Adjoint Elliptic Equations on
a Vector Computer
%J J. Comp. Phys.
%V 35
%P 147-168
%D 1980

%A W. C. McDonald
%A H. O. Welch
%A J. D. Reynolds
%T Distributed Simulation Host: A Distributed Testbed
%J Computer Software and Applications Conference (COMPSAC80)
%I IEEE
%D October 1980
%P 562-568
%O case study, experiment, distributed simulation

%A Charles E. McDowell
%T A simple architecture for low level parallelism
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 472-477
%K
UCSD, Simple Multiple ALU Computer (SIMAC), RISC
computer architectures

%A Paul L. McEntire
%A John G. O'Reilly
%A Robert E. Larson, eds.
%T Distributed Computing: Concepts and Implementations
%I IEEE
%C New York, NY
%D 1984
%X A collections of reprinted papers (many of which appear in other IEEE
collections) on distributed computing topics from multiprocessors to
wide-area nets, from theory to security issues.

%A W. D. McFarland
%A J. W. Myers
%T A parallel image neighborhood processor
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 174-176
%K filtering, image processing, median, SIMD,
%O image processing

%A Scott McFarling
%A Jerry Turney
%A Treavor Mudge
%T VLSI Crossbar Design Version Two
%R CRL-TR-8-82
%I Univ. of MI, Computing Research Lab.
%C Ann Arbor, MI
%D February 1982
%X Funded by NASA LaRC

%A Patrick F. McGehearty
%T Performance Evaluation of a Multiprocessor under Interactive Workloads
%R CMU-CS-80-137
%I Carnegie-Mellon University
%C Pittsburgh, PA
%D August 1980

%A R. McGill
%A J. Steinhoff
%T A multiprocessor approach to numerical analysis:
An Application to gaming problems
%J Proc. 3rd Ann. Symp. on Computer Architecture
%C Clearwater, Florida
%D January 1976
%P 46-51
%K multiprocessor applications
%X This multiprocessor organization is oriented toward solving a certain class
of numerical analysis problems.  The system uses a minicomputer host and a
set of microprocessor modules.  Describes algorithms that exploit the
structure of this system to sped up certain problem solutions.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Robert McGill
%A John Steinhoff
%T A Multimicroprocessor Approach to Numerical Analysis:  An Application
to Gaming Problems
%J Proceedings of 3rd Annual Symposium on Computer Architecture
%D 1976
%P 46-51
%K Multi-Microprocessors
%X
Reprinted in "Tutorial: Distributed Processing," IEEE,
compiled by Burt H. Liebowitz and John H. Carson, 1981, 3rd edition.

%A D. McGlynn
%A L. Scales
%T On Making the NAG Run Faster
%E D. Paddon
%B Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford
%D 1984
%P 73-89

%A D. H. McGlynn
%A L. E. Scales
%T On Making the NAG Run Faster
%E D. J. Paddon
%B Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford, England
%D 1984
%P 73-89
%K Numerical algorithms, Cray-1, dot product,
%X Examples are copywritten to NAG.

%A J. R. McGraw
%A S. K. Skedzielewski
%T Streams and iteration in VAL: Additions to a data flow Language
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 730-740
%K
%O Data flow languages

%A James McGraw
%A Stephen Skedzielewski
%A Stephen Allan
%A Rod Oldehoeft
%A John Glauert
%A Chris Kirkham
%A Bill Noyce
%A Robert Thomas
%T SISAL: Streams and Iteration in a Single Assignment Language, Language
Reference Manual, Version 1.2
%R M-146, Rev. 1
%I Lawrence Livermore National Laboratory
%C Livermore, CA
%D March 1985

%A James R. McGraw
%T Data-Flow Computing:  Software Development
%J 1st International Conference on Distributed Computing Systems
%P 242-251
%I IEEE
%D October 1979
%P 242-251
%K Programming Languages for Distributed Systems
%X See the similar paper in IEEE TOC, v C-28, n 12, Dec. 1980, pp. 1095-1103.

%A James R. McGraw
%T Data Flow Computing: Software Development
%J IEEE Transactions on Computer
%V C-29
%N 12
%D December 1980
%P 1095-1103
%K Applicative programming, concurrency, data flow, multiprocessing, VAL
%O Special issue on distributed processing systems
%X See the similar paper in 1st Intl. Conf. on Dist. Comp. Syst., 1979,
pp. 242-251.

%A James R. McGraw
%T The VAL Language: Description and Analysis
%J ACM Transactions on Programming Languages and Systems
%V 4
%N 1
%D January 1982
%P 44-82
%K Design, Languages
Categories: D.3.2 [Programming Languages]: Language classifications-
applicative languages; data-flow languages; VHL; D.3.3
[Programming Languages]: Language Constructs - concurrent programming
structures; D.4.1 [Operating Systems]: process management -
multiprocessing/multiprogramming
recommended

%A J. McGregor
%A M. Salana
%T Finite Element Computation with Parallel VLSI
%J Proc. 8th ASCE Conference Elec. Comp.
%I University of Houston
%P 540-553
%D 1983

%T VLSI Circuit Simulation Using A Vector Computer
%A S. McGrogan
%J CYBER 200 Applications Seminar
%R NASA Conference Publication 2295
%D October 1983
%E J. Patrick Gary, Compiler
%I NASA Goddard Space Flight Center
%C Greenbelt, Maryland
%P 71-76

%A D. B. McKay
%A D. P. Karp
%T IBM Computer Network/440
%J Computer Networks \(em Proceedings Courant Institute Symposium
%D November 1970

%A Terrence R. McKelvey
%A Dharma P. Agrawal
%T Design of Software for Distributed/Multiprocessor Systems
%J National Computer Conference \(em Proceedings
%I AFIPS
%V 51
%D 1982
%P 239-249
%K Petri nets

%T Ordering Actions for Visibility
%A Martin S. McKendry
%J IEEE Transactions on Software Engineering
%V SE-11
%N 6
%I IEEE Computer Society
%D June 1985
%O Special Issue on Reliability in Distributed Software and Database
Systems
%P 509-519
%K Abstract data types, actions, concurrency control, distributed systems,
objects, synchronization

%A A. A. McKenzie
%A B. P. Cosell
%A J. M. McQuillan
%A M. J. Thorpe
%A The Network Control Center for the ARPA Network
%J Proceedings 1st International Conference Computer Communication
%D October 1972
%C Washington DC
%P 185-191

%T The Parallel Complexity of Abelian Permutation Group Problems
%A Pierre McKenzie
%A Stephen A. Cook
%I Dept. of Computer Science
%D April 1985

%A J. J. McKeown
%T Global optimisation on the DAP
%I ICL

%l journal-article
%A V. McLellan
%T IBM Mini a Radical Departure
%J Datamation
%V 25
%N 11
%P 53-55
%M October
%K RISC
%D 1979

%A R. J. McMillen
%A Howard Jay Siegel
%T Dynamic Rerouting Tag Schemes for the Augmented Data Manipulator Network
%J Proceedings of 8th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 9
%N 3
%D May 1981
%P 505-
%K interconnection

%A R. J. McMillen
%A Howard Jay Siegel
%T Performance and Fault Tolerance Improvements in the Inverse Augmented
Data Manipulator Network
%J Proceedings of 9th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 10
%N 3
%D April 1982
%P 63-72

%A R. J. McMillen
%A Howard Jay Siegel
%T A comparison of cube type and data manipulator type networks
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 614-621
%K
%O Network Evaluation

%A Robert J. McMillen
%A Howard Jay Siegel
%T On the Comparison Between Single and Multiple Processor Systems
%J Proceedings of 7th Annual Symposium on Computer Architecture
%D 1980
%P 9-16

%A Robert J. McMillen
%A Howard Jay Siegel
%T MIMD Machine Communication Using the Augmented Data Manipulator Network
%J Proceedings 7th Annual Symposium on Computer Architecture
%D May 1980
%C La Baule, France
%P 51-60

%A Robert J. McMillen
%A George B. Adams, III
%A Howard Jay Siegel
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Performance and Implementation of 4x4 Switching Nodes in an
Interconnection network for PASM
%P 229-233
%O Interconnection Networks

%A Robert J. McMillen
%A Howard Jay Siegel
%T Routing Schemes for the Augmented Data Manipulator Network in an MIMD
System
%J IEEE Transactions on Computers
%V C-31
%N 12
%D December 1982
%P 1202-1214
%K Augmented data manipulator (ADM), broadcast routing tags,
distributed processing, dynamic rerouting, interconnection networks,
inverse augmented data manipulator (IADM), MIMD machines, parallel processing,
PASM, routing tags
Switching networks
%X
Reproduced in the 1984 tutorial: "Interconnection Networks for parallel
and distributed processing" by Wu and Feng.

%A R. McNaughton
%T Scheduling with Deadlines and Loss Functions
%J Management Science
%V 6
%N 1
%D October 1969
%P 1-12

%A John A. McPherson
%A Charles R. Kime
%T A Two-Level Diagnostic Model for Digital Systems
%J IEEE Transactions on Computers
%V C-28
%N 1
%D January 1979
%P 16-27
%K Diagnosable digital systems, diagnostic modeling,
fault-tolerant computing, part diagnosis,
Fault-tolerant networks

%A J. McQuillan
%A W. Crowther
%A B. Cosell
%A D. Walden
%A F. E. Heart
%T Improvement in the design and performance of the ARPA network
%J Proc. Fall Joint Computer Conf.
%V 41
%I AFIPS Press
%C Montvale, New Jersey
%P 741-754

%T Design considerations for routing algorithms in computer networks
%A J. M. McQuillan
%B 7th Hawaii International Conference on System Sciences
%C Honolulu, Hawaii
%D 8-10 Jan. 1974
%P 22-24
%O 3 REFS. Treatment Theoretical
%I Western Periodicals. North Hollywood, Calif., USA, 1974, x+248
%K data communication systems communication networks
design routing algorithms computer networks ARPA Network

%A J. M. McQuillan
%T The evolution of message processing techniques in the ARPA network
%B Network systems and software internation state of the art report
%P 541-578
%O 0 REFS. Treatment GENERAL
%I Infotech Information. Maidenhead, Berks., England.,1975,
Std Book No.0 85539 230 4
%E D. Bates
%D 1975
%K computer networks operating systems
message processing techniques ARPA network computer networks

%A J. M. McQuillan
%A D. C. Walden
%T The ARPA network design decisions
%J Comput. Networks (Netherlands)
%V 1
%N 
%P 243-289
%O 36 REFS. Treatment Practical
%D Aug. 1977
%K computer networks packet switching
Advanced Research Projects Agency network equipment design computer
networks design decisions performance evaluation packet switching networks
store and forward subnetwork source to destination system design

%A J. M. McQuillan
%A V. G. Cerf
%T Tutorial: A practical view of computer communications protocols
%I IEEE
%N Catalog No. EHO 137-0
%D 1978

%A J. M. McQuillan
%T Message addressing modes for computer networks
%J Proceedings of Compcon Fall '78, Computer Communications Networks
%C Washington, DC, USA
%D 5-8 Sept. 1978
%P 80-88
%O 3 REFS. Treatment Applications, General
%I IEEE. New York, USA 1978, xi+434
%K computer networks
logical addressing broadcast addressing group addressing
message addressing mode

%A J. M. McQuillan
%T Local Networks Technology and the Lessons of History
%J Computer Networks
%V 4
%N 10
%D October 1980
%P 235-238

%A J. M. McQuillan
%T Survey the field [office automation]
%S Computerworld (USA)
%V 17
%N 8A
%P 55-60
%O 0 REFS. Treatment GENERAL
%D 23 Feb. 1983
%K office automation
planning office automation OA
%X A rag article.

%A J. M. McQuillan
%T Tech drive: Nutshell information manager
%J Mod. Off. Technol. (USA)
%V 29
%N 8
%P 111-112
%O 0 REFS. Treatment APPLICATIONS, PRACTICAL
%D Aug. 1984
%K database management systems administrative data processing
administrative data processing IBM personal computers IBM compatible machines
disc storage
Nutshell information manager database management system DBMS instruction disc
manual $395 IBM PCs 256K RAM
estate agents personnel departments

%T Finding the missing link [microcomputer to mainframe]
%A J. M. McQuillan
%J Mod. Off. Technol. (USA)
%V 29
%N 6
%P 106-114
%O 0 REFS. Treatment PRACTICAL
%D June 1984
%K computer interfaces computer networks
microcomputer mainframe link computer interfacing mainframe personal computers
terminals computer to computer hook up guidelines standards
control policy

%A C. Mead
%A L. Conway
%T Introduction to VLSI Systems
%I Addison-Wesley
%D 1980

%A C. A. Mead
%A M. Rem
%T Highly Concurrent Structures with Global Communication
%E C. A. Mead
%E L. A. Conway
%B Introduction to VLSI Systems
%I Addison-Wesley
%D 1980

%A Lambert Meertens
%T Bitonic sort on Ultracomputers
%R ULTRACOMPUTER NOTE #1
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D March 14, 1979

%A Lambert Meertens
%T Recurrent Ultracomputers are not log N-Fast
%R ULTRACOMPUTER NOTE #2
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D March 18, 1979

%A Kurt Mehlhorn
%A Uzi Vishkin
%T Granularity of Parallel Memories
%R TR #89
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D October 1983
%X To appear in \fITheoretical Computer Science.\fP

%T A Comparative Study of Some Two-Processor Organizations
%A S. K. Mehra
%A J. W. Wong
%A J. C. Majithia
%J IEEE Transactions on Computers
%V C-29
%N 1
%D January 1980
%P 44-49
%K Dynamic reconfiguration, performance degradation, queueing models,
response time analysis, two-processor organizations
%O Performance analysis

%A S. K. Mehra
%A J. C. Majithia
%T Some Software Issues in Adaptable Architectures
%J Computer Software and Applications Conference (COMPSAC80)
%I IEEE
%D October 1980
%P 484-493

%A P. Mehrotra
%A T. W. Pratt
%T Language Concepts for Distributed Processing of Large Arrays
%T Language Constructs and Support Systems for Distributed Computing
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 19-28

%A P. Mehrotra
%A T. W. Pratt
%T A model for the distribution, storage, and processing of large arrays
%R ICASE Report 83-59
%D October 29, 1983
%X \fRSubmitted to\fP TOPLAS

%A Ravi Mehrotra
%A Sarosh N. Talukdar
%T Scheduling of Tasks for Distributed Processors
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%P 263-270
%D June 1984
%K multiprocessor issues

%T Superlinear Speedup Through Randomized Algorithms
%A Ravi Mehrotra
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 291-300
%K Numeric Processing

%A Piyush Mehrotta
%A John Van\ Rosendale
%T The BLAZE Language: A Parallel Language for Scientific Programming
%R Report No. 85-29
%I ICASE, NASA Langley Research Center
%C Hampton, CA 23886
%D May 1985
%K parallel programming, applicative languages
%X A Pascal-like syntax with the "forall" construct, APL-style accumulation
operators, array arithmetic, and a functional semantic.

%A D. Meier
%T Two-Dimensional, One-Fluid Hydrodynamics:
An Astrophysical Test Problem for the Nearest Neighbor Concurrent Processor
%R Hm90
%I Jet Propulsion Lab, California Institute of Technology
%C Pasadena, CA
%D July 22, 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%A D. L. Meier
%A D. G. Payne
%T Astrophysical Modelling
%R Hm44
%I California Institute of Technology
%C Pasadena, CA
%D November 1983
%K Caltech Cosmic Cube, hypercube, C^3P

%A D. L. Meier
%A D. G. Payne
%T Simulation of Compact Radio Sources
%R Internal memo 85
%I California Institute of Technology
%C Pasadena, CA
%D July 1984
%K Caltech Cosmic Cube, hypercube, C^3P
%X NASA proposal.

%A D. L. Meier
%T C3P0: A Proposed General Purpose Intermediate Host Program
%R Hm87
%I California Institute of Technology
%C Pasadena, CA
%D July 10, 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%A J. Meijerink
%A H. van der Vorst
%T An Iterative Solution Method for Linear Systems of Which the
Coefficient Matrix is a Symmetric M-Matrix
%J Math. Comp.
%V 31
%P 148-162
%X Remove?

%A J. Meijerink
%A H. van der Vorst
%T Guidelines for the Usage of Incomplete Decomposition in Solving Sets of
Linear Equations as They Occur in Practical Problems
%J J. Comp. Phys.
%V 14
%P 134-155
%D 1981
%X Remove?

%A W. C. Meilander
%A J. Garret
%A M. Bialer
%T A Mission Oriented Associative Processor Using Plated Wire
%E L. C. Hobbs
%E D. J. Theis
%E Joel Trimble
%E Harold Titus
%E Ivar Highberg
%B Parallel Processor Systems, Technologies and Applications
%I Spartan Books
%C New York, New York
%D 1970
%P 153-163
%K Device technology utilization in parallel processors

%A W. C. Meilander
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T History of Parallel Processing at Goodyear Aerospace
%P 5-15
%O History of Parallel Processing

%A B. Meister
%P P. Janson
%A L. Svobodova
%T File Transfer in Local-Area Networks: A Performance Study
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Performance Studies, connection oriented logical-link control,
Series 1 file series on a token-ring,
%P 338-349

%A R. Melhem
%A W. Rheinboldt
%T A Mathematical Model for th Verification of Systolic Networks
%I University of Pittsburgh
%R Institute for Computational Mathematics and Applications Technical
Report No. ICMA-82-47
%D 1982

%A R. Melhem
%T An Abstract Systolic Model and Its Application to the Design of Finite
Element Systems
%I University of Pittsburgh
%R Institute for Computational Mathematics and Applications Technical
Report No. ICMA-83-66
%D 1983

%A R. Melhem
%T Formal Verification of a Systolic System for Finite Element Stiffness
Matrices
%I University of Pittsburgh
%R Institute for Computational Mathematics and Applications Technical
Report No. ICMA-83-56
%D 1983
%X Remove?

%A Rami Melhem
%T A Language for the Simulation of Systolic Architectures
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K systolic arrays, SCE systems of casusal equations,
%C Boston, MA
%P 310-314

%T Formal specification and Mechanical Verification of SIFT: A
Fault-Tolerant Flight Control System
%A P. Michael Melliar-Smith
%A Richard L. Schwartz
%J IEEE Transactions on Computers
%V C-31
%N 7
%D July 1982
%P 616-630
%K Distributed systems, fault tolerance, reliability, SIFT, specification,
verification
Special Issue on Reliable and Fault-Tolerant Computing

%A D. Melson
%A J. Keller
%T Experience in Using the CYBER 203 and CYBER 205 for Dimensional
Transonic Flow Calculations
%J 21st Aerospace Sciences Meeting
%I AIAA
%R Paper 83-0500
%D January 1983
%X Also in Control Data Corp, Proceedings Symposium CYBER 205 Applications,
Ft. Collins, CO, 1982.

%A Garard Memmi
%A Yves Raillard
%T Some New Results About the (d,k) Graph Problem
%J IEEE Transactions on Computers
%V C-31
%N 8
%D August 1982
%P 784-791
%K Communication network, diameter minimization, (d,k) graph,
graph generating operations, graph theory, Moore graph
%X
Reproduced in the 1984 tutorial: "Interconnection Networks for parallel
and distributed processing" by Wu and Feng.

%A Daniel A. Menasce
%A Richard R. Muntz
%T Locking and Deadlock Detection in Distributed Data Bases
%J IEEE Transactions on Software Engineering
%V SE-5
%N 5
%D May 1979
%P 195-202
%K databases, deadlock detection, distributed data bases, graph theory
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%T A Locking Protocol for Resource Coordination in Distributed Databases
%A Daniel A. Menasce
%A Gerald J. Popek
%A Richard R. Muntz
%J ACM Transactions on Database Systems
%V 5
%N 2
%D June 1980
%P 103-138
%K Concurrency, crash recovery, distributed databases, locking protocol,
consistency
CR Categories: 4.33, 4.35, 5.24

%A Raul H. Mendez
%T Supercomputer Benchmarks Give Edge to Fujitsu
%J SIAM News
%D March 1984

%A Raul Hernan Mendez
%T Benchmarks on Japanese and American Supercomputers \(em Preliminary Results
%J IEEE Transactions on Computers
%V C-33
%N 4
%D April 1984
%P 374
%K Benchmark, CPU timer, compiler, performance, supercomputer, vectorization,
Correspondence

%T KYKLOS: A Linear Growth Fault-tolerant Interconnection Network
%A Bernard L. Menezes
%A Roy M. Jenevein
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 498-502
%K Aspects of Parallel Systems

%A Angelo Rafaelle Meo
%T Modular Tree Structures
%J IEEE Transactions on Computers
%V C-17
%N 5
%D May 1968
%P 432-442
%K decreasing-variable networks of the pth order, fixed-variable networks,
modular tree networks, specification bits, universal networks,
Automata & switching theory

%A M. Merriam
%T On the Factorization of Block-Tridiagonals Without Storage Constraints
%J J. Sci. Stat. Comp
%I SIAM
%X To appear
%D 1984
%X Remove?

%A M. Merritt
%T Elections in the Presence of Faults
%J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing
%I ACM
%D August 1984

%A M. Merritt
%A D. Mitchell
%T Protocols for Decentralized Detection and Optimal Resolution of
Deadlocks
%J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing
%I ACM
%D August 1984

%A C. Messajje
%A W. R. Adrion
%T Analysis of parallel processing for air defense and air traffic control
for Thailand
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 429-430
%K
%O Parallel processor architectures for air traffic control

%A H. Messias
%A B. McKeever
%T Team an Array Processor with a MU-P for Super Performance in Data
Communication
%J Electronic Design
%V 28
%N 8
%D April 12, 1980
%P 115-120

%A R. M. Metcalfe
%T Distributed computing and network hierarchies
%B Proceedings of the 1975 International Conference on Cybernetics
and Society
%C San Francisco, Calif., USA
%D 23-25 Sept. 1975
%P 215
%O 0 REFS. Treatment General, Practical
%I IEEE. New York, USA, 1975, xvi+475
%K computer networks
network hierarchies computer communication techniques distributed computing

%A R. M. Metcalfe
%T Local networking of personal computers
%B Information Processing 83. Proceedings of the IFIP 9th World
Computer Congress
%C Paris, France
%D 19-23 Sept. 1983
%P 525-532
%O 24 REFS. Treatment PRACTICAL
%I North-Holland. Amsterdam, Netherlands, xvi+976, Std Book No.0 444 86729 5
%E R. E. A. Mason
%K computer networks
local networking personal computers Ethernet distributed broadcast
packet switching techniques

%A Robert M. Metcalfe
%A David R. Boggs
%T Ethernet: Distributed packet switching for local computer networks
%J Communications of ACM
%V 19
%N 7
%D July 1976
%P 395-403
%K Computer networks, packet switching, multiprocessing, distributed control,
distributed computing, broadcast communication, statistical arbitration
CR categories: 3.81, 4.32, 6.35
packet switching computer networks
packet switching computer networks ethernet broadcast communication
distributed computing multiprocessors statistical arbitration
distributed control multiprocessing
%O 36 refs
treatment: applic; practical
%X Ethernet is a branching broadcast communication system for carrying
digital data packets among locally distributed computing stations. The
packet transport mechanism provided by ethernet has been used to build
systems which can be viewed as either local computer networks or loosely
coupled multiprocessors. An ethernet's shared communication facility, its
ether, is a passive broadcast medium with no central control. Coordination
of access to the ether for packet broadcasts is distributed among the
contending transmitting stations using controlled statistical arbitration.
Switching of packets to their destinations on the ether is distributed
among the receiving stations using packet address recognition. Design
principles and implementation are described, based on experience with an
operating ethernet of 100 nodes along a kilometer of coaxial cable. A model
for estimating performance under heavy loads and a packet protocol for
error controlled communication are included for completeness.
Reproduced in "Computer Networks: A tutorial"
Abrams.M., Blanc,R.P., and Cotton,I., (Eds.) (1980); in CACM 26(1983), 90-95.

%A J. J. Metzner
%T A Proposed Parity Structure for large remotely-located duplicate
data files
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 257-262
%K
%O Replicated Databases

%A G. Meurant
%T Vector Preconditioning for the Conjugate Gradient Method
%D 1985
%X To appear
%X Remove?

%T The PASM Parallel System Prototype
%A David G. Meyer
%A Howard J. Siegel
%A Thomas Schwederski
%A Nathanial J. Davis, IV
%A James T. Kuehn
%J Digest of Papers, Compcon85 Thirtieth IEEE Computer society
International Conference
%I IEEE Computer Society
%D February 25-28, 1985
%P 429-434

%A G. Meyer
%A R. Lee
%T Effectiveness of Multiprocessor Networks for Solving the Nonlinear
Poisson Equation
%E D. Kuck
%E D. Lawrie
%E A. Sameh
%B High Speed Computer and Algorithm Organization
%I Academic Press
%C New York
%D 1977
%P 323-326

%A Gerard G. L. Meyer
%A Gerald M. Masson
%T An Efficient Fault Diagnosis Algorithm for Symmetric Multiprocessor
Architectures
%J IEEE Transactions on Computers
%V C-27
%N 11
%D November 1978
%P 1059-1063
%K Diagnosis algorithm, fault syndromes, microprocessor, modular networks,
Correspondence

%T Performability Evaluation of the SIFT Computer
%A John F. Meyer
%A David G. Furchtgott
%A Lian T. Wu
%J IEEE Transactions on Computers
%V C-29
%N 6
%D June 1980
%P 501-509
%K Fault tolerant computing, performability evaluation, performance
evaluation, reliability evaluation, SIFT computer
%O System analysis

%A M. E. Meyer
%A A. R. K. Sastry
%T Performance analysis of tandem burst-error links with applications to
ISDN
%B Proceedings of the Computer Networking Symposium
%C Silver Spring, MD, USA
%P 57-66
%O 14 REFS. Treatment THEORETICAL/MATHEMATICAL
%I IEEE Comput. Soc. Press, Technol
Silver Spring, MD, USA, p: iv+147
%D 13 Dec. 1983
%K digital communication systems errors telecommunication links
performance analysis ISDN burst errors average error rate
error gap distribution tight upper bound standard deviation composite channel
tandem links CCITT independent error approach
%X Tandem links with burst errors are analyzed using the Gilbert model
for individual links. The results are of particular relevance to
integrated services digital networks (ISDN). The average error rate,
the error gap distribution, its mean and a tight upper bound on its
standard deviation are analytically derived for the composite channel
with N tandem links (circuits). These statistics are then related to
the performance measures proposed by CCITT for ISDN. Some numerical
results are presented to highlight the large differences in the
estimated performance with a burst-error model approach and with an
independent-error approach (having identical average error
probabilities)

%A Susan C. Meyer
%A J. Robert Jump
%T A Comparative Analysis of Two Parallel Computation Models
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 131
%K
%O Program decomposition and Petri nets
%X Summary only.

%A Susan C. Meyer
%T An analytic approach to performance analysis for a class of data flow
processors
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 106-115
%K
%O System performance

%A G. Michel
%A J. Rouillard
%A G. Charles
%A D. Tranvaux
%T CICS 81: A VLSI-based local network for distributed process-control
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 764-769
%K
%O Local Area Networks

%A M. H. Mickle
%A W. G. Vogt
%A J. G. Lee
%T Network Decomposition Applied to Serial, Parallel, and Array Processing
%J Proc. Summer Computer Simulation Conf.
%D 1979
%P 961-962

%A M. Dennis Mickunas
%A Richard M. Schell
%T Parallel Compilation in a Multiprocessor Environment
%J Proc. ACM Annual Conference
%D 1978
%P 241-246
%K Parallel LP parser (PLR),
%X Extended abstract.

%A M. Dennis Mickunas
%T Using Projective Geometry to Design Bus Connection Networks
%J Workshop on Interconnection Networks for Parallel and Distributed
Processing
%D April 1980
%I IEEE
%P 47-55

%A J. K. Millen
%T Parallel Derivatives for Multiprocessor Task Scheduling
%R MTR-2922
%I Mitre Corp.
%C McLean, VA
%D May 1975
%K scheduling
%X This technique transforms an arbitrary flowchart into the equivalent
maximally parallel flowchart and uses it to derive alternative scheduling
strategies for a multi-miniprocessor.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%T Control Unit Performance Issues in a Multiprogrammed, Multiprocessing
Computer
%A Allan Ray Miller
%I University of Illinois at Urbana-Champaign
%R UIUCDCS-R-84-1178
%D July 1984

%A Barton P. Miller
%A Cathryn Macrander
%A Stuart Sechrest
%T A Distributed Programs Monitor for Berkeley UNIX
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Distributed Operating System, measurement tools
%P 43-54

%A D. S. Miller
%A R. W. Fisher
%A B. R. Millard
%A V. G. Murthy
%T A distributed operating system for a local area network
%B Second Annual Phoenix Conference on Computers and Communications
1983 Conference Proceedings
%C Phoenix, AZ, USA
%P 281-8
%O 22 Refs
Treatment PRACTICAL
%I IEEE, New York, USA, p: ix +598
%D 14-16 March 1983
%K operating systems computer networks
Herbert II distributed operating system local area network
Codex Intelligent Terminal System Codex ISOS
%X Herbert-II is a distributed operating system which runs on a local
area network of three 6809 based Codex Intelligent Terminal System
computers fully connected by MC6821 PIA parallel interfaces. The
Codex ISOS operating system at each node has been extended to include
physical, link, network, transport and session communication layers
normally added on as an afterthought in access methods or utilities
in conventional distributed system architectures. Herbert-II is an
object-oriented UNIX-like operating system which supports
multiprogramming on multiple processors

%T A Multiple-Stream Registerless Shared-Resource Processor
%A Edward F. Miller, Jr.
%J IEEE Transactions on Computers
%V C-23
%N 3
%D March 1974
%P 277-285
%K Computer architecture, computer instruction stream models,
multiple instruction stream, multiple data stream (MIMD),
queued instruction processing, resource-sharing, two-address format,
Computer systems

%A J. A. Miller
%A R. J. LeBlanc
%T Distributed Compilation: A Case Study
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 548-554
%K
%O High Level Languages for Distributed Processing

%A J. S. Miller
%A D. J. Lickly
%A A. L. Kosmala
%A J. A. Saponaro
%T Multiprocessor Computer System Study
%I National Technical Information Service
%R N70-41238
%D March 1970

%A J. S. Miller
%T Fault-tolerance features of an aerospace multiprocessor
%J AGARD Conf. Proc. No. 149, Real-Time Computer-Based Systems
%C Athens, Greece
%D May 1974
%K reliability and error recovery
%X This system uses multiprocessing primarily to improve reliability.
Results of multiple, concurrently executing processors are compared on
a pre-instruction basis, and automatic reloading of one processor by
another is used in case of processor failure.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A James Grier Miller
%T Living Systems
%I McGraw-Hill
%D 1978

%A L. J. Miller
%T A Heterogeneous Multiprocessor Design and the Distributed Scheduling
of Its Task Group Workload
%J Proceedings of 9th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 10
%N 3
%D April 1982
%P 283-290

%A R. Miller
%T A Comparison of Some Theoretical Models of Parallel Computation
%J IEEE Transaction on Computers
%V C-22
%P 710-717
%D 1974

%A R. E. Miller
%A J. Cocke
%T Configurable Computers: A New Class of General Purpose Machines
%B International Symposium on Theoretical Programming
%E A. Ershov
%E V. A. Nepomnishy
%S Lecture Notes in Computer Science
%V5
%D August 1972
%P 285-298

%A Raymond E. Miller
%T A Comparison of Some Theoretical Models of Parallel Computation
%J IEEE Transactions on Computers
%V C-22
%N 8
%D August 1973
%P 710-717
%K Parallel computation, parallelism, Petri nets, program schemata,
Special issue on parallel computation, theoretical models.

%A Russ Miller
%A Quentin F. Stout
%T Computational geometry on a mesh-connected computer (Preliminary Version)
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 66-73
%K SIMD, graph analysis
SUNY, Binghamton, NY
%O interconnection

%A Russ Miller
%A Quentin F. Stout
%T Convexity algorithms for pyramid computers (Preliminary Version)
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 177-184
%O image processing
%K Mesh connected computers, layering, naming,

%T Varying Diameter and Problem Size in Mesh-Connected Computers
%A Russ Miller
%A Quentin F. Stout
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 697-699
%K Mesh-Structured Systems

%A W. F. Miller
%A R. Aschenbrenner
%T The GUS Multicomputer System
%J IEEE Transactions on Electronic Computers
%V EC-12
%N 5
%D December 1963
%P 671-676

%A R. E. Millstein
%T Compiler Design for ILLIAC IV
%I National Technical Information Service
%R AD 737260
%D January 1972

%A R. E. Millstein
%T Control Structures in ILLIAC FORTRAN
%J Comm. ACM
%V 16
%P 621-627
%D 1973

%A R. E. Millstein
%A C. A. Muntz
%T The ILLIAC IV FORTRAN Compiler
%J SIGPLAN Notices
%P 1-8
%D 1975

%A G. Milne
%A R. Milner
%T Concurrent Processes and Their Syntax
%J Journal of the ACM
%V 26
%N 2
%D April 1979
%P 302-321

%A G. J. Milne
%T Abstraction and Nondeterminism in Concurrent Systems
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 358-364
%K
%O Mutual Exclusion and Synchronization

%A A. J. R. G. Milner
%T Using Algebra for Concurrency
%B Distributed Computing - Part V Modelling and Verification
%E Fred B. Chambers
%E David A. Duce
%E Gillian P. Jones
%I Academic Press
%S APIC Studies in Data Processing
%V 20
%D 1984
%P 291-305

%A R. Milner
%T A Calculus of Communicating Systems
(Lecture Notes in Computer Science, 92)
%I Springer-Verlag
%C Berlin
%D 1980

%A R. Milner
%T Four Combinators for Concurrency
%T Language Constructs and Support Systems for Distributed Computing
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 104-110

%A Robert L. Milton
%T Preliminary Results of a Comparative Analysis of ILLIAC IV Languages
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 172-179
%K CFD, IVTRAN, GLYPNIR, (FORTRAN, ALGOL),
%O languages

%A V. Milutinovic
%A B. Furht
%A K. Hwang
%A N. Lopez-Benitez
%A K. Waldschimdt
%T The VM Architecture: A HLL Microprocessor Architecture for Dedicated
Real-Time Applications
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 7.20-7.27
%O High level language architecture evaluation

%A V. M. Milutinovic
%A J. J. Crnkovic
%A L.-Y. Chang
%A H. J. Siegel
%T The LOCO Approach to Distributed Task Allocation in AIDA by Verdi
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Performance Studies,
distributed task allocation, loosely coupled multiprocessor systems,
artificial intelligence oriented systems,
%P 359-368

%A T. Liu Ming
%A Duen Ping Tsay
%A R. C. Lian
%E P. Ravasio
%E G. Hopkins
%E N. Naffah
%T Design of a network operating system for the distributed double-loop
computer network (DDLCN)
%B Local Computer Networks. Proceedings of the IFIP TC 6 International
In-Depth Symposium
%C Florence, Italy
%P 225-248
%O 45 REFS. Treatment PRACTICAL
%I North-Holland
Amsterdam, Netherlands, p: xii +504, ISBN: 0-444-86386-9
%E Calcolo Autom., et al
%D 19-21 April 1982
%K operating systems computer networks protocols distributed processing
distributed double loop computer network DDLCN network operating system NOS
protocol structure message passing layered protocol resource sharing
%X Presents the framework and model of a network operating system (NOS)
for use in distributed systems in general and for use in the
Distributed Double-Loop Computer Network (DDLCN) in particular. An
integrated approach is taken to design the NOS model and protocol
structure. It is based on the object model and a novel 'task'
concept, using message passing as an underlying semantic structure. A
layered protocol is provided for the distributed system kernel to
support NOS. This approach provides a flexible organization in which
system-transparent resource sharing and distributed computing can
evolve in a modular fashion

%A J. Minker
%T An Overview of Associative Memory or Content-Addressable Memory Systems
and a KWIC Index to the Literature: 1956-1970
%J Computing Reviews
%I ACM
%D October 1971
%P 453-504

%A J. Minker
%T Associative Memories and Processors: A Description and Appraisal
%R TR-195
%I University of Maryland
%D July 1972

%A Minoura
%T Deadlock Avoidance Revisited
%J JACM
%V 29
%D Oct 1982
%P 1023-1048

%A M. Minsky
%T Form and content in computer science
%J Journal of the ACM
%V 17
%N 2
%D April 1970
%P 197-215
%K Minsky's law (log n), performance bounds,
%X Turing award lecture.

%A M. Minsky
%A S. Papert
%T On Some Associative, Parallel, and Analog Computations
%B Associative Information Techniques
%E E. J. Jacks
%I American Elsevier
%C New York
%D 1971

%A Marvin Minsky
%T Plain Talk about Neurodevelopmental Epistemology
%I IJCAI
%J Proceedings of IJCAI
%D 1977
%P 1083
%X A description of his @@i(society of experts) theory of mind--Margot Flowers
Remove?

%A N. Minsky
%T Rotating Storage Devices as Partially Associative Memories
%J Proceedings AFIPS Fall Joint Computer Conference
%D 1972
%P 587-595

%A G. Miranker
%T Implementation of procedures on a class of data flow processors
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 77-86
%K
%O Data-Flow Architectures

%A W. Miranker
%A W. Liniger
%T Parallel Methods for the Numerical Integration of Ordinary Differential
Equations
%J Math. Comp.
%V 21
%P 303-320
%D 1967

%A W. Miranker
%T Hierarchical Relaxation
%J Computing
%V 23
%P 267-285
%D 1979
%X Remove?

%A W. L. Miranker
%T A Survey of Parallelism in Numerical Analysis
%J SIAM Review
%V 13
%N 4
%D October 1971
%P 524-547

%A W. L. Miranker
%T Parallel Methods for Solving Equations
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 9-15
%K asynchronous methods, search algorithms

%A J. H. Mirza
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Performance Evaluation of Pipeline Architectures
%P 101-104
%O Performance

%A Jamshed H. Mirza
%T Performance of self-routing shuffle-exchange interconnection network in SIMD
processors
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 13-15
%K
NY Poly Tech
%O Interconnection networks

%A J. Misra
%A K. M. Chandy
%A T. Smith
%T Proving Safety and Liveness of Communicating Processes with Examples
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 201-208

%A J. Misra
%A K. M. Chandy
%T A Distributed Graph Algorithm: Knot Detection
%J ACM Trans. on Programming Languages and Systems
%V 4
%D October 1982
%P 678-686

%A N. Missirlis
%A D. Evans
%T A Second Order Iterative Scheme Suitable for Parallel Implementation
%B Advances in Computer Methods for Partial Differential Equations,
Proc. of the Fifth IMACS International Symposium, Lehigh University
%E R. Vichnevetsky
%E R. Stepleman
%V V
%I Lehigh University
%D June 1984
%P 203-206

%A Nikolaos M. Missirlis
%T A Parallel Iterative Method for Solving a Class of Linear Systems
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 181-189
%D 1984
%X A class of extended Jacobi solvers.

%A D. P. Misunas
%T Deadlock Avoidance in Data-Flow Architecture
%J Proceedings of the Third Milwaukee Symposium on Automatic Computation
and Control
%D April 1975

%A D. P. Misunas
%T Report on the Second Workshop on Data Flow Computer and Program
Organization
%R TM-136
%I Laboratory for Computer Science, MIT
%C Cambridge, MA
%D July 1979

%A David P. Misunas
%T Structure Processing in a Data-Flow Computer
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 230-234
%K
%O Data flow architecture

%A David P. Misunas
%T Performance analysis of a data-flow processor
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 100-105
%K
%O System performance

%A David P. Misunas
%T Error detection and recovery in a data-flow computer
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 117-122
%K
%O Reliability

%A David P. Misunas
%T Workshop on Data Flow Computer and Program Organization
%J Computer Architecture News (SIGARCH)
%V 6
%N 4
%D October 1977
%P 6-22
%X A good summary of this early workshop.

%A James G. Mitchell
%A Jeremy Dion
%T A Comparison of Two Network-Based File Servers (Summary)
%J Proceedings of the 8th Symposium on Operating Systems Principles,
Operating Systems Review
%V 15
%N 5
%D December 1981
%P 45-46
%K XDFS (Xerox Distributed File System), CFS (Cambridge File System)
%O remote data storage

%A I. Mitrani
%A K. C. Sevcik
%T Evaluating the Trade-off Between Centralized and Distributed Computing
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 520-529
%O Decentralized control

%T Parallel Processor Technology Tradeoff Study for the NASA End-to-End Data
System (NEEDS)
%Q Mitre Corporation
%D January 1980
%K MPP, Massively Parallel Processor

%A K. Miura
%T The Block Iterative Method for ILLIAC IV
%I University of Illinois
%R Center for Advanced Computation Doc. 41
%D 1971

%A K. Miura
%T FACOM Vector Processor VP-100/VP-200
%B Proceedings of the NATO Workshop on High Speed Computations
%E J. Kowalik
%S NATO ASI Series
%V F-7
%I Springer-Verlag
%D 1984
%P 127-138

%A Kenichi Miura
%A Keiichiro Uchida
%T Facom Vector Processor System: VP-100/VP-200
%I Fujitsu Limited
%C Kawasaki, Japan
%S NATO ASI Series
%V F7
%I Springer-Verlag
%D 1984

%A E. N. Miya
%T Multiprocessor/Distributed Processing Bibliography
%J Computer Architecture News
%I ACM SIGARCH
%V 13
%N 1
%D March 1985
%P 27-29
%K Annotated bibliography, computer system architecture, multicomputers,
multiprocessor software, networks, operating systems, parallel processing,
parallel algorithms, programming languages, supercomputers,
vector processing, cellular automata, fault-tolerant computers
%X Notice of this work.  Itself.  Quality: no comment.
$Revision$ $Date$

%T Evaluating The Cost-Effectiveness of Switches in Processor Array
Architectures
%A Haim Mizrahi
%A Israel Koren
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 480-487
%K Aspects of Parallel Systems
processor arrays, switching elements, embedding efficiency,
area utilization, reliability, computational availability, fault-tolerance,

%A P. V. Mockapetris
%T Analysis of reliable multicast algorithms for local networks
%B Proceedings. Eighth Data Communications Symposium
%C North Falmouth, MA, USA
%I IEEE Computer Soc. Press, Silver Spring, MD, USA x+261
%P 150-157
%D 3-6 Oct. 1983
%O 16 Refs
Treatment THEORETICAL/MATHEMATICAL.
%K computer networks data communication systems protocols.
computer networks data communication systems protocols
reliable multicast algorithms local networks transmission errors.
%X Several families of multicast algorithms for local networks are
described and analyzed. The algorithms examined provide reliable
service by dealing with the effects of transmission errors.

%A Mitchell L. Model
%T Monitoring System Behavior in A Complex Computational Environment
%R CSL-79-1
%I Xerox Palo Alto Research Center
%C Palo Alto, CA 94306
%D January 1979

%A Howard S. Modell
%A Ronnie G. Ward
%A Ted M. Sparr
%T Coordination of parallel processes in PL/1
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 247-253
%K
%O Language issues

%A J. Modi
%A M. Clarke
%T An Alternative Givens Ordering
%J Numer. Math
%V 43
%P 83-90
%D 1984
%X Remove?

%A J. J. Modi
%A Roy O. Davies
%A D. Parkinson
%T Extension of the Parallel Jacobi Method to the Generalised Eigenvalue
Problem
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 191-197
%D 1984

%A J. J. Modi
%A G. S. J. Bowgen
%T QU Factorisation and Singular Value Decomposition on the DAP
%E D. J. Paddon
%B Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford, England
%D 1984
%P 209-228
%K SIMD, Givens rotation,

%A Dennis E. Moellman
%A Robert A. Meyer
%T Application of distributed processing to the production of digital
terrain data
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 18-23
%K
%O applications: image processing

%A Jeffrey Mogul
%T Representing Information About Files
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 432-439
%O Distributed database system

%A Chilukuri K. Mohan
%A Larry D. Wittie
%T Local Reconfiguration of Management Trees in Large Networks
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Fault-Tolerant Networks, Uncle reconfiguration algorithm,
%P 386-393

%A Joseph Mohan
%T Experience with two parallel programs solving the Traveling Salesman
problem
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 191-193
%K
CMU, Cm*, StarOS, LMSK algorithm
non-numerical algorithms

%A Bernhard Moiske
%T Code Optimization for Arithmetic Expressions with Common Subexpressions
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 447-453
%D 1984

%T A Graph-Based Computation Model for Real-time Systems
%A Aloysius K. Mok
%Z UT Austin
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 619-623
%K Expressing Parallelism
real time systems, design methodology, concurrent processes,
parallel computation model, requirements specification, algorithms,
scheduling, program synthesis,

%T Fundamental Design Problems of Distributed Systems for the Hard
Real-Time Environment
%A Aloysius Ka-Lau Mok
%I Massachusetts Institute of Technology
%R MIT/LCS/TR-297

%A Aloysius Ka-Lau Mok
%T Fundamental Design Problems Of Distributed Systems For The Hard
Real-Time Environment
%I Massachusetts Institute Of Technology
%R MIT/LCS/TR-297
%D May 1983
%K hard realtime systems, real-time scheduling, distributed systems,
software engineering, design automation, embedded systems

%A D. I. Moldovan
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T A Multi-Microcomputer Architecture for an Iterative Algorithm
%P 155-156
%O

%A D. I. Moldovan
%A C. I. Wu
%A J. A. B. Fortes
%T Mapping an arbitrarily large QR algorithm into a fixed size VLSI
array
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 365-373
%K
%O array computations

%T On the Analysis and Synthesis of VLSI Algorithms
%A Dan I. Moldovan
%J IEEE Transactions on Computers
%V C-31
%N 11
%D November 1982
%P 1121-1126
%K Data dependences, mapping algorithms into hardware, parallel
processing, transformations of algorithms, VLSI algorithms
Special issue on parallel and distributed processing

%A Dan I. Moldovan
%T On the design of algorithms for VLSI systolic arrays
%J Proceedings of the IEEE
%V 71
%N 1
%D Jan. 1983
%P 113-120
%X
Reproduced in the 1984 tutorial "Interconnection Networks for parallel
and distributed processing" by Wu and Feng.

%T The Architecture of the Dragon
%A Louis Monier
%A Pradeep Sindhu
%J Digest of Papers, Compcon85 Thirtieth IEEE Computer society
International Conference
%I IEEE Computer Society
%D February 25-28, 1985
%P 118-121

%A S. Montalvo
%A Caxton C. Foster
%T An Algorithm for Intercell Communication in a Tesselated Automaton
%J IEEE Transactions on Computers
%V C-25
%N 1
%D January 1976
%P 99-102
%K Associative memories, associative processors, content addressable
memories, network communication, path building, tesselated automata
correspondence

%A Warren A. Montgomery
%T Polyvalues: A Tools for Implementing Atomic Updates to Distributed Data
%J Proceedings of the 7th Symposium on Operating Systems Principles
%D December 1979
%P 143-149
%O distributed data management

%A R. Montoye
%A D. Lawrie
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T A Practical Algorithm for the Solution of Lower Triangular Systems on
a Parallel Processing System
%P 106-108
%O Numerical Algorithms

%T A Practical Algorithm for the Solution of Triangular Systems on a
Parallel Processing System
%A Robert K. Montoye
%A Duncan H. Lawrie
%J IEEE Transactions on Computers
%V C-31
%N 11
%D November 1982
%P 1076-1082
%K Interconnection networks, limited processor algorithms, linear
recurrences, numerical stability, parallel memory storage schemes,
parallel processing
Special issue on parallel and distributed processing

%A L. Montz
%T Safety and Optimization Transformations for Data Flow Programs
%R TR-240
%I Laboratory for Computer Science, MIT
%C Cambridge, MA
%D January 1980

%A M. Moore
%A R. Hiromoto
%A O. Lubeck
%T Experiences with the Denelcor HEP
%J Parallel Computing
%X To appear
%D 1984

%A W. Moore
%A K. Steiglitz
%T Efficiency of Parallel Processing in the Solution of Laplace's Equation
%B Advances in Computer Methods for Partial Differential Equations,
Proc. of the Fifth IMACS International Symposium, Lehigh University
%E R. Vichnevetsky
%E R. Stepleman
%V V
%I Lehigh University
%D June 1984
%P 252-257

%A Hans P. Moravec
%T Fully Interconnecting Multiple Computers with Pipelined Sorting Nets
%J IEEE Transactions on Computers
%V C-28
%N 10
%D October 1979
%P 795-798
%K MIMD organization, multiprocessors, parallel computation, sorting nets,
switching nets,
Correspondence

%A Manfred Morawe
%T Parallelverarbeitung in Der Seismik
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 355-358
%D 1984

%A E. Morenoff
%A W. Beckett
%A P. G. Kesel
%A F. J. Winninghoff
%A P. M. Wolff
%T 4-way Parallel Processor Partition of an Atmospheric Primitive-Equation
Prediction Model
%J Spring Joint Computer Conference
%I AFIPS Press
%V 38
%D 1971
%P 39-48
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."
This paper presented an application which used four heteregeneous CDC
(6500 and 3200) processors connect via extended memory and a drum.
Synchronization was carried out using one of the processors and a crude
scheme was used to achieve improve performance.

%A J-M. Morf
%A J-M. Delosme
%T Matrix Decompositions and Inversions via Elementary
Signature-Orthogonal Transformations
%J ISSM Int. Symp. Mini & Microcomputers in Control of Measurements
%C San Francisco
%D 1981
%X Remove?

%A Carroll Morgan
%T Specification of a Communications System
%E Y. Paker
%E J.-P. Jerjus
%B Distributed Computing Systems (Synchronization, Control and Communication)
%I Academic Press
%D 1983
%P 93-108
%X Yet another "communications like a telephone call" analogy paper.

%A H. Mori
%A H. Aiso
%T Parallel Processing of the FFT by an Array Processor
%J Trans. Institute of Electronics and Comm. Engineers of Japan, Section E,
%V E61
%N 2
%D February 1978
%P 65-72

%A Renato De Mori
%A Attilio Giodana
%T Parallel Algorithms for Interpreting Speech Patterns
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 193-205

%A P. Morice
%T Calcul Parallele et Decomposition Dans la Resolution d'equations Aux
Derivees Partialles de Type Elliptique
%I IRIA
%C Rocquencourt, France
%D 1972

%A M. Morjaria
%A G. Makinson
%T Operations with Sparse Matrices on the ICL DAP
%I Kent University

%A M. Morjaria
%A G. J. Makinson
%T Unstructured Sparse Matrix Vector Multiplication on the DAP
%E D. J. Paddon
%B Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford, England
%D 1984
%P 157-166
%K SIMD, 2 dimenional array, dense matrix, storage management,

%A M. Morjaria
%A G. Makinson
%T Unstructured Sparse Matrix Vector Multiplication on the DAP
%E D. Paddon
%B Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford
%D 1984
%P 157-166

%A John Morrison
%T A Debuggers for a Remote Multiprocessor Network
%I MIT
%R BS thesis
%C Cambridge, MA
%D May 1983
%K
Concert project, debugging demon, exception, interrupt, multiprocessor,
process, shell, slave

%T CMOS Manchester code converter for local area networks
%A G. Moseley
%B Wescon 83. Electronic Show and Convention
%C San Francisco, CA, USA
%D 8-11 Nov. 1983
%P 23/4/1-6
%O 0 REFS. Treatment PRACTICAL
%K CMOS integrated circuits local area networks data communication equipment
data communication equipment CMOS Manchester code converter
local area networks integrated circuit
physical signaling layer functions Protocol Ethernet

%A Michael Moshell
%A Jerome Rothstein
%T Parallel recognition of Patterns: Insights from formal language theory
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 222-229
%K
%O Fundamental Theory

%A M. Motegi
%A K. Uchida
%A T. Tsuchimoto
%T The Architecture of the FACOM Vector Processor
%I Fujitsu Limited
%C Kawasaki, Japan

%A M. Motegi
%A K. Uchida
%A T. Tsuchimoto
%T The Architecture of the FACOM Vector Processor
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 541-546
%D 1984
%K fujitsu,

%A T. Moto-oka, (Ed.)
%T Fifth Generation Computer Systems
%I North Holland
%C New York
%D 1982

%A T. Moto-oka
%T Japanese Project on Fifth Generation Computer Systems
%B Proceedings of the NATO Workshop on High Speed Computations
%E J. Kowalik
%S NATO ASI Series
%V F-7
%I Springer-Verlag
%P 99-115
%D 1984

%A Tohru Moto-oka
%T Overview of the Fifth Generation Computer System Project
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%D June 1983
%V 11
%N 3
%P 417-422
%X This paper is more of a glossy view of the 5th Gen project.
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984, pp. 596-601.

%A Donald R. Mott
%T A Distribute Computing Architecture for Real Time
System Control and Information Processing
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 204-211
%O Design and Requirements Specification Methodology

%A Richard Moulder
%T A data management system utilizing the STARAN associative processor
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 161
%K
%O RADCAP
%X A summary.

%A T. N. Mudge
%A B. A. Makrucki
%T Probabilistic Analysis of a Cross-Bar Switch
%J Proceedings of 9th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 10
%N 3
%D April 1982
%P 311-320

%A T. N. Mudge
%A B. A. Makrucki
%T An Approximate Queueing Model for Packet Switched Multistage
Interconnection Networks
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 556-562
%K
%O Multistage Network Performance

%A T. N. Mudge
%A T. Abdel-Rahman
%T Efficiency of Feature Dependent Algorithms for the Parallel Processing
of Images
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%r CRL-TR-11-83
%i Univ. of MI, Computing Research Lab.
%d March 1983
%D August 1983
%P 369-373
%K feature dependent algorithms, image processing, parallel processing
U Mich
models

%A T. N. Mudge
%A J. P. Hayes
%A G. D. Buzzard
%A D. C. Winsor
%T Analysis of multiple bus interconnection networks
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 228-232
%K interference, memory systems, bus systems, performance bandwidth,
%O queueing analysis

%A T. N. Mudge
%A Humoud B. Al-Sadoun
%T Memory Interference Models with Variable Connection Time
%J IEEE Transactions on Computers
%V C-33
%N 11
%D November 1984
%P 1033-1038
%K Markov chains, memory bandwidth, memory interference, multiprocessors,
performance evaluation,
Correspondence

%T A Semi-Markov Model for the Performance of Multiple-Bus Systems
%A T. N. Mudge
%A Humoud B. Al-Sadoun
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 521-529
%K Performance Measurement
multiple-bus system, multiprocessors, memory interference, memory bandwidth,
performance evaluation, semi-Markov processes, Markov chains,

%A Erik T. Mueller
%A Johanna D. Moore
%A Gerald J. Popek
%T A Nested Transaction Mechanism for LOCUS
%J Proceedings of the 9th Symposium on Operating Systems Principles,
Operating Systems Review
%V 17
%N 5
%D October 1983
%P 71-89
%K remote procedure call, transparency, file system coherence
%O LOCUS

%A P. T. Mueller, Jr.
%A Leah Jamieson Siegel
%A Howard Jay Siegel
%T A Parallel Language for Image and Speech Processing
%J Computer Software and Applications Conference (COMPSAC80)
%I IEEE
%D October 1980
%P 476-483
%O software problems of adaptable architectures

%T Concurrent Multigrid Methods
in an Object-Oriented Environment -- A Case Study
%A H. Muhlenbein
%A S. Warhaut
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 143-146
%K Operating System Problems

%A P. Mui
%A N. D. Georganas
%T Performance evaluation of two multiple-access protocols
%J Comput. Commun. (GB)
%V 7
%N 2
%P 73-78
%O 9 Refs.
Treatment PRACTICAL.
%D 1984
%K computer networks multi access systems packet switching protocols
synchronisation.
real time simulator performance evaluation multiple access protocols
microprocessor based simulator
packet transmission broadcast type local area network CSMA/CD Hymap
speech quality synchronization buffer delay receiver.
%X A real-time, microprocessor-based simulator was designed to study the
packet transmission of voice on a broadcast type local area network,
based on the CSMA/CD and Hymap multiple-access protocols. The speech
quality is evaluated subjectively. A packetization-frozen protocol is
used to eliminate the successive collisions due to possible
synchronization of packet generation among stations. The variance of
the network delay is bounded by discarding packets which have not
been transmitted within a certain amount of time. Smooth speech
output can be obtained by introducing additional buffer delay at the
receiver.

%A Jishnu Mukerji
%A R. B. Kiebutz
%T A Distributed File System for a Hierarchical Multicomputer
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 448-458
%O data base computers

%A A. Mukhopadhyay
%T Survey on Macrocellular Research
%R GJ-723
%I University of Iowa
%D December 1972

%A A. Mukhopadhyay
%A R. K. Guha
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Embedding a Tree in the Nearest Neighbor Array
%P 261-263
%O VLSI Architecture

%A D. E. Muller
%A F. P. Preparata
%T Restructuring of Arithmetic Expressions for Parallel Evaluation
%J Journal of the ACM
%V 23
%N 3
%D July 1976
%P 534-543

%A M. E. Muller
%T An Approach to Multidimensional Data Array Processing by Computer
%J Communications of the ACM
%V 20
%N 2
%D February 1977
%P 63-77

%A D. Muller-Wichands
%A W. Gentzsch
%T Performance comparisons Among Several Parallel and Vector Computers on
a Set of Fluid Flow Problems
%R DFVLR Report IB 262-82 RO1
%C Goettingen
%D 1982

%A Ron Mullin
%A Evi Nemeth
%A Neal Weidenhofer
%T Will public key crypto systems live up to their expectations?
(HEP Implementation of the Discrete Log Codebreaker)
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 193-196
%K HEP, MIMD, Canadian Discrete Logarithm Algorithm,
%O applications

%A K. J. Mundell
%A M. W. Linder
%A S. E. Conry
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Processor Allocation in Data Driven Systems - Two Approaches
%P 156-157
%O

%A R. J. Munn
%A J. M. Stewart
%T Portable Scientific Software, XTAL: An Example
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 689-692
%K
%O Software Transportability

%A R. R. Muntz
%A E. G. Coffman, Jr.
%T Preemptive Scheduling of Real-Time Tasks on Multiprocessor Systems
%J Journal of the ACM
%V 17
%N 2
%D April 1970
%P 324-338

%A Richard R. Muntz
%A Edward G. Coffman, Jr.
%T Optimal Preemptive Scheduling on Two-Processor Systems
%J IEEE Transactions on Computers
%V C-18
%N 11
%D November 1969
%P 1014-1020
%K computation graphs, multiprocessing, parallel processing,
preemptive scheduling, static scheduling
IEEE Computer Group Conf.
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A Georg Munzel
%T Residue Arithmetic for Exact Calculations on the DAP
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 199-205
%D 1984
%K number theory,

%A K. Murakami
%A S. Nishikawa
%A M. Sato
%T Poly-processor system analysis and design
%J Proceedings of 4th Annual Symposium on Computer Architecture
%I IEEE
%C Silver Spring, Maryland
%D March 1977
%P 49-56
%K Poly-Processor System R (PPS-R),
multiprocessor architectures and operating system, multicomputer systems
%X Describes a multiprocessor system built with microprocessors dedicated to
performing specialized functions.  Discusses the functional partitioning of the
system and presents simulation results predicting its performance.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Kunio Murakami
%A Takeo Kakuta
%A Rikio Onai
%A Norioshi Ito
%T Research on Parallel Machine Architecture for Fifth-Generation Computer
Systems
%J Computer
%I IEEE
%V 18
%N 6
%D June 1985
%P 76-92
%X A decade-long Japanese project aims at high-speed processing systems
that can duplicate  the parallelism found in problems usually tackled
by humans
%K artificial intelligence knowledge based expert systems parallel
processing multiprocessing pim-r inference machine prolog logic
programming delta architecture

%A Y. Muraoka
%T Parallelism, Exposure and Exploitation in Programs
%R 424
%I CS Dept., Univ. of Ill.
%D February 1971

%A N. D. Murray
%A A. L. Hopkins
%A J. H. Wensley
%T Highly reliable multiprocessors
%R AGARD-AG-224
%I NATO Advisory Group for Aerospace R&D
%C Neuilly sur Seine, France
%D April 1977
%K reliability and error recovery
Integrity in Flight Control Systems
%X Discusses the reliability requirements of multiprocessors for critical
avionic systems and describes two designs meeting these requirements.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A W. J. Murray
%E M. B. Williams
%T The emerging digital transmission network
%B Pathways to the Information Society. Proceedings of the Sixth
International Conference on Computer Communication
%C London, England
%P 712-717
%O 0 REFS
Treatment PRACTICAL
%I North-Holland, Amsterdam, Netherlands, p: xx+1018
ISBN: 0-444-86464-4
%D 7-10 Sept. 1982
%K digital communication systems communication networks
digital transmission network switching elements British Telecom
telecommunications network
integrated transmission voice data visual services
copper cables optical fibre cables microwave radio conversion rate
telephone service integrated services digital network ISDN
non voice customer requirements
%X Studies of the application of digital techniques to the transmission
and switching elements of the British Telecom (BT) telecommunications
network showed the considerable advantages and economics over
equivalent analogue methods. Digital transmission allows integrated
transmission of voice, data and visual services over a common bearer
network. Modernisation of the BT transmission network by conversion
to digital operation has already commenced using a range of digital
transmission systems based on the 2, 8, 34 and 140 Mbit/s
internationally agreed hierarchical rates for operation on copper
cables, optical fibre cables and microwave radio. It is intended to
accelerate the conversion rate so that a telephone service of high
quality offering enhanced facilities can be achieved as well as the
creation of an integrated services digital network (ISDN) to meet the
more complex non-voice customer requirements of the future

%A J. C. Murtha
%A R. L. Beadles
%T Survey of the Highly Parallel Information Processing Systems
%I Office of Naval Research
%R No. 4755
%D November 1964

%A J. C. Murtha
%T Highly Parallel Information Processing Systems
%B Advances in Computers
%I Academic Press
%C New York
%D 1966

%A Philippe Mussi
%A Philippe Nain
%T Evaluation of Parallel Execution of Program Trees
%R Report No. 318
%I INRIA
%D Juillet 1984

%A T. H. Myer
%A I. E. Sutherland
%T On the Design of Display Processors
%J Communications of the ACM
%V 11
%N 6
%D June 1968
%P 410-414

%A Brad A. Myers
%T Displaying Data Structures for Interactive Debugging
%R CSL-80-7
%I Xerox Palo Alto Research Center
%C Palo Alto, CA 94306
%D June 1980
%K (See SIGGRAPH83 proceedings.)

%A M. Myszewski
%T IVTRAN:  A Dialect of FORTRAN for use on the ILLIAC IV
%I Applied Data Research
%D 1972

%A M. Myszewski
%T The Vectorizer System: Current and Proposed Capabilities
%R CA-17809-1511
%I Massachusetts Computer Assoc.
%C Wakefield, MA
%D September 1978

%A David A. Nadler
%A Edward E. Lawler, III
%T Motivation: A diagnostic approach
%E Richard Hackman
%E Edward E. Lawler, III
%E Lyman W. Porter
%B Perspectives on Behavior in Organizations
%P 26-34
%I McGraw-Hill
%D 1977

%A Dick Naedel
%T Closely Coupled Asynchronous Hierarchical and Parallel Processing in an
Open Architecture
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K Commercial Multiprocessors, CCAHPP, IN/7000,
%C Boston, MA
%P 215-220

%A M. Nagao
%T Focus off Attention in the Analysis of Complex Pictures such as Aerial
Photographs
%E Morio Onoe
%E Kendall Preston, Jr.
%E Azriel Rosenfeld
%B Real-Time/Parallel Computing: Image Analysis
%I Plenum Press
%C New York, NY
%D 1981
%P 185-191
%X Nothing involving parallelism, a short survey of image processing.

%A K. Nagel
%T Weather Simulation with the Multi-Microprocessor System SMS 701
%J Military Electronics Defense EXPO 78, Proceedings of the Conference
%C Wisbaden, West Germany
%D 1979
%P 60-67

%A P. A. Nagin
%A A. R. Hanson
%A M. Riseman
%T Region Relaxation in a Parallel Hierarchical Architecture
%E Morio Onoe
%E Kendall Preston, Jr.
%E Azriel Rosenfeld
%B Real-Time/Parallel Computing: Image Analysis
%I Plenum Press
%C New York, NY
%D 1981
%P 37-61

%T Some Further Experiments in the Parallel Processing of Pictures
%A R. Narasimhan
%A J. P. Fornango
%J IEEE Transactions on Electronic Computers
%V EC-13
%N 6
%D December 1964
%P 748-750
%K PAX [language]
%X Short note

%T CFD \(em A FORTRAN-based Language for ILLIAC IV
%Q NASA Ames Research Center
%D 1973
%X The principal author was probably Ken Stevens.

%A Peter Robert Nash
%T A Dynamic State Display for a Multiprocessor System
%R thesis
%I MIT, Cambridge, MA 02139

%A D. Nassimi
%A S. Sahni
%T Bitonic Sort on a Mesh Connected Parallel Computer
%I IEEE
%J Trans. on Computers
%V C-27
%N 1

%A D. Nassimi
%A S. Sahni
%T An Optional Routing Algorithm for Mesh Connected parallel computers
%I Univ. of Minnesota

%A D. Nassimi
%A S. Sahni
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Data Broadcasting in SIMD Computers
%P 325-326
%O Interconnections

%A D. Nassimi
%A S. Sahni
%T Parallel Permutation and Sorting Algorithms and a New Generalized
Connection Network
%J Journal of the ACM
%V 29
%D July 1982
%P 642-667
%K Categories and Subject Descriptors.
B.4.3 [Input/Output and Data Communications]:
interconnections (subsystems) - topology; C.1.2 [Processor Architectures]:
Multiple Data Stream Architectures
(Multiprocessors) - interconnection architectures, parallel processors,
single-instruction-stream multiple-data-stream architectures (SIMD);
F.2.3 [Analysis of Algorithms and Problem Complexity]:
Nonnumerical Algorithms and Problems - routing and layout,
sorting and searching
%X
Reproduced in the 1984 tutorial: "Interconnection Networks for parallel
and distributed processing" by Wu and Feng.

%A David Nassimi
%A Sartaj Sahni
%T Bitonic Sort on a Mesh-Connected Parallel Computer
%J IEEE Transactions on Computers
%V C-28
%N 1
%D January 1979
%P 2-7
%K Bitonic sort, complexity, mesh-connected parallel computer,
parallel sorting, SIMD machine,
Applied theory of computation

%A David Nassimi
%A Sartag Sahni
%T A Self Routing Benes Network
%J Proceedings of 7th Annual Symposium on Computer Architecture
%D 1980
%I IEEE
%P 190-195

%A David Nassimi
%A Sartaj Sahni
%T Parallel Algorithms to Set-Up the Benes Permutation Network
%J Workshop on Interconnection Networks for Parallel and Distributed
Processing
%D April 1980
%I IEEE
%P 70

%A David Nassimi
%A Sartaj Sahni
%T Data Broadcasting in SIMD Computers
%J IEEE Transactions on Computers
%V C-30
%N 2
%D February 1981
%P 101-107
%K Cube-connected computer, complexity, data broadcasting,
mesh-connected computer, parallel algorithm, perfect shuffle computer,
SIMD computer
%X
Reproduced in the 1984 tutorial: \fI Interconnection Networks for parallel
and distributed processing\fP by Wu and Feng.

%T Data Broadcasting in SIMD Computers
%A David Nassimi
%A Sartaj Sahni
%J IEEE Transactions on Computers
%V C-30
%N 2
%D February 1981
%P 101-107
%K Cube-connected computer, complexity, data broadcasting, mesh-connected
computer, parallel algorithm, perfect shuffle computer, SIMD computer
%O Parallel computation

%A David Nassimi
%A Sartaj Sahni
%T A Self-Routing Benes Network and Parallel Permutation Algorithms
%J IEEE Transactions on Computers
%V C-30
%N 5
%D May 1981
%P 332-340
%K Chordal Ring, distributed routing, message-passing,
multi(micro)computer system, regular networks
%X
Reproduced in the 1984 tutorial: \fI Interconnection Networks for parallel
and distributed processing\fP by Wu and Feng.

%T A Self-Routing Benes Network and Parallel Permutation Algorithms
%A David Nassimi
%A Sartaj Sahni
%J IEEE Transactions on Computers
%V C-30
%N 5
%D May 1981
%P 332-340
%K Benes network, bit-permut-complement permutations, complexity, cube
connected computer, inverse omega permutations, omega permutations,
perfect shuffle compute

%T Optimal BPC Permutations on a Cube Connected SIMD Computer
%A David Nassimi
%A Sartaj Sahni
%J IEEE Transactions on Computers
%V C-31
%N 4
%D April 1982
%P 338-341
%K BPC permutation, cube connected SIMD computer, complexity
Correspondence

%T Parallel Algorithms to Set Up the Benes Permutation Network
%A David Nassimi
%A Sartaj Sahni
%J IEEE Transactions on Computers
%V C-31
%N 2
%D February 1982
%K Benes permutation network, complexity, cube connected computer, fully
connected SIMD computer, mesh-connected computer, parallel algorithm,
perfect shuffle computer, set-up algorithm
Parallel computation

%A Bruce F. Naylor
%A Pin-Yee Chen
%T Architectures for Concurrent Processing in Raster Graphics Systems
%R GIT/ICS-84/08
%I Georgia Institute of Technology
%C Atlanta, CA
%D February 1984
%K Frame buffer, computer graphics,

%A R. Needham
%A I. A. Utting
%E I. N Dallas
%E E. B. Spratt
%T Report on the future of ring developments (local area networks).
%J Ring Technology Local Area Networks. Proceedings of the IFIP WG 6.4.
%C University of Kent Workshop, Canterbury, England
%I North-Holland, Amsterdam, Netherlands,ix+269, ISBN: 0-444-86852-6
%P 265-266
%D 28-30 Sept. 1983
%O 0 Refs
Treatment GENERAL OR REVIEW.
%K computer networks technological forecasting.
ring networks local area networks LAN future developments.
%X The authors make some comments on the functionality and usability of
the current generation of rings which can be taken as pointers to
future developments.

%A R. M. Needham
%A A. D. Birrell
%T The cambridge model distributed system
%Z Computer Lab., Univ. of Cambridge, Cambridge, England
%J Oper. Syst. Rev. (USA)
Spec. Issue, Proceedings of the sixth symposium on operating systems principles
%P 11-16
%D Nov. 1977
%V 11
%N 5
%C West Lafayette, IN, USA
%O 3 Refs.
treatment: practical
%K operating systems file organisation
cap filing system capabilities directories
access
%X The filing system for the cap is based on the idea of preservation of
capabilities if a program has been able to obtain some capability then it
has an absolute right to preserve it for subsequent use. The pursuit of
this principle, using capability-oriented mechanisms in preference to
access control lists, has led to a filing system in which a preserved
capability may be retrieved from different directories to achieve different
access statuses, in which the significance of a text name depends on the
directory to which it is presented, and in which filing system 'privilege'
is expressed by possession of directory capabilities.

%A R. M. Needham
%A M. D. Schroeder
%T Using encryption for authentication in large networks of computers
%J Commun. ACM (USA)
%V 21
%N 12
%P 993-999
%O 9 REFS. Treatment PRACTICAL
%D Dec. 1978
%K security of data computer networks
encryption authenticated communication computer networks protocols
signature verification document integrity guarantee
public key encryption algorithms

%A R. M. Needham
%A M. D. Schroeder
%T Using encryption for authentication in large networks of computers
%J Comm. ACM
%V 21
%N 12
%D December 1978
%P 993-999

%A R. M. Needham
%T Systems Aspects of the Cambridge Ring
%J Proceedings of the 7th Symposium on Operating Systems Principles
%D December 1979
%P 82-85
%O Local Networks

%A R. M. Needham
%T Design Considerations for a Processing Server
%J Proceedings of 8th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 9
%N 3
%D May 1981
%P 501-504
%O interconnection

%A Bruce Jay Nelson
%T Remote Procedure Call
%R CSL-81-9 (Also CMU-CS-81-119)
%I Xerox Palo Alto Research Center
%C Palo Alto, CA 94306
%D May 1981
%K Emissary,

%A D. Nelson
%T Network protocols for Apollo's Domain system
%B Local Networks. Strategy and Systems. Localnet '83 (Europe)
%C London, England
%P 343-349
%I Online Publications, Northwood Hills, Middx., USA
x+535
%D 8-10 March 1983
%O 0 Refs, Treatment PRACTICAL.
%K computer networks protocols virtual storage.
LAN computer networks VS Apollo's Domain system
protocol designs computer system semantic forms virtual memory system
data streaming.
%X This article discusses a problem which results from a preoccupation
with protocol designs, rather than with the semantic way in which
distributed components can work together. In the Apollo computer
system, these semantic forms include both a low level network-wide
virtual memory system and a higher level data streaming facility.

%A J. M. Nelson
%A C. E. Colin
%T Parallel processing in FORTRAN with floating-point hardware
%J Software Practice & Experience
%V 5
%P 65-68
%D 1975

%A V. P. Nelson
%T Fault Tolerance in Reconfigurable Systems
%J Computer Software and Applications Conference (COMPSAC80)
%I IEEE
%D October 1980
%P 372-377

%A Richard M. Nemes
%T Modular Verification of Distributed Systems
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Program Verification, CSP, ports,
%P 396-410

%A D. M. Nesset
%T The effectiveness of cache memories in a multiprocessor environment
%J Australian Computer Journal
%V 7
%N 1
%D March 1975
%P 33-38
%K performance
%X A simulation models studies the effectiveness of cache memories in reducing
memory access conflicts.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A D. M. Nessett
%T A systematic methodology for analyzing security threats to
interprocess communication in a distributed system
%J IEEE Trans. Commun. (USA)
%V COM-31
%N 9
%P 1055-1063
%O 10 REFS
Treatment THEORETICAL/MATHEMATICAL
%D 1983
%K computer networks data communication systems distributed processing
information theory security of data
stability security systematic methodology security threats
interprocess communication distributed system direct mapping
%X It is observed that a direct mapping exists between a distributed
system's physical configuration and the security threats that can be
mounted against interprocess communication in that system. A
systematic methodology is presented which implements that mapping for
a large class of distributed systems. The methodology includes a
model of threats to interprocess communication as well as a model of
distributed system security configurations. This methodology is
useful in situations where certain major characteristics of the
distributed system physical configuration will remain stable over a
long time

%A Elliot Nestle
%A Armond Inselberg
%T The Synapse N+1 System: Architectural Characteristics and Performance
Data of a Tightly-Coupled Multiprocessor System
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K Commercial Multiprocessors, fault tolerance,
%C Boston, MA
%P 233-239
%X This company died.  Its research may still carry on else where.

%A E. Nett
%T On scheduling algorithms for N-free task dependency structures
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 100-
%K
%O Scheduling

%A Edgar Nett
%T On further applications of the Hu algorithm to scheduling problems
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 317-325
%K
%O Scheduling

%A J. von\ Neumann
%T A System of 29 States with a General Transition Rule
%J Theory of Self-Reproducing Automata
%E A. Burks
%I University of Illinois Press
%P 305-317
%D 1966
%X Remove?

%A K. W. Neves
%T Vectorization of Scientific Software
%B Proceedings of the NATO Workshop on High Speed Computations
%E J. Kowalik
%S NATO ASI Series
%V F-7
%I Springer-Verlag
%P 277-291
%D 1984

%A A. Newell
%A G. Robertson
%T Some Issues in Programming Multiprocessors
%J Behavior Research Methods and Instrumentation
%V 7
%P 75-86
%D 1975

%A I. A. Newman
%A M. C. Woodward
%T Alternative approaches to multiprocessor garbage collection
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 205-210
%K
%O Non-numeric algorithms

%A I. A. Newman
%A R. P. Stallard
%A M. C. Woodward
%T Improved multiprocessor garbage collection algorithms
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 367-368
%K
simulation/operating systems

%A I. A. Newman
%A R. P. Stallard
%A M. C. Woodward
%T A Parallel Compaction Algorithm for Multiprocessor Garbage Collection
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 455-467
%D 1984

%A M. Newton
%A W. Athas
%T Hypercube Initialization Code
%r Hm30
%R 5070:DF:83
%I California Institute of Technology
%C Pasadena, CA
%D February 1983
%K Caltech Cosmic Cube, hypercube, C^3P

%A Michael Newton
%T An analysis of a Parallel Implementation of the Fast Fourier Transform
%r Hm17
%R 5057:DF:82
%I California Institute of Technology
%C Pasadena, CA
%D November 1982
%K Caltech Cosmic Cube, hypercube, C^3P

%A Michael O. Newton
%T The Travelling Salesman Problem on a POSET Processor
%r Hm25
%R 5037:DF:82
%I California Institute of Technology
%C Pasadena, CA
%D August 1982
%K Caltech Cosmic Cube, hypercube, C^3P

%A R. S. Newton
%T The design of a reentrant executive for a multi-CPU shared-store
operating system
%J Proc. Symp. for Operational On-Line Computing for Defense
%C Malvern, England
%D November 1972
%K Multiprocessor architectures and operating systems
%X Examines the minimal hardware and software support needed for
multiprocessing and describes those aspects of the software which differ
from the uniprocessor case.  Also suggests programming techniques for
improving reliability.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A R. S. Newton
%T An exercise in multiprocessor operating system design
%J AGARD Proc.
%N 149
%C Athens, Greece
%D May 1974
%K multiprocessor architectures and operating systems
Real-Time Computer-Based Systems
%X Describes the design of general-purpose operating systems for
multiprocessors, emphasizing those aspects of the design directly related
to multiprocessing.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Charles H. Ng
%T FIFO Buffering Transceiver: A Communication Chip Set
for Multiprocessor Systems
%r Hm19
%R Master's Thesis, 5055:TR:82
%I Computer Science, Dept., California Institute of Technology
%C Pasadena, CA
%D December 1982
%K Caltech Cosmic Cube, hypercube, C^3P

%A Kam-Wang Ng
%A Wai-kit Li
%T GDPL \*- A Generalized Distributed Programming Language
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 69-78
%O Distributed programming

%A L. M. Ni
%A K. Hwang
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Optimal Load Balancing Strategies for a Multiple Processor System
%P 352-357
%O Scheduling

%A Lionel M. Ni
%A Kwan Y. Wong
%A Daniel T. Lee
%A Ronnie K. Poon
%T A Microprocessor-Based Office Image Processing System
%J IEEE Transactions on Computers
%V C-31
%N 10
%D October 1982
%P 1017-1022
%K Image partitioning, image processing, multiprocessor, office
automation, processor scheduling,
Special issue on computer architecture for pattern analysis and image
database management

%A Lionel M. Ni
%A Kai Hwang
%T Pipelined evaluation of first-order recurrence systems
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 537-544
%K
pipelining

%T Design Trade-Offs for Process Scheduling in Tightly Coupled
Multiprocessor Systems
%A Lionel M. Ni
%A Ching-Farn E. Wu
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 63-70
%K Problem Mapping and Scheduling

%T Vector-Reduction Techniques for Arithmetic Pipelines
%A Lionel M. Ni
%A Kai Hwang
%I IEEE Computer Society
%R ISSN 0018-9340
%D June 1985
%K Arithmetic pipelines, interleaving, matrix algebra, multiple vector
processing, vector reduction, VLSI architecture.

%A Lionel M. Ni
%A Kai Hwang
%T Optimal Load Balancing in a Multiple Processor System with Many Job
Classes
%J IEEE Transactions on Software Engineering
%V SE-11
%N 5
%D May 1985
%P 491-496
%K Job response time, job scheduling, load balancing, M/M/1 queue,
multiple processor system, nonlinear programming, probabilistic scheduling
%O Correspondence

%A Lionel M. Ni
%A Chong-Wei Xu
%A Thomas B. Gendreau
%T Drafting Algorithm--A Dynamic Process Migration Protocol for
Distributed Systems
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Distributed Control Algorithms, bidding algorithm, processor thrashing,
%P 539-546

%A R. De Nicola
%A A. Matelli
%A U. Montanari
%T Communication Through Message Passing or Shared Memory: A Formal
Comparison
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 513-522
%K
%O Distributed System Structure

%T Measuring the Parallelism Available for Very Long Instruction Word
Architectures
%A Alexandru Nicolau
%A Joseph A. Fisher
%J IEEE Transactions on Computers
%V C-33
%N 11
%D November 1984
%P 968-976
%K Memory antialiasing, microcode, multiprocessors, parallelism, trace
scheduling, VLIW (very long instruction word) architectures,
Architecture

%T Uniform Parallelism Exploitation in Ordinary Programs
%A Alexandru nicolau
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 614-618
%K Expressing Parallelism

%A I. Nielsen
%A T. Park
%A C. Zimmerman
%T A multi-minicomputer approach to concurrent computation for interactive
on-line simulation of complex biosystems
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 52
%K
%O Distributed function architectures

%A R. H. Nienhaus
%A A. S. Koch
%A T. Legendi
%T Synthese und Parallele Durchfohrung von Lokalen
Oberfohrungsfunktionen for die 2 1/2 D Zellularautomatenmodelle
der dynamischen rezeptoren
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 463-467
%D 1984

%A J. Nievergelt
%T Parallel Methods for Integrating Ordinary Differential Equations
%J Communications of the ACM
%V 7
%P 731-733
%D 1964

%A A. A. Nilsson
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Open Queueing Networks with Finite Capacity Queues
%P 87-91
%O Distributed Systems and Networks

%A Nils J. Nilsson
%T Two heads are better than one
%T SIGART Newsletter
%V 73
%P 43
%D October 1980

%A M. Nio
%A H. Kataoka
%A T. Ochi
%T Distributed Processing Terminal System for CAD/CAM
%J Computer Software and Applications Conference (COMPSAC79)
%I IEEE
%D November 1979
%P 547-552
%O distributed systems

%A H. M. Nirshberger
%A S. Vestal
%T Dynamic Tuning in an Asymmetric Multiprocessing Environment
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 99
%K
%O multiprocessors
%X Summary only.

%A H. Nishikawa
%A K. Asada
%A H. Terada
%T A Decentralized controlled multi-processor system based on the data-
driven scheme
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 639-644
%K
%O Data Flow Architectures

%A S. Nishikawa
%A M. Sato
%A K. Murakami
%T Interconnection Unit for Poly-Processor System: Analysis and Design
%J Proceedings 5th Annual Symposium on Computer Architecture
%D April 1978
%I IEEE
%C Palo Alto, CA
%P 216-222

%A H. Nishimura
%A H. Ohno
%A T. Kawata
%A I. Shirakawa
%A K. Omura
%T LINKS-1: A Parallel Pipelined Multicomputer System for Image Creation
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%D 1983
%V 11
%N 3
%P 387-394
%O architectures for image processing

%A T. Nodera
%T PCG Method for Four Color Ordered Finite Difference Schemes
%J Advances in Computer Methods for Partial Differential Equations
Proc. of the Fifth IMACS International Symposium, Lehigh University
%E R. Vichnevetsky
%E R. Stepleman
%V V
%I Lehigh University
%D June 1984
%P 222-228

%A Jerre D. Noe
%A Gary J. Nutt
%T Macro E-Nets for Representation of Parallel Systems
%J IEEE Transactions on Computers
%V C-22
%N 8
%D August 1973
%P 718-727
%K Asynchronous systems, computer system models, graph models,
simulation of computers,
Special issue on parallel computation, theoretical models

%A K. Noguchi
%A I. Ohnishi
%A H. Morita
%T Design Considerations for a Heterogeneous Tightly-Coupled Multiprocessor
System
%J Proceedings AFIPS National Computer Conference
%D 1975
%P 561-565

%A J. Nolen
%A P. Stanat
%T Reservoir Simulation on Vector Processing Computers
%J SPE Middle east Oil Techn. Conf.
%C Manama, Banrain
%R SPE Paper 9649
%D 1981

%A J.S. Nolen
%T Application of vector processors to the solution of finite difference
equation
%R SPE 7675

%A James S. Nolen
%A D. W. Kuba
%A M. J. Kascic
%T Application of Vector Processors to the Solution of Finite
Difference Equations
%J Society of Petroleum Engineers of AIME 5th Symposium on Reservoir
Simulation
%D February 1979
%P 37-44
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%A A. Noor
%A R. Fulton
%T Impact of the CDC-STAR-100 Computer on Finite-Element Systems
%J J. Structural Div., ASCE
%V 101
%N ST4
%P 287-296
%D 1975

%A A. Noor
%A S. Voight
%T Hypermatrix Scheme for the STAR-100 Computer
%J Computers & Structures
%V 5
%D 1975
%P 287-296

%A A. Noor
%A S. Hartley
%T Evaluation of Element Stiffness Matrices on CDC STAR-100 Computer
%J Computers & Structures
%V 9
%P 151-161
%D 1978

%A A. Noor
%A H. Kamel
%A R. Fulton
%T Substructuring Techniques - Status and Projections
%J Computers & Structures
%V 8
%D 1978
%P 621-632
%X Remove?

%A A. Noor
%A J. Lambiotte
%T Finite Element Dynamic Analysis on the CDC STAR-100 Computer
%J Computers & Structures
%V 10
%P 7-19
%D 1978

%A A. Noor, (Ed.)
%T Impact of New Computing Systems on Computational Mechanics
%I The American Society of Mechanical Engineers
%D 1983

%A A. I. Noor
%A G. S. Hope
%A O. P. Malik
%T Slot-based multi-access protocol for local computer network
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 172-174
%K
node-to-node networks

%A A. K. Noor
%A O. O. Storaasli
%A R. E. Fulton
%T Impact of New Computing Systems on Finite Element Computations
%E A. Noor
%B Impact of New Computing Systems on Computational Mechanics
%I The American Society of Mechanical Engineers
%D 1983
%P 1-32
%K FEM

%A R. Norin
%A T. Pettibone
%T Programming Array Processors
%J Mini-Micro Systems
%V 12
%N 8
%D August 1979
%P 59-71

%A R. S. Norin
%T Sparse Matrix Calculations Using an Array Processor
%J Proc. COMPSAC78
%D November 1978
%P 183-187

%A Chris Norrie
%T Supercomputer for Superproblems: An Architectural Introduction
%J Computer
%V 17
%N 3
%D March 1984
%P 62-74
%K Cray-1, Cyber 205, array processor, vector processor, pipelined processor
architecture
%X Basic article covering "array processors", vector and pipelined processors
and special purpose machines (FEM and Parfem).

%A D. Norrie
%T The Finite Element Method and Large Scale Computation
%J Proc. 4th Int. Symp. on Finite Element Methods in Flow Problems
%C Tokyo
%I University of Tokyo Press, North-Holland Publishing Co.
%P 947-954
%D 1984

%T A Methodology for Predicting Multiprocessor Performance
%A Alan Norton
%A Gregory F. Pfister
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 772-781
%r RC 11030 (#49546)
%d March 1985
%Z IBM T. J. Watson Research Center
%c Yorktown Heights, NY
%K The IBM Research Parallel Processor, RP3,
MIMD, omega net, RP3
%X A paper covering the modelling over the RP3 with (hopefully) applications
to other multiprocessor architectures.  This paper was released too early
in the project to determine it's success.  It seems overly simple in some
ways.

%A R. L. Norton
%A Jacob A. Abraham
%T Using write back cache to improve performance of multi-user multiprocessors
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 326-331
%K
U Ill
%O Distributed processing

%A L. Norton-Wayne
%T High-level Image Languages for Automatic Inspection \*- the File structure
Problem
%B Languages and Architectures for Image Processing
%E M. J. B. Duff
%E S. Levialdi
%I Academic Press
%C New York, NY
%D 1981
%P 139-146

%A Farhad Nourai
%A R. Sohrab Kashef
%T A Universal Four-State Cellular Computer
%J IEEE Transactions on Computers
%V C-24
%N 8
%D August 1975
%P 766-776
%K Cellular automata, finite-state automata, Minsky's 2-register machine,
universal computer,
Cellular machines

%Q NTIS
%T Supercomputers (1975 - June 83)
%X Citations from the INSPEC Data Base,
Published Search

%Q NTIS
%T Supercomputers (1972 - June 84)
%X Citations from the International Aerospace Abstracts Data Base,
Published Search

%Q NTIS
%T Petri Nets for Parallel Processing and Concurrent Systems (1975 - May 84)
%X Citations from the INSPEC Data Base,
Published Search

%Q NTIS
%T Supercomputers (July 83 - June 84)
%X Citations from the INSPEC Data Base,
Published Search

%A R. Numich, (Ed.)
%T Proceedings of the Supercomputer Applications Symposium October 31 -
November 1, 1984
%I Purdue University
%D 1985
%K Cyber 205
%X I recall this was a a CDC CYBER 205 workshop.

%A S. J. Nuspl
%A M. D. Johnson
%T The Effect of I/O Characteristics on the Performance of a Parallel Processor
%J IEEE International Computer Society Conference Digest
%D September 1971
%P 127-128

%A G. J. Nutt
%T A parallel processor operating system comparison
%J IEEE Trans. on Software Engineering
%V SE-3
%N 6
%D November 1977
%P 467-475
%K multiprocessor architectures and operating systems
%X Compares three different operating system designs for a multiprocessor and
evaluates them for different system loads.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Gary J. Nutt
%T Microprocessor Implementation of a Parallel Processor
%J Proceedings of 4th Annual Symposium on Computer Architecture
%D 1977
%K U Colorado
%P 147-152
%K Special Applications

%A Gary J. Nutt
%T Memory and Bus Conflict in an Array Processor
%J IEEE Transactions on Computers
%V C-26
%N 6
%D June 1977
%P 514-521
%K Array processor, associative processor, design evaluation, multiprocessor,
SIMD, simulation, trace driven simulation
%O Array processors

%T Address Generation in an Array Processor
%A E. O. Nwachukwu
%J IEEE Transactions on Computers
%V C-34
%N 2
%D February 1985
%P 170-173
%K Address indexing unit, array processing and manipulation,
counter/multiplexer principle, real-value FFT
%O Correspondence

%T A Combinatorial Problem Concerning Processor Interconnection Networks
%A Michael J. O'Donnell
%A Carl H. Smith
%J IEEE Transactions on Computers
%V C-31
%N 2
%D February 1982
%P 163-164
%K Augmented data manipulator, Fibonacci series, interconnection networks
Correspondence

%A S. O'Donnell
%A P. Geiger
%A M. Schultz
%T Solving the Poisson Equation on the FPS-164
%I Yale University
%R Dept. of Computer Science Report No. 292
%D 1983

%A E. P. O'Grady
%T A multiprocessor for continuous system simulation
%J Proc. 1979 Int. Conf. on Parallel Processing
%C Bellaire, Michigan
%D August 1979
%P 306
%K multiprocessor architectures and operating systems, special purpose
architectures
%X This multiprocessor system is designed to improve speed in simulation
applications.  The main point of interest here is the technique used for
the efficient exchange of data between processors.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A D. O'Leary
%A O. Widlund
%T Capacitance Matrix Methods for the Helmholtz Equation on General Three
Dimensional Regions
%J Math. Comp.
%V 33
%P 849-880
%D 1979
%X Remove?

%A D. O'Leary
%T Ordering Schemes for Parallel Processing of Certain Mesh Problems
%J SIAM J. Sci. Stat. Comp.
%V 5
%P 620-632
%D 1984

%A D. O'Leary
%A G. Stewart
%T Data-Flow Algorithms for Parallel Matrix Computations
%I University of Maryland
%R Computer Science Technical Report No. 1366
%D 1984

%A D. O'Leary
%A R. White
%T Multi-Splittings of Matrices and Parallel Solution of Linear Systems
%J SIAM J. Alg. Disc. Math.
%D 1984
%X To appear

%A Dianne P. O'Leary
%A G. W. Stewart
%T Data-Flow Algorithms for Parallel Matrix Computation
%J Communications of the ACM
%V 28
%N 8
%D August 1985
%P 840-853
%K CR Categories and Subject Descriptors: G.1.0 [Numerical Analysis]:
General - parallel algorithms; G.1.3 [Numerical Analysis]:
Numerical Linear Albegra; C.1.2 [Processor Architectures]:
Multiple Data STream Architectures (Multiprocessors) - parallel processors;
D.4.1 [Operating systems]: process management - concurrency
General terms: algorithms
Additional key words and phrases: parallel algorithms, matrix algorithms,
data flow synchronization, MIMD networks
%X The implementation of Cholesky decomposition on ZMOB. 
3 ways: triangular matrix Liapunov equation, congruence transforms, and
iterative reduction.  Also of interest is systolic arrays.

%A W. Oakes
%A R. Browning
%T Experience Running ADINA on CRAY-1
%J Proc. ADINA Conference
%I Massachusetts Institute of Technology
%R 82448-9
%P 27-42
%D 1979

%A Wilhelm Oberaigner
%T Two Parallel Method for the Rounding of Exact Evaluation of Sums of Products
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 206-210
%D 1984
%K floating point,

%A Ron Obermarck
%T Distributed Deadlock Detection Algorithm
%J ACM Transactions on Database Systems
%V 7
%N 2
%D June 1982
%P 187-208
%K Algorithms
C.2.4 [Computer-Communication Networks]: distributed systems - distributed
databases; D.4.1 [Operating Systems]: process management - deadlocks;
D.4.7 [Operating Systems]: organization and design - distributed systems

%A W. Oed
%A O. Lange
%T The solution of linear recurrence relations on pipelined processors
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 545-547
%K
pipelining

%A W. Oed
%A O. Lange
%T Transforming Linear Recurrence Relations for Vector Processors
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 211-216
%D 1984
%K automatic parallelization, vectorization,

%T On the Effective Bandwidth of Interleaved Memories in Vector Processor
Systems
%A W. Oed
%A O. Lange
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 33-40
%K Vector/Array Processing

%A Kernal Oflazer
%T Parallel execution of production systems
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 92-100
%K OPS5, partitioning, applications,
%O artificial intelligence

%A M. Ogura
%A M. Sher
%A J. Ericksen
%T A Study of the Efficiency of ILLIAC IV in Hydrodynamic Calculations
%I University of Illinois at Urbana - Champaign
%R Center for Advanced Computation Document No. 59
%D 1972

%A Roy C. Ogus
%T Fault-Tolerance of the Iterative Cell Array Switch for Hybrid
Redundancy
%J IEEE Transactions on Computers
%V C-23
%N 7
%D July 1974
%P 667-681
%K Computer reliability, error-correcting codes, fail-safe logic,
fault-tolerance, hybrid redundancy, iterative cell array, mission time,
self-checking checker, threshold voter, triple modular redundancy (TMR),
Special issue on fault tolerant computing

%A K. Ohmori
%A N. Koike
%A T. Yamazaki
%T MICS-II \(em  A virtual machine complex controlled by dedicated microprocessors
%J Spring 1978 Compcon
%I IEEE
%D 1978
%P 256-260

%A Marius Olafsson
%A T. A. Marsland
%T A UNIX Based Virtual Tree Machine
%I Dept. of Computer Science, University of Alberta
%C Edmonton
%D 1985

%A Z. Olaiwan
%A Z. Binder
%T Algorithm Processing Unit for Automatic Control
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 139-145
%O Distributed Processing

%A Arthur E. Oldehoeft
%A Steven F. Jennings
%T Dataflow Resource Managers and Their Synthesis from Open Path Expressions
%J IEEE Transactions on Software Engineering
%V SE-10
%N 3
%D May 1984
%P 244-257
%K Applicative programming, concurrent access, dataflow computers,
open path expressions, operating systems, parallel processing,
resource managers

%A R. R. Oldehoeft
%A Stephen J. Allan
%T Execution Support for HEP SISAL
%E Janusz S. Kowalik
%B Parallel MIMD Computation: HEP Supercomputer and Its Applications
%I MIT Press
%C Cambridge, MA
%D 1985
%P 150-179
%K Programming and languages, dataflow, VAL, arrays, process management,
processes,
%X Details and implementation issues of SISAL

%A D. E. Oldfield
%T Document Abstracting on the Distributed Array Processor
%E D. J. Paddon
%B Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford, England
%D 1984
%P 135-146
%K Parsing, linguistics, SIMD, text reduction, syntax analysis, DAP
%X PhD thesis work.  Did not quite reach the level of text quality
as analysed in SISD tools such as those found in the Writer's WorkBench.

%A P. N. Oleinick
%A S. H. Fuller
%T The Implementation and Evaluation of a Parallel Algorithm on C.mmp
%R CMU-CS-78-125
%I Carnegie-Mellon University
%C Pittsburgh, PA
%D June, 1978
%X Root finding algorithm (1st degree function) is used to explore various
aspects of evaluating algorithms.  This included differing CPUs, differing
memory technologies, etc.

%A Peter N. Oleinick
%T The Implementation and Evaluation of Parallel Algorithms on C.mmp
%R doctoral thesis
%I Dept. of Computer Science, Carnegie-Mellon University
%C Pittsburgh, PA
%D 1978
%K multiprocessor applications
%X Describes experimental performance results and discusses the factors
affecting the performance.  Published by UMI Press as "Parallel Algorithms
on a Multiprocessor" (1982).
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Peter N. Oleinick
%T Parallel Algorithms on a Multiprocessor
%I UMI Research Press
%D 1982
%K C.mmp, performance evaluation,
%X The algorithm of root finding by N-sections is evaluated under varying
conditions on C.mmp.  The conditions included: processors of differing
performance (PDP-11/20 vs. PDP-11/40E), differing memory types (MOS vs.
bipolar), software synchronization mechanisms, and a small number of
miscellaneous other applications (HARPY).

%A Ellen Oliver
%A P. Bruce Berra
%T RELACS, A Data Base Computer
%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%P 287
%O
%X Summary only.

%A Robert Olson
%T Parallel processing in a message-based operating system
%J IEEE Software
%V 2
%N 4
%P 39-49
%D July 1985
%K message passing,
issue on complex parallel systems,
%X As originally designed, the ELXSI System 6400 used messages to achieve
parallelism.  Shared memory capabilities were added later--with surprising
ease and success.

%A Amos Omondi
%A David Klappholz
%T Data driven computation on MIMD machines
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 535-538
%O dataflow

%A M. Onoe
%A M. Ishizuka
%A K. Tsuboi
%T Real-Time Shading Corrector for a Television Camera using a Microprocessor
%E Morio Onoe
%E Kendall Preston, Jr.
%E Azriel Rosenfeld
%B Real-Time/Parallel Computing: Image Analysis
%I Plenum Press
%C New York, NY
%D 1981
%P 339-346
%X Real time image processing, nothing parallel.

%A M. Onoe
%A A. Tojo
%A S-i. Uchida
%T Image Processing Oriented Multiprocessor System with a Multipurpose
Video Processor
%E Morio Onoe
%E Kendall Preston, Jr.
%E Azriel Rosenfeld
%B Real-Time/Parallel Computing: Image Analysis
%I Plenum Press
%C New York, NY
%D 1981
%P 371-380
%K Picture Processing Oriented Polyprocessor (POPS)

%A Morio Onoe
%A Kendall Preston, Jr.
%A Azriel Rosenfeld, ed.
%T Real-Time/Parallel Computing: Image Analysis
%I Plenum Press
%C New York, NY
%D 1981

%A Morio Onoe
%A Ichiro Kubota
%T A Fast Algorithm for Processing Synthetic Aperture Radar Signals without
Data Transposition
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 125-133
%K SEASAT

%A Ibrahim H. Onyuksel
%A Keki B. Irani
%T A Markovian queueing network model for performance evaluation of
bus deficient multiprocessors systems
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 437-439
%K
system performance

%A D. C. Opferman
%A N. T. Tsao-Wu
%T On a Class of Rearrangeable Switching Networks; Part I: Control Algorithms;
Part II: Enumeration Studies and Fault Diagnosis
%J Bell System Technical Journal
%V 50
%N 5
%D May-June 1971
%P 1579-1618

%A A. V. Oppenheim
%T Applications of Digital Signal Processing
%I Prentice-Hall
%C Englewood Cliffs, NJ
%D 1978

%A E. Opper
%A M. Malek
%T Resource Allocation for a class of problem structures in multistage
interconnection network-based system
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 106-113
%K
%O Distributed operating systems

%A E. Opper
%A M. Malek
%A G. J. Lipovski
%T Resource Allocation in Rectangular CC-Banyans
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 11
%N 3
%D 1983
%P 178-184
%O Interconnection Networks

%A D. Orbits
%A D. Calahan
%T Data Flow Considerations in Implementing a Full Matrix solver with
Backing Store on the CRAY-1
%I University of Michigan
%R Systems Engineering Laboratory Report No. 98
%D 1976

%A D. Orbits
%T A Cray-1 Timing Simulator
%I University of Michigan
%R Systems Engineering Laboratory Report No. 118
%D 1978

%A D. Orbits
%A D. Calahan
%T A CRAY-1 Simulator and its Application to Development of High
Performance Codes
%J Proc. LASL Workshop on Vector and Parallel Processors
%D 1978

%A Samuel E. Orcutt
%T Implementation of Permutation Functions in ILLIAC IV-Type Computers
%J IEEE Transactions on Computers
%V C-25
%N 9
%D September 1976
%P 929
%K Bit reversal, bitonic sorting, data routing, ILLIAC IV,
parallel computation, perfect shuffle, permutations,
parallel processing

%A F. M. Orem
%A W. F. Tinney
%T Evaluation of an Array Processors for Power System Applications
%J Proc. Power Industry Computer Applications Conf.
%D 1979
%P 345-350

%A E. I. Organick
%T Computer System Organization, the B5700/B6700 Series
%I Academic Press
%C New York
%D 1974

%A Elliott Organick
%T A Programmer's Guide to the Intel 432
%I McGraw-Hill
%D 1982
%K Recommended,

%A T. Ormond
%T Plastic-fiber-based optical links offer low-cost, short-haul data transfer
%J EDN (USA)
%V 29
%N 24
%P 91-96
%O 0 REFS. Treatment PRACTICAL, R
%D 29 Nov. 1984
%K optical cables optical links local area networks
data communication equipment buyer's guides
acrylic fiber LANs short haul data transfer large core fibers
plastic fiber based optical links fiber optic links

%A S. M. Ornstein
%A F. E. Heart
%A W. R. Crowther
%A S. B. Russell
%A H. K. Rising
%A A. Michel
%T The Terminal IMP for the ARPA Computer Network
%J Proceedings AFIPS Spring Joint Computer Conference
%D May 1972
%P 243-254

%A S. M. Ornstein
%A D. C. Walden
%T The Evolution of a High Performance Modular Packet Switch
%J Internation Conference on Communications
%V 1
%D June 1975
%P 6-17 to 6-21

%A S. M. Ornstein
%A W. R. Crowther
%A M. F. Kraley
%A R. D. Bessler
%A A. Michel
%A F. E. Heart
%T PLURIBUS: A Reliable Multiprocessor
%J Proceedings AFIPS National Computer Conference
%V 44
%I AFIPS Press
%D May 1975
%P 551-559

%A J. M. Ortega
%A R. G. Voigt
%T Solution of partial differential equations on vector computers
%J Proc. of the 1977 Numerical Analysis and Computers Conference
%R ARO Report No. 77-3
%r ICASE Report No. 77-7
%d March 30, 1977

%A James M. Ortega
%A Robert G. Voigt
%T Solution of Partial Differential Equations on Vector and Parallel
Computers
%I NASA Langley Research Center
%R ICASE Report No. 85-1
%D January 1985
%K Linear algebra, elliptic equations, initial-boundary value problems,
vector computers, parallel computers, pipelining, fluid dynamics

%A A. Yavuz Oruc
%T A classification of cube-connected networks with a simple control scheme
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 126-131
%K
network interconnection capabilities

%A A. Yavuz Oruc
%A Deepak Prakash
%T Routing Algorithms for Cellular Interconnection Arrays
%J IEEE Transactions on Computers
%V C-33
%N 10
%D October 1984
%P 939-942
%K Cellular interconnection arrays, cycle, interconnection networks,
monotone increasing factorization, permutation, transposition,
Correspondence

%T On Testing Permutation Network Isomorphisms
%A A. Yavuz Oruc
%A M. Yaman Oruc
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 361-368
%K Parallel Algorithms

%A S. Orzag
%A A. Patera
%T Subcritical Transition to Turbulence in Planar Shear Flows
%J Transition and Turbulence
%E R. Meyer
%I Academic Press
%C New York
%P 127-146
%D 1981
%X Remove?

%A S. Orzag
%A A. Patera
%T Calculation of Von Karman's Constant for Turbulent Channel Flow
%J Phys. Rev. Lett.
%V 47
%P 832-835
%D 1981
%X Remove?

%A S. Orzag
%A A. Patera
%T Secondary Instability of Wall Bounded Shear Flows
%J J. Fluid Mech.
%V 128
%P 347-385
%D 1983
%X Remove?

%A T. Osatake
%A T. Ogawa
%A T. Hayshida
%T Optimum Structure of One-Sided Rearrangement Switching Networks
%J Electronic Communications Japan
%V 56
%N 1
%D January 1973
%P 28-33

%A Gyo Osawa
%A Takashi Yokota
%A Hideharu Amano
%A Hideo Aiso
%T Hobonet: an inter-PU connection network with fault-tolerancy
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 165-168
%K Nearest neighbor mesh (NNM), MIMD,
%O fault tolerance
%X A proposal for nearest neighbor communication for fault tolerance.

%T Computer Simulation of Protein Systems
%A D. J. Osguthorpe
%A P. Dauber-Osguthorpe
%A J. Wolff
%A D. H. Kitson
%A A. T. Hagler
%J CYBER 200 Applications Seminar
%R NASA Conference Publication 2295
%D October 1983
%E J. Patrick Gary, Compiler
%I NASA Goddard Space Flight Center
%C Greenbelt, Maryland
%P 63-67

%T Correctness Proofs of Communicating Processes: Three Illustrative
Examples from the Literature
%A Marty Ossefort
%J ACM Transactions on Programming Languages and Systems
%V 5
%N 4
%D October 1983
%P 620-640
%K Specification, theory, verification, message-passing systems, program
proofs, rebound sorting, communicating sequential processes, CSP
Categories: B.7.1 [Integrated Circuits]: Types and Design Styles - VLSI
(very large scale integration); C.2.4 [Computer-Communication Networks]:
distributed systems - distributed applications; D.2.1 [Software Engineering]:
requirements/specification - methodologies; D.2.4 [Software Engineering]:
program verification - correctness proofs;
F.3.1 [Logics and Meanings of Programs]:
Specifying and Verifying and Reasoning
about Programs - specification techniques

%A N. S. Ostlund
%T Attached Scientific Processors for Chemical Computations: A Report to the
Chemistry Community
%R LBL-10409 UC-32
%I LBL or National Technical Information Service (Springfield, VA 22151)
%C Berkeley, CA
%D January 1980

%A Neil S. Ostlund
%A Peter G. Hibbard
%A Robert A. Whiteside
%T A Case Study in the Application of a Tightly Coupled Multiprocessor
to Scientific Computations
%E Garry Rodrigue
%B Parallel Computations
%I Academic Press
%D 1982
%P 315-364
%K
CMU Hardware Cm*
Examples of parallel C include: matrix multiplication, Monte Carlo
and molecular dynamic code, computational chemistry, parallel C,
%X
The C syntax for the parallel C is incorrect, unless they are modifying the
semantics of arrays.
Has three sample parallel C programs (matrix multiply, Monte Carlo,
and molecular dynamics.)

%A H. S. Ostrowsky
%A D. F. Palmer
%T SETS: The Distributed Driver
%J Computer Software and Applications Conference (COMPSAC80)
%I IEEE
%D October 1980
%P 584-589
%O case study, experiment, distributed simulation

%A Karl J. Ottenstein
%T A Brief Survey of Implicit Parallelism Detection
%E Janusz S. Kowalik
%B Parallel MIMD Computation: HEP Supercomputer and Its Applications
%I MIT Press
%C Cambridge, MA
%D 1985
%P 93-122
%K Programming and languages, partitioning, loop distribution,
strength reduction,
%X A paper similar to Kuck's types of surveys on vectorization techniques.

%T A Dictionary Machine (for VLSI)
%A Thomas A. Ottmann
%A Arnold L. Rosenberg
%A Larry J. Stockmeyer
%J IEEE Transactions on Computers
%V C-31
%N 9
%D September 1982
%P 892-897
%K Algorithms for VLSI, dictionary search, pipelining, search tree,
systolic array, VLSI complexity
VLSI design

%A S. Otto
%T Travelling Salesman via Monte Carlo
%R Hm 8
%I California Institute of Technology
%C Pasadena, CA
%D September 1982
%K Caltech Cosmic Cube, hypercube, C^3P
%X Memo.

%A S. Otto
%T Comparison of Code for the VAX and the Prototype NNCP:SU(3) Gauge Theory
%r Hm29
%I California Institute of Technology
%C Pasadena, CA
%D February 1983
%K Caltech Cosmic Cube, hypercube, C^3P

%A S. Otto
%A J. Stack
%T The SU(3) Heavy Quark Potential with High Statistics
%I California Institute of Technology
%C Pasadena, CA
%r Hm-67
%R CALT-68-1113
%D April 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%A Steve W. Otto
%T Lattice Gauge Theories on a Hypercube Computer
%R Hm91
%I California Institute of Technology
%C Pasadena, CA
%D 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%A J.K. Ousterhout
%T Scheduling Techniques for concurrent systems
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 22-30
%K
%O Scheduling and control in distributed operating systems

%A John K. Ousterhout
%A Donald A. Scelza
%A P. S. Sindhu
%T Medusa: An experiment in distributed operating system structure
%J Proc. 7th Symp. on Operating System Principles
%D November 1979
%P 115-116
%K multiprocessor architectures and operating systems
%X Discusses the issues involved in designing an operating system for the Cm*
multiprocessor.  Describes the key features of Medusa and justifies its
design in the context of Cm*.
Text reproduced with the permission of Prentice-Hall \(co 1980.
This paper was reproduced in Kuhn and Padua's (1981)
"Tutorial on Parallel Processing."

%A John K. Ousterhout
%A Donald A. Scelza
%A Pradeep S. Sindhu
%T Medusa: an experiment in distributed operating system structure
%J Communications of the ACM
%V 23
%N 2
%D February 1980
%P 92-105
%O 1 REFS. Treatment PRACTICAL
%K operating systems, distributed systems, message systems, task forces,
deadlock, exception reporting,
CR categories: 4.32, 4.35
distributed processing operating systems
Medusa distributed operating system structure distributed multiprocessor Cm*
distributed hardware
%X This is a reproduction of the paper presented at the 7th SOSP conference.
Proceedings of the Seventh Symposium on Operating Systems
Principles, Pacific Grove, CA, USA, 10-12 Dec. 1979, pp. 115-16
ACM. New York, USA 1979, ix+163, Std Book No.0 89791 009 5
This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A John K. Ousterhout
%T Partitioning and Communication in a Distributed Operating System
%R doctoral thesis
%I Dept. of Computer Science, Carnegie-Mellon University
%C Pittsburgh, PA
%D to appear, 1980
%K multiprocessor architectures and operating systems
%X Detailed description of Medusa, an operating system for the multiprocessor,
Cm*.  (Published eventually by UMI Research Press titled "Medusa: A
Distributed Operating System." (1981)
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A John K. Ousterhout
%T Medusa: A Distributed Operating System
%I UMI Research Press
%D 1981

%A A. Owen
%T Sea Models on the DAP
%I NERC

%A A. Owen
%T A note on using Finite Differences on the ICL DAP
%I NCS Bidston Observatory

%A D. Owen
%A A. Ramsay
%T An Interactive Environment for Distributed Computing
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 173-178
%K
%O Software Engineering for Distributed Systems

%A G. J. Owen
%T Rollback \(em a method of process and system recovery
%J Proc. Conf. Software Engineering for Telecommunication Switching Systems
%C Colchester, England
%D April 1972
%K reliability and error recovery
%X The GEC Mark II multiprocessor is described, and a software technique
for error recovery, called rollback, is discussed in detail.  Rollback
essentially consists of restarting an errant process with fresh data.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A J. L. Owens
%T The Influence of Machine Organization on Algorithms
%E J. F. Traub
%B Complexity of Sequential and Parallel Numerical Algorithms
%P 111-130
%I Academic Press, Inc.
%D 1973

%A Robert Michael Owens
%A Mary Jane Irwin
%T On-Line Algorithms for the Design of Pipeline Architectures
%J Proceedings of 6th Annual Symposium on Computer Architecture
%D 1979
%K Pennsylvania State University
%P 12-19

%T Parallel Sorting with Serial Memories
%A Robert Michael Owens
%A Joseph JA'JA'
%I IEEE Computer Society
%R ISSN 0018-9340
%D April 1985
%K Bitonic Sorting, parallel sorting, serial memories, shuffle/exchange.

%T Proving Liveness Properties of Concurrent Programs
%A Susan Owicki
%A Leslie Lamport
%J ACM Transactions on Programming Languages and Systems
%V 4
%N 3
%D July 1982
%P 455-495
%K Languages, Theory, Verification, temporal logic, liveness, fairness,
proof of correctness, multiprocessing, synchronization
Categories: D.1.3 [Programming Techniques]: Concurrent Programming;
D.2.4 [Software Engineering]: Program Verification;
F.3.1 [Logics and Meanings of Programs]:
Specifying and Verifying and Reasoning about Programs;
F.3.2 [Logics and Meanings of Programs]: Semantics of Programming Languages

%A M. T. Ozsu
%A B. W. Weide
%T Modeling of distributed database concurrency control Mechanisms using an
extended petri net formalism
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 660-665
%K
%O Communication Protocol Modeling

%A M. Tamer Ozsu
%T Performance Comparison of Distributed vs. Centralized Locking
Algorithms in Distributed Database Systems
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Distributed Concurrency Control, extended place/transition nets (EPTN),
%P 254-261

%A D. Paddon, (ed.)
%T Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford
%D 1984

%A D. J. Paddon, ed.
%T Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford, England
%D 1984
%K DAP, Cray, FPS,
%X Proceedings, workshop in the Use of Vector and Array Processors
Institute of Mathematics and its Applications, Bristol, Eng. Sept. 1982.

%A Krishnan Padmanabhan
%A Duncan H. Lawrie
%T Fault tolerance schemes in shuffle-exchange type interconnection networks
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 71-75
%K
U Ill
multistage networks

%A Krishnan Padmanabhan
%A Duncan H. Lawrie
%T A Class of Redundant Path Multistage Interconnection Networks
%J IEEE Transactions on Computers
%V C-32
%N 12
%D December 1983
%P 1099-1108
%K Array processors, fault tolerance, interconnection networks, multiprocessor
systems, nonblocking networks, Omega networks, parallel processing,
redundant path networks.

%A Krishnan Padmanabhan
%T Fault Tolerance and Performance Improvement in Multiprocessor
Interconnection Networks
%R UIUCDCS-R-84-1156
%I Univ. Ill
%C Urbana-Champaign, IL
%D May 1984

%A David A. Padua
%A David J. Kuck
%A Duncan H. Lawrie
%T High-Speed Multiprocessors and Compilation Techniques
%J IEEE Transactions on Computers
%V C-29
%N 9
%D September 1980
%P 763-776
%K Automatic translation, compilers, high-speed multiprocessors,
interconnection networks, multiprocessors, parallel processing,
pipelining, vectorizers
Special issue on Parallel Processing
%X
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%A Edward W. Page
%A Peter N. Marinos
%T Programmable Array Realizations of Synchronous Sequential Machines
%J IEEE Transactions on Computers
%V C-26
%N 8
%D August 1977
%P 811-818
%K Programmable cellular array, secondary-state assignment,
sequential machine structure, sequential machine synthesis,
Sequential machines

%T Parallel Algorithms for Shortest Path Problems
%A Richard C. Paige
%A Clyde P. Kruskal
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 14-19
%K Parallel Algorithms

%A In-Sup Paik
%A C. Delobel
%T A Strategy for Optimizing the Distributed Query Processing
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 686-698
%O Distributed data bases processing and control

%A Y. Paker
%T Application of Microprocessor Networks for the Solution of Diffusion
Equations
%J Math. and Comput. Simulation
%V 19
%P 23-27
%D 1977

%A Y. Paker
%A M. Bozyigit
%T Array type variable topology multicomputer systems
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 53
%K
%O Distributed function architectures

%A Y. Paker
%A J. P. Verjus
%T Distributed computing systems. Synchronization, control and
communication
%I Academic Press. London, England, Std Book No.0 12 543970 9
%P 324
%O Treatment PRACTICAL, THEORETICAL
%D 1983
%K distributed processing
distributed computer systems parallelism programming languages CHORUS projects
local network MICROSS

%A Y. Paker
%T Multi-Microprocessor Systems
%I Academic Press
%C London, England
%D 1983
%K microprocessors, reliability, fault tolerance, processors, interconnection,
hardware, software, communication.
%X The text is a recent survey of the work in the field.  Because it is
oriented to microprocessors, it does not cover super computers like
the Denelcor HEP.  It has a limited survey of software and communications
issues.  Its has a slight emphasis in reliable computing rather than
high performance machines.
Its coverage of work performed in Europe is especially useful as this
work has limited coverage in American publications.
Major machines: American: C.mmp, C.vmp, FTMP, PLURIBUS, SIFT, Tandem, and Cm*,
European: SMS, CUBY-M, POLYPROC, Micral M, etc.
Software includes: Medusa, StarOS, DEMOS (not DEIMOS), MICROS, CHORUS,
TASK, CSP, PARLANCE, NSL, PCL, DP, SR, extended CLU, MOD extended POP-2,
Actors, PLITS/ZENO, LIMP, Flowgraph.
Notably absent is any data flow work.

%A Y. Paker
%A J.-P. Jerjus (ed.)
%T Distributed Computing Systems (Synchronization, Control and Communication)
%I Academic Press
%D 1983
%X A text basically divided into three sets of papers:
Expression, specification
and analysis of synchronization of distributed processes; local area networks
and distributed systems; AND programming
languages for distributed processes.  Some of the papers are worth reading.

%A D. F. Palmer
%T Distributed Computing System at the Subsystem Network Level
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 22-30
%O Design and requirements specification methodology

%A J. Palmer
%T Conjugate Direction Methods and Parallel Computing
%I Stanford University
%R Ph. D. Dissertation
%D 1974

%A F. Panzieri
%A S. K. Shrivastava
%T Reliable remote calls for distributed UNIX: an implementation study
%J Proceedings of the Second Symposium on Reliability in Distributed
Software and Database Systems
%C Pittsburgh, PA, USA
%P 127-133
%O 8 Refs
Treatment PRACTICAL
%D 19-21 July 1982
%K operating systems distributed processing reliability
distributed UNIX remote procedure call reliability
%X An implementation of a reliable remote procedure call mechanism for
obtaining remote services is described. The reliability issues are
discussed together with how they have been dealt with. The
performance of the remote call mechanism is compared with that of
local calls. The remote call mechanism is shown to be an efficient
tool for distributed programming

%A C. H. Papadimitriou
%T A Theorem in Database Concurrency Control
%J JACM
%V 29
%D Oct 1982
%P 998-1006

%A George K. Papakonstantinou
%T A Synthesis Method for Cutpoint Cellular Arrays
%J IEEE Transactions on Computers
%V C-21
%N 12
%D December 1972
%P 1286-1292
%K Cascades, cell index, cellular arrays, corresponding pair,
logical design, minimization,
Cellular design

%A Mark D. Papamarcos
%A Janak H. Patel
%T A Low-Overhead Coherence Solution for Multi-Processors with Private
Cache Memories
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%P 348-354
%D June 1984
%K caches in multiprocessors

%A M. P. Papazoglou
%A P. I. Georgiadis
%A D. G. Maritsas
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Process Synchronization in the Parallel SIMULA Machine
%P 297-299
%O

%A G. Pardey
%A G. Thomas
%T The Implementation of Lattice Calculations on the DAP
%J J. Comp. Phys.
%V 47
%P 165-178
%D 1982

%A R. Pargas
%T Parallel Solution of Elliptic Partial Differential Equations on a Tree
Machine
%I University of North Carolina Dept. of Computer Science
%C Chapel Hill
%R Ph. D. Dissertation
%D 1982

%A B. Parhami
%T Associative Memories and Processors: An Overview and Selected Bibliography
%J IEEE Proceedings
%D June 1973
%P 722-730

%A J. F. Paris
%A W. F. Tichy
%T STORK: an experimental migrating file system for computer networks
%B Proceedings of IEEE INFOCOM 83
%C San Diego, CA, USA
%P 168-175
%O 17 REFS
Treatment PRACTICAL
%I IEEE, New York, USA, p: xvii+618 ISBN: 0-8186-0006-3
%D 18-21 April 1983
%K file organisation distributed processing
distributed file system local networks concurrent access control STORK
computer networks long haul networks consistency lock mechanism
performance locality file migration remote file access
UNIX systems Berkeley Network software remote execution
%X STORK is an experimental file system designed for local and long-haul
networks. It ensures that each user has a single view of his files,
independent of the network node where he works, and independent of
the location of the files. STORK files have no fixed location;
instead they migrate to the network node where they are needed. File
consistency is ensured by permitting only one current copy of each
file to exist in the net at any given time. A lock mechanism is
provided for controlling concurrent access. The performance of the
system depends on the locality of the references to a given file and
not on the host where the file was created. An analytical model is
presented which compares file migration with remote file access
STORK has been implemented on a network of UNIX systems running on
VAXes and PDP-11s, using primitives of the Berkeley Network software
It can also be quickly installed on any network of UNIX systems
allowing remote execution of commands

%A D. S. Parker
%A C. S. Raghavendra
%T The Gamma Network: A Multiprocessor Interconnection Network with Redundant
Paths
%J Proceedings of 9th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 10
%N 3
%D April 1982
%P 73-80
%X A shorter paper was published in IEEE TOC, v C-33, #4, April 1982,
pp. 367-373.

%A D. S. Parker, Jr.
%A G. J. Popek
%A G. Rudisin
%A A. Stoughton
%A B. J. Walker
%A E. Walton
%A J. M. Chow
%A D. Edwards
%A S. Kiser
%A C. Kline
%T Detection of mutual inconsistency in distributed systems
%J IEEE Trans. Software Eng. (USA)
%V SE-9
%N 3
%P 240-247
%O 18 REFS
Treatment PRACTICAL
%D 1983
%K fault tolerant computing operating systems computer networks
fault tolerant computing computer networks mutual inconsistency
distributed systems
communications network network failures redundant copies files
version vectors origin points LOCUS local network operating system
%X Many distributed systems are now being developed to provide users
with convenient access to data via some kind of communications
network. In many cases it is desirable to keep the system functioning
even when it is partitioned by network failures. A serious problem in
this context is how one can support redundant copies of resources
such as files (for the sake of reliability) while simultaneously
monitoring their mutual consistency (the equality of multiple copies).
This is difficult since network failures can lead to inconsistency,
and disrupt attempts at maintaining consistency. In fact, even the
detection of inconsistent copies is a nontrivial problem. Naive
methods either (1) compare the multiple copies entirely or (2)
perform simple tests which will diagnose some consistent copies as
inconsistent. Here a new approach, involving version vectors and
origin points, is presented and shown to detect single file, multiple
copy mutual inconsistency effectively. The approach has been used in
the design of LOCUS, a local network operating system at UCLA

%A D. S. Parker
%A C. S. Raghavendra
%T The Gamma Network
%J IEEE Transactions on Computers
%V C-33
%N 4
%D April 1984
%P 367-373
%K Fault-tolerance, interconnection network, multiprocessors, permutation,
reliability, signed-digit number system,
Correspondence,
%X See the more detailed paper in the 9th Computer Architecture Symp.,
SIGARCH, CAN, v10, #3, April 1982, pp. 73-80.

%A D. Stott Parker, Jr.
%T New Points of View on Three-Stage Rearrangeable Switching Networks
%J Workshop on Interconnection Networks for Parallel and Distributed
Processing
%D April 1980
%I IEEE
%P 56-63

%A D. Stott Parker, Jr.
%T Notes on Shuffle/Exchange-Type Switching Networks
%J IEEE Transactions on Computers
%V C-29
%N 3
%D March 1980
%P 213-222
%K Fast Fourier transform (FFT) algorithm, indirect binary n-cube,
interconnection switches, Omega network, network universality, 3-stage
rearrangeable switching network, Shuffle/Exchange
%O Parallel processing

%A D. Parkinson
%A J. J. Modi
%T Partial Eigenvalues \(em a DAP Fortran \(em ACTUS comparison
%I DAP Support Unit
%C Comp.. Science Dept., Queen Mary's College

%A D. Parkinson
%T The Distributed Array Processor DAP
%B EDV in Medzin and Biology
%C Stuttgart

%A D. Parkinson
%T The ICL Distributed Array Processor \(em DAP
%B Computational Methods in Physics

%A D. Parkinson
%T The ICL Distributed Array Processor DAP
%B Computational Methods in Classical and Quantum Physics
%E M. Hooper
%I Adv. Pub. Ltd
%D 1976

%A D. Parkinson
%T Computers by the Thousands
%I New Scientist
%D June 1976

%A D. Parkinson
%T An Introduction to Array Processors
%I Systems International
%D November 1977
%X See the similar publication for ICL.

%A D. Parkinson
%T High-speed computing
%J Institute of Physics Bulletin
%D 1978

%A D. Parkinson
%T An Introduction to Array Processors
%I ICL
%D 1978
%X See the similar publication for Systems International.

%A D. Parkinson
%T High-powered work from an array
%I Systems International
%D April 1978

%A D. Parkinson
%T The ICL Distributed Array Processor
%J IUCC Bulletin
%D 1979

%A D. Parkinson
%T Bit Organised Array Processors
%I EDA Scientific and Technical Publications Branch (STPB)
%J Proceedings of a Working Group of the International Society of Photogrammetry
%D December 1979

%A D. Parkinson
%T Future Trends in Computing Parallelism
%I 10th European Conference in Data Processing within the Sugar Industry
%D May 1980

%A D. Parkinson
%T The Distributed Array Processor
%J IUCC Bulletin
%D September 1980

%A D. Parkinson
%T Practical Parallel Processors and Their Uses
%I Conference Parallel Processing
%C Loughborough
%D September 1980

%A D. Parkinson
%T Parallel Processing Architecture & Parallel Algorithms
%I NATO conference
%D 1981

%A D. Parkinson
%T Linear Equations and Partial Differential Equations
%C Bergamo
%D 1981

%A D. Parkinson
%T The ICL DAP
%C Bergamo
%D 1981

%A D. Parkinson
%T Bit Organised Algorithms
%C Bergamo
%D 1981

%A D. Parkinson
%T Practical parallel processors and their uses
%I Crest Conference
%C Loughbourough
%D 1981

%A D. Parkinson
%T Using the ICL DAP
%I Conference on Vector and Parallel Processors in Computational Science
%C Chester
%D August 1981

%A D. Parkinson
%T A parallel approach to Computing
%J ABACUS
%V 21
%D January 1981

%A D. Parkinson
%T Parallel Matrix Multiplication
%C Bergamo
%D July 1981

%A D. Parkinson
%A J. Sylwestrowicz
%T The Social Sciences Research Center sponsored work on the DAP Project
%I Queen Mary College
%B Social Sciences Research Center Newsletter
%V 45
%D March 1982

%A D. Parkinson
%A H. M. Liddell
%T The measurement of performance on a highly parallel system
%J IEEE Trans. on Computers
%V C-32
%N 1
%D Jan. 1983
%P 32-37

%A D. Parkinson
%T The Solution of N Linear Equations using P Processors
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 81-87
%D 1984
%K Gauss, Gauss-Jordan elimination, Array FORTRAN
%X Cursory analytic paper on parallel solving.

%A D. Parkinson
%T Experience in Exploiting Large Scale Parallelism
%B Proceedings of the NATO Workshop on High Speed Computations
%E J. Kowalik
%S NATO ASI Series
%V F-7
%I Springer-Verlag
%P 247-256
%D 1984

%A Dennis Parkinson
%A Marvin Wunderlich
%T A compact algorithm for Gaussian elimination over GF(2) implemented on
highly parallel computers
%J Parallel Computing
%V 1
%N 1
%D August 1984
%P 65-73
%K Factorization, Gaussian elimination, DAP, array processors

%A Tai-Ming Parng
%A Shing-Chong Chang
%T Logical Design of High Level Protocols for Local Area Networks
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%D May 1984
%P 166-172
%O 31 REFS. Treatment PRACTICAL
%I IEEE Comput. Soc. Press. Silver Spring, MD, USA, ix+580,
Std Book No.0 8186 0534 0
%I IEEE, ACM, Inf. Process. Soc. Japan, Inst. Nat. Recherche &
Inf. & Autom
%K protocols local area networks distributed processing operating systems
logical design location variation high level protocols local area network
distributed operating system LANDOS process model syntax variation
message communication services port management entities protocol architecture
communication control transport interprocess communication service support
Protocols for local area networks
(LANDOS) local area network distributed operating system

%A S. Parter
%A S. Steuerwalt
%T On k-line and k x k Block Iterative Schemes for a Problem Arising in
3-D Elliptic Difference Equations
%J SIAM J. Numer. Anal.
%V 17
%P 823-839
%X Remove?

%A S. Parter
%A M. Steuerwalt
%T Block Iterative Methods for Elliptic and Parabolic Difference Equations
%J SIAM J. Numer. Anal.
%V 19
%P 1173-1195
%D 1982
%X Remove?

%A S. Parter, (Ed.)
%T Large Scale Scientific Computation
%I Academic Press
%C Orlando, FL
%D 1984

%A William Gerhard Paseman
%T Applying Dataflow in the Real World
%J Byte
%V 10
%N 5
%D May 1985
%P 201-214
%O Special issue on multiprocessing
%X It mentions the TI dataflow project and some NEC work.

%A A. Pashtan
%T Operating System Models in a Concurrent Pascal Environment:
Complexity and Performance Considerations 
%J IEEE-TSE
%V SE-11
%N 1
%P 136-141 
%D January 1985

%A S. Pasupathy
%T Optimal and Conventional Array Processing
%J Canadian Electrical Engineering Journal
%V 3
%N 1
%D January 1978
%P 27-31

%A J. H. Patel
%T Processor-memory interconnections for multiprocessors
%J Proc. 6th Ann. Symp. on Computer Architecture
%C Philadelphia, Pennsylvania
%D April 1979
%P 168-177
%K Delta nets,
miscellaneous topics in multiprocessing
%X Describes an interconnection structure\(emmore cost-effective than a
cross-bar switch\(emthat permits every processor to be connected to every memory
module.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A J. H. Patel
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T A Performance Model for Multiprocessors with Private Cache Memories
%P 314-317
%O Performance Evaluation

%J Proceedings of 3rd Annual Symposium on Computer Architecture
%D 1976
%T Improving the Throughput of a Pipeline by Insertion of Delays
%A Janak H. Patel
%A Edward S. Davidson
%I University of Illinois
%P 159-164
%K Architectural Features for Performance Enhancement

%A Janak H. Patel
%T Pipelines with Internal Buffers
%J Proceedings of 5th Annual Symposium on Computer Architecture
%D 1978
%K Purdue University
%P 249-255

%T An Alternative to the Distributed Pipeline
%A Janak H. Patel
%J IEEE Transactions on Computers
%V C-29
%N 8
%D August 1980
%P 736-737
%K Array of computers, distributed computer, multiprocessor
%O Correspondence

%A Janak H. Patel
%T Performance of Processor-Memory Interconnections for Multiprocessors
%J IEEE Transactions on Computers
%V C-30
%N 10
%D October 1981
%P 771-780
%K Crossbar, interconnection networks, memory bandwidth,
multiprocessor memories
%X
Reproduced in the 1984 tutorial: "Interconnection Networks for parallel
and distributed processing" by Wu and Feng.

%T Analysis of Multiprocessors with Private Cache Memories
%A Janak H. Patel
%J IEEE Transactions on Computers
%V C-31
%N 4
%D April 1982
%P 296-304
%K Cache memories, crossbar, delta networks, interconnection networks,
multiprocessors, parallel memories, performance analysis
Performance analysis

%A Janek H. Patel
%T Performance Studies of Internally Buffered Pipelines
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 36-42
%O Pipelined Architectures

%A K. D. Patel
%T Implementation of a Parallel (SIMD) Modified Newton Algorithm
on the ICL DAP
%E D. J. Paddon
%B Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford, England
%D 1984
%P 229-249

%A N. Patel
%T A Fully Vectorized Numerical Solution of the Incompressible
Navier-Stokes Equations
%I Mississippi State University
%R Ph. D. Dissertation
%D December 1983
%X Remove?

%A N. Patel
%A H. Jordan
%T A Parallelized Point Row-wise Successive Over-Relaxation Method on a
Multiprocessor
%J Parallel Computing
%X To appear
%D 1984

%A M. S. Paterson
%A W. L. Ruzzo
%A L. Snyder
%T Bounds on Minimax Edge Length for Complete Binary Trees
%R TR #81-03-02
%I CS Dept., U. Washington
%C Seattle, WA
%D 1981

%A Girish C. Pathak
%A Dharma P. Agrawal
%T Task Division and Multicomputer Systems
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Multiprocessor Systems, communication,
%P 273-280

%A S. Patil
%T Parallel Evaluation of Lambda-Expressions
%R MS thesis
%I EE Dept. MIT
%D January 1967

%A S. S. Patil
%T Closure Properties of Interconnections of Determinate Systems
%B Records of the Project MAC Conference on Concurrent Systems and
Parallel Computation
%D June 1970
%P 107-116

%l journal-article
%T The Case for the Reduced Instruction Set Computer
%A D. A. Patterson
%A D. R. Ditzel
%J Computer Architecture News
%V 8
%N 6
%M October
%D 1980
%K risc reduced instruction set computer restricted architecture

%A D. A. Patterson
%A D. R. Ditzel
%T The case for the Reduced Instruction Set Computer [RISC]
%J Computer Architecture News
%V 8
%N 6
%D Oct. 1980
%P 25-33

%l proceedings-article
%T RISC 1 : A Reduced Instruction Set VLSI Computer
%A D. A. Patterson
%A C. H. Sequin
%J Proceedings from the Eighth Symposium on Computer Architecture
%M May
%D 1981
%P 443-457
%K risc reduced instruction set computer restricted architecture

%l proceedings-article
%A D. A. Patterson
%A R. S. Piepho
%T RISC Assessment: A High-Level Language Experiment
%J 9th Symp. on Computer Architecture
%M April
%D 1982
%P 3-8
%K risc reduced instruction set computer architecture restricted

%l journal-article
%A D. A. Patterson
%A C. H. Sequin
%T A VLSI RISC
%J Computer
%I IEEE
%V 15
%N 9
%M September
%D 1982
%P 8-21
%K risc reduced instruction set computer architecture restricted

%A D. A. Patterson
%A C. H. Sequin
%T A VLSI RISC
%J Computer
%V 15
%N 9
%D Sept. 1982
%P 8-21

%l proceedings-article
%A D. A. Patterson
%A P. Garrison
%A M. Hill
%A D. Lioupis
%A C. Nyberg
%A T. Sippel
%A K. Van Dyke
%T Architecture of a VLSI Instruction Cache for a RISC
%J Int. Symp. on Computer Architecture
%D 1983
%P 108
%K fault tolerance associative memory SAMOS
%K remote program counter jump branch likely bit

%l journal-article
%A D. A. Patterson
%T RISC Watch
%J Computer Architecture News
%V 12
%N 1
%M March
%D 1984
%P 11-19
%K reduced instruction set computer benchmarks

%A David A. Patterson
%A E. Scott Fehr
%A Carlo H. Sequin
%T Design Considerations for the VLSI Processor of X-Tree
%J Proceedings of 6th Annual Symposium on Computer Architecture
%I IEEE
%D April 1979
%P 90-101

%T Design Considerations for Single-Chip Computers of the Future
%A David A. Patterson
%A Carlo H. Sequin
%J IEEE Transactions on Computers
%V C-29
%N 2
%D February 1980
%P 108-115
%O Joint special issue on microprocessors and microcomputers

%l proceedings-article
%A David A. Patterson
%T A RISCy APPROACH TO COMPUTER DESIGN
%J Digest of papers, Spring COMPCON 82
%M Spring
%D 1982
%P 8-14
%I IEEE Computer Society press
%K risc reduced instruction set computer architecture restricted

%A W. W. Patterson
%T Some Thoughts on Associative Processing Languages
%J Proceedings of the National Computer Conference
%I AFIPS Press
%V 43
%D May 1974
%P 23-26

%A Peter C. Patton
%T Microprocessors: Architecture and Applications
%J Computer
%I IEEE
%V 18
%N 6
%D June 1985
%P 29-40
%X Scalable parallel architectures will require new algorithms and
more expressive programming languages before they can harness the
efforts of hundreds, or even thousands of microprocessors
%K parallel processing parallelism fault tolerant reliable systems
languages

%A G. Paul
%A M. W. Wilson
%T An Introduction to Vectran and its use in Scientific Applications
Programming
%J Proc. 1978 LASL Workshop on Vector and Parallel Machines
%P 176-204
%I LASL
%D 1978

%A G. Paul
%T Design Alternatives of Vector Processors
%J J. Par. and Dist. Comp.
%X To Appear
%D 1985

%A George Paul
%T VECTRAN and the Proposed Vector/Array Extensions to ANSI FORTRAN for
Scientific and Engineering Computation
%J Proceedings of the IBM Conference on Parallel Computers and Scientific
Computations
%C Rome
%D 1982
%X
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%A W. Paul
%A U. Vishkin
%A H. Wagener
%T Parallel Computation on 2-3 Trees
%R ULTRACOMPUTER NOTE #52, TR #70
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D April 1983

%A Mark C. Paulk
%T The ARC Network: Case Study of a Local Area Network
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 312-318
%O Local area network case studies

%A Mark C. Paulk
%T The ARC network: a case study
%J IEEE Software
%V 2
%N 3
%P 62-69
%D MAY 1985
%K LAN
%X Designed around VAX and developed for ballistic missile defense systems,
this network offers error-free message passing and can absorb overhead
unacceptable to general-purpose networks.  Advanced Research Center of
BMD in Huntsville.

%A M. C. Paull
%T Reswitching of Connection Networks
%J Bell System Technical Journal
%V 41
%N 3
%D May 1962
%P 833-855

%A M. Paulle
%T Some Comparative Measurements of Computer Interconnection
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 456-460
%K
%O Communication Networks

%A Jasmina Pavlin
%T Task allocation in distributed problem solving system
%J To appear in Proceedings of the Third National Conference on Artificial
Intelligence
%D August 1983

%T Parallel Updated of Graph Properties in Logarithmic Time
%A Shaunak Pawagi
%A I. V. Ramakrishnan
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 186-193
%K Parallel Algorithms/Simulation

%A G. Pawley
%A G. Thomas
%T The Implementation of Lattice Calculations on the DAP
%J J. Comp. Phys.
%V 47
%P 165-178
%D 1982

%A S. Pawley
%A G. Thomas
%T Computer Simulation of the Plastic to crystalline phase transition
in SF6
%C Edinburgh
%I DAP Support Unit, Queen Mary's College
%J Physics Rev Letters
%V 48
%P 410
%D February 1982

%A P. F. Pawlita
%A H. Strack Zimmermann
%E M. B. Williams
%T Public services and the TRANSDATA network architecture
%B Pathways to the Information Society. Proceedings of the Sixth
International Conference on Computer Communication
%C London, England
%P 621-626
%O 6 REFS. Treatment PRACTICAL
%I North-Holland, Amsterdam, Netherlands, p: xx+1018
ISBN: 0-444-86464-4
%D 7-10 Sept. 1982
%K communication networks digital communication systems electronic mail
viewdata data communication systems
TRANSDATA network architecture public services transmission switching
communication standards X.21 X.25 X.29
Euronet Bildschirmtext teletex ISDN
interactive videotex private network architectures
%X One reason for positive user acceptance of TRANSDATA is its strong
emphasis on cooperation with public services for transmission and
switching. The authors describe influences of public services and
communication standards on the TRANSDATA network architecture. The
support of new services and standards by the communication system is
explained, e.g. X.21, X.25, X.29 and Euronet. The incorporation of
'Bildschirmtext' and teletex support into TRANSDATA is outlined. A
support of ISDN services is suggested. The importance of PTT role and
PTT-oriented standards like interactive videotex and teletex for
opening of private network architectures is emphasized

%A William H. Paxton
%T A Client Base Transaction System to Maintain Data Integrity
%J Proceedings of the 7th Symposium on Operating Systems Principles
%D December 1979
%P 18-24
%O shared data in a distributed system

%A J. K. Peacock
%A J. W. Wong
%A E. G. Manning
%T Distributed Simulation Using a Network of Processors
%J Computer Networks
%D February 1979
%V 3
%N 1
%P 44-56

%A R. C. Pearce
%A J. C. Majithia
%T Upper bounds on the performance of some processor-memory interconnections
%J Proceedings of the 1976 International Conference on Parallel Processing
%I IEEE
%C Walden Woods, Michigan
%D August 1976
%P 303
%K performance, system architecture and organization
%X Derives the best possible performance for each of a variety of
multiprocessor interconnection schemes, such as a crossbar switch and a
timeshared bus.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A R. C. Pearce
%A Jayanti C. Majithia
%T Analysis of a Shared Resource MIMD Computer Organization
%J IEEE Transactions on Computers
%V C-27
%N 1
%D January 1978
%P 64-67
%K Optimum replication factors, resource utilization, shared resource MIMD
organizations
Performance analysis, performance
%X Analyzes the performance of a multiprocessor system in which one resource
is shared.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A R. C. Pearce
%A J. C. Majithia
%T Performance results for an MIMD computer organisation using pipelined
binary switches and cache memories
%J Proc. Inst. Electronic Engineers (England)
%V 125
%N 11
%D November 1978
%P 1203-1207
%K performance
%X Presents simulation results on the use of cache memories in multiprocessors
and on the effect of cache parameters on performance.  A low-cost alternative
to a crossbar switch, called a pipelined binary switch, is investigated for its
suitability as an interconnection mechanism.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A R. B. Pearson
%A J. L. Richardson
%A D. Toussaint
%T A Special Purpose Machine for Monte Carlo Simulation
%R NSF-ITP-81-139
%I Institute for Theoretical Physics
%C Santa Barbara, CA
%D 1981

%A Robert B. Pearson
%A John L. Richardson
%A Doug Toussaint
%T Special-Purpose Processors in Theoretical Physics
%J Communications of the ACM
%V 28
%N 4
%D April 1985
%P 385-389
%K CR Categories and Subject Descriptors: C.1.3 [Processor Architectures]:
Other Architectural Styles; C.3
[Special-Purpose and Application-Based Systems]; J.2 [Physical Sciences
and Engineering]
General Terms: Algorithms, Performance
Additional Key Words and Phrases: numerical simulation

%A M. Pease
%A R. Shostak
%A L. Lamport
%T Reaching Agreement in the Presence of Faults
%J Journal of the ACM
%D April 1980
%V 27
%N 2
%P 228-234

%A M. C. Pease
%T Matrix inversion using parallel processing
%J Jour. ACM
%V 14
%N 4
%D Oct. 1967
%P 757-764

%A M. C. Pease, III
%T An Adaptation of the Fast Fourier Transform for Parallel Processing
%J Journal of the ACM
%V 15
%N 2
%D April 1968
%P 252-264

%A Marshall C. Pease
%T Matrix Inversion Using Parallel Processing
%I NTIS
%R AD-664866
%D February 1968
%K Gauss's algorithm, bordering method
%X Accepted for publication in the Journal of the ACM.

%A Marshall C. Pease, III
%T The Indirect Binary n-Cube Microprocessor Array
%J IEEE Transactions on Computers
%V C-26
%N 5
%D May 1977
%P 458-473
%K Admissible maps, array processor, fast Fourier Transform,
grid computations, microprocessor array, n-cube array,
parallel matrix multiplication, parallel processing, permutation network,
switching network, triangular permutations, virtual array
%X
Reproduced in the 1984 tutorial: "Interconnection Networks for parallel
and distributed processing" by Wu and Feng.

%A A. Pedar
%A V. V. S. Sarma
%T Architecture Optimization of Aerospace Computing Systems
%J IEEE Transactions on Computers
%V C-32
%N 10
%D October 1983
%P 911-922
%K Architecture optimization, computation reliability, fault-tolerant computing,
replicated resources, computing system, shared resources computing system
Fault-tolerant systems

%A J. C. Peers
%A P. A. Luker
%T A Program Generator for Continuous System Simulation on Array Processor
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 359-365
%D 1984
%K AP-120B,

%A R. Perlman
%T Incorporation of multiaccess links into a routing protocol
%J Proceedings. Eighth Data Communications Symposium
%C North Falmouth, MA, USA
%I IEEE Computer Soc. Press
Silver Spring, MD, USA x+261
%D 3-6 Oct. 1983
%P 85-94
%O 9 Refs
Treatment PRACTICAL.
%K computer networks data communication systems multi access systems protocols.
computer networks data communication systems multiaccess links routing protocol
self configuring broadcast capabilities.
%X The effect of various kinds of multiaccess links on routing protocols
and algorithms are explored. The routing algorithms discussed are
distributed routing algorithms, and an assumed goal is that the
network be self-configuring. Properties such as broadcast
capabilities and reliable broadcast capabilities will affect the
requirements placed on the protocols and the performance of the
algorithms. The approach discussed here uses the routing protocol
alone to yield a self-configuring network.

%A Guy-Rene Perrin
%T Formal Model of Parallel Programs
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 469-474
%D 1984
%K communicating processes,

%A R. Perrott
%T A Standard for Supercomputer Languages
%E C. Jesshope
%E R. Hockney
%B Infotech State of the Art Report: Supercomputers
%I Maidenhead: Infotech Int. Ltd.
%V 2
%D 1979
%P 291-308

%A R. H. Perrott
%A D. Stevenson
%T ACTUS \(em A Language for SIMD Architectures
%J Proc. 1978 LASL Workshop on Vector and Parallel Machines
%P 212-218
%I LASL
%C Los Alamos, NM
%D 1978

%A R. H. Perrott
%T A Language for Array and Vector Processors
%J ACM Trans. Programming Languages and Systems
%V 1
%N 2
%D October 1979
%P 177-195
%K array processing, vector processing, parallel data structures,
parallel control structures,
ACTUS
CR Categories: 4.20
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."
Describes ACTUS, a Pascal like derivative for array and vector processors.
It includes various constructs for selecting array and vector
elements, and control structures.

%A R. H. Perrott
%A C. King
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T A Cray-1 Simulation Using PASCAL-Plus
%P 105-108
%O Performance

%A R. H. Perrott
%A D. Crookes
%A P. Milligan
%A W. R. M. Purdy
%T Implementation of an array and vector processing language
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 232-239
%K array processors, vector processors, graph transformations, abstract
representation, optimization,
SIMD, Actus, Cray-1
parallel programming and languages

%A R. H. Perrott
%A D. Crookes
%A P. Milligan
%A W. R. M. Purdy
%T A Compiler for the Synchronous Parallel Programming Language Actus
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 475-480
%D 1984
%K Cray,

%A Ronald H. Perrott
%A Danny Crookes
%A Peter Milligan
%A W. R. Martin Purdy
%T A Compiler for an Array and Vector Processing Language
%J IEEE Transactions on Software Engineering
%V SE-11
%N 5
%D May 1985
%P 471-478
%K Abstract representation, array processors, graph transformations,
optimizations, vector processors
%X Yet another paper on Actus, the Pascal-based vector processing language.

%T Randomized Byzantine Agreement
%A Kenneth J. Perry
%J IEEE Transactions on Software Engineering
%V SE-11
%N 6
%I IEEE Computer Society
%D June 1985
%O Special Issue on Reliability in Distributed Software and Database
Systems
%P 539-546
%K Distributed computing, distributed database systems,
fault-tolerance, protocols, reliability

%A E. Persoon
%T Processing Capabilities Needed in :earning Systems for Picture Recognition
%B Languages and Architectures for Image Processing
%E M. J. B. Duff
%E S. Levialdi
%I Academic Press
%C New York, NY
%D 1981
%P 301-303

%A Charles S. Peskin
%A Olof B. Wiblund
%T Remarks on Efficient Numerical Algorithms for Ultracomputers
%R ULTRACOMPUTER NOTE #18
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D January 1981

%A Charles S. Peskin
%T Ultracomputer Implementation of Odd-Even Reduction
%R ULTRACOMPUTER NOTE #19
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D January 1981

%A Charles S. Peskin
%T A Comparison of Ultracomputer Architecture and Lattice Architecture for
Problems on Lattices
%R ULTRACOMPUTER NOTE #20
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D January 1981

%A F. J. Peters
%T Tree Machines and Divide-and-Conquer Algorithms
%J Proc. Conf. Analysing Problem-Classes Programming Parallel Computing
%C Nuremburg, WG
%D June 1981
%P 25-36

%A Frans J. Peters
%T Parallel pivoting algorithms for sparse symmetric matrices
%J Parallel Computing
%V 1
%N 1
%D August 1984
%P 99-110
%K Sparse matrix, LU-decomposition, minimum-degree ordering, MIMD computer

%A W. P. Petersen
%T Vector Fortran for Numerical Problems on CRAY-1
%J Communications of the ACM
%V 26
%N 11
%D November 1983
%K CR Categories and subject descriptors: D.3.2 [Programming languages]:
Language classifications - FORTRAN, D.3.3 [Programming languages]:
Language constructs - control structures, G.1.0 [Numerical analysis]:
General
General terms: Algorithms, Design, Languages
Bell Labs

%A Gary L. Peterson
%T On O(n log n) Unidirectional Algorithm for the Circular Extrema Problem
%J ACM Transactions on Programming Languages and Systems
%V 4
%N 4
%D October 1982
%P 758-762
%K Algorithms, Performance, Distributed algorithms, extrema finding,
message passing
Categories: C.2.4 [Computer-Communications]: Distributed Systems -
disttributed applications; D.4.1 [Operating Systems]: Process Management -
synchronization; F.2 [Theory of Computation]: Analysis of Algorithms and
Problem Complexity

%T Concurrent Reading While Writing
%A Gary L. Peterson
%J ACM Transactions on Programming Languages and Systems
%V 5
%N 1
%D January 1983
%P 46-55
%K Algorithms, performance, readers/writers, shared data
Categories: D.1.3 [Programming Techniques]: Concurrent Programming; D.4.1
[Operating Systems]: Process Management - concurrency, multiprocessing/
multiprogramming; F.2 [Theory of Computation]: Analysis of Algorithms
and Problem Complexity

%T A New Solution ot Lamport's Concurrent Programming Problem Using Small
Shared Variables
%A Gary L. Peterson
%J ACM Transactions on Programming Languages and Systems
%V 5
%N 1
%D January 1983
%P 56-65
%K Algorithms, performance, reliability, critical section, shared
variables
Categories: D.4.1 [Operating Systems]: Process Management - concurrency;
multiprocessing/multiprogramming; mutual exclusion; synchronization; D.4.5
[Operating Systems]: reliability - fault tolerance; F.2
[Theory of Computation]: Analysis of Algorithms and Problem Complexity

%A J. C. Peterson
%A W. D. Murray
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Parallel Computer Architecture Employing Functional Programming
Systems
%P 145-146
%O
%X See also, the paper of the same title published in the Proc. of the Workshop
on High-Level Language Computer Architectures, pp. 190-195, May 1980.

%A J. C. Peterson
%A W. C. Murray
%T Parallel Computer Architecture Employing Functional Programming Systems
%J Proceedings of the International Workshop on High-Level Language
Computer Architectures
%D May 1980
%P 190-195
%X See also the paper of the same title published in the August 1980
Parallel Processing conference proceedings, pp. 145-146.

%T The Mark III Hypercube-Ensemble Concurrent Computer
%A J. C. Peterson
%A J. O. Tuazon
%A D. Lieberman
%A M. Pniel
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 71-73
%K Parallel Architectures

%A J. L. Peterson
%T Petri nets
%J Computing Surveys
%V 9
%N 1
%D Mar. 1977
%P 223-252

%A Victor Peterson
%T Computational Aerodynamics and the NASF
%I NASA
%R CR-2032
%P 5-30
%D 1978

%A Victor Peterson
%T Application of Supercomputers to Computational Aerodynamics
%I NASA Ames Research Center
%R NASA TM-85965
%D 1984

%A Victor L. Peterson
%T Impact of Computers on Aerodynamics Research and Development
%J Proceedings of the IEEE
%V 72
%N 1
%P 68-79
%D January 1984
%K
Special issue -- Supercomputers - Their Impact on Science and Technology
%X Another wish list paper from end users: need faster machines,
here is our computational need...
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984, pp. 462-473.

%A C. A. Petri
%T Fundamentals of a Theory of Asynchronous Information Flow
%J Proceedings of IFIP Congress 62
%D 1962
%P 166-168

%A J. S. Petty
%T How to pick your modem: doing it right means not going by the book
%J Data Commun. (USA)
%V 14
%N 2
%P 135-146
%O 2 REFS. Treatment GENERAL, PRACTICAL
%D Feb. 1985
%K modems
modem real world performance line impairment failure thresholds test method
telephone lines data network line mileage network performance software
laboratory test field test

%A G. F. Pfister
%A W. C. Brantley
%A D. A. George
%A S. L. Harvye
%A W. J. Kleinfelder
%A K. P. McAuliffe
%A E. A. Melton
%A V. A. Norton
%A J. Weiss
%T The IBM Research Parallel Processor Prototype (RP3):
Introduction and Architecture
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 764-771
%r RC 11060 (#49693)
%d March 1985
%Z IBM T. J. Watson Research Center
%c Yorktown Heights, NY
%K The IBM Research Parallel Processor,, RP3,
MIMD, omega net, 
%X To be published in parallel processing 85 conference.
Also see Ultracomputer work. 1.3 GIPS, 800 MFLOPS, 1-2 Gbytes main storage,
192 MB/sec I/O, 13 Gbytes/sec interprocessor rate, 1 GIP sustained rate.
They looked at Ultracomputer and Cosmic Cube.  Lots of close work with
Ultra: using 4.2BSD as OS and C as parallel language.
Net is bipolar technology.  Processor element: 32-bit micro, 2-4MB main,
32 KB cache, 801 RISC type CPU, NMOSFET technology.  Network will have
fetch-op capability of synchronization.  VM/EPEX is a software emulator
for the modified 4.2BSD.

%T "Hot Spot" Contention and Combining in Multistage Interconnection
Networks
%A G. F. Pfister
%A V. A. Norton
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 790-797
%r RC 11061 (#49694)
%d March 1985
%Z IBM T. J. Watson Research Center
%c Yorktown Heights, NY
%K The IBM Research Parallel Processor,
MIMD, omega net, RP3, message combining, tree saturation,
analytic queueing theory,

%A L. Philipson
%A B. Nilsson
%A B. Breidegard
%T A Communication Structure for a Multiprocessor Computer with Distributed
Global Memory
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%D 1983
%V 11
%N 3
%P 334-340
%O multicomputers and multiprocessors

%A Lars Philipson
%T VLSI Based Design Principles for MIMD Multiprocessor Computers with
Distributed Memory Management
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%D June 1984
%P 319-327
%K VLSI design

%A T. F. Piatkowski
%T A Formal Definition of the ISOANSI Open Systems Interconnection
Reference Model-A Brief Overview and Proposal for a State-Oriented
Systems Approach
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 79-94
%O Network Design for Distributed Systems

%A J. R. Pierce
%T Network for Block Switching of Data
%J Bell System Technical Journal
%D July/August 1972

%T Efficient Demand-driven Evaluation (I)
%A Keshav Pingali
%I Massachusetts Institute of Technology
%D September 25, 1984
%R Technical Memo 242
%K Data-driven evaluation, dataflow, demand-driven evaluation,
demand propagation, functional languages, lazy evaluation, least fix-points,
program transformation, streams

%A Keshav Pingali
%T Efficient Demand-driven Evaluation (II)
%I Massachusetts Institute of Technology
%D September 19, 1984, revised November 1984
%R Technical Memo 243
%K Data-driven evaluation, dataflow, demand-driven evaluation, demand
propagation, functional languages, lazy evaluation, least fix-points,
program transformation, streams

%A W. Piouffe
%T Exception Handling and Recovery in Applicative Systems
%R Pd.D. Thesis
%I Dept. of Information and Computer Science, University of California
%C Irvine, CA
%D 1980

%A N. Pippenger
%T On the Complexity of Strictly Nonblocking Connection Networks
%J IEEE Transactions on Communications
%V COM-22
%N 11
%D November 1974
%P 1890-1892

%A N. Pippenger
%T The Complexity of Seldom-Blocking Networks
%J Proc. 1976 Intl. Conf. Communication
%D June 1976
%I IEEE
%P (7-8)-(7-12)
%C New York, NY

%A N. Pippenger
%T Superconcentrators
%J SIAM J. Computing
%V 6
%N 2
%D June 1977
%P 298-304
%X Also see the paper of the same title and same journal: v7, #4, November
1978, pp. 510-514.

%A N. Pippenger
%T Superconcentrators
%J SIAM Jour. of Computing
%V 7
%N 4
%D November 1978
%P 510-514
%X Also see the paper of the same title and same journal: v6, #2, June 1977,
pp. 298-304.

%A D. M. Piscitello
%T An international internetwork protocol standard
%J J. Telecommun. Networks (USA)
%V 3
%N 3
%P 210-221
%O 24 REFS. Treatment APPLICATIONS
%D Fall 1984
%K protocols standards data communication systems computer networks
international internetwork protocol standard
International Organization for Standardization
ISO network layer Open Systems Interconnection network technology
access method address structure homogeneous connectionless network
service architectural framework subnetwork routing relaying segmentation
reassembly lifetime control congestion control quality
service maintenance error reporting formal description
extended finite state machine Pascal programming language

%A J. M. Plante
%A D. J. Gondek
%T Application of STARAN to support region analysis for a mechanical robot
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 160
%K
%O RADCAP
%X A summary.

%A A. Plas
%A others
%T Lau system architecture: A parallel data-driven processor based
on single assignment
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 293-302
%K
%O System architecture and organization

%A G. Platzman
%T The ENIAC Computations of 1950 - Gateway to Numerical Weather
Prediction
%J Bull. Amer. Meteor. Soc.
%V 60
%P 302-312
%D 1979
%X Remove?

%A A. R. Pleszkun
%A E. S. Davidson
%T Structured memory access architecture
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 461-471
%K
VHSIC
computer architectures

%T Asynchronous Arbiters
%A William W. Plummer
%J IEEE Transactions on Computers
%V C-21
%N 1
%D January 1972
%P 37-42
%K Asynchronous arbiter, asynchronous logic design, conflict resolution,
functional unit allocation, hardware resource allocation, macromodules,
modular control logic, multiprocessor computer system,
priority network, sequential machines with multiple input changes,
Logic Design

%T The Vectorization of a Ray Tracing Program for Image Generation
%A D. Plunkett
%A J. Cychosz
%A M. Bailey
%J CYBER 200 Applications Seminar
%R NASA Conference Publication 2295
%D October 1983
%E J. Patrick Gary, Compiler
%I NASA Goddard Space Flight Center
%C Greenbelt, Maryland
%P 315-323

%A A. Pnueli
%A L. Zuck
%T Verification of Multiprocess Probabilistic Protocols
%J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing
%I ACM
%D August 1984

%A R. Podmore
%A others
%T Applications of an Array Processor for Power System Network Communications
%J Proc. Power Industry Computer Applications Conf.
%D 1979
%P 325-331

%A Fred J. Pollack
%A Kevin C. Kahn
%A Roy M. Wilkinson
%T The IMAX-432 Object Filing System
%J Proceedings of the 8th Symposium on Operating Systems Principles,
Operating Systems Review
%V 15
%N 5
%D December 1981
%P 137-147
%O iMAX-432 operating system

%A L. H. Pollard
%T Multiprocessing with the TI 9900
%J Conf. Rec. \(em 11th Asilomar Conf. on Circuits, Systems and Computers
%C Pacific Grove, California
%D November 1977
%P 461-465
%K architecture and operating systems
%X The design of a multiprocessor intended for data acquisition and processing
is described.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A E. Poole
%A J. Ortega
%T Incomplete Choleski Conjugate Gradient on the CYBER 203/205
%J Supercomputer Applications Symposium, Proceedings of Symposium at
Purdue University
%D October 31-November 1, 1984
%E R. Numich
%D 1985

%A W. G. Poole, Jr.
%A R. G. Voigt
%T Numerical algorithms for parallel and vector computers
%J Computing Reviews
%V 15
%N 10
%D October 1974
%P 379-388

%A G. Popek
%A B. Walker
%A J. Chow
%A D. Edwards
%A C. Kline
%A G. Rudisin
%A G. Thiel
%T LOCUS: A Network Transparent, High Reliability Distributed System
%J Proceedings of the 8th Symposium on Operating Systems Principles,
Operating Systems Review
%V 15
%N 5
%D December 1981
%P 169-177
%C Pacific Grove, CA, USA
%O 19 Refs
Treatment PRACTICAL.
%K UCLA, transparency, architecture, synchronization, partitioning, performance
distributed systems
operating systems distributed processing computer networks.
computer networks LOCUS network transparent high reliability distributed system
distributed operating system application code compatible UNIX network topology.
%X LOCUS is a distributed operating system that provides a very high
degree of network transparency while at the same time supporting high
performance and automatic replication of storage. By network
transparency the authors mean that at the system call interface there
is no need to mention anything network related. Knowledge of the
network and code to interact with foreign sites is below this
interface and is thus hidden from both users and programs under
normal conditions. LOCUS is application code compatible with UNIX,
and performance compares favorably with standard, single system UNIX.
LOCUS runs on a high bandwidth, low delay local network. It is
designed to permit both a significant degree of local autonomy for
each site in the network while still providing a network-wide,
location independent name structure. Atomic file operations and
extensive synchronization are supported. Small, slow sites without
local mass store can coexist in the same network with much larger and
more powerful machines without larger machines being slowed down
through forced interaction with slower ones. Graceful operation
during network topology changes is supported.

%A J. G. Posa
%T Signal Processors Spur Changes
%J Electronics
%V 53
%N 4
%D February 14, 1980
%P 100-101

%A D. Potier
%A Ph. Leblanc
%T Analysis of Locking Policies in Database Management Systems
%J cacm
%D oct 1980
%V 23
%P 584-593

%A J. L. Potter
%T Continuous Image Processing on the MPP
%J Proc. 1981 Workshop Computer Architectures for Pattern Analysis and Image
Database Management
%D November 1981
%P 51-56
%K Massively Parallel Processor

%A J. L. Potter
%T MPP Architecture and Programming
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 275-289
%K Massively Parallel Processor

%A J. L. Potter
%T Alternative data structures for lists in associative devices
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 486-491
%K
associative processing/distributed systems

%A J. L. Potter
%T Image Processing on the Massively Parallel Processor
%J Computer
%D January 1983
%P 62-67
%K MPP

%A J. L. Potter, (ed.)
%T The Massively Parallel Processor
%I MIT Press
%D 1985
%K MPP

%A J. L. Potter, ed.
%T The Massively Parallel Processor
%I MIT Press
%C Cambridge, MA
%D 1985

%A Marshal Potter
%A D. J. Paulish
%T The Modular System Control Development Model (MSCDM)
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 514-519
%O Decentralized control

5A E. Gelenbe
%A C. Poulain
%T Performance of Protocols in the Satellite Channel
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 177-184
%O Communications Protocols for Distributed Computing Systems

%A L. Pouzin
%A H. Zimmerman
%T A tutorial on protocols
%J Proc. IEEE
%V 66
%N 11
%D November 1978
%P 1346-1370

%A D. R. Powell
%T RHEA-A Damage and Fault Tolerant Digital Communication Support for
Distributed Avionic Processing
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 359-373
%O Distributed Computing, Reliability and Fault Tolerance

%A D. R. Powell
%T Performance Evaluation and Comparison of Dependable Channel Access
Technologies for Locally-Distributed computing systems
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 256-269
%K
%O Performance Analysis

%A Michael L. Powell
%A David L. Presotto
%T PUBLISHING: A Reliable Broadcast Communications Mechanism
%J Proceedings of the 9th Symposium on Operating Systems Principles,
Operating Systems Review
%V 17
%N 5
%D October 1983
%P 100-109
%K UCB, DEMOS/MP
%O recovery and reconfiguration

%A Michael L. Powell
%A Barton P. Miller
%T Process Migration in DEMOS/MP
%J Proceedings of the 9th Symposium on Operating Systems Principles,
Operating Systems Review
%V 17
%N 5
%D October 1983
%P 110-119
%K UCB,
%O recovery and reconfiguration

%A D. K. Pradham
%A K. L. Kodandapani
%T A Uniform Representation of Single- and Multistage Interconnection Networks
used in SIMD Machines
%J IEEE Transactions on Computers
%V C-29
%N 9
%D September 1980
%P 777-790

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T A Framework for the Study of Permutations and Applications to
Memory Processor Interconnection Networks
%A D. K. Pradhan
%A K. L. Kodandapani
%P 148-158
%O Interconnection Networks

%A D. K. Pradhan
%T On a Class of Fault-Tolerant Multiprocessor Network Architectures
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 302-311
%K
%O Network Topology
%X
Reproduced in the 1984 tutorial: \fIInterconnection Network for parallel
and distributed processing\fP by Wu and Feng.

%A Dhiraj K. Pradhan
%A Sudharkar M. Reddy
%T Fault-Tolerant Asynchronous Networks
%J IEEE Transactions on Computers
%V C-22
%N 7
%D July 1973
%P 662-669
%K Asynchronous networks, d-separation, Liu's assignment, m-fault tolerant
asynchronous sequential network, separating systems
Fault tolerant machines

%A Dhiraj K. Pradhan
%A Kolar L. Kodandapani
%T A Uniform Representation of Single- and Multistage Interconnection
Networks Used in SIMD Machines
%J IEEE Transactions on Computers
%V C-29
%N 9
%D September 1980
%P 777-791
%K Banyan network, bit-reversal permutation, equivalent networks, flip
networks, indirect binary n-cube, Omega network, perfect-shuffle
permutations, single-stage networks, switching functions, uniform shift
network, unscrambling of p-ordered vectors
Special issue on Parallel Processing

%T A Fault-Tolerant Communication Architecture for Distributed Systems
%A Dhiraj K. Pradhan
%A Sudhakar M. Reddy
%J IEEE Transactions on Computers
%V C-31
%N 9
%D September 1982
%P 863-870
%K Distributed architecture, distributed fault diagnosis, fault-tolerant
communication networks, graph connectivity, interconnection network
graph diameters, self-diagnosis, store and forward networks
Distributed systems

%T Dynamically Restructurable Fault-Tolerant Processor Network
Architectures
%A Dhiraj K. Pradhan
%I IEEE Computer Society
%R ISSN 0018-9340
%D June 1985
%K Binary tree, circuit switching, distributed system, dynamic processing,
emulation, fault-tolerance, fault-tolerant interconnection, linear
array, modular network, packet switching, parallel system, processor
array, self-routing.

%T Multiple Fault Detection in Arrays of Combinational Cells
%A B. A. Prasad
%A F. Gail Gray
%J IEEE Transactions on Computers
%V C-24
%N 8
%D August 1975
%P 794-802
%K Cascade networks, cutpoint cellular array, diagnosable networks,
fault detection, iterative arrays, multiple faults, switching functions,
unrestricted faults,
Fault detection

%A V. R. Prasad
%T Interference-Freedom in Proofs of CSP Programs
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 79-86
%O Distributed programming

%A Terrence W. Pratt
%A Loyce M. Adams
%A Piyush Mehrotta
%A John Van Rosendale
%A Robert G. Voight
%A Merrell Patrick
%T The FEM-2 design method
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 132-134
%K
NASA LaRC, Finite Element Machine,
special purpose processors

%A Terrence W. Pratt
%T Pisces: an environment for parallel scientific computation
%J IEEE Software
%V 2
%N 4
%P 7-20
%D July 1985
%K FLEX/32,
issue on complex parallel systems,
%X the Pisces 1 virtual machine retains sequential programming characteristics,
yet allows for experimentation with the parallel languages that will drive
the supercomputers of the 1990's

%A Terrence W. Pratt
%T Pisces: An Environment for Parallel Scientific Computation
%J IEEE Software
%V 2
%N 7
%D July 1985
%i NASA Langley Research Center
%c Hampton, Virginia
%r ICASE Report No. 85-12
%d February 1985

%A Vaughan Pratt
%T Some Constructions for Order-Theoretic Models of Concurrency
%J Conference on Logics of Programs 1985, springer-verlag LNCS
%D 1985

%A Vaughn Pratt
%T The Pomset Model of Parallel Processes: Unifying the Temporal and the
Spatial
%D January 28, 1985

%A Bruno R. Preiss
%A V. C. Hamacher
%T Data Flow on a Queue Machine
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K data flow and reduction
%C Boston, MA
%P 342-351

%A Premkumar
%A others
%T Interprocessor Communication in TRAC-U.V.
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 51-62
%O Testing and Evaluation

%A U. V. Premkumar
%A R. Kapur
%A M. Malek
%A G. J. Lipovski
%A P. Horne
%T Design and implementation of the banyan interconnection network in TRAC
%J AFIPS Proc. of the NCC
%V 49
%D 1980
%P 643-629
%X
Reproduced in the 1984 tutorial: "Interconnection Networks for parallel
and distributed processing" by Wu and Feng.

%A U. V. Premkumar
%A J. C. Browne
%T Resource Allocation in Rectangular SW-Banyans
%J Proceedings of 9th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 10
%N 3
%D April 1982
%P 311-320
%X
Reproduced in the 1984 tutorial: \fIInterconnection Networks for parallel
and distributed processing\fP by Wu and Feng.

%A B. W. Prentice
%T Implementation of the AWACS passive tracking algorithms on a Goodyear
STARAN
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 250-269
%K
%O RADCAP - the RADC associative processor

%A F. Preparata
%A D. Sarwate
%T An Improved Parallel Processor Bound in Fast Matrix Inversion
%J Information Processing Letters
%V 7
%P 148-150
%D 1978

%A F. P. Preparata
%T Parallelism in Sorting
%J Proceedings of the 1977 International Conference on Parallel Processing
%C Detroit, Michigan
%D August 1977
%P 202-206
%K theoretical results, algorithms and applications
%X Describes a family of sorting algorithms for use in multiprocessor systems.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A F. P. Preparata
%A J. Vuillemin
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Optimal Integrated-Circuit Implementation of Triangular Matrix
Inversion
%P 211-216
%O Numerical Algorithms and Applications

%A Franco P. Preparata
%A David E. Muller
%A Amnon B. Barak
%T Reduction of Depth of Boolean Networks with a Fan-In Constraint
%J IEEE Transactions on Computers
%V C-26
%N 5
%D May 1977
%P 474-479
%K Boolean expressions, combinational networks, computational complexity,
design algorithms, fan-in, network depth, number of levels,
parallel computation,
Logic Design

%A Franco P. Preparata
%T New Parallel-Sorting Schemes
%J IEEE Transactions on Computers
%V C-27
%N 7
%D July 1978
%P 669-671
%K Computational complexity, efficient algorithms, enumeration sorting,
merging, parallel computation, sorting,
Sorting

%A Franco P. Preparata
%A Jean Vuillemin
%T The cube-connected cycles: a versatile network for parallel computation
%J Communications of the ACM
%V 24
%N 5
%D May 1981
%P 300-309
%K parallel processing, VLSI design, sorting, Fourier transform,
CR categories: 5.25,6.21,6.22,
computer architecture and systems
%X
Reproduced in the 1984 tutorial \fI Interconnection Networks for parallel and
distributed processing\fP by Wu and Feng.

%A David L. Presberg
%A Neil W. Johnson
%T The Paralyzer: IVTRAN's Parallelism Analyzer and Synthesizer
%J SIGPLAN Notices
%V 10
%N 3
%D March 1975
%P 9-16

%A K. Preston, Jr.
%T Languages for Parallel Processing of Images
%E Morio Onoe
%E Kendall Preston, Jr.
%E Azriel Rosenfeld
%B Real-Time/Parallel Computing: Image Analysis
%I Plenum Press
%C New York, NY
%D 1981
%P 145-158
%X A short survey paper of languages and machines in this area.

%A K. Preston, Jr.
%T Progress in Image Processing Languages
%E M. J. B. Duff
%B Computing Structures for Image Processing
%I Academic Press
%D 1983
%P 195-211

%A Kendall Preston, Jr.
%A Michael J. B. Duff
%A Stephano Levialdi
%A Philip E. Norgren
%A Jun-Ichiro Toriwaki
%T Basics of Cellular Logic with Some Applications in Medical Image
Processing
%J Proceedings of the IEEE
%V 67
%N 5
%D May 1979
%P 826-856
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."
Starts by surveying the SOLOMON, ILLIAC III, CLIP, CELLSCAN, GLOPR, BIP,
PICAP, diff3, ERIM's cytocomputer, CDC AFP, STARAN, DAP, Toshiba IPS.
Emphasis on change detection for medical uses.

%A Kendall Preston, Jr.
%T Comparison of Parallel Machines: A Proposal
%B Languages and Architectures for Image Processing
%E M. J. B. Duff
%E S. Levialdi
%I Academic Press
%C New York, NY
%D 1981
%P 305-324

%A Kendall Preston, Jr.
%A Leonard Uhr, eds.
%T Multicomputers and Image Processing
%I Academic Press
%D 1982

%A Kendall Preston, Jr.
%T Cellular Logic Algorithms for Gray Level Image Processing
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 135-147

%A Camille C. Price
%A S. Krishnaprasad
%T Software Allocation Models for Distributed Computing Systems
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 40-48
%O Distributed task scheduling

%A H. Price
%A K. Coats
%T Direct Methods in Reservoir Simulation
%J J. Soc. Pet. Eng.
%V 14
%P 295-308
%D 1974
%X Remove?

%A R. W. Priester
%A H. J. Whitehouse
%A K. Bromley
%A J. B. Clary
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Signal Processing with Systolic Arrays
%P 207-215
%O Special-Purpose Processors

%A J. A. Pritchard
%T Processing of High Rate and Volume Satellite Data Utilizing the
Massively Parallel Processor (MPP)
%R X-934-81-32
%I NASA/GSFC
%D November 1981

%Q Programming Techniques Branch
%T SL/1 Manual
%I NASA Langley Research Center
%C Hampton, VA
%D June 1979
%X Best contact for this language is John C. Knight, currently at U Va CS.
A vector processing language based on Pascal developed for the CDC Star-100
and 203 processors.

%A G. Pulkkis
%A P. Poyhonen
%T Performance Modeling of a Class of Asynchronous TMR Processor Systems
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 236-246
%K
%O Performance Analysis

%A T. Pulliam
%A H. Lomax
%T Simulation of Thee-Dimensional Compressible Viscous Flow on the ILLIAC
IV Computer
%J AIAA Journal
%V 18
%P 159-167
%D 1979

%A Krish Purswani
%A Bijan Jabbari
%T An interface message processor with a multiprocessing architecture
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 151-153
%K
special purpose processors

%T Verification of Systolic Algorithms
%A S. Purushothaman
%A P. A. Subrahmanyam
%I Dept. of Computer Science, Univ. of Utah

%T A Kosloff/Basal Method, 3D Migration Program Implemented on the CYBER
205 Supercomputer
%A L. Pyle
%A S. Wheat
%J CYBER 200 Applications Seminar
%R NASA Conference Publication 2295
%D October 1983
%E J. Patrick Gary, Compiler
%I NASA Goddard Space Flight Center
%C Greenbelt, Maryland
%P 327-358

%A G. Z. Qadah
%A K. B. Irani
%T A database machine for very large relational databases
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 307-314
%K
U Mich, Michigan Relational Database Machine, MIRDM
database machine/signal processing

%A Ghassan Z. Qadah
%A Keki B. Irani
%T Evaluation of performance of the equi-join operation on the Michigan
relational database machine
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 260-265
%K MIRDM, equi-join phases,
%O databases

%A G. Qing-Shi
%A Z. Xiang
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Another Approach to Making Supercomputer by Microprocessors--Cellular
Vector Computer of Vertical and Horizontal Processing with Virtual
Common Memory
%P 163-164
%O

%A Gao Qing-Shi
%A Wang Rong-Quan
%T Vector computer for sparse matrix operations
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 87-89
%K
numerical algorithms

%A N. Quaynor
%A A. Bernstein
%T Operating systems for hierarchical multiprocessors
%J Proc. 7th Texas Conf. on Computer Systems
%C Houston, Texas
%D November 1978
%P 1-9 to 1-15
%K multiprocessor architecture and operating systems
%X Discusses the decomposition of operating systems for multi-microprocessors.
Also describes a specific architecture supporting hierarchical software and
discusses the mapping of a typical operating system onto this architecture.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A J. -P. Queille
%T The CESAR System: An Aided Design and Certification System
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 149-161
%K
%O Software Engineering for Distributed Systems

%A G. E. Quick
%T Intelligent Memory \(em "A Parallel Processing Concept"
%J Computer Architecture News, (SIGARCH)
%I ACM
%V 7
%N 8
%D June 1979
%P 23-28
%K parallel processing, reliable processing microcomputer
%X The paper presents an idea bordering on cellular automata.

%A W. E. Quillin
%T Reliability of multiprocessor systems
%J Proc. 1st European Symp. on Computing with Real-Time Systems
%C Harwell, England
%D 1972
%K reliability and error recovery
%X Contains a general discussion of the use of multiprocessing in achieving
high reliability. Also contains a brief description of some systems that use
multiprocessing primarily for this purpose.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Michael J. Quinn
%A Year Back Yoo
%T Data structures for the efficient solution of graph theoretic
problems on tightly-coupled MIMD computers
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 431-438
%K Kruskal's minimal spanning tree algorithm, HEP,
%O algorithms

%A Michael J. Quinn
%A Narsingh Deo
%T Parallel Graph Algorithms
%J ACM Computing Surveys
%V 16
%N 3
%P 319-348 
%D September 1984
%K Categories and Subject Descriptors:
B.7.1 [Integrated Circuits]:
Types and Design Styles - algorithms implemented in hardware, VLSI;
C.1.2 [Processor Architectures]: Multiple Data Stream Architectures
(Multiprocessors) - parallel processors;
E.1 [Data]: Data Structures - arrays, graphs, lists, trees;
F.2.2 [Analysis of Algorithms and Problem Complexity]:
Nonnumerical Algorithms and Problems - computations on discrete structures;
G.2.2 [Discrete Mathematics]: Graph Theory - graph algorithms
General Terms: Algorithms

%A Patrice Quinton
%T Automatic Synthesis of Systolic Arrays for Uniform Recurrent
Equations
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%D June 1984
%P 208-214
%K examples: matrix product, convolution,
systolic arrays
%X
Reproduced in the 1984 tutorial: \fIInterconnection Networks for parallel
and distributed processing\fP by Wu and Feng.

%A M. O. Rabin
%T N-Process Mutual Exclusion with Bounded Waiting by 4 Log N-Valued Shared
Variable
%J J. of Computer and System Science
%V 25
%D 1982
%P 66-75

%A L. R. Rabiner
%A B. Gold
%T Theory and Applications of Digital Signal Processing
%I Prentice-Hall
%C Englewood Cliffs, NJ
%D 1975

%A T. Radhakrishnan
%A R. Barrera
%A A. Guzman
%A A. Jinich
%T Design of a High-level Language (L) for Image Processing
%B Languages and Architectures for Image Processing
%E M. J. B. Duff
%E S. Levialdi
%I Academic Press
%C New York, NY
%D 1981
%P 25-40

%A G. Radin
%T The 801 Minicomputer
%J Proceedings from the Symposium on Architectural Support for
Programming Languages and Operating Systems
%D March 1982
%P 39-47

%l journal-article
%A G. Radin
%T The 801 Minicomputer
%J IBM J. Res. Dev.
%D 1983
%V 27
%N 3
%P 237
%K RISC computer architecture IBM 801 cache

%T The Evaluation of Information in Organizations
%A Roy Radner
%B Proceedings of the Fourth Berkeley Symposium on Mathematics,
Statistics and Probability
%I University of California Press
%D 1961
%V 1
%P 491-533

%T Team Decision Problems
%A Roy Radner
%J Annuals of Mathematical Statistics
%D 1962
%V 33
%P 857-881

%A C. H. Radoy
%A G. J. Lipovski
%T Switched multiple instruction, multiple data stream processing
%J Proc. 2nd Ann. Symp. on Computer Architecture
%C Houston, Texas
%D January 1975
%P 183-187
%K multiprocessor architecture and operating systems
%X A multicomputer architecture combines the characteristics of multiprocessors
and array processors.  As in a multiprocessor, each processing unit is a
computer capable of executing programs on its own.  As in an array processor,
however, each such processing unit periodically receives orders to compute
specific program segments.  This architecture may be viewed as a multiprocessor
architecture with very rigid, hardware-enforced scheduling.  The paper also
discusses the criteria for determining the appropriate use of this
architecture.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A S. V. Raghavan
%A C. S. Moghe
%A R. Kalyanakrishnan
%T LINK: an approach to networking minis and micros
%B NETWORKS India 84. International Symposium on Data Communication
and Computer Networks
%C Madras, India
%D Oct. 1984
%P 17-32
%O 0 REFS. Treatment PRACTICAL
%D Oct. 1984
%E H. N. Mahabala
%E K. B. Lakshmanan
%E S. Srinivasan
%I Comput. Soc. India, IFIP, UNESCO
%K local area networks data communication systems
LAN LINK networking minis
micros communication link heterogeneous computer complex supermini
mainframe file transfer capability file format conversion target network
asynchronous line STAR DELTA master slave approach
handshake multiple logical links

%A C. S. Raghavendra
%T Permutations on ILLIAC IV-type networks
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 59-62
%K
USC
%O interconnection

%A C. S. Raghavendra
%T Fault Tolerance in Regular Network Architectures
%J Micro
%I IEEE
%V 4
%N 6
%D Dec. 1984
%P 44-53
%K interconnection networks arrays trees

%A C. S. Raghavendra
%A D. S. Parker
%T Reliability Analysis of an Interconnection Network
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 461-471
%K Gamma network, monogamma network, bigamma network
%O Fault-tolerant networks

%A D. S. Raghavendra
%A M. Gerla
%A A. Avizienis
%T Reliability optimization in the design of distributed systems
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 388-393
%K
%O Distributed Software Tools and Methods

%A S. K. Rahimi
%A G. D. Jelatis
%T LAN protocol validation and evaluation
%J IEEE J. Sel. Areas Commun. (USA)
%V SAC-1
%N 5
%P 790-802
%O 15 Refs.
Treatment PRACTICAL.
%D 1983
%K computer networks protocols computer networks LAN protocol simulation
token passing bus medium access control local area networks modeling.
%X The use of simulation to validate and evaluate the performance of the
proposed IEEE 802.4 token-passing bus medium access control (MAC)
protocol for local area networks is discussed. This modelling study
is then used to present a technique for protocol validation. Some
validation and performance results are also presented. The modeling
technique transforms the formal specification of the protocol by a
direct and simple technique into a simulation program. Testable
assertions about the protocol's expected behavior under both normal
and abnormal conditions are easily transformed into simulation test
cases. The protocol validation technique runs test cases on the
simulation model. These test cases are based upon 'behavioral
assertions' which were derived from the design objectives and
expected use of the protocol. Validation results are discussed in
terms of the behavioral assertions tested and the success or failure
of meeting these assertions. Simulation performance predictions for
some special test cases are also reported.

%A Saeed K. Rahimi
%A W. R. Franta
%T A Posted Update Approach to Concurrency Control in Distributed Data Base
Systems
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 632-641
%O Distributed data bases applications and techniques

%A N. S. Raja
%A G. S. V. V. S. Prasad
%A S. L. Mehndiratta
%T SACHIV: a distributed calendar system
%B NETWORKS India 84. International Symposium on Data Communication
and Computer Networks
%C Madras, India
%D Oct. 1984
%P 71-78
%O 6 REFS. Treatment PRACTICAL
%D Oct. 1984
%E H. N. Mahabala
%E K. B. Lakshmanan
%E S. Srinivasan
%I Comput. Soc. India, IFIP, UNESCO
%K local area networks administrative data processing distributed processing
SACHIV distributed calendar system calendar related services local area network
multinode file server SANCHAY transaction oriented features PDP 11/40

%A S. Rajan
%T A Parallel Algorithm for High-Speed Subsonic Compressible Flow Over a
Circular Cylinder
%J J. Comp. Phys.
%V 12
%P 534-552
%D 1972

%T Verification of Systolic Arrays: A Steam Functional Approach
%A Sanjay Rajopadhye
%A Prakash Panangaden
%I Dept. of Computer Science, Univ. of Utah
%R UUCS-85-001
%D 1985

%A I. Raju
%A J. Crews
%T Three-Dimensional Analysis of [0/90]s and [90/0]s Laminates with a
Central Circular Hole
%J Composite Tech. Rev.
%V 4
%N 4
%P 116-124
%D 1982

%A Ashwin Ram
%A Janak H. Patel
%T Parallel Garbage Collection Without Synchronization Overhead
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K LISP Machines, Garbage Collection Processor,
%C Boston, MA
%P 84-90

%A I. V. Ramakishnan
%A D. S. Fussell
%A A. Silberschatz
%T On mapping homogeneous graphs on a linear array-processor model
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 440-447
%K
U Texas
VLSI processor arrays

%A I. V. Ramakrishnan
%A P. J. Varman
%T Modular Matrix Multiplication on a Linear Array
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%P 232-238
%D June 1984
%K algorithms for array processors

%T Modular Matrix Multiplication on a Linear Array
%A I. V. Ramakrishnan
%A Peter J. Varman
%J IEEE Transactions on Computers
%V C-33
%N 11
%D November 1984
%P 952-958
%K Array processors, linear array, matrix multiplication, modular,
parallel processing, VLSI,
Algorithms

%T An Optimal Family of Matrix Multiplication Algorithms on Linear Arrays
%A I. V. Ramakrishnan
%A P. J. Varman
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 376-383
%K Parallel Algorithms

%A S. Ramakrishnan
%T Design and analysis of protocols for reliable multicast over
broadcast channels
%B NETWORKS India 84. International Symposium on Data Communication
and Computer Networks
%C Madras, India
%D Oct. 1984
%P 79-95
%O 14 REFS. Treatment PRACTICAL, THEORETICAL
%E H. N. Mahabala
%E K. B. Lakshmanan
%E S. Srinivasan
%I Comput. Soc. India, IFIP, UNESCO
%K protocols local area networks
protocols reliable multicast broadcast channels Ethernet
response transmissions receiver stations simultaneous transmission
message transmitter nonzero probability retransmission requests

%A C. V. Ramamoorthy
%A M. J. Gonzalez
%T A Survey of Techniques for Recognizing Parallel Processable Streams in
Computer Programs
%J Conf. Proc. 1969 FJCC
%P 1-15
%I AFIPS Press
%D 1972

%A C. V. Ramamoorthy
%A K. M. Chandy
%A Mario J. Gonzalez, Jr.
%T Optimal Scheduling Strategies in a Multiprocessor System
%J IEEE Transactions on Computers
%V C-21
%N 2
%D February 1972
%P 137-146
%K Directed graphs, multiprocessing, optimal scheduling, parallel
processing,
Hardware and systems
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A C. V. Ramamoorthy
%A Juong H. Park
%A Hon F. Li
%T Compilation Techniques for Recognition of Parallel Processable Tasks in
Arithmetic Expressions
%J IEEE Transactions on Computers
%V C-22
%N 11
%D November 1973
%P 986-998
%K Explicit approach, implicit approach, maximum parallel form,
parallelism, parse tree, Polish string, recursion, "well formation."
%K Computer systems

%A C. V. Ramamoorthy
%A H. F. Li
%T Some problems in parallel and pipelined processing
%J Spring 1975 Compcon
%I IEEE
%D 1975
%P 177-180

%A C. V. Ramamoorthy
%A H. F. Li
%T Pipeline Processor Architecture \(em A Survey
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 40-62

%A C. V. Ramamoorthy
%A H. F. Li
%T Sequencing Control in Multifunctional Pipeline Systems
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 79-89
%K
%O multiprocessors

%A C. V. Ramamoorthy
%A P. Jahanian
%T Formalizing Code Generation in the Multi Mini Computer Compiler
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 192-199
%K
%O compiling techniques

%A C. V. Ramamoorthy
%A W. H. Leung
%T A scheme for the parallel execution of sequential programs
%J Proceedings of the 1976 International Conference on Parallel Processing
%C Walden Woods, Michigan
%D August 1976
%P 312-316
%K theoretical results, scheduling

%A C. V. Ramamoorthy
%A Thomas F. Fox
%A Hon F. Li
%T Scheduling Parallel Processable Tasks for a Uniprocessor
%J IEEE Transactions on Computers
%V C-25
%N 5
%D May 1976
%P 485-495
%K Input-0utput segment, parallel processing, partial sequence,
partitions, processor segment, sequence dominance, task dominance,
Computer systems

%A C. V. Ramamoorthy
%A H. F. Li
%T Pipeline Architecture
%J Computing Surveys
%I ACM
%V 9
%D March 1977
%P 61-102
%K computer architecture, pipelining, sequential processing, vector
processing
CR categories: 5.24, 6.33
%X A good review including characterization, structure, pipeline
hazards, branch and interrupt handling.  A separate section
covers vector processing.  Many systems are covered.
The Cray-1 and Amdahl 470/V6 are contrasted in detail.

%T A Design of a Fast Cellular Associative Memory for Ordered Retrieval
%A C. V. Ramamoorthy
%A James L. Turner
%A Benjamin W. Wah
%J IEEE Transactions on Computers
%V C-27
%N 9
%D September 1978
%P 800-815
%K Basis search, content-addressable memory, equality-threshold search,
maximum value search, minimum value search, multiple match resolution,
ordered retrieval,
Cellular networks

%A C. V. Ramamoorthy
%A B. W. Wah
%T The Placement of Relations as a Distributed Relational Data Base
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 642-650
%O Distributed data bases applications and techniques

%A C. V. Ramamoorthy
%A Y. R. Mok
%A F. B. Bastani
%A G. Chin
%T Application of a Methodology for the Development and Validation
of Reliable Process Control Software
%J Computer Software and Applications Conference (COMPSAC80)
%I IEEE
%D October 1980
%P 622-32
%O fault tolerance/quality assurance

%T An Optimal Algorithm for Scheduling Requests on Interleaved Memories
for a Pipelined Processor
%A C. V. Ramamoorthy
%A Benjamin W. Wah
%J IEEE Transactions on Computers
%V C-30
%N 10
%D October 1981
%P 787-800
%K Data modules, instruction modules, intelligent buffers, interleaved
memories, memory bandwidth, optimal scheduling algorithm, pipelined
processor

%A C. V. Ramamoorthy
%A S. T. Dong
%T Communication protocol synthesis
%B Proceedings of COMPSAC 82. IEEE Computer Society's Sixth
International Computer Software & Applications Conference
%C Chicago, IL, USA
%P 217-225
%O 22 REFS
Treatment PRACTICAL
%D 8-12 Nov. 1982
%K operating systems protocols computer networks
OS computer networks communication protocols design criteria
design aids automatic protocol synthesizers correctness peer entity model
state transition graph entity model
%X In the past, a number of methods have been proposed to model and
validate communication protocols that have already been designed
However, design criteria and design aids are still lacking for
designing correct protocols. The objectives of developing automatic
protocol synthesizers is to provide a systematic way of designing new
communication protocols such that their correctness can be ensured
This paper presents a protocol synthesis procedure which constructs
the peer entity model from the given model of a single local entity
The protocol generated is guaranteed to be complete, bounded, live,
deadlock-free and properly terminated, if the given entity model
possesses certain specified properties. These properties are very
natural and can be easily checked on the structure of the state
transition graph of the given entity model

%A C. V. Ramamoorthy
%A S. L. Ganesh
%A S. T. Dong
%A C. H. Jen
%A W. T. Tsai
%T The Design of "Low-End" Machines for Data Management in Distributed
Systems
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 187-195
%K
%O Database Machines

%A Chitoor V. Ramamoorthy
%A Lih-Chung Chang
%T System Segmentation for the Parallel Diagnosis of Computers
%J IEEE Transactions On Computers
%V C-20
%N 2
%D February 1971
%P 153-161
%K Data paths, fast Fourier transform, interconnection patterns,
matrix transposition, parallel processing, perfect shuffle,
polynomial evaluation, sorting,
Hardware and systems

%A Chitoor V. Ramamoorthy
%A Lih-Chung Chang
%T System Segmentation for the Parallel Diagnosis of Computers
%J IEEE Transactions On Computers
%V C-20
%N 20
%D March 1971
%P 261-270
%K Computer diagnosis, computer system segmentation, graph theory,
parallel diagnosis, parallel segmentation, serial segmentation

%A K. Ramamritham
%A R. M. Keller
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Specification and synthesis of Synchronizers
%P 311-324
%O Distributed Processing

%A K. Ramamritham
%T On the Termination of Transactions in the Delta System
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 430-437
%K
%O Concurrency Control Techniques

%A Krithivasan Ramamritham
%A John A. Stankovic
%T Dynamic Task Scheduling in Distributed Hard Real-Time Systems
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 96-107
%O Software allocation to distributed hardware

%A Krithivasan Ramamritham
%A David Stemple
%A Stepthen Vinter
%T Decentralized Access Control in a Distributed System
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Distributed Control Algorithms, protection, communications,
Guternberg Kernel,
%P 524-531

%A Krithivasn Ramamritham
%A Robert M. Keller
%T Specification of Synchronizing Processes
%J IEEE Transactions on Software Engineering
%V SE-9
%N 6
%D November 1983
%P 722-733
%K Abstract model, concurrent processing, specification language,
synchronization, temporal logic,
SYnchronizer Specification Language (SYSL)
Concurrent systems

%A H. R. Ramanujam
%T Decomposition of Permutation Networks
%J IEEE Transactions on Computers
%V C-22
%N 7
%D July 1973
%P 639-643

%A R. R. Ramseyer
%A R. G. Arnold
%T An Overview of the MMBC Architecture from the Requirements and Constraints
Point of View
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 747-756
%O Application of distributed computing to modular missile-borne computers

%A Richard R. Ramseyer
%A Andries van Dam
%T A Multi-Microprocessor Implementation of a General Purpose Pipelined CPU
%J Proceedings 4th Annual Symposium on Computer Architecture
%C College Park, MD
%D March 1977
%P 29-34
%K microprogramming

%T Interconnection Networks and Parallel Memory Organizations for Array
Processing
%A Abhiram G. Ranade
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 41-47
%K Vector/Array Processing

%A J. M. Randal
%T A parallel assembler for the ILLIAC IV
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 78
%K
%O Software design
%X Summary.

%A B. Randell
%T Reliable computing systems
%Z Univ. of Newcastle upon Tyne, Newcastle upon Tyne, England
%E R. Hayer
%E R. M. Graham
%E G. Seegmuller
%B Operating Systems. An advanced course
%P 282-391
%D 28 July -5 Aug. 1977
%C Munich, Germany
%I Springer-Verlag, Berlin, Germany, x+593 pp. isbn 3 540 08755 9
%O 63 Refs.
treatment: general,review
%K reliability fault tolerant computing error detection operating systems
system structuring techniques fault tolerance reliability protective redundancy
error detection techniques recovery line
%X The paper presents an analysis of the various problems involved in
achieving very high reliability from complex computing systems, and
discusses the relationship between system structuring techniques and
techniques of fault tolerance. Topics covered include (i) differing types
of reliability requirement, (ii) forms of protective redundancy in hardware
and software systems, (iii) methods of structuring the activity of a
system, using atomic actions, so as to limit information flow, (iv) error
detection techniques, (v) strategies for locating and dealing with faults,
and for assessing the damage they have caused, and (vi) forward and
backward error recovery techniques, based on the concepts of recovery line,
commitment, exception and compensation. A set of appendices provide summary
descriptions and analyses of a number of computing systems that have been
specifically designed with the aim of achieving very high reliability.

%A B. Randell
%T Recursively structured distributed computing systems
%J Proceedings Third Symposium on Reliability in Distributed Software
and Database Systems
%C Clearwater Beach, FL, USA
%P 3-11
%O 13 REFS. Treatment PRACTICAL
%I IEEE Comput. Soc. Press, ISBN: 0-8186-0501-4
Silver Spring, MD, USA, p: viii+195
%D 17-19 Oct. 1983
%K distributed processing fault tolerant computing software engineering
distributed computing systems fault tolerance
recursive structuring principles UNIX
%X A description is given of two design rules which aid the construction
of distributed computing systems and the provision of fault
tolerance, namely: (1) A distributed computing system should be
functionally equivalent to the individual computing systems of which
it is composed. (2) Fault-tolerant systems should be constructed from
generalized fault-tolerant components. The reasoning behind these two
'recursive structuring principles', and the consequences of
attempting to adhere to them, are discussed. Where appropriate this
discussion is illustrated by reference to a distributed system based
on UNIX that is now operational at several locations

%T LADTs: what are the characteristics? [Local area data transport
communication service]
%A M. N. Ransom
%J Telephony (USA)
%V 207
%N 20
%P 48, 52, 55, 57-8, 60, 64, 66, 111
%O 25 REFS. Treatment PRACTICAL
%D 5 Nov. 1984
%K local area networks data communication systems packet switching
packet data communication information services local area data transport LADT
loop electronics technology packet switching interexchange data communications networks

%A Gururaj S. Rao
%A Harold S. Stone
%A T. C. Hu
%T Assignment of Tasks in a Distributed Processor System with Limited Memory
%J IEEE Transactions on Computers
%D April 1979
%V C-28
%N 4
%P 291-299
%K Computer networks, cutsets, distributed computers, Ford-Fulkerson
algorithm, Gomory-Hu cut trees, load balancing, multiterminal maximal
flows, NP-complete problems
%O Distributed processors
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A V. V. Bapeswara Rao
%A V. K. Aatre
%T Reliability Index of Teleprocessing Tree Networks
%J IEEE Transactions on Computers
%V C-25
%N 1
%D January 1976
%P 97-98
%K Reliability index, teleprocessing tree-networks

%A D. Rapp
%T The application of an N by N Processing Array to Matrix Inversion
by Iteration
%r Hm77
%R D-1565
%I Jet Propulsion Lab, California Institute of Technology
%C Pasadena, CA
%D 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%A D. Rapp
%T Concurrent Algorithm for the Exchange Method of Inverting a Matrix
%r Hm69
%R D-1538
%I Jet Propulsion Lab, California Institute of Technology
%C Pasadena, CA
%D April 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%A D. Rapp
%T Evaluation of Two Algorithms for Concurrent Solution of Coupled Linear
Differential Equations with Initial Value
%r Hm57
%R D-1804
%I Jet Propulsion Lab, California Institute of Technology
%C Pasadena, CA
%D January 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%A D. Rapp
%T A Concurrent Processing Approach to Solution of Coupled First Order
Differential Equations
%r Hm81
%I Jet Propulsion Lab, California Institute of Technology
%C Pasadena, CA
%D July 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%A D. Rapp
%T Matrix Multiplication and Inversion on a Concurrent Processing Array
%r Hm58
%R D-1506
%I Jet Propulsion Lab, California Institute of Technology
%C Pasadena, CA
%D March 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%A D. Rapp
%T Comment on the Efficiency of Matrix Inversion Algorithms on a Concurrent
Processing Array
%R Hm73
%I California Institute of Technology
%C Pasadena, CA
%D May 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%T Fundamental Organometallic Reactions: Applications On the CYBER 205
%A A. Rappe
%J CYBER 200 Applications Seminar
%R NASA Conference Publication 2295
%D October 1983
%E J. Patrick Gary, Compiler
%I NASA Goddard Space Flight Center
%C Greenbelt, Maryland
%P 163-184

%A Richard F. Rashid
%T An Inter-Process Communication Facility for UNIX
%I CMU
%D June 1980

%A Richard F. Rashid
%A George G. Robertson
%Z Dept. of Computer Sci., Carnegie-Mellon Univ., Pittsburgh, PA, USA
%T Accent: A Communication Oriented Network Operating System Kernel
%J Proceedings of the 8th Symposium on Operating Systems Principles,
Operating Systems Review
%V 15
%N 5
%D December 1981
%P 64-75
%C Pacific Grove,CA, USA
%O 11 Refs.
treatment: practical
%K inter-process communication, networking, virtual memory, paging, UNIX,
PERQ, VAX, network operating systems, distributed computation, CMU
distributed processing operating systems computer networks
fault tolerant computing computer networks accent
communication oriented network operating system kernel
distributed personal computing project spice
fault tolerant distributed sensor network virtual memory management messages
vax/Unix
computer-computer communications
%X Accent is a communication oriented operating system kernel being built at
carnegie-mellon university to support the distributed personal computing
project, spice, and the development of a fault-tolerant distributed sensor
network (dsn). Accent is built around a single, powerful abstraction of
communication between processes, with all kernel functions, such as device
access and virtual memory management accessible through messages and
distributable throughout a network. In this paper, specific attention is
given to system supplied facilities which support transparent network
access and fault-tolerant behavior. Many of these facilities are already
being provided under a modified version of vax/Unix. The accent system
itself is currently being implemented on the three rivers corp. Perq.

%A Levy Raskin
%T Performance Evaluation of Multiprocessor Systems
%R doctoral thesis, CMU-CS-78-141
%I Dept. of Computer Science, Carnegie-Mellon University
%C Pittsburgh, PA
%D August 1978
%K performance
%X The major published source of information on Cm*'s performance.  Describes
experiments done on an early one-cluster version of Cm* as well as analytical
models for larger configurations.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A B. D. Rathi
%A A. R. Tripathi
%A G. J. Lipovski
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Hardwired Resource Allocators for Reconfigurable Architectures
%P 109-117
%O Resource Control and Allocation

%A Bharat Deep Rathi
%A Sanjay Deshpande
%A Mathew Sejnowski
%A Don Walker
%A Roy Jenevein
%A G. J. Lipovski
%A J. C. Browne
%T Specification and implementation of an intergrated packet communication
facility for an array computer
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 51-58
%K
U Texas, TRAC
multistage networks

%A Justin Rattner
%T Hardware/Software Cooperation on the iAPX-432, (Extended Abstract)
%J Symposium on Architectural Support for Programming Languages and
Operating Systems, Computer Architecture News
%V 10
%N 2
%C Palo Alto, CA
%D March 1982
%P 1
%O hardware/software trade

%A B. Ramakrishna Rau
%T Interleaved Memory Bandwidth in a Model of a Multiprocessor Computer
System
%J IEEE Transactions on Computers
%V C-28
%N 9
%D September 1979
%P 678-681
%K Analytical models, interleaved memories, memory bandwidth,
memory interference, multiprocessors, performance evaluation,
Performance analysis

%A C. V. Ravi
%T On the Bandwidth and Interference in Interleaved Memory Systems
%J IEEE Transactions on Computers
%V C-21
%N 8
%D August 1972
%P 899-901

%A C. V. Ravi
%T The structure and characteristics of distributed systems
%J Proc. 2nd Int. Conf. on Software Engineering
%D October 1976
%P 133-137

%A C. V. Ravi
%A Torben Moller
%T A Hierarchical Microcomputer System for Hardware and Software
Development
%J Proceedings of 4th Annual Symposium on Computer Architecture
%D 1977
%K UC, Berkeley, Multicomputer Systems
%P 35-40

%A W. Ray
%T Cyberplus: A Multiparallel Operating System
%J Los Alamos Workshop on Operating Systems and
Environments for Parallel Processing
%D August 7-9, 1984
%C Los Alamos, NM

%A Wayne A. Ray
%T The Advanced Flexible Processor (AFP)
%J Digest of Papers, Compcon85 Thirtieth IEEE Computer society
International Conference
%I IEEE Computer Society
%D February 25-28, 1985
%P 18-20

%A D. Rayner
%T Progress in testing protocol implementations
%J IEEE International Conference on Communications: Integrating
Communication for World Progress (ICC '83)
%C Boston, MA, USA
%P 1323-1327
%O 16 REFS. Treatment PRACTICAL
%D 19-22 June 1983
%K computer networks protocols
protocol standards Open Systems Interconnection testing
%X International standards are being developed for protocols and
services in support of Open Systems Interconnection (OSI). This
activity will be in vain unless products are produced in conformance
with these standards. To give users confidence in the products they
buy, implementations need to be tested by a trusted independent
assessment centre. NPL is developing suitable testing techniques for
use by such centres. Descriptions are given of the approach adopted
and the current testing system. A brief description is given of the
tests being used and some of the early lessons learned. In conclusion
the need is identified for standardization of sets of objective tests
for each OSI protocol

%A R. J. Raynor
%A J. M. Gwynn
%T Minimization of supervisor conflict for multiprocessor computer systems
%J Proc. Symp. on Simulation of Computer Systems
%C Boulder, Colorado
%D August 1976
%K performance

%T Modeling and Verification of Communication Protocols in SARA: The X.21
Interface
%A Rami R. Razouk
%A Gerald Estrin
%J IEEE Transactions on Computers
%V C-29
%N 12
%D December 1980
%P 1038-1052
%K Automated control-flow analysis, communication protocols,
computer-aided design, deadlock detection, graph models, verification
%O Special issue on distributed processing systems

%A Rami R. Razouk
%A Charles V. Phelps
%T Performance Analysis using Timed Petri Nets
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 126-128
%K timed reachability graphs,
%O performance modeling

%A G. Rea
%T A Software Debugging Aid for the Finite Element Machine
%I University of Colorado
%R CS Dept. Report
%K FEM

%A S. Reddaway
%T Distributed Array Processor, Architecture and Performance
%J Proceedings of the NATO Workshop on High Speed Computations, NATO ASI
Series
%V F-7
%I Springer-Verlag
%E J. Kowalik
%C Berlin, West Germany
%D 1984
%P 89-98
%K DAP

%A S. F. Reddaway
%T DAP \(em A Distributed Array Processor
%J Proceedings of 1st Annual Symposium on Computer Architecture
%D 1974
%P 61-70

%A S. F. Reddaway
%T The DAP Approach
%B Supercomputers
%I Infotech, state of the art report
%D 1979

%A S. F. Reddaway
%T Revolutionary Array Processors
%I North Holland Pub. Co.
%B Electronics & Microelectronics
%D 1980

%A Arumalla V. Reddi
%T Pipeline and parallel architectures for computer communications systems
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 148-150
%K
special purpose processors

%A S. S. Reddi
%A C. V. Ramamoorthy
%T Some Aspects of Flow-Shop Sequencing Problem
%J Proceedings of the Sixth Annual Princeton Conf. on Mathematical
Programming
%I Princeton Univ. Press
%C Princeton, NJ
%D 1972
%P 650-654

%A S. S. Reddi
%T Analytic and implementation considerations of two-facility sequencing in
computer systems
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 205-206
%K
%O Scheduling

%A S. S. Reddi
%A E. A. Feustel
%T An approach to restructurable computer systems
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 319-337
%K
%O System architecture and component design

%A S. S. Reddi
%A Edward A. Feustel
%T A Restructurable Computer System
%J IEEE Transactions on Computers
%V C-27
%N 1
%D January 1978
%P 1-20
%K APL implementation, architectural design, bus units,
parallel computation, parallel languages, restructurable computers,
storage schemes,
Computer architecture

%A S. M. Reddy
%A P. Raghavan
%A J. G. Kuhl
%T A class of graphs for processor interconnection
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 154-157
%K
node-to-node networks

%A S. M. Reddy
%A V. P. Kumar
%T On fault-tolerant multistage interconnection networks
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 155-164
%K merged delta networks (MDN), augmented MIN (multistaged interconnection net),
C-networks, routing,
%O fault tolerance

%A Sudhakar M. Reddy
%A Vijay P. Kumar
%T On Multipath Multistage Interconnection Networks
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Fault-tolerant interconnection, dynamic rerouting,
%P 210-217

%A D. Redhed
%A A. Chen
%A S. Hotovy
%T New Approach to the 3D Transonic Flow Analysis Using the STAR-100
Computer
%J AIAA Journal
%V 17
%P 98-99
%D 1979

%A G. R. Redinbo
%T Finite Field Arithmetic on an Array Processor
%J IEEE Transactions on Computers
%V C-28
%N 7
%D July 1979
%P 461-471

%A G. Robert Redinbo
%T Finite Field Arithmetic on an Array Processor
%J IEEE Transactions on Computers
%V C-28
%N 7
%D July 1979
%P 461-471
%K Array processors, fast Fourier transforms, finite field arithmetic,
Fourier transforms, modulo p arithmetic, polynomial multiplications,
sequence convolutions, signal processing computers,
Papers

%A D. Reed
%T Naming and Synchronization in a Decentralized Computer System
%I MIT
%D sept 1978
%R MIT/LCS/TR-205

%A D. Reed
%A M. Patrick
%T Parallel Iterative Solution of Sparse Linear Systems
%I NASA Langley Research Center
%R ICASE Report No. 84-35
%D 1984

%A D. A. Reed
%A H. D. Schwetman
%T Cost-Performance Bounds for Multi-Microcomputer Networks
%R CSD-TR-382
%I CS Dept., Purdue Univ.
%D Oct. 1981.

%A D. D. Reed
%A R. K. Kanodia
%T Synchronization with event counts and sequencers
%Z Lab. for Computer Sci., MIT, Cambridge, MA, USA
%J Oper. Syst. Rev. (USA), Spec. Issue,
Proceedings of the sixth symposium on operating systems principles
%V 11
%N 5
%D 16-18 nov. 1977
%C West Lafayette, IN, USA
%O treatment: theoretical
%K operating systems
eventcounts sequencers synchronization mechanism asynchronous computation
communication path signalling concurrent computations
%X Summary form only given. This paper describes synchronization mechanism
that is not based on the concept of mutual exclusion, but rather on
observing the sequencing of significant events in the course of an
asynchronous computation. Two kinds of objects are described, an
eventcount, which is a communication path for signalling and observing the
progress of concurrent computations, and a sequencer, which assigns an
order to events occurring in the system.

%T A distributed computer control system for a steelmaking facility
%A D. P. Reed
%J Iron & Steel Eng. (USA)
%V 61
%N 3
%P 21-25
%O 0 REFS. Treatment PRACTICAL
%D March 1984
%K steel industry process computer control distributed control
computer networks weighing
computer networks process computer control distributed computer control system
steelmaking facility
BOF shop BOF process computer weighing system computer continuous casting
chemical laboratory

%A Daniel Reed
%A Merrel L. Patrick
%T A model of asynchronous iterative algorithms for solving large
sparse, linear systems
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 402-409
%K MIMD, Finite Element Machine (FEM), sparse matrix solving machine
(SM)2,
%O matrix computations

%A Daniel A. Reed
%T A simulation study of multimicrocomputer networks
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 161-164
%K
VLSI
node-to-node networks

%A Daniel A. Reed
%T Optimal Routing in the Cube-Connected Cycles Interconnection Network
%I University of North Carolina
%R CSD-TR-412
%D June 27, 1983

%A Daniel A. Reed
%T Modeling Multimicrocomputer Networks
%I Purdue University
%R CSD-TR-436
%D March 8, 1983

%T The Performance of Multimicrocomputer Networks Supporting Dynamic
Workloads
%A Daniel A. Reed
%J IEEE Transactions on Computers
%V C-33
%N 11
%D November 1984
%P 1045-1048
%K Distributed scheduling, microcomputer networks, parallel systems,
precedence graphs, simulation,
Correspondence,

%T Interactive Solution of Large, Sparce, Linear Systems on a Static Data
Flow Architecture: Performance Studies
%A Daniel A. Reed
%A Merrell L. Patrick
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 25-32
%K Vector/Array Processing

%A David P. Reed
%T Implementing Atomic Actions on Decentralized Data
%J Proceedings of the 7th Symposium on Operating Systems Principles
%D December 1979
%P 163-
%O distributed data management

%A S. Reed
%A V. R. Lesser
%T Division of labor in honey bees and distributed focus of attention
%R Technical Report 80-17
%I Department of Computer and Information Science, University of Massachusetts
%C Amherst, Massachusetts
%D September 1981

%A A. P. Reeves
%T An Array Processing System with a FORTRAN-Based Realization
%J Computer Graphics & Image Processing
%V 9
%N 3
%D March 1979
%P 267-281

%A A. P. Reeves
%A J. D. Bruner
%A M. S. Poret
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T The Programming Language Parallel PASCAL
%P 5-6
%O Software and Languages

%A A. P. Reeves
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Parallel Computer Architectures for Image Processing
%P 199-206
%O Special-Purpose Processors

%A A. P. Reeves
%A J. D. Bruner
%A T. M. Brewer
%T High Level Languages for the Massively Parallel Processor
%D November 1981
%R TR-EE 81-45
%I EE Dept., Purdue University
%K MPP

%A A. P. Reeves
%A J. D. Bruner
%T The Language Parallel Pascal and Other Aspects of the Massively Parallel
Processor
%D December 1982
%I EE Dept., Cornell University
%K MPP

%A A. P. Reeves
%T Fault Tolerance in Highly Parallel Mesh Connected Processors
%E M. J. B. Duff
%B Computing Structures for Image Processing
%I Academic Press
%D 1983
%P 77-94

%T A Systematically Designed Binary Array Processor
%A Anthony P. Reeves
%J IEEE Transactions on Computers
%V C-29
%N 4
%D April 1980
%P 278-287
%K Binary images, computer architecture, image processing,
near-neighborhood operation, parallel processing
%O Computer architecture

%A Anthony P. Reeves
%A John D. Bruner
%T High Level Language Specification and Efficient Function Implementation
for the Massively Parallel Processor
%I Purdue University, EE Dept.
%C West Lafayette, IN 47907
%R TR-EE 80-32
%D July 1980
%K MPP

%T Efficient Function Implementation for Bit-Serial Parallel Processors
%A Anthony P. Reeves
%A John D. Bruner
%J IEEE Transactions on Computers
%V C-29
%N 9
%D September 1980
%P 841-844
%K Binary array processing, bit-serial arithmetic, logic design
algorithms, parallel processing, Reed-Muller canonic form, two-input
gate networks, universal logic modules
%O Special issue on Parallel Processing

%A Anthony P. Reeves
%T The Anatomy of VLSI Binary Array Processor
%B Languages and Architectures for Image Processing
%E M. J. B. Duff
%E S. Levialdi
%I Academic Press
%C New York, NY
%D 1981
%P 267-274

%A Anthony P. Reeves
%T Parallel Algorithms for Real-Time Image Processing
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 7-18

%A Arthur P. Reeves
%A John D. Bruner
%T Efficient Function Implementation for Bit-Serial Parallel Processors
%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%P 128-133
%O Arithmetic Processing

%A H. K. Reghbati
%A V. C. Hamacher
%T Hardware Support for the Concurrent Programming in Loosely Coupled
Multiprocessors
%J Proceeding of 5th Annual Symposium on Computer Architecture
%D 1978
%K University of Toronto
%P 195-20l
Reprinted in "Tutorial: Distributed Processing," IEEE,
compiled by Burt H. Liebowitz and John H. Carson, 1981, 3rd edition.

%A Renaud C. Regis
%T Multiserver Queueing Models of Multiprocessing Systems
%J IEEE Transactions on Computers
%V C-22
%N 8
%D August 1973
%P 736-745
%K Hyperexponential and hypoexponential distributions,
multiprocessing systems, multiserver queues, performance evaluation,
preemptive and nonpreemptive disciplines, queueing theory,
scheduling strategies,
Special issue on parallel computation, queueing and scheduling

%A J. Reid
%T On the Method of Conjugate Gradients for the Solution of Large Sparse
Systems of Linear Equations
%J Proc. Conf. Large Sparse Sets of Linear Equations
%I Academic Press
%D 1971

%A J. Reid
%T The Use of Conjugate Gradients for Systems of Linear Equations Processing
Property A
%J SIAM J. Numer. Anal.
%V 9
%P 325-332
%D 1972
%X Unresolved %T?

%A Loretta Guarino Reid
%A Philip L. Karlton
%T A File System Supporting Cooperation between Programs
%J Proceedings of the 9th Symposium on Operating Systems Principles,
Operating Systems Review
%V 17
%N 5
%D October 1983
%P 20-29
%K Xerox PARC, Mesa file system, B-trees,
%O resource management

%A J. Reif
%A P. Spirakis
%T Distributed Algorithms for Synchronizing Interprocess Communication
within Real Time
%J Symposium on Theory of Computation
%D May 1981
%P 133-145

%A J. Reif
%A P. Spirakis
%T Real Time Resource Allocation in a Distributed System
%T Language Constructs and Support Systems for Distributed Computing
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 84-94

%A John Reif
%T Probabilistic parallel prefix computation
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 291-298
%O theory

%T Real-Time Synchronization of Interprocess Communications
%A John H. Reif
%A Paul G. Spirakis
%J ACM Transactions on Programming Languages and Systems
%V 6
%N 2
%D April 1984
%P 215-238
%K Algorithms, designs, languages, performance, interprocess
communication, synchronization, response time, probabilistic choice,
handshake protocols, expected time, asynchronous systems, symmetry,
communicating sequential processes, randomized algorithms
C.2.1 [Computer-Communication Networks]:
network architecture and design - distributed networks;
C.2.4 [Computer-Communication Networks]:
distributed systems - distributed applications; D.1.3 [Programming Techniques]
concurrent programming; D.2.8 [Software Engineering]:
metrics - complexity measures; performance measures;
D.3.3 [Programming Languages]:
Language Constructs - concurrent programming structures;
D.4.4 [Operating Systems]: Communications Management - message sending;
D.4.7 [Operating Systems]: Organization and Design - distributed systems;
real-time systems; E.4 [Data]:
coding and information theory - formal models of communication;
F.2.0 [Analysis of Algorithms and Problem Complexity]: General;
G.3 [Mathematics of Computing]:
probability and statistics - probabilistic algorithms;
H.2.4 [Database Management]: systems - distributed systems;
transaction processing

%A E. W. Reigel
%A I. Faber
%A D. Fisher
%T The Interpreter A Microprogrammable Building Block System
%J Proceedings AFIPS Spring Joint Computer Conference
%D 1972
%P 705-723

%A Earl W. Reigel
%T Parallelism Exposure and Exploitation
%E L. C. Hobbs
%E D. J. Theis
%E Joel Trimble
%E Harold Titus
%E Ivar Highberg
%B Parallel Processor Systems, Technologies and Applications
%I Spartan Books
%C New York, New York
%D 1970
%P 417-438
%K Programming and software techniques

%A B. Reilly
%T On Implementing the Monte Carlo Evaluation of the Boltzmann Collision
Integral on ILLIAC IV
%I University of Illinois at Urbana-Champaign
%R Coordinated Science Laboratory Report No. I-140
%D 1970

%A T. Rein
%T Computers in the 1980's \(em Trends in Hardware Technology
%J Information Processing 74 Proceedings IFIP Congress
%D 1974
%P 137-140

%A Karl D. Reinartz
%T Bitalgorithmen Zur Schenellen Berechnung Transzendenter Funktionen Auf
Parallelrechnern
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 217-224
%D 1984

%A Wolfgang Reisig
%T Interactive Schemes
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 225-228
%K Petri nets and related topics

%A E. Reiter
%A G. Rodrigue
%T An Incomplete Choleski Factorization by a Matrix Partition Algorithm
%B Elliptic Problem Solvers
%I Academic Press
%C New York
%E G. Birkhoff
%E A. Schoenstadt
%D 1984
%P 161-173

%A Richard P. Reitman
%T A Mechanism for Information Control in Parallel Systems
%J Proceedings of the 7th Symposium on Operating Systems Principles
%D December 1979
%P 55-63
%O Information Flow Control

%A M. Rem
%T The closure statement:
A programming language construct allowing ultraconcurrent execution
%J Jour. ACM
%V 28
%N 2
%D April 1981
%P 393-410

%T Associons: A Program Notation with Tuples instead of Variables
%A Martin Rem
%J ACM Transactions on Programming Languages and Systems
%V 3
%N 3
%D July 1981
%P 251-262
%K Programming languages, data structures, content-retrievable tuples,
closure statement, concurrency, associative addressing
CR Categories: 4.20, 4.22, 4.34

%T BCA: A Bus Connected Architecture
%A Shu Renben
%A Peter C. Patton
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 79-88
%K Parallel Architectures

%A David A. Rennels
%T Distributed Fault-Tolerant Computer Systems
%J Computer
%V 13
%N 3
%D March 1980
%P 55-65
%X Survey of fault tolerant projects and issues to this point: Pluribus,
Cm's, Honeywell's FTMP.
Reprinted in "Tutorial: Distributed Processing," IEEE,
compiled by Burt H. Liebowitz and John H. Carson, 1981, 3rd edition.

%A J. E. Requa
%A J. R. McGraw
%T The Piecewise Data Flow Architecture, Part I: Architectural Concepts
%R UCRL-85886, Rev. 1
%I Lawrence Livermore National Laboratory
%C Livermore, CA
%D Nov. 198.

%A J. E. Requa
%T The Piecewise Data Flow Architecture Control Flow and Register
Management
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 11
%N 3
%D 1983
%P 84-89
%K
LLNL
%O Data Flow Architectures

%A H. K. Resnick
%A A. G. Larson
%T DMAP: A Cobol Extension for Associative Array Processors
%J SIGPLAN Notices
%V 10
%P 54-61
%D 1975

%A G. Resta
%A L. Galli
%T Linear Programming via Hierarchical Cooperation on a DAP
%I Univ. of Genoa

%T Development of a Voice Funnel System, Quarterly Technical Report No. 9
%A R. D. Rettberg
%I BBN Laboratories
%R 4666
%D August 1981
%K Voice funnel, digitized speech, packet switching, butterfly switch,
multiprocessor

%T Development of a Voice Funnel System, Quarterly Technical Report No. 8
%A R. D. Rettberg
%I BBN Laboratories
%R 4660
%D May 1981
%K Voice funnel, digitized speech, packet switching, butterfly switch,
multiprocessor

%T Development of a Voice Funnel System, Quarterly Technical Report No. 12
%A R. D. Rettberg
%I BBN Laboratories
%K Voice Funnel, Digitized speech, packet switching, butterfly switch,
multiprocessor
%R 4845
%D January 1982

%T Development of a Voice Funnel System, Quarterly Technical Report No. 10
%A R. D. Rettberg
%I BBN Laboratories
%R 4816
%D March 1982
%K Voice Funnel, Digitized speech, packet switching, butterfly switch,
multiprocessor

%T Development of a Voice Funnel System, Quarterly Technical Report No. 11
%A R. D. Rettberg
%I BBN Laboratories
%K Voice Funnel, Digitized speech, packet switching, butterfly switch,
multiprocessor
%R 4817
%D March 1982

%T Development of a Voice Funnel System, Quarterly Technical Report No. 11
%A R. D. Rettberg
%I BBN Laboratories
%K Voice Funnel, Digitized speech, packet switching, butterfly switch,
multiprocessor
%R 4927
%D March 1982

%T Development of a Voice Funnel System, Quarterly Technical Report No. 14
%A R. D. Rettberg
%I BBN Laboratories
%K Voice Funnel, Digitized speech, packet switching, butterfly switch,
multiprocessor
%R 4928
%D March 1982

%T Development of a Voice Funnel System, Quarterly Technical Report No. 16
%A R. D. Rettberg
%I BBN Laboratories
%K Voice Funnel, Digitized speech, packet switching, butterfly switch,
multiprocessor
%R 5203
%D October 1982

%T Development of a Voice Funnel System, Quarterly Technical Report No. 17
%A R. D. Rettberg
%I BBN Laboratories
%K Voice Funnel, Digitized speech, packet switching, butterfly switch,
multiprocessor
%R 5284
%D April 1983

%T Development of a Voice Funnel System, Quarterly Technical Report No. 18
%A R. D. Rettberg
%I BBN Laboratories
%K Voice Funnel, Digitized speech, packet switching, butterfly switch,
multiprocessor
%R 5285
%D April 1983

%A G. Reyling
%T Performance and Control of Multiple Microprocessor Systems
%J Computer Design
%V 13
%P 81-86
%D 1974

%T Chemical Application of Diffusion Quantum Monte Carlo
%A P. Reynolds
%A W. Lester, Jr.
%J CYBER 200 Applications Seminar
%R NASA Conference Publication 2295
%D October 1983
%E J. Patrick Gary, Compiler
%I NASA Goddard Space Flight Center
%C Greenbelt, Maryland
%P 103-116

%A P. F. Reynolds
%A K. M. Chandy
%T A recognizer and post-recognizer for optimizing execution times of
programs
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 203-204
%K
%O Scheduling

%A Glenn Ricart
%T xxx
%J CACM
%D January 1981
%X The mutual exclusion problem in distributed systems is described in
my January 1981 CACM article ... the nodes solve the granting of
a critical section by making distributed decisions. The fundamental
basis for solving this problem is that, using mutual exclusion, any
distributed network can, as an atomic action, make any decision jointly
and consistently that a single computer could have made.--Glenn Ricart

%A John R. Rice
%T Parallel Algorithms for Adaptive Quadrature III. Program Correctness
%J ACM Transactions on Mathematical Software
%V 2
%N 1
%D March 1976
%P 1-30
%K Parallel computation, program proof, adaptive quadrature, parallel
integration, numerical quadrature,
CR Categories: 5.16, 6.22, 4.6

%A John R. Rice
%T PARVEC: Workshop on Very Large Least Squares Problems and Supercomputers
%I Purdue University
%R CSD-TR-464
%D December 15, 1983
%X Surveys end disciplines using VLLSPs (title).
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%A John R. Rice
%T Fortran Extensions for Parallel and Vector Computation
%I Purdue University
%R CSD-TR-470
%D January 23, 1984

%A Rex Rice
%T Interaction Between LSI and Computer System Architecture
%E L. C. Hobbs
%E D. J. Theis
%E Joel Trimble
%E Harold Titus
%E Ivar Highberg
%B Parallel Processor Systems, Technologies and Applications
%I Spartan Books
%C New York, New York
%D 1970
%P 165-190
%K ILLIAC IV, Device technology utilization in parallel processors

%A Thomas A. Rice
%A Leah J. Siegel
%T A parallel algorithm for finding the roots of a polynomial
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 57-61
%K
Purdue,
%O Numerical algorithms

%A P. Richards
%T Timing Properties of Multiprocessor Systems
%R Tech. Paper, Report No. TD-B60-27
%I Technical Operations, Inc.
%C Burlington, MA
%D 1960

%A M. F. Richardson
%A R. M. Needham
%T The TRIPOS Filing Machine, a front end to a file server
%J Proceedings of the 9th Symposium on Operating Systems Principles,
Operating Systems Review
%V 17
%N 5
%D October 1983
%P 120-128
%K Cambridge Ring
%O distributed file access

%A Eike Hagen Riedemann
%T Automatical Translation of Sequential Programs into Parallel Programs
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 207-210
%K Petri nets and related topics
%X A graphical (mathematical) treatment of dependences which is
supposed to be deadlock free.  No data flow work is cited.

%A C. Rieger
%T ZMOB: Hardware from a User's Viewpoint
%J Proc. IEEE Comput. Soc. Conf. Pattern Recognition and Image Processing
%P 399-408
%D 1981

%A C. Rieger
%A R. Trigg
%A R. Bane
%T ZMOB: a new computing engine for AI
%J Proc. IJCAI-81
%C Vancouver, BC
%D Aug. 1981

%T Locking Granularity Revisited
%A Daniel R. Ries
%A Michael R. Stonebraker
%J ACM Transactions on Database Systems
%V 4
%N 2
%D June 1979
%P 210-227
%K Concurrency, database management, locking granularity, locking
hierarchies, multiple updates
CR Categories: 3.50, 4.33

%A John P. Rigantai
%A Paul B. Schneck
%T Supercomputing
%J Computer
%I IEEE
%V 17
%N 10
%D October 1984
%P 97-112
%K Centennial "State of Computing" issue
%X Yet another topical survey. Interesting side bar on the Denelcor HEP and
on the LLNL Loops for benchmarking.  There are other survey papers on parallel
computing (architecture and micros) in this issue.

%A H. B. Rigas
%A J. Sethuram
%T A Multiple Array Processor Configuration for Scientific Applications
%J Proc. Summer Computer Simulation Conf.
%D 1979
%P 102-104

%T Design and Evaluation of a Synchronous Triangular Interconnection
Scheme for Interprocessor Communications
%A David D. Riley
%A Robert J. Baron
%J IEEE Transactions on Computers
%V C-31
%N 2
%D February 1982
%P 110-118
%K Interprocessor communications, message oriented network, multiprocessor
simulation, synchronous transmission
Distributed computing

%A Dennis M. Ritchie
%A Ken Thompson
%T The UNIX time-sharing system
%J Communications of the ACM
%V 17
%N 7
%D July 1974
%P 365-375
%O 10 refs
treatment: applic; practical
%K operating systems time sharing systems file organisation
unix interactive operating system hierarchical file system demountable volumes compatible file
asynchronous processes system command language time sharing operating system
file system command language
%X Unix is a general-purpose, multi-user, interactive operating system for
a number of features seldom found even in larger operating systems
including: (1) a hierarchical file system incorporating demountable
volumes: (2) compatible file, device, and inter-process I/O: (3) the
ability to initiate asynchronous processes; (4) system command language
selectable on a per-user basis; and (5) over 100 subsystems including a
dozen languages. This paper discusses the nature and implementation of the
file system and of the user command interface.

%A Jim des\ Rivieres
%T Functional Programming: A Prospectus
%J Digest of Papers COMPCON, Spring 84
%I IEEE
%D Feb. 1984
%P 15-1926-29
%K Logic programming

%A S. Rivoira
%A A. Valenzano
%T A distributed operation system for object based machines
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 46-50
%K iAPX-432,
%O distributed systems

%A S. Rivoiro
%A A. Serra
%T A multimicro Architecture and its distributed operating
system for real time control
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 238-248
%K
%O Microprocessor Networks

%A F. Robert
%T Methods Iterative Serie-Parallel
%J C. R. Acad. Sci. Paris 271
%P 847-850
%D 1970

%A F. Robert
%A M. Charnay
%A F. Musy
%T Iterations Chaotiques Serie-Parallel Pour des Equations Non-Lineares de
Point Fixe
%J Appl. Mate.
%V 20
%P 1-38
%D 1975

%A Yves Robert
%A Maurice Tchuente
%T A Systolic Array for the Longest Common Sequence Problem
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 6.1-6.9
%O Database computers

%A L. G. Roberts
%T The evolution of packet switching
%J Proc. IEEE
%V 66
%N 11
%D November 1978
%P 1307-1313

%A G. G. Robertson
%E K. Friedman
%T Cooperating file systems for a local network
%J Digest of Papers. Hardware and Software Issues for Mass Storage
Systems. Fifth IEEE Symposium on Mass Storage Systems
%C Boulder, CO, USA
%P 33-36
%O 16 REFS
Treatment PRACTICAL
%I IEEE, New York, USA, p: vi+137
%D 26-28 Oct. 1982
%K digital storage file organisation
cooperating file systems transparent system user authentication local network
cached memory hierarchy mainframes time sharing personal computers
storage migration archiving naming
sharing directories Carnegie Mellon University archival storage system
%X The file systems described form a transparent, cached memory
hierarchy for a variety of computers connected by a local network
The spectrum of computers using this network ranges from mainframes
supporting time-sharing to personal computers. The services provided
by the file systems include the storage, migration and archiving of
files, the naming and sharing of files and directories and the
authentication of users. The system described is being implemented in
the Department of Computer Science at Carnegie-Mellon University
However, the design is intended to be applicable to any installation
whose computers are linked by a local network and which possesses a
large capacity archival storage system

%T A Reconfigurable Architecture for Digital Time Domain Beamforming
%A W. Robertson
%A D. Pincock
%A D. N. Swingler
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 689-696
%K Parallel Systems

%A A. L. Robinson
%T Array Processors: Maxi Number Crunching for a Mini Price
%J Science
%V 203
%N 4376
%D January 12,1979
%P 156-160

%A I.N. Robinson
%A W.R. Moore
%T A Parallel Processor Array Architecture and its Implementation
in Silicon
%I GEC
%D May 1982

%A J. Robinson
%A J. Welch
%A C. Teacher
%T The Programmable Array Processor
%J Conf. Record, IEEE Int'l Conf. Acoustics, Speech and Signal Processing
%D 1976
%P 640-643

%A J. Robinson
%T Some Analysis Techniques for Asynchronous Multiprocessor Algorithms
%J IEEE Transactions Software Engineering
%V SE-5
%P 24-31
%D 1979

%A J. Robinson
%A R. Riley
%A R. Hartka
%T Evaluation of the SPAR Thermal Analyser on the CYBER-203 Computer
%J Computational Aspects of Heat Transfer and Structures
%P 405-424
%D 1982

%A J. G. Robinson
%A E. S. Roberts
%T Software fault-tolerance in the PLURIBUS
%J AFIPS Conf. Proc.
%V 47
%D 1978
%P 563-569
%K reliability and error recovery
%X Describes the fault tolerance features of, and operation experience
with Pluribus.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A J. G. Robinson
%T The Pluribus fault-tolerant multiprocessor
%J Exploding Technology, Responsible Growth \(em
Digest of Papers \(em COMPCON Spring 79
%C San Francisco, California
%D February 1979
%K reliability and error recovery
%X Describes the fault tolerance features of, and operational experience
with, Pluribus.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A J. T. Robinson
%T Analysis of asynchronous multiprocessor algorithms
with applications to sorting
%J Proceedings 1977 International Conference on Parallel Processing
%C Detroit, Michigan
%D August 1977
%P 128-135
%K multiprocessor applications,
performance evaluation

%A M. Rodeh
%T Finding the Median Distributively
%J J. of Computer and System Science
%V 24
%D 1982
%P 162-166

%A T. L. Rodeheffer
%A P. G. Hibbard
%T Automatic Exploitation of Parallelism on a Homogeneous Asynchronous
Multiprocessor
%J Proceedings of the International Conference on Parallel Processing
%I IEEE
%D August 1980
%P 15-16
%K Software and Languages

%A Thomas L. Rodeheffer
%T Compiling Ordinary Programs for Execution on an Asynchronous Multiprocessor
%R PhD dissertation
%I Dept. of Computer Science, CMU
%C Pittsburgh, PA
%D 1985

%A David P. Rodgers
%T Improvements in Multiprocessor System Design
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K Commercial Multiprocessors, Sequent Balance 8000, DYNIX, multi-NSC 32000s,
%C Boston, MA
%P 225-231

%A G. Rodrigue
%A N. Madsen
%A J. Karush
%T Odd-Even Reduction for Banded Linear Equations
%I Lawrence Livermore National Laboratory
%R UCRL-78652
%D 1976

%A G. Rodrigue
%A D. Wolitzer
%T Incomplete Block Cyclic Reduction
%J Proc. 10th IMACS Congress on Systems Simulation and Scientific
Computation
%V 1
%I IMACS
%P 101-103
%D 1984

%A G. Rodrigue
%A D. Wolitzer
%T Preconditioning by Incomplete Block Cyclic Reduction
%J Math. Comp.
%V 42
%P 549-565
%D 1984

%A Garry Rodrigue
%A E. Dick Giroux
%A Michael Pratt
%T Perspectives on Large-Scale Scientific Computation
%J Computer
%V 13
%N 10
%P 65-80
%D October 1980
%X A dated, but still good survey on running a large scientific computer
shop (LLNL).  It has a short intro (calculus) on scientific applications
(hydrodynamics).  Takes tables on types of hardware, and so on.
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%A Garry Rodrigue, ed.
%T Parallel Computations
%I Academic Press
%D 1982
%X A collection of papers dealing with numerical algorithms on the Cray-1.
Most of the authors are associated with LLNL.  Contains several good papers.

%A Garry Rodrigue
%A Chris Hendrickson
%A Mike Pratt
%T An Implicit Numerical Solution of the Two-Dimensional Diffusion Equation
and Vectorization Experiments
%E Garry Rodrigue
%B Parallel Computations
%I Academic Press
%D 1982
%P 101-128

%A J. E. Rodriguez
%T A Graph Model for Parallel Computation
%R Tech. Rep. ESL-R-398, MAC -TR-64
%I Lab. for Computer Science, MIT
%D September 1969

%A J. E. Rodriguez
%T A Graph Model for Parallel Computation
%R TR-64
%I Laboratory for Computer Science, MIT
%C Cambridge, MA
%D September 1969

%T Two-Dimensional Microprocessor Pipelines for Image Processing
%A Robert P. Roesser
%J IEEE Transactions on Computers
%V C-27
%N 2
%D February 1978
%P 144-156
%K Digital image processor, microcomputers, microprocessor array,
microprocessor pipeline, parallel processors, space-domain processing,
state-space processing, two-dimensional pipeline,
Pipeline processing

%A R. Rogallo
%T An ILLIAC Program for the Numerical Simulation of Homogeneous
Incompressible Turbulence
%I NASA Ames Research Center
%R TM-73203
%D 1977

%A D. L. Rohrbacher
%T Advanced Computer Organization Study
%I National Technical Information Service
%R AD631870 and AD6313871
%D April 1966

%A Donald Rohrbacher
%A J. L. Potter
%T Image Processing with the STARAN Parallel Computer
%J Computer
%I IEEE
%V 10
%N 8
%P 54-59
%D August 1977
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%A C. Rolland
%A M. Vitali
%T Transactions Modeling in Distributed Environments
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 2-6
%K
%O Database systems

%A Gruia-Catalin Roman
%A Robert K. Israel
%T Function specification of distributed systems
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 503-505
%K
Distributed Systems Design Language (DSDL),
associative processing/distributed systems

%A Gao Guang Rong
%T Pipelined mapping of homogeneous data flow programs
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 532-534
%K balanced data flow, two dimensional data flow,
%O dataflow

%A Wang Rong-Quan
%A Zhang Xiang
%A Gao Qing-Shi
%T SP2I interconnection network and extension of the iteration method of
automatic vector-routing
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 16-25
%K
Chinese Acad. of Sciences
%O Interconnection networks

%A Wolfgan Ronsch
%T Stability aspects in using parallel algorithms
%J Parallel Computing
%V 1
%N 1
%D August 1984
%P 75-98
%K Error analysis, performance analysis, CRAY-1, summation algorithms,
Horner expressions, continued fractions

%A Wolfgang Ronsch
%T Timing and Stability Analysis of Summation Algorithms on the CRAY-1
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 225-231
%D 1984

%A Arnold L. Rosenberg
%T The Diogenes Approach to Testable Fault-Tolerant Arrays of Processors
%J IEEE Transactions on Computers
%V C-32
%N 10
%D October 1983
%P 902-910
%K Arrays of processors, design for testability, dynamic fault tolerance,
fault-tolerant design, grids of processors, linear arrays of processors,
reconfigurable designs, trees of processors
Fault-tolerant systems
%X A somewhat unusual design for laying out processors for fault tolerance.
"Diogenes" is a good characterization.  The method has some problems
which are described.

%A J. R. Van Rosendale
%T Algorithms and data structures for adaptive multigrid elliptic solvers
%R ICASE Report No. 83-29
%D June 29, 1983
%J \fRTo appear in\fP Comput. Math. Appl.

%A J. Van Rosendale
%T Algorithms and Data Structures for Adaptive Multigrid Elliptic Solvers
%J Appl. Math. & comp.
%V 13
%P 453-470
%D 1983
%X Remove?

%A John Van Rosendale
%T Minimizing inner product data dependences in conjugate gradient iteration
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 44-46
%K
ICASE
numerical algorithms

%A A. Rosenfeld
%T Generalized Cellular Automata
%E Morio Onoe
%E Kendall Preston, Jr.
%E Azriel Rosenfeld
%B Real-Time/Parallel Computing: Image Analysis
%I Plenum Press
%C New York, NY
%D 1981
%P 63-71

%A Azriel Rosenfeld
%T Cellular Architecture: from Automata to Hardware
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 253-260
%K SIMD algorithms
%X Very short historical survey covering bounded, one-dimensional, and
graph structured cellular automata.

%A Azriel Rosenfeld
%T Diameter-Time Cellular Warping
%R TR-1230
%I Computer Vision Laboratory, Computer Science Center, University of
Maryland
%D November 1982
%K image processing, geometric transformations, warping, parallel processing,
cellular arrays, MPP

%A J. L. Rosenfeld
%T A case study in programming for parallel processors
%J Comm. ACM
%V 12
%N 12
%D December 1969
%K theoretical results
%X The use of multiprocessing to decrease the execution time of a single job
is investigated here.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Jack L. Rosenfeld
%A Raymond D. Villani
%T Micromultiprocessing: An Approach to Multiprocessing at the Level of
Very Small Tasks
%J IEEE Transactions on Computers
%V C-22
%N 2
%D February 1973
%P 1459-153
%K Computer, control unit, interlocks, lookahead, microprogramming,
multiprocessing, parallel processing, pipelining,
Computer systems

%T System Level Concurrency Control for Distributed Database Systems
%A Daniel J. Rosenkrantz
%A Richard E. Stearns
%A Philip M. Lewis, II
%J ACM Transactions on Database Systems
%V 3
%N 2
%D June 1978
%P 178-198
%K Distributed, database, consistency, lock, concurrency, transaction,
integrity, readers and writers, deadlock, deadly embrace, rollback,
restart
CR Categories: 3.81, 4.32, 4.33, 4.35

%A Jeffrey S. Rosenschein
%T Synchronization of Multi-Agent Plans
%J Proceedings of The National Conference on Artificial Intelligence
%C Pittsburgh, Pennsylvania
%I The American Association for Artificial Intelligence
%D August 1982
%P 115-119

%A Jeffrey S. Rosenschein
%A Vineet Singh
%T The Utility of Meta-level Effort
%I Heuristic Programming Project, Stanford University
%D March 1983
%R HPP-83-20

%A J. Eric Roskos
%A Ching-Dong Hsieh
%T Data-Movement Primitives
%J Byte
%V 10
%N 5
%D May 1985
%P 239-252
%O Special issue on multiprocessing
%X Link a small (three) number of CPUs together on a common bus.
68K and IBM PC class CPUs.

%T Distributed Sorting
%A Doron Rotem
%A Nicola Santoro
%A Jeffrey B. Sidney
%I IEEE Computer Society
%R ISSN 0018-9340
%D April 1985
%K Distributed algorithms, message complexity, minimum spanning tree,
selection, sorting.

%A K. Rothermel
%A B. Walter
%T A Kernel for Transaction Oriented Communication in Distributed Database
Systems
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 557-565
%O Distributed control algorithms

%T Introduction to a System for Distributed Databases (SDD-1)
%A J. B. Rothnie, Jr.
%A P. A. Bernstein
%A S. Fox
%A N. Goodman
%A M. Hammer
%A T. A. Landers
%A C. Reeve
%A D. W. Shipman
%A E. Wong
%J ACM Transactions on Database Systems
%V 5
%N 1
%P 1-17
%D March 1980
%K Distributed database system, relational data model, concurrency
control, query processing, database reliability
CR Categories: 3.5, 4.33

%A J. Rothstein
%T Toward an Arithmetic for parallel computation
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 224-
%K
%O Theory

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T Parallel Recognition of Parabolic and Conic Patterns by BUS Automata
%A J. Rothstein
%A A. Davis
%P 288-297
%O Special Purpose Architectures

%A Jerome Rothstein
%T On the ultimate limitations of parallel processing
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 206-212
%K
%O Performance

%A Jerome Rothstein
%T Topological Pattern Recognition in Parallel and Neural Models
of Bus Automata
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 95-107
%O Special Purpose Architectures

%A Gerard P. Roucairol
%T On Parallelization of "Single Assignment" Programs
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 203-206
%K Petri nets and related topics

%A M. Roumeliotis
%A James R. Armstrong
%T A multiprocessor approach to functional, parallel simulation
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 462-464
%O simulation

%A J. H. Rowan
%A D. A. Smith
%A M. D. Swensen
%T Toward the design of a network manager for a distributed computer network
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 148-166
%K
%O System control

%A L. A. Rowe
%A K. P. Birman
%T A local network based on the UNIX operating system
%J IEEE Trans. Software Eng. (USA)
%V SE-8
%N 2
%P 137-146
%D February 1982
%O 29 Refs.
Treatment PRACTICAL.
%K operating systems protocols computer networks.
multidestination protocols local network UNIX operating system
remote files interprocess communication mechanism
message oriented interprocess communication mechanism asynchronous I/O
packet switched networks.
%X The design and implementation of a local network operating system
based on the UNIX operating system is described. UNIX has been
extended to allow existing programs to access remote resources with
no source program changes. Programs may access remote files, have a
remote working directory, execute remote programs, and communicate
with remote processes using the standard UNIX interprocess
communication mechanism (pipe's). An efficient message-oriented
interprocess communication mechanism and asynchronous I/O were added
to the system to support the development of distributed applications
and to make it easier to connect the local network to packet-switched
networks.

%A A. Rowicki
%T A note on optimal scheduling for two-processor systems
%J Information Processing Letters
%V 4
%N 2
%D November 1975
%P 27-30
%K scheduling
%X Describes an algorithm for the optimal non-preemptive scheduling of
identical tasks on identical processors.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Sherwin Ruben
%A John Lyon
%A Rudolf Faiss
%A Matthew Quinn
%T Application of a parallel processing computer in LACIE
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 24-32
%K STARAN
%O applications: image processing

%A Jeffrey Rubin
%A Ted Panofsky
%A Martin Frost
%A Marc LeBrun
%T An Operating System and Memory Switch for the S-1 Computer
%I Lawrence Livermore National Laboratory
%D February 1984

%A D. A. Rudberg
%A W. A. Hanna
%T The Three Dimensional Computer: A Multiplane Array Processor
%J Computers and Electrical Engineering
%V 2
%N 2-3
%D June 1975
%P 141-148

%T A Validation technique for Tightly Coupled Protocols
%A Harry Rudin
%A Colin H. West
%J IEEE Transactions on Computers
%V C-31
%N 7
%D July 1982
%P 630-636
%K Computer networks, local area networks, multiaccess, protocols, ring,
validation, verification
Special Issue on Reliable and Fault-Tolerant Computing

%A L. Rudinski
%A G. Pieper
%T Evaluating Computer Program Performance on the CRAY-1
%I Argonne National Laboratory
%R 79-9
%D 1979

%A Dietmar Rudolph
%A Karl-Heinz ScholBer
%T Optimal Searching Algorithms for Parallel Pipelined Computers
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 263-269
%D 1984

%A J. Rudolph
%T A Production Implementation of an Associative Array Processor - STARAN
%J Proc. Fall Joint Comp. Conf.
%I AFIPS Press
%C Montvale, NJ
%P 229-241
%D 1972

%A J. A. Rudolph
%A K. E. Batcher
%T A productive implementation of an associative array processor: STARAN
%E D. P. Siewiorek
%E C. G. Bell
%E A. Newell
%B Computer Structures: Principles and Examples
%I McGraw-Hill
%D 1982
%P 317-331
%K Recommended

%A Larry Rudolph
%T A Remark on the Planarity of the Shuffle-Exchange Network of Sizes 16
and 32
%R ULTRACOMPUTER NOTE #8
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D February 1980

%T Dynamic Decentralized Cache Schemes for MIMD Parallel Processors
%A Larry Rudolph
%A Zary Segall
%I Carnegie-Mellon University
%R CMU-CS-84-139
%D 1984

%A Larry Rudolph
%A Zary Segall
%T Dynamic Decentralized Cache Schemes for an MIMD Parallel Processor
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%D June 1984
%P 340-347
%K test-set-test operation
%K caches in multiprocessors

%T Subset Selection in Parallel
%A Larry Rudolph
%A William Steiger
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 11-13
%K Parallel Algorithms

%A T. Rudy
%T Analysis of a 2-D Code on the CRAY-1
%I Lawrence Livermore National Laboratory
%R UCID-18549
%D 1980

%A T. E. Rudy
%T Finite Difference Programs and Array Processors
%I UCRL-80025
%D August 1977
%I National Technical Information Service
%C Springfield, VA 22151

%A Timothy E. Rudy
%T An Experimental Comparison of CDC STAR-100 and 7600 Computer Speeds for
Explicit Finite-Different Hydrodynamics Calculations
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 244
%K LLNL
%O performance evaluation
%X Summary only.

%A Timothy E. Rudy
%T Data Flow and High Speed Computation
%I Lawrence Livermore Laboratory
%R UCRL-81990
%D December 5, 1978

%A J. F. Ruggiero
%A D. A. Coryell
%T An Auxiliary Processing System for Array Calculations
%J IBM Systems Journal
%V 8
%P 118-135
%D 1969

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T LSI Implementation Options for the Shuffle-Exchange Network in a
Microprogrammed SIMD Array
%A Smil Ruhman
%P 185
%O Interconnection Networks
%X Summary only.

%A G. Ruiz-Huerta
%T The Programmable Compiler
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 674-679
%K
%O Software transportability

%A J. E. Rumbaugh
%T A Parallel, Asynchronous Computer Architecture for Data Flow Programs
%R TR-150
%I Laboratory for Computer Science, MIT
%C Cambridge, MA
%D May 1975

%A James Rumbaugh
%T A data flow multiprocessor
%J IEEE Transactions on Computers
%V C-26
%N 2
%D February 1977
%P 138-146
%K Asynchronous logic, cache, concurrency, data-driven instruction execution,
data flow program, modularity, multiprocessor, parallel processor, pipelining
Architecture, special issue on parallel processors and processing,
multiprocessor architecture and operating systems
%X A multiprocessor based on a data flow architecture is described and its
characteristics explained.  The primary advantages of such an interconnection
scheme are the availability of a high degree concurrency and the ability
to execute programs described in data flow notation--a notation permitting
the expression of parallelism and precedence constraints.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A James E. Rumbaugh
%T Data Flow Languages
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 217-219
%K
%O Data flow architecture

%A James E. Rumbaugh
%T A Data Flow Multiprocessor
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 220-223
%K
%O Data flow architecture

%A Carl F. Ruoff
%T A Concurrent Robot Control Language
%J Computer Software and Applications Conference (COMPSAC79)
%I IEEE
%D November 1979
%P 442-445
%K JPL
%O robot manipulator control languages and systems

%A M. Ruschitzku
%A M. Chontensen
%A M. Ames
%A R. Vichnevetsky, (Ed.)
%T Parallel and Large Scale Computers: Performance, Architecture,
Applications
%I North Holland
%C Amsterdam
%D 1984

%A John Rushby
%A Brian Randell
%T A Distributed Secure System
%J Computer
%I IEEE
%V 16
%N 7
%D July 1983
%P 55-67
%K UNIX, Newcastle connection, distributed file system
%X A paper dealing with security on a misunderstood system.

%A Marek Rusinkiewicz
%A Bogdan Czejdo
%T Query Transformation in Heterogeneous Distributed Database Systems
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Distributed Query Processing, local processing, federation,
%P 300-307

%A R. M. Russell
%T The Cray-1 Computer System
%J Comm. ACM
%V 21
%P 63-72
%D 1978
%K Recommended,
%X The original paper describing the Cray-1.
This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%A R. Rustin, ed.
%T Debugging Techniques in Large Systems
%B Courant Computer Science Symp.
%V 1
%D 1970
%I Prentice-Hall, Inc.
%D 1972

%A R. Rustin, ed.
%T Computer Networks \(em Proceedings Courant Institute Symposium
%D November 1970
%I Prentice-Hall
%C Englewood Cliffs, NJ

%A R. A. Rutenbar
%A T. N. Mudge
%A D. E. Atkins
%T A Class of Cellular Architectures to Support Physical Design Automation
%R CRL-TR-10-83
%I Univ. of MI, Computing Research Lab.
%C Ann Arbor, MI
%D February 1983

%A Denis Rutovitz
%A James Piper
%T The Balance of Special and Conventional Computer Architecture Requirements
in Image Processing Application
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 161-177
%K CLIP4, chromosome analysis

%A W. L. Ruzzo
%A L. Snyder
%T Minimum Edge Length Planar Embeddings of Trees
-extended abstract-
%I CS Dept., Purdue Univ.
%C West Layfayette, IN
%D 1982?

%A James W. Rymarchzyk
%T Coding Guidelines for Pipelined Processors
%J Symposium on Architectural Support for Programming Languages and
Operating Systems, Computer Architecture News
%V 10
%N 2
%C Palo Alto, CA
%D March 1982
%P 12-19
%K Assembly language,
%O hardware/software trade

%A H. Rzehak
%T Parallel Computers for Continuous Systems Simulation
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 59-70
%K CSSL (Continuous Systems Simulation Language),

%Q S-1 Project Staff
%T Advanced Digital Processor Technology Base Development for Navy Applications:
The S-1 Project
%I Lawrence Livermore Laboratory
%R UCID-18038
%D 1978

%Q S-1 Project Staff
%T The S-1 Project 1979 Annual Report
%I Lawrence Livermore Laboratory
%R UCID-18619
%D 1979

%A Y. Saad
%A A. Sameh
%T A Parallel Block Stiefel Method for Solving Positive Definite
Systems
%E M. Schultz
%B Elliptic Problem Solvers
%I Academic Press
%C New York
%P 405-411
%D 1981
%X Remove?

%A Y. Saad
%A A. Sameh
%T Iterative Methods for the Solution of Elliptic Difference Equations on
Multiprocessors
%J CONPAR 81
%P 395-411
%D 1981

%A Y. Saad
%T Least Squares Polynomials in the Complex Plane with Applications to
Solving Sparse Non-Symmetric Matrix Problems
%I Yale University
%R Computer Science Report No. RR-276
%D 1983

%A Y. Saad
%T Practical Use of Polynomial Preconditionings for the Conjugate Gradient
Method
%I Yale University
%R Computer Science Report No. RR-282
%D 1983

%A Y. Saad
%A A. Sameh
%A P. Saylor
%T Parallel Iterative Methods for Elliptic Difference Equations
%J SIAM J. Sci. Stat. Comp.
%D 1985
%X To appear

%A Earl D. Sacerdoti
%T What language understanding research suggests about distributed
artificial intelligence
%J Proceedings of the Distributed Sensor Nets Workshop
%P 8-11
%D December 1978
%X Copies may be available from the Computer Science
Department, Carnegie-Mellon University, Pittsburgh,
Pennsylvania, 15213.

%A R. A. Sack
%T Relative Pivoting for Systems of Linear Equations
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 233-237
%D 1984
%K DAP,

%T Monte Carlo Solution of Partial Differential Equations by Special
Purpose Digital Computer
%A Eitan Sadeh
%A Mark A. Franklin
%J IEEE Transactions on Computers
%V C-23
%N 4
%D April 1974
%P 389-397
%K Computer modules, diffusion equation, elliptic differential equations,
Monte Carlo, parabolic differential equations,
partial differential equations, Poisson's equation, random walk,
special purpose digital computers,
Numerical methods

%A F. Saheban
%A A. D. Friedman
%T A Survey and Methodology of Reconfigurable Multi-Module Systems
%J Computer Software and Applications Conference (COMPSAC78)
%I IEEE
%D November 1978
%P 790-795
%O software techniques for reconfigurable and dynamic architecture

%A F. Saheban
%A L. Simoncini
%A A. D. Friedman
%T Concurrent computation and diagnosis in multiprocessor systems
%J 9th Ann. Int. Symp. on Fault-Tolerant Computing
%C Madison, Wisconsin
%D June 1979
%P 149-156
%K reliability and error recovery
%X Discusses issues involved in designing systems which do concurrent
computation and perform self-diagnosis.  The discussion is motivated
by, and oriented toward, multiprocessor systems.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Kenan E. Sahin
%T Message-Based Response Routing with Selcuk Networks
%J IEEE Transactions on Computers
%V C-23
%N 12
%D December 1974
%P 1250-1256
%K Associative memory, computer communications, content-based retrieval,
message-based switching, parallel processing, pattern recognition,
response routing,
Computer communications

%A Sartaj Sahni
%T Scheduling Multipipeline and Multiprocessor Computers
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%K multiple pipelines, multiprocessors, asynchronous processors,
scheduling, heuristics
%O computer networks
%P 333-337
%X Author analyses various configurations of synchronization conditions,
memory, and processor types (vector and non-vector).

%A Sartaj Sahni
%T Scheduling Multipipeline and Multiprocessor Computers
%J IEEE Transactions on Computers
%V C-33
%N 7
%D July 1984
%P 637-645
%K Asynchronous processors, heuristics, multiple pipelines, multiprocessors,
scheduling,
scheduling

%A M. Salama
%A S. Utku
%A R. Melosh
%T Parallel Solution of Finite Element Equations
%J Proc. 8th ASCE Conference Elec. Comp.
%I University of Houston
%P 526-539
%D 1983

%A M. Salama
%A J. McGregor
%A D. Rapp
%T Algorithms for Concurrent Processors
%R Hm43
%I California Institute of Technology
%C Pasadena, CA
%D November 1983
%K Caltech Cosmic Cube, hypercube, C^3P

%A A.O. Saleh
%A M.A. Laughton
%T Applications of the DAP to Cutset identification
%I Seventh Power Systems Computation
%C Lausanne
%D July 1981

%A John Salmon
%T An Astrophysical N-body Simulation on the Hypercube
%R Hm78
%I California Institute of Technology
%C Pasadena, CA
%D 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%A John Salmon
%T Binary Gray Codes and the Mapping of a Physical Lattice into a Hypercube
%R Hm51
%I California Institute of Technology
%C Pasadena, CA
%D January 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%A John Salmon
%T Hypercube Simulator V2.0
%R Internal memo, Hm52
%I California Institute of Technology
%C Pasadena, CA
%D January 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%A John Salmon
%T A Program to Automatically Decompose a Physical Lattice into a Hypercube
%R Hm53
%I California Institute of Technology
%C Pasadena, CA
%D January 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%A J. H. Saltzer
%T Research problems of decentralised systems with largely autonomous
nodes
%B Operating Systems. An Advanced Course
%C Munich, Germany
%D 28 July -5 Aug. 1977
%P 583-593
%O 32 REFS. Treatment GENERAL
Springer-Verlag. Berlin, Germany 1978, x+593, Std Book No.3 540 08755 9
%E R. Hayer
%E R. M. Graham
%E G. Seegmuller
%K computer selection and evaluation distributed processing
decentralised systems computer system organisation distributed systems

%A J. H. Saltzer
%T Naming and binding of objects
%Z MIT, Cambridge, MA, USA
%E R. Hayer
%E R. M. Graham
%E G. Seegmuller
%B Operating Systems. An advanced course
%P 99-208
%D 28 July -5 Aug. 1977
%C Munich, Germany
%I Springer-Verlag, Berlin, Germany
x+593 pp. isbn 3 540 08755 9
%O 3 Refs.
treatment: theoretical
%K data structures
binding of objects object management naming structures addressing architectures
file systems
%X A property of a computer system that determines its ease of use and its
range of applicability is the way it creates and manages the objects of
computation. An important aspect of object management is the scheme by
which a system names objects. Names for objects are required so that
programs can refer to the objects, so that objects can be shared, and so
that objects can be located at some future time. This paper introduces
several rather general concepts surrounding names, and then explores in
depth their applicability to two naming structures commonly encountered
inside computer systems: addressing architectures and file systems. It
examines naming functions that are usually implemented (or desired) in
these two areas, and some of the design tradeoffs encountered in a variety
of contemporary computer systems. It ends with a brief discussion of some
current research topics in the area of naming.

%A J. H. Saltzer
%A D. P. Reed
%A D. D. Clark
%Z Lab. for Computer Sci., MIT, Cambridge, MA, USA
%T End-to-End Arguments in System Design
%J 2nd International Conference on Distributed Computing Systems
%C Paris, France
%D April 1981
%P 509-512
%I IEEE, New York, USA
xi+524 pp.
%O 14 Refs.
treatment: applic, general,review
%K distributed processing protocols computer architecture
distributed computer system end to end argument communications links encryption
duplicate message delivery message suppression file transfer
Distributed System Structure
%X Presents a design principle aimed at chosing the proper placement of
functions among the modules of a distributed computer system. The
principle, called the end-to-end argument, suggests that certain functions
usually placed at low levels of the system are often redundant or of little
value compared to the cost of providing them at a low level. Examples
discussed in the paper include highly reliable communications links,
encryption, duplicate message suppression, and delivery acknowledgement. It
is argued that low level mechanisms to support these functions are
justified only as performance enhancement.

%A J. H. Saltzer
%E P. Ravasio
%E G. Hopkins
%E N. Naffah
%T On the naming and binding of network destinations
%B Local Computer Networks. Proceedings of the IFIP TC 6 International
In-Depth Symposium
%C Florence, Italy
%P 311-317
%O 17 REFS. Treatment PRACTICAL
%I North-Holland
Amsterdam, Netherlands, p: xii +504, ISBN: 0-444-86386-9
%E Calcolo Autom., et al
%D 19-21 April 1982
%K packet switching computer networks
packet destination network destinations names of destinations
data communication networks binding
%X The paper offers a perspective on the subject of names of
destinations in data communication networks. It suggests two ideas:
first, it is helpful to distinguish among four different kinds of
objects that may be named as the destination of a packet in a
network. Second, the operating system concept of binding is a useful
way to describe the relations among the four kinds of objects. To
illustrate the usefulness of this approach, the paper interprets some
more subtle and confusing properties of two real-world network
systems for naming destinations

%A J. H. Saltzer
%A K. T. Pogran
%A D. D. Clark
%T Why a ring? (computer network)
%J Computer Networks (Netherlands)
%V 7
%N 4
%P 223-231
%O 20 REFS
Treatment PRACTICAL
%D 1983
%K computer networks
computer network rings active repeaters local data communication
Ethernet
%X In a world increasingly populated with Ethernets and Ethernet-like
nets there nevertheless continues to be a strong interest in rings of
active repeaters for local data communication. The authors explore
some of the engineering problems involved in designing a ring that
has no central control. It then compares one ring design with the
Ethernet on several different operational and subtle technical points
of design, maintainability, and future prospects. On each of these
points the ring possesses important or interesting advantages. At the
same time, the most commonly cited advantage of a ring,
'deterministic access time', is shown to be illusory. The authors
conclude that the data communication ring is a sound idea that will
prove its value on operational rather than theoretical issues
Reproduced in Proc. of 7th Data Commun. Symp., (1981) 211-217.

%A B. Samadi
%T B-trees in a system with multiple users
%J Information Processing Letters
%V 5
%D Oct 1976
%P 107-112

%A N. K. Samari
%A G. M. Schneider
%T The Analysis of Distributed Computer Networks Using M/D/Y and
M/M/I Queues
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 143-155
%O Distributed Architectures

%T A Queueing Theory-Based Analytic Model of Distributed Computer Network
%A N. K. Samari
%A G. Michael Schneider
%J IEEE Transactions on Computers
%V C-29
%N 11
%D November 1980
%P 994-1001
%K Distributed systems, modeling, networks, performance analysis, queueing
theory
%O Networks

%A M. R. Samatham
%A D. K. Pradhan
%T The De Bruijn Multiprocessor Network: A Versatile sorting Network
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K Interconnection Networks
%C Boston, MA
%P 360-367

%A M. R. Samathan
%A D. K. Pradhan
%T A Multiprocessor Network Suitablr for Single-Chip VLSI Implementation
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%D June 1984
%P 328-337
%K VLSI design

%A A. Sameh
%T ILLIAC IV Applications
%J Proc. 9th Allerton Conf. Circuit System Theory
%P 1030-1038
%D 1971

%A A. Sameh
%T On Jacobi and Jacobi-like Algorithms for a Parallel Computer
%J Math. Comp.
%V 25
%P 579-590
%D 1971

%A A. Sameh
%A R. Brent
%T Solving Triangular Systems on a Parallel Computer
%J SIAM J. Numerical Analysis
%V 14
%D 1977
%P 1101-1112

%A A. Sameh
%A D. Kuck
%T On Stable Parallel Linear System Solvers
%J Journal of the ACM
%V 25
%D 1978
%P 81-91

%A A. Sameh
%T Parallel Algorithms in Numerical Linear Algebra
%J CREST Conference
%D 1981

%A A. Sameh
%T Processing the Linear Least Squares Problem on a Linear Array of Processors
%J Proc. of the Purdue Workshop on Algorithmically-Specialized Computer
Organizations
%I Academic Press
%C New York
%D 1982

%A A. Sameh
%A C. Taft
%T Preconditioning Strategies for the Conjugate Gradient Algorithm
on Multiprocessors
%J Sparse Matrix Symposium
%D 1982

%A A. Sameh
%T An Overview of Parallel Algorithms in Numerical Linear Algebra
%J EDF - Bull. de la Estudes et des Resh.
%V Ser C
%N 1
%D 1983
%P 129-134

%A A. Sameh
%T A Fast Poisson Solver for Multiprocessors
%B Elliptic Problem Solvers
%I Academic Press
%C New York
%E G. Birkhoff
%E A. Schoenstadt
%D 1984
%P 175-186

%A A. Sameh
%T On Two Numerical Algorithms for Multiprocessors
%B Proceedings of the NATO Workshop on High Speed Computations
%E J. Kowalik
%S NATO ASI Series
%V F-7
%I Springer-Verlag
%D 1984
%P 311-328
%K Block-tridiagonal systems, sparse generalized eigenvalue
%X
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%A A. H. Sameh
%A D. Kuck
%T A Parallel QR-Algorithm for Symmetric Tridiagonal Matrices
%J Proc. Second Langley Conference on Scientific Computing
%r 75-700
%i Computer Science Dept., Univ. of Ill., Urbana-Champaign, Ill.
%d February 1975

%A A. H. Sameh
%A D. Kuck
%T Linear System Solvers for Parallel Computers
%R 75-701
%I Computer Science Dept., Univ. of Ill.
%C Urbana-Champaign, Ill.
%D February 1975

%A A. H. Sameh
%A S. C. Chen
%A D. Kuck
%T Parallel Poisson and Biharmonic Solvers
%J Computing
%V 17
%D 1976
%P 219-230

%A A. H. Sameh
%A J. A. Wisniewski
%T A Trace Minimization Algorithm for the Generalized Eigenvalue Problem
%J SIAM J. Numer. Anal.
%D 1982
%P 1243-1259
%V 19

%A Ahmed H. Sameh
%T Numerical Parallel Algorithms \(em A Survey
%B High Speed Computer and Algorithm Organization
%I Academic Press
%D 1977
%P 207-228
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."
This survey makes a distinction between parallel and vector algorithms
(which are not surveyed).  Included are linear and Eigen problem solvers.

%A Ahmed H. Sameh
%A David J. Kuck
%T Parallel Direct Linear System Solvers \(em A Survey
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 25-30
%X Surveys three cases: triangular, dense, and tridiagonal systems.
Oriented toward SIMD, vector machines: Cray or CYBER.

%A Ahmed H. Sameh
%A David J. Kuck
%T A Parallel QR Algorithm for Symmetric Tridiagonal Matrices
%J IEEE Transactions on Computers
%V C-26
%N 2
%D February 1977
%P 147-152
%K Error analysis, Given reduction, parallelism, recurrence relations,
triangular systems,
Matrix algorithm, special issue on parallel processors and processing

%A Ahmed M. Sameh
%T Parallel algorithms in Numerical Linear Algebra
%I Dept. of Computer Science, Univ. of Illinois

%A Wendell B. Sander
%T Interconnection/Economic Tradeoffs with LSI
%E L. C. Hobbs
%E D. J. Theis
%E Joel Trimble
%E Harold Titus
%E Ivar Highberg
%B Parallel Processor Systems, Technologies and Applications
%I Spartan Books
%C New York, New York
%D 1970
%P 191-199
%K Device technology utilization in parallel processors

%A R. W. Sanders
%T Comparing networking technologies
%J Datamation
%D July 1978
%P 88-93

%A John Sanguinetti
%A B. Kumar
%T Performance of a Message-Based Multi-Processor
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%C Boston, MA
%P 424-425
%K ELXSI, EMBOS,

%A Sargan
%A Chong LSE
%A K. Smith
%T Non-linear Econometric Modelling on a Parallel Processor
%D 1981
%X Entry is bad.  See also, the Entry by Sargan, Sim, Smith by the DAP
Support Unit.

%A T. D. Sargan
%A Y. Y. Sim
%A K. A. Smith
%T Non-linear econometric modelling on a parallel processor
%I DAP Support Unit
%X Entry is bad.  See also the Sargan paper dated 1981.

%A M. J. Sarig
%A D. S. Bowser
%T Implementation of a Distributed Node of Radar Control
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 470-479
%O Applications of distributed computing to radar systems

%A B. Sarikaya
%A G. V. Bochmann
%T Synchronization issues in protocol testing
%J Comput. Commun. Rev. (USA), SIGCOMM '83 Symposium on Communications
Architectures & Protocols
%V 13
%N 2
%C Austin, TX, USA
%P 121-128
%O 16 Refs
%D 8-9 March 1983
%K testing finite automata protocols synchronisation
remote tester process local responder process protocol testing input stimuli
test sequences transition tour characterization checking sequence
incomplete finite state machines timing intrinsic synchronization problems
%X Protocol testing for the purpose of certifying the implementation's
adherence to the protocol specification can be done with an
architecture which includes a remote tester and a local responder
processes generating specific input stimuli called test sequences. It
is possible to adapt test sequence generation methods of finite state
machines, namely transition tour, characterization and checking
sequence methods, to generate test sequences for protocols specified
as incomplete finite state machines. For certain test sequences, the
tester or responder processes are forced to consider the timing of an
interaction in which they have not taken part; these test sequences
are called nonsynchronizable. The three test sequence generation
algorithms are modified to obtain synchronizable test sequences
Checking the protocol designs for intrinsic synchronization problems
is also discussed

%A J. Sasidhar
%A K. G. Shin
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Design of a General-Purpose Multiprocessor with Hierarchical Structure
%P 141-150
%O Multiprocessor Architectures

%A Kuchibhotla V. Sastry
%A Richard Y. Kain
%T On the Performance of Certain Multiprocessor Computer Organizations
%J IEEE Transactions on Computers
%V C-24
%N 11
%D November 1975
%P 1066-1074
%K Analytic models, instruction execution rates, memory conflicts,
multiprocessors, performance
%K Computer systems, performance
%X Develops analytic models for evaluating the performance of a multiprocessor
computer system.  Studies how varying the number of processors, interleaving
memory, and varying the number of memory modules affects the instruction
execution rate.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Hiroyuki Sato
%A Hiroaki Ishata
%A Mitsuo Ishii
%A Masanori Kakimoto
%A Keiji Sato
%A Katsuhiko Hirota
%A Morio Ikesaka
%A Kouichi Inoue
%T Fast Image Generation of Constructive Solid Geometry Using a Cellular
Array Processor
%J ACM SIGGRAPH
%J 18
%N 3
%D July 22-26, 1985
%K computer graphics, hidden surface removal, constructive solid geometry,
scan-line algorithms, z-buffer, solid modeling, computer aided design.
C.1.2. (processors architectures): Multiple Data Stream Architectures
(multiprocessors) - Multiple - instruction - stream, multiple - data
- stream processors (MIMD)

%A M. Sato
%A S. Nisihikawa
%A S. Takahira
%T Dynamic Function Exchanging Mechanism in Poly-Processor System
%J Proceedings of 6th Annual Symposium on Computer Architecture
%I IEEE
%D April 1979
%P 130-135

%A Makoto Sato
%A Hiroyuki Matsuura
%A Hidemitsu Ogawa
%A Taizo Iijima
%T Multimicroprocessor System PZ-1 for Pattern Information Processing
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 361-371

%A M. Satyanarayanan
%T A Survey of Multiprocessing Systems
%I IBM TJ Watson Research Center
%R RC 7346, #31610
%D Oct. 1978
%X A short survey on five multiprocessing systems.  It formed the basis for
his 1980 book on multiprocessing, and his bibliography.

%A M. Satyanarayanan
%T Multiprocessors: A Comparative Study
%I Prentice-Hall
%D 1980
%K Recommended,
%X Survey text on multiprocessors including: IBM 370/168 (AP), CDC 6600,
Univac 1100, Burroughs 6700, Honeywell 60/66, DEC-10, C.mmp, and Cm*.
It has an excellent bibliography which was published in IEEE as the
book was excerpted.

%A M. Satyanarayanan
%T Commercial multiprocessing systems
%J Computer
%V 13
%N 5
%D May 1980
%P 75-96
%X Excerpts from the author's book surveying multiprocessing.  Covered
ten systems from the IBM 370/168 to the Cm*.  This issue also published
an extensive bibliography.
Reprinted in "Tutorial: Distributed Processing," IEEE,
compiled by Burt H. Liebowitz and John H. Carson, 1981, 3rd edition.

%A M. Satyanarayanan
%T Multiprocessing: an annotated bibliography
%J Computer
%V 13
%N 5
%D May 1980
%P 101-116
%X Excellent reference source, but dated.
Text reproduced with the permission of Prentice-Hall \(co 1980.
$Revision: 1.2 $ $Date: 84/07/05 16:58:56 $

%A C. H. Sauer
%A K. M. Chandy
%T The impact of distributions and disciplines on multiple processor systems
%J Comm. ACM
%V 22
%N 1
%D January 1979
%P 25-34

%A V. R. Saunders
%A M. F. Guest
%T Applications of the Cray-1 for Quantum Chemistry Calculations
%J Comp. Phys. Comm.
%V 26
%P 389-395
%D 1984

%A Jim Savage
%T Parallel Processing as a Language Design Problem
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K Commercial Multiprocessors, Myrias Parallel FORTRAN (MPF), Myrias 4000,
PAR DO,
%C Boston, MA
%P 221-224

%A D. A. Savit
%A et al.
%T Association-Storing Processor Study
%I National Technical Information Service
%R AD488538
%D June 1966

%A M.H. Savoji
%A G.G. Wilkerson
%T Karunen-Loeve transform on an array processor \(em Applications to
multispectral and single band images

%T A Multiprocess Design For an Integrated Programming Environment
%A Duangkaew Sawamiphakdi
%I University of Iowa
%R Technical Report 84-08
%D July 1984

%A A. A. Sawchuk
%A T. C. Strand
%T Digital Optical Computing
%J Proceedings of the IEEE
%V 72
%N 7
%D July 1984
%P 758-779
%K von Neumann bottleneck, communication cost,
Special issue on optical computing
%X This paper and its special issue cover optical digital computing.
Also, see the survey by Huang in the same issue.

%T Optical Interconnection Networks
%A A. A. Sawchuk
%A B. K. Jenkins
%A C. S. Raghavendra
%A A. Varma
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 388-392
%K Interconnection Networks

%A P. S. Sawkar
%A T. J. Forquer
%A E. J. Schernecke
%A H. Li
%T A Multi-port memory organization for use in distributed computing
systems
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 56-62
%K
%O Microprocessor architectures

%A Prashant S. Sawkar
%A Timothy J. Forquer
%A Richard P. Perry
%T Programmable modular signal processor \*- a data flow computer system for
real time signal processing
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 344-349
%K
PMSP, PDFP
data flow

%A Terrence L. Saxton
%A Cheng-chi C. Huang
%T An Optimal Synchronous Reframing Technique Using An Associative Processor
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 152-54
%K
%O STARAN

%A Terrence L. Saxton
%A Cheng-Chi Huang
%T An Optimal Frame Synchronization Technique Using an Associative Processor
%J IEEE Transactions on Computers
%V C-26
%N 2
%D February 1977
%P 170-174
%K Associative memory (AM), associative processor, content-addressed memory,
(CAM), framing strategies, multiple match resolver, parallel processor,
synchronization techniques,
correspondence, special issue on parallel processors and processing

%A G. E. Sayre
%T STARAN: An Associative Approach to Multiprocessor Architecture
%E W. Handler
%B Computer Architecture
%P 199-221
%I Springer-Verlag
%D 1976

%A D. Scelza
%T The Cm* Host User Manual
%I Dept. of Computer Science, Carnegie-Mellon Univ.
%C Pittsburgh, PA
%D July 1977

%A D. H. Schaefer
%A A. M. Veronis
%A J. C. Salland
%T Spatially Parallel Architectures for Industrial Robot Vision
%J Proceedings of the 1983 Conference on Computer Vision and Pattern
Recognition
%P 542-545
%K MPP, Massively Parallel Processor

%A D. H. Schaefer
%T Massively Parallel Processor Systems for Space Applications
%J Proceedings of the 2nd AIAA Computers in Aerospace Conference
%D October 1979
%P 284-286
%K MPP

%A D. H. Schaefer
%T Spatially Parallel Architectures: An Overview
%J Computer Design
%D August 1982
%P 117-124
%K MPP, Massively Parallel Processor

%A D. H. Schaefer
%A J. R. Fischer
%A K. R. Wallgren
%T The Massively Parallel Processor
%J Journal of Guidance, Control, and Dynamics
%V 5
%N 3
%D May-June 1982
%P 313-315
%K Massively Parallel Processor

%A David H. Schaefer
%A James R. Fischer
%T Beyond the Supercomputer
%J IEEE Spectrum
%V 19
%N 3
%D March 1982
%P 32-37
%K MPP, Massively Parallel Processor

%A K. L. Schaffer
%T Associative-parallel applications to radar signal processing
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 145-153
%K
%O Applications

%A R. Schantz
%A E. Burke
%A S. Geyer
%A M. Hoffman
%A A. Lake
%A K. Pogran
%A D. Tappan
%A R. Thomas
%A S. Toner
%A W. MacGregor
%T CONUS, a Distributed Operating System
%R RADC-TR-83-236
%r BBN report 5086
%I Rome Air Development Center
%C Griffiss Air Force Base, NY 13441
%D November 1983
%K Distributed operating system, local area network, virtual local network,
distributed system

%A L. L. Scharf
%A P. H. Moose
%T Information Measures and Performance Bounds for Array Processors
%J IEEE Transactions on Information Theory
%V IT-22
%N 1
%D January 1976
%P 11-21

%A C. Scheel
%A B. McInnes
%T A Cellular Multimicroprocessor Architecture for the Processing of Parallel
Generalized Dynamic Recursive Equations
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 257-260
%K
%O Arithmetic processors

%A R. Scheiber
%A W. Tang
%T Vectorizing the Conjugate Gradient Method
%J Proceedings Symposium CYBER 205 Applications
%I Control Data Corporation
%C Ft. Collins, CO
%D 1982

%A U. Schendel
%T Introduction to Numerical Methods for Parallel Computers
%I Halsted Press
%D 1984
%K Recurrence relations, linear algebra, eigen problems, non linear solutions
%X Text (translated from the original German) is biased to SIMD algorithms.
A review or survey.

%A Frederick E. Schenfele
%T A Parallel Approach to High PRF Doppler Radar Signal Processing
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 142-151
%K
%O STARAN

%A Peter Scheuermann
%A Geoffrey Wu
%T Broadcasting in point-to-point computer networks
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 346-352
%K least weight maximum matching (LWMM), approxiamte matching (AM),
%O computer networks

%T Heuristic Algorithms for Broadcasting in Point-to-Point Computer
Networks
%A Peter Scheuermann
%A Geoffrey Wu
%J IEEE Transactions on Computers
%V C-33
%N 9
%D September 1984
%P 804-811
%K Bipartite graph, dynamic programming, heuristic algorithms,
least-weight maximum matching, minimum-delay broadcasting,
point-to-point computer networks,
Computer networks

%A S. Schindler
%A H. Ludtke
%T An approach to a restricted scheduling problem for multiprocessor systems
%J Proc. 1973 Sagamore Computer Conf. on Parallel Processing
%C Sagamore, New York
%D August 1973
%P 121-129
%K scheduling
%X Discusses the preemptive scheduling of tasks with precedence constraints
on a fixed set of identical processors, with all other resources unlimited.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A S. Schindler
%A H. Ludtke
%T Scheduling Three-Processor Systems
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 293-296
%K multi-processors and parallel computers

%T Process Synchronization in Database Systems
%A Gunter Schlageter
%J ACM Transactions on Database Systems
%V 3
%N 3
%D September 1978
%P 248-271
%K Database systems, process synchronization, parallel process systems,
locking, database consistency, integrity
CR Categories: 4.32, 4.33

%A Walter Schlee
%T Parallel Mathematics in Graphs with Deterministic and Stochastic
Valuation
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 239-242
%K parallel numerical algorithms

%A R.D. Schlichting
%A F.B. Schneider
%T Using message passing for distributed programming: proof rules and
disciplines
%I Computer Science Department, Arizona University
%D 1982
%R TR 82-05

%A R. D. Schlichting
%A F. B. Schneider
%T Understanding and Using Asynchronous Message-Passing
%T Language Constructs and Support Systems for Distributed Computing
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 141-147

%T A Technique for estimating Performance of Fault-Tolerant Programs
%A Richard D. Schlichting
%J IEEE Transactions on Software Engineering
%V SE-11
%N 6
%I IEEE Computer Society
%D June 1985
%O Special Issue on Reliability in Distributed Software and Database
Systems
%P 555-563
%K Fail-stop processors, fault-tolerant computing, Markov chains,
performance evaluation, z-transforms

%A R. G. Schluter
%A J. C. Shih
%A T. L. Machleit
%T Effect of resource allocation on distributed system response-a case
study
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 493-494
%K
%O Distributed Systems-Practices and Experiences

%A Hans Joachim Schmid
%T A DAP-Fortran Code for the Hungarian Method
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 367-372
%D 1984
%K transport problem,

%A R. A. Schmidt
%T A Parallel Operating System for an MIMD Computer
%J Proceedings of the International Conference on Parallel Processing
%I IEEE
%D August 1980
%P 3-4
%K Software and Languages

%A C. Schmittgen
%A W. Kluge
%T A System Architecture for the Concurrent Evaluation of Applicative
Program Expressions
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%D 1983
%V 11
%N 3
%P 356-362
%O architectural support for high level languages

%A H. G. Schmitz
%A C.-C. Huang
%T An efficient implementation of conflict prediction in a parallel processor
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 383-399
%K
%O Parallel processor architectures for air traffic control

%A P. Schneck
%T Movement of Implicit Parallel and Vector Expressions Out of Program
Loops
%J SIGPLAN Notices
%V 10
%P 103-106
%D 1975

%A P. P. Schneck
%T The Array Processor
%J Digest of Papers, COMPCON Fall 77
%D 1977
%P 42-45

%A Paul B. Schneck
%T Issues in Parallel Computing: a Non-Euclidean Examination
%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%P 1-4
%K position paper

%A Paul B. Schneck
%A Donald Austin
%A Stephen L. Squires
%A John Lehmann
%A David Mizell
%A Kenneth Wallgren
%T Parallel Processor Programs in the Federal Government
%J Computer
%I IEEE
%V 18
%N 6
%D June 1985
%P 43-56
%X Recent recognition of the need to increase the nation's scientific
computational capabilities  is spurring a wide variety of research into 
parallel processing and its role in tomorrow's supercomputers
%K multiprocessor distributed systems cray hep dataflow data flow
cedar trac connection machine butterfly warp mpp massively parallel
processor fem finite element machine

%A Fred B. Schneider
%T Synchronization in Distributed Programs
%J ACM Transactions on Programming Languages and Systems
%V 4
%N 2
%D April 1982
%P 179-195
%K Design, Reliability, Logical Clocks
Categories: C.2.4 [Computer-Communication Networks]: Distributed Systems;
D.4.1 [Operating Systems]: process management -
multiprocessing/multiprograming; synchornization; D.4.5 [Operating Systems]
Reliability - fault tolerance

%A H. J. Schneider
%J Distributed Data Bases. Proceedings of the Second International
Symposium
%C Berlin, Germany
%I North-Holland, Amsterdam, Netherlands, p: ix+366
ISBN: 0-444-86474-1
%D 1-3 Sept. 1982
%K distributed processing database management systems computer networks
multiprocessing systems reliability standardisation
distributed data bases standardisation reliability query processing
concurrency control computer networks multidatabase systems models
architectures
%X The following topics were dealt with: standardisation issues;
reliability; query processing; concurrency control; computer
networks; multidatabase systems; models and architectures. 19 papers
were presented, of which 18 are published in full in the present
proceedings, and one as an abstract only

%A E. Schnepf
%A W. Schonauer
%T Parallelization of PDE Software for Vector Computers
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 239-244
%D 1984
%K Cyber 205,

%A E. Schnept
%A W. Schonauer
%T Parallelization of PDE Software for Vector Computers
%J Proc. Parallel Computing 83
%C Berlin
%D 1983

%A J. F. Schoch
%A J. A. Hupp
%T The 'worm' programs-early experience with a distributed computation
%Z Xerox Palo Alto Res. Center, Palo Alto, CA, USA
%J Commun. ACM (USA)
%V 25
%N 3
%P 172-180
%D March 1982
%O 10 Refs.
treatment: practical
%K distributed processing distributed computations worm
worm maintenance mechanisms multimachine test program
real time animation system
%X The 'worm' programs were an experiment in the development of distributed
computations, programs that span machine boundaries and also replicate
themselves in idle machines. A 'worm' is composed of multiple 'segments',
each running on a different machine. The underlying worm maintenance
mechanisms are responsible for maintaining the worm-finding free machines
when needed and replicating the program for each additional segment. These
techniques were successfully used to support several real applications,
ranging from a simple multimachine test program to a more sophisticated
real-time animation system harnessing multiple machines.

%A James D. Schoeffler
%T Distributed Computer Systems for Industrial Process Control
%J Computer
%I IEEE
%V 17
%N 2
%D February 1984
%P 11-18
%X This is the lead article on s special issue on `Software for Industrial
Process Control.'  There are other distributed system articles.  No
others will be listed in this file.

%A H. Schomberg
%T A Peripheral Array Computer and Its Applications
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 183-186
%K SIMD, PEAC, CAT scan,
industrial and industrial like projects

%A W. Schonauer
%T The Efficient Solution of Large Linear Systems Resulting from the FDM
for 3-D PDE's on Vector Computers
%J Proc. First Internation Coll. on Vector and Parallel Computing in
Scientific Applications
%E A. Bassanut
%B Bull. de la Direction des Etudes et Recherches,
%V Ser. C
%N 1
%P 135-142
%D 198

%A W. Schonauer
%A K. Raith
%T A Polyalgorithm with Diagonal Storing for the Solution of Very Large
Indefinite Linear Banded Systems on a Vector Computer
%J Proc. 10th IMACS World Congress on Systems Simulation and Scientific
Computation
%V 1
%I IMACS
%P 326-328
%D 1982

%A W. Schonauer
%T Numerical Experiments with Instationary Jacobi-OR Methods for the
Iterative Solution of Linear Equations
%J ZAMM 63
%P T380-T382
%D 1983
%X Remove?

%A W. Schonauer
%A E. Schnepf
%A K. Raith
%T The Redesign and Vectorization of the SLDGL-Program Package for the
Self-Adaptive Solution of Nonlinear Systems of Elliptic and Parabolic
PDE's
%J Conference of the IFIP Working Group 2.5 on Numerical Software
%C Sweden
%D 1983

%A W. Schonauer
%A E. Schnepf
%A K. Raith
%T Modularization of PDE Software for Vector Computers
%J ZAMM 64
%P T309-T312
%D 1984

%A W. Schonauer
%A E. Schnepf
%A H. Muller
%T PDE Software for Vector Computers
%J Advances in Computer Methods for Partial Differential Equations,
Proc. of the Fifth IMACS International Symposium, Lehigh University
%E R. Vichnevetsky
%E R. Stepleman
%D June 1984
%P 258-267

%A Edith Schonberg
%A Edmond Schonberg
%T Highly Parallel Ada -- Ada on an Ultracomputer
%R ULTRACOMPUTER NOTE #81
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D February 1985
%K Fetch-and-add, fetch-op, exception handling,

%A R. Schreiber
%A P. Kuekes
%T Systolic Linear Algebra Machines in Digital Signal Processing
%J Proc. USC Workshop on VLSI and Modern Signal Processing
%I Prentice-Hall
%C Los Angeles
%D 1982

%A R. Schreiber
%A W. Tang
%T Vectorizing the Conjugate Gradient Method
%J Proceedings Symposium CYBER 205 Applications
%I Control Data Corporation
%C Ft. Collins, CO
%D 1982

%A R. Schreiber
%T Systolic Arrays: High Performance Parallel Machines for Matrix
Computation
%B Elliptic Problem Solvers
%I Academic Press
%C New York
%E G. Birkhoff
%E A. Schoenstadt
%D 1984
%P 187-194

%A M. Schroeder
%A R. Meyer
%T A Distributed computer system using a data flow approach
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 93
%K
%O Data-flow Architectures

%T Experience with Grapevine: the growth of a distributed system
%A M. D. Schroeder
%A A. D. Birrell
%A R. M. Needham
%J ACM Trans. Comput. Syst. (USA)
%V 2
%N 1
%P 3-23
%O 17 REFS. Treatment PRACTICAL
%D Feb. 1984
%K computer networks database management systems
Grapevine distributed system message delivery naming
authentication resource location access control services

%A Michael D. Schroeder
%A Andrew D. Birrell
%A Roger M. Needham
%T Experience with Grapevine: the Growth of a Distributed System (Summary)
%J Proceedings of the 9th Symposium on Operating Systems Principles,
Operating Systems Review
%V 17
%N 5
%D October 1983
%P 141-142
%K Xerox PARC, XNS
%O experience

%A H. J. Schuh
%A P. Spaniol
%T CANTUS-a packet switching point-to-point network
%B NETWORKS India 84. International Symposium on Data Communication
and Computer Networks
%C Madras, India
%D 19-21 Oct. 1984
%P 191-192
%O 0 REFS. Treatment PRACTICAL
%E H. N. Mahabala
%E K. B. Lakshmanan
%E S. Srinivasan
%I Comput. Soc. India, IFIP, UNESCO
%K packet switching computer networks
packet switching network point to point network CANTUS MEDUSA
routing problem internal network
%X Summary form only given, substantially as follows. As a successor
of the running network MEDUSA of the University of Saarland, CANTUS
a packet switching network is being developed. CANTUS is a two-state
system: where it is necessary inhouse networks are built up which
can be of ETHERNET type of star-formed; the inhouse networks are
interconnected by a fast internal point-to-point network with a line
speed of more than 1 MBd. To supply the campus with a diameter of
1.5 km and 40 buildings one needs 10 nodes for the internal network
Mapping the internal structure to Petersen's graph, one obtains the
CANTUS topology which has the advantage that the routing problem in
the internal network can be solved in an algorithmic way without
expensive routing tables

%l journal-article
%A P. U. Schultess
%T A Reduced High-Level-Language Instruction Set
%J Micro
%V 4
%N 3
%M June
%D 1984
%P 55-67
%K descriptor based addressing stack architecture reduced instruction set
computer risc language directed

%l journal-article
%A P. Schulthess
%A F. Vonaesch
%T OPA - A New Architecture for Pascal-Like Languages
%P 9
%K stack RISC language directed
%J ACM Computer Architecture News
%V 10
%N 6
%M Dec
%D 1982

%A M. Schultz, (Ed.)
%T Elliptic Problem Solvers
%I Academic Press
%C New York
%D 1981

%A M. Schultz
%T Solving Elliptic Problems on an Array Processor System
%B Elliptic Problem Solvers
%I Academic Press
%C New York
%E G. Birkhoff
%E A. Schoenstadt
%P 77-92
%D 1984

%A S. A. Schuman
%A E. M. Clarke Jr.
%A C. N. Nikolaou
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Programming Distributed Applications in Ada:  A First Approach
%P 38-49
%O Languages and Compilers

%A S. A. Schuster
%A H. B. Nguyen
%A E. A. Ozkarahan
%A K. C. Smith
%T RAP. 2 \(em An Associative Professor for Data Bases
%J Proceedings of 5th Annual Symposium on Computer Architecture
%D 1978
%P 52-59
%K University of Toronto, Data Base Architectures

%A Stewart A. Schuster
%A H. B. Nguyen
%A Esen A. Ozkarahan
%A Kenneth C. Smith
%T RAP.2 - An Associative Processor for Databases and Its Applications
%J IEEE Transactions on Computers
%V C-28
%N 6
%D June 1979
%P 446-458
%K Access methods, array processors, associative memories,
associative processors, bubble memory, cellular memory,
charge-coupled device (CCD),
memory, computer architecture, database machines, database management
systems, disk memory, microprocessors, parallel processors, random
access memory (RAM), secondary storage devices,
Special issue on database machines

%A D. Schutt
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T On Database-Oriented Peripheral Transformation Processor Systems
%P 279-282
%O Data Base Architecture and Software

%A I. Schutzer
%T An analysis of a distributed switching network
with integrated voice and data in support of command and control
%J Proc. Nat. Computer Conf.
%I AFIPS Press
%C Montvale, New Jersey
%D 1979
%P 927-934

%A Karsten Schwan
%A Cheryl Gaimon
%T Automating Resource Allocation for the Cm* Multiprocessor
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Resource Allocation, Cm*, StarOS, TASK,
%P 310-320

%T Dictionary Machines on Cube-Class Networks (Preliminary Version)
%A Alan M. Schwartz
%A Michael C. Loui
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 210-216
%K Parallel Computation

%A J. Schwartz
%T A Remark on Nearly Planar Embeddings of Small Ultracomputers
%R ULTRACOMPUTER NOTE #4
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D December 2, 1979

%A J. Schwartz
%T A Taxonomic Table of Parallel Computers, Based on 55 Designs
%R Ultracomputer Note 69
%I Courant Institute, New York University
%D 1983

%A J. T. Schwartz
%T Preliminary Thoughts on Ultracomputer Programming Style
%R ULTRACOMPUTER NOTE #3
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D May 10, 1979

%A J. T. Schwartz
%T Ultracomputers
%J ACM Trans. on Programming Languages and Systems
%V 2
%N 4
%D October 1980
%P 484-521
%K parallelism, parallel computation, parallel algorithms

%A J. T. Schwartz
%T Design Alternatives for Ultraperformance Parallel Computers
%R ULTRACOMPUTER NOTE #76
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D May 1984

%A Jacob T. Schwartz
%T The Burroughs FMP Machine
%R ULTRACOMPUTER NOTE #5
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D January 9, 1980

%A M. Schwartz
%A R. R. Boorstyn
%A R. L. Pickholtz
%T Terminal-oriented computer-communication networks
%J Proc. IEEE
%V 60
%N 11
%D November 1972
%P 1408-1423

%A M. Schwartz
%A T. E. Stern
%T Routing techniques used in computer communication networks
%Z Dept. of Electrical Engng., Columbia Univ., New York, NY, USA
%J IEEE Trans. Commun. (USA)
%V COM-28
%N 4
%P 539-552
%D April 1980
%O 35 Refs.
treatment: practical
%K computer networks
routing procedures operating networks tymnet arpanet
transpac network architectures ibm sna dec dna
%X An overview is provided of the routing procedures used in a number of
operating networks, as well as in two commercial network architectures. The
networks include tymnet, arpanet, and transpac. The network architectures
discussed are the ibm sna and the dec dna. The routing algorithms all tend
to fall in the shortest path class. In the introductory sections, routing
procedures in general are discussed, with specialization to shortest path
algorithms. Two shortest path algorithms, one appropriate for centralized
computation, the other for distributed computation, are described. These
algorithms, in somewhat modified form, provide the basis for the algorithms
actually used in the networks discussed.

%A Mischa Schwartz
%T Throughput and Time Delay Analysis for a Common Queue Configuration in
a Multiprocessor Environment
%J IEEE Transactions on Computers
%V C-28
%N 12
%D December 1979
%P 939-941
%K Common queue analysis, multiple job processing,
multiprocessor analysis, M/G/2 analysis,
Correspondence

%A R. L. Schwatz
%A P. M. Melliar-Smith
%T Temporal Logic Specification of Distributed Systems
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 446-454
%K
%O Languages Constructs & Semantics of Parallel Programming

%A David Scott
%A Robert C. Ward
%T Parallel Block Jacobi Eigenvalue Algorithms Using Systolic Arrays
%I Dept. of Computer Science, Univ. of TX at Austin
%J TR-85-01
%D January 1985

%A M. L. Scott
%T Messages vs. remote procedures is a false dichotomy
%J SIGPLAN Notices (USA)
%V 18
%N 5
%P 57-62
%D 1983
%O 12 Refs.
Treatment PRACTICAL.
%K high level languages.
message based languages high level languages remote procedures design decisions
language proposals concurrent programming.
%X This paper discusses some of the major design decisions that
distinguish recent language proposals for concurrent programming. It
is argued that the classification of languages as 'procedure-based'
or 'message-based' is misleading, in that it confuses two independent
issues. It is further argued that these issues are best left
undecided by the language designer.

%A M. R. Scott
%T Solution of Boundary-Value Problems on HEP
%E Janusz S. Kowalik
%B Parallel MIMD Computation: HEP Supercomputer and Its Applications
%I MIT Press
%C Cambridge, MA
%D 1985
%P 349-366
%K Applications, Cray, ELXSI,
%X A single code is tested on a CRAY X-MP/48 and a multiprocessor
ELXSI configuration and tested next to the HEP judge by relative
merits.

%A Michael A. Scott
%T A Framework for the Evaluation of High-Level Languages for Distributed
Computing
%R TR #563
%I Computer Science Dept., Univ. of Wisc.
%C Madison, WI
%D October 1984
%K Recommended
%X An excellent survey of the issues on concurrent languages:
communication, synchronization, naming, and so forth.

%A Michael L. Scott
%A Raphael A. Finkel
%T LYNX: A dynamic distributed programming language
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 395-401
%K Links, charlotte, message passing, inter-process communication (IPC),
synchronization,
%O languages

%A R. Scott
%T On the Choice of Discretization for Solving PDE's on a Multi-Processor
%E M. Schultz
%B Elliptic Problem Solvers
%I Academic Press
%C New York, NY
%D 1981
%P 419-422

%A F. Van Scoy
%T Some Parallel Cellular Matrix Algorithms
%J Proc. ACM Comp. Sci. Conference
%D 1977

%T The Parallel Recognition of Classes of Graphs
%A Frances L. Van Scoy
%J IEEE Transactions on Computers
%V C-29
%N 7
%D July 1980
%P 563-570
%K Analysis of algorithms, cellular space, graph theory, parallel
processing, transitive closure
%O Complexity of parallel computations

%A John R. Searle
%T Speech Acts: An Essay in the Philosophy of Language
%I Cambridge University Press
%D 1970

%A Robert R. Seban
%A Howard Jay Siegel
%T Performing the shuffle with the PM2I and Illiac SIMD interconnection
networks
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 117-125
%K
Purdue U
network interconnection capabilities

%A Robert R. Seban
%A Howard Jay Siegel
%T Shuffling with the ILLIAC and PM2I SIMD Networks
%J IEEE Transactions on Computers
%V C-33
%N 7
%D July 1984
%P 619-625
%K ILLIAC, interconnection network, multiple-SIMD, parallel processing,
partitioning of networks, perfect shuffle, permutation networks, PM2I,
shuffle-exchange, SIMD,
interconnection networks

%A Robert R. Seban
%A Howard Jay Siegel
%T Theoretical Modeling and Analysis of Special Purpose Interconnection
Networks
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 256-265
%O Interconnection networks

%A Robert R. Seban
%A Howard Jay Siegel
%T Analysis of Partionability Properties of Topologically Arbitrary
Interconnection Networks
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Distributed Programming, PASM
%P 173-181

%A R. R. Seeber
%A A. B. Lindquist
%T Associative Logic for Highly Parallel Systems
%J Proceedings AFIPS Fall Joint Computer Conference
%D 1963
%P 489-493

%A A. Segall
%A J. M. Jaffe
%T A distributed protocol for maintaining central network control
%J J. Telecommun. Networks (USA)
%V 3
%N 3
%P 268-275
%O 3 REFS. Treatment APPLICATIONS
%D Fall 1984
%K distributed control centralised control protocols data communication systems
computer networks
centralised communication network distributed protocol central network control
session oriented network
maintenance central controller finite time connected network
dynamic events distributed environment

%A Adrian Segall
%T Dynamic File Assignment in a Computer Network
%J IEEE Transactions on Automatic Control
%V AC-21
%N 4
%D April 1976
%P 161-173
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A Arie Segev
%T Optimizing Fragmented 2-way Joins
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 378-388
%O Distributed query processing

%A A. Segimiro
%T Parallel Processing Applied in the Simulation Oriented to Process Control
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 309-313
%K EAI 8945,
application of hybrid computer systems

%A J. Seguin
%A others
%T A Majority Consensus Algorithm for the Consistency of Duplicated
and Distributed Information
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 617-624
%O Distributed data bases applications and techniques

%A M. Seifert
%T Reconfiguration and Recovery of Multiprocess Systems in Fault-Tolerant
Distributed Systems
%J Computer Software and Applications Conference (COMPSAC80)
%I IEEE
%D October 1980
%P 596-602
%O fault tolerance in software

%A C. Seitz
%T Ensemble Architectures for VLSI - A Survey and Taxonomy
%J Proc. MIT Conference on Advanced Res. in VLSI
%I Artech Books
%P 130-135
%D 1982

%A C. Seitz
%A W. Athas
%T System Programmer's Guide to COSMIC KERNEL
%R Internal memo, Hm39
%I California Institute of Technology
%C Pasadena, CA
%D August 1983
%K Caltech Cosmic Cube, hypercube, C^3P

%A C. Seitz
%T Experiments with VLSI Ensemble Machines
%J Journal of VLSI and Computer Systems
%r Hm63
%V 1
%D 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%A C. Seitz
%T Experiments with VLSI Ensemble Machines
%J J. VLSI and Comp. Sys.
%D 1984
%X To Appear

%A C. L. Seitz
%T The Practical VLSI and Theoretical Considerations Motivating the
Homogeneous Machine
%R Hm 13
%I California Institute of Technology
%C Pasadena, CA
%D October 1982
%K Caltech Cosmic Cube, hypercube, C^3P
%X Viewgraphs.

%A C. L. Seitz
%T Concurrent VLSI Architecture
%R Hm84
%I California Institute of Technology
%C Pasadena, CA
%D June 1984
%K Caltech Cosmic Cube, hypercube, C^3P
%X To appear Dec 1984 IEEE TC.

%A C. L. Seitz
%T The Cosmic Cube
%J Communications of the ACM
%V 28
%N 1
%D January 1985
%P 22-33
%r Hm83
%d June 1984
%K CR Categories and Subject Descriptors: C.1.2 [Processor Architectures]:
Multiple Data Stream Architectures (Multiprocessors);
C.5.4 [Computer System Implementation]: VLSI Systems;
D.1.2 [Programming Techniques]: Concurrent Programming;
D.4.1 [Operating Systems]: Process Management
General terms: Algorithms, Design, Experimentation
Additional Key Words and Phrases: highly concurrent computing,
message-passing architectures, message-based operating systems,
process programming, object-oriented programming, VLSI systems,
homogeneous machine, hypercube, C^3P
%X Excellent survey of this project.

%A Chuck Seitz
%T Opening Discussion of Possibilities for the TMP(Tree Machine Processor,
Tiny Mosaic Processor)
%R Hm31
%I California Institute of Technology
%C Pasadena, CA
%D February 1983
%K Caltech Cosmic Cube, hypercube, C^3P

%A M. C. Sejnowski
%A E. T. Upchurch
%A R. N. Kapur
%A D. P. S. Charlu
%A G. J. Lipovski
%T An Overview of the Texas Reconfigurable Array Computer
%J Proceedings of the National Computer Conference
%V 49
%I AFIPS Press
%C Montvale, New Jersey
%D 1980
%P 631-641

%A D. R. Seligman
%T On the Performance Evaluation of DECnet
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 484-496
%K
%O Local Area Networks and Applications

%A D. R. Seligman
%T Traffic routing in a computer network
%J Comput. Commun. (GB)
%V 7
%N 2
%P 59-64
%O 7 Refs.
Treatment PRACTICAL.
%D 1984
%K computer networks data communication systems packet switching.
traffic routing computer network Decnet networks packet delay
network flows.
%X This paper presents a technique for tuning Decnet networks so as to
minimize the average end-to-end packet delay for the entire network.
It represents an adaptation of theoretical work on network flows to
the realistic case of Decnet. Using this technique to configure
hypothetical networks, it then discusses the behaviour of the Decnet
routing algorithm with respect to network size, topological
connectivity and traffic configuration.

%l book-article
%A C. H. Sequin
%A D. A. Patterson
%T Design and Implementation of RISC I
%P 276-298
%K computer architecture register testing

%A C. H. Sequin
%T Single-chip computers, the new VLSI building blocks
%J Caltech VLSI Conference
%C Pasadena, CA
%D Jan. 1979
%P 435-445

%A C. H. Sequin
%T Message switching circuits for multi-microprocessors
%J Spring 1980 Compcon
%I IEEE
%D 1980
%P 328-334

%A C. H. Sequin
%T Doubly Twisted Torus Networks for VLSI Processing Arrays
%J Proceedings of 8th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 9
%N 3
%D May 1981
%P 471-479
%O VLSI architecture
%X
Reproduced in the 1984 tutorial: \fIInterconnection Networks for parallel
and distributed processing\fP by Wu and Feng.

%A C. H. Sequin
%T Managing VLSI complexity: an outlook
%J Proc. of the IEEE
%V 71
%N 1
%D Jan. 1983
%P 149-166

%A Omri Serlin
%T Fault-Tolerant Systems in Commercial Applications
%J Computer
%I IEEE
%V 17
%N 8
%D August 1984
%P 19-30
%K Dual processors, tandem processors,
Special issue on fault-tolerant computers
%X A nice table summarizing available systems.

%A P. K. Seshadrinathan
%A N. Suryanarayana
%T Design and development of an interface for data transfers across a
computer network-an experience
%B NETWORKS India 84. International Symposium on Data Communication
and Computer Networks
%C Madras, India
%D 19-21 Oct. 1984
%P 194-195
%O 0 REFS. Treatment PRACTICAL
%E H. N. Mahabala
%E K. B. Lakshmanan
%E S. Srinivasan
%I Comput. Soc. India, IFIP, UNESCO
%K computer networks data communication systems bank data processing
data transfers computer network data transfer interface
Tata Consultancy Services
banking group data files public data network TRANSPAC
%X Summary form only given, substantially as follows. Describes a
data transfer interface designed and developed by Tata Consultancy
Services in Burroughs 5000/6000/7000 series computers for a large
banking group in France, which has about a hundred regional data
processing centres. The date transfer interface enables the transfer
of data files between application programmes of different data
processing centres. The project called the T.D. CAM project involves
the use of the French public data network TRANSPAC for linking the
various regional DP centres. These centers employ a wide range of
computers which posed a major problem in connecting them to the
network. It was therefore decided to use a front-end computer called
IGT to connect each DP center to the network. The IGT computers have
customised software to interact with the local computer on one side
and a standard 5-layer data communications software on the other
side to manage transmissions across the network

%A A. S. Sethi
%A N. Deo
%T Interference in multiprocessor systems
with localized memory access probabilities
%J IEEE Trans. on Computers
%V C-28
%N 2
%D February 1979
%P 157-163
%K performance
%X Using more realistic assumptions than earlier work, considers the problems
of memory interference.  Develops a model of the memory reference pattern of
typical programs and uses it to analyze the performance of a multiprocessor
system.  Also presents simulation data validating these analytical results.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A R. Sethi
%T Scheduling graphs on two processors
%J SIAM Journ. on Computing
%V 5
%N 1
%D March 1976
%P 73-82
%K scheduling
%X Presents two algorithms for scheduling equal-length tasks with precedence
constraints on two-processor systems.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%T System versus program performance objectives in a simple closed
queueing network
%A K. C. Sevcik
%A E. D. Lazowska
%B Canadian Information Processing Society. 1975 Proceedings
%C Regina, Saskatchewan, Canada
%D 24-26 June 1975
%P 468-485
%O 8 REFS. Treatment APPLICATIONS
%I Canadian Information Processing Soc.. Toronto, Ontario, Canada.,1975
, xv+512
%K computer networks scheduling computer testing multiprocessing systems
simple closed queueing network compatibility
system oriented performance objective program oriented performance objectives
scheduling strategy processor utilization short term scheduling decisions

%A L. Sha
%A E. D. Jensen
%A R. F. Rashid
%A J. D. Northcutt
%T Distributed cooperating processes and transactions
%J Comput. Commun. Rev. (USA), SIGCOMM '83 Symposium on Communications
Architectures & Protocols
%V 13
%N 2
%C Austin, TX, USA
%P 188-196
%O 19 REFS
Treatment PRACTICAL
%D 8-9 March 1983
%K distributed processing operating systems
relational model data consistency cooperating processes Accent
network operating system
system software Spice personal computing network Archons project
%X The authors have developed a relational model of data consistency to
replace the conventional serialization model for reasoning about the
relationships among distributed system data objects in general and
state variables in particular. This model leads to a new formulation
of cooperating processes, and thence to the notion of cooperating
transactions: cooperating processes whose actions are made atomic for
the sake of reliability. These ideas are illustrated by examples from
initial experience in applying the model to the Accent network
operating system and other system software of the Spice personal
computing network. The paper is an overview of the synchronization
effort in the Archons project

%A Lui Sha
%A E. Douglas Jensen
%A Richard F. Rashid
%A J. Duane Northcutt
%T Distributed Co-operating Processes and Transactions
%E Y. Paker
%E J.-P. Jerjus
%B Distributed Computing Systems (Synchronization, Control and Communication)
%I Academic Press
%D 1983
%P 23-50
%K Archons project, CMU

%A A. Shah
%T Group Broadcast Mode of Interprocessor Communications for the Finite
Element Machine
%I University of Colorado
%R Dept. of Computer Science Report CSDG-80-1
%D 1980

%A E. Shamir
%A E. Upfal
%T N-Processor Graphs Distributively Achieve Perfect Matching in O(log^2 n)
Beats
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 238-241

%A J. Shanehchi
%A D. Evans
%T New Variants of the Quadrant Interlocking Factorization (QIF) Method
%J CONPAR 81 Conf. Proc. Lecture Notes in Computer Science III
%E W. Handler
%I Springer-Verlag
%D 1981
%P 493-507

%A J. Shanehchi
%A D. Evans
%T Further Analysis of the QIF Method
%J Int. J. Comput. Math
%V 11
%P 143-154
%D 1982

%A J. Shang
%A P. Buning
%A W. Hankey
%A M. Wirth
%T Performance of a Vectorized Three-Dimensional Navier-Stokes code on the
CRAY-1 computer
%J AIAA Journal
%V 18
%D 1980
%P 1073-1079

%A K. S. Shankar
%T The Total Computer Security Problem: An Overview
%J Computer
%I IEEE
%V 10
%N 6
%D June 1977
%P 50-62 and 71-73
%X Contains a good bibliography on computer security.
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A Douglas C. Shannon
%A M. Tsuchiya
%T DDPSIM Distributed processing system simulator
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 459-461
%O simulation

%T Fast Multiway Merge Using Destructive Operation
%A Ehud Shapiro
%A Muli Safra
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 118-122
%K Logic Programming

%A H. Shapiro
%T A comparison of various methods for detecting and utilizing parallelism
in a single instruction stream
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 67-
%K
%O Operating systems and compilers

%A Henry D. Shapiro
%T Storage Schemes in Parallel Memories
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 159-166
%K
%O Memory organizations

%A Henry D. Shapiro
%T Theoretical Limitations on the Efficient Use of Parallel Memories
%J IEEE Transactions on Computers
%V C-27
%N 5
%D May 1978
%P 421-428
%K Array processors, memory-processor connection networks, parallel
memories, SIMD machines, skewing schemes,
Parallel memories

%A M. Shapiro
%T An Experiment in Distributed Program Design, Using Control Enrichment
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 294-300
%K
%O Design of Distributed Computing Systems

%A R. M. Shapiro
%A H. Saint
%A D. L. Presberg
%T Representation of Algorithms as Cyclic Partial Orderings
%I Applied Data Research
%R CA-7112-2711
%C Wakefield, MA
%D 1971

%A J. A. Sharp
%T Some thoughts on data flow architectures
%J SIGARCH Computer Architecture News
%I ACM
%V 8
%N 4
%D June 1980
%P 11-20

%A M. Sharpiro
%T Surface Physics Investigations Using the Multiple Interaction
Molecular Dynamics Technique on a Concurrent Processor
%R Hm42
%I California Institute of Technology
%C Pasadena, CA
%D November 1983
%K Caltech Cosmic Cube, hypercube, C^3P

%A S. K. Shastry
%T A control structure for parallel processing
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 134-147
%K
%O System control

%A Sol M. Shatz
%T Communications Mechanisms for Programming Distributed Systems
%J Computer
%V 17
%N 6
%D June 1984
%P 21-28
%X A short survey on synchronization and communications (send, receive).

%A Alan C. Shaw
%T Systems Design and Documentation Using Path Descriptions
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 180-181
%K
%O languages
%X Summary only.

%A D. Shaw
%T SIMD and MSIMD Variants of the NON-VON Supercomputer
%J Proc. COMPCON 84
%I IEEE Comp. Soc.
%P 360-363
%D 1984

%A David Elliot Shaw
%T The NON-VON Super Computer
%I Dept. of Computer Science, Columbia Univ.
%C New York, NY 10027
%D August 1982
%X The NON-VON is a highly parallel hierarchically structured machine with
small, specialized, heterogeneous processors.
Different levels of the tree perform different functions.
Applications include artificial intelligence, data base handling, image
analysis, and so on.
Paper addresses a little of the instruction set, but not much about the
software.
If this paper was published in a journal outside Columbia or the DOD, I would
like to know where.

%A David Elliot Shaw
%A Theodore M. Sabety
%T An Eight-Processor Chip for a Massively Parallel Machine
%I Computer Science Dept., Columbia University
%C New York, NY 10027
%K NON-VON
%D 1984

%A David Elliot Shaw
%T SIMD and MSIMD Variants of the Non-Von Supercomputer
%J Digest of Papers COMPCON, Spring 84
%I IEEE
%D Feb. 1984
%P 360-363
%K Very high-end architectures
%X Covers the design of 4 Non-Von variants (number 1 through 4).
The machines tend to be AI (symbolic) in orientation.

%A I. L. Shaw
%A W. A. Edblad
%A A. M. Pavlovic
%T Process Control Languages \(em Designer's Perspective of Adequacy and
Future Requirements
%J Computer Software and Applications Conference (COMPSAC78)
%I IEEE
%D November 1978
%P 307-308
%O process computer software, languages and maintenance

%A G. Shedler
%T Parallel Numerical Methods for the Solution of Equations
%J Comm. ACM
%V 10
%P 286-291
%D 1967

%T Design and Implementation of a VLSI Systolic Array for Solving
Nonlinear Partial Differential Equations
%A Mark A. Shell
%A Donald W. Bouldin
%A Paul D. Manhardt
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 96-98
%K Systolic Systems

%T A Graph Matching Approach to Optimal Task Assignment in Distributed
Computing Systems Using Minimax Criterion
%A Chien-Chung Shen
%A Wen-Hsiang Tsai
%I IEEE Computer Society
%D March 1985
%K Algorithm, distributed computing systems, graph matching,
interprocessor communication, load balancing, minimax criterion,
state-space search, weak homomorphism.

%A John Paul Shen
%T Fault tolerance analysis of several interconnection networks
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 101-112
%K Beta-network, inverse shuffle-exchange networks, double-tree networks
indirect binary m-cube networks, Benes networks
CMU
%O Network diagnosis and fault tolerance

%A John Paul Shen
%A John P. Hayes
%T Fault-Tolerance of Dynamic-Full-Access Interconnection Networks
%J IEEE Transactions on Computers
%V C-33
%N 3
%D March 1984
%P 241-248
%K Eulerian graphs, fault diagnosis, fault-tolerance, interconnection networks,
parallel processing,
Interconnection networks,
%X Beta-networks for fault-tolerance.
Reproduced in the 1984 tutorial: \fIInterconnection Networks for parallel
and distributed processing\fP by Wu and Feng.

%A V. Y. Shen
%A Y. E. Chen
%T A Scheduling Strategy for the Flow-Shop Problem in a System with Two Classes
of Processors
%J Proceedings of the Sixth Annual Princeton Conf. on Mathematical
Programming
%I Princeton Univ. Press
%C Princeton, NJ
%D 1972
%P 645-649

%A W. D. Shepherd
%T Ancilla-a server for the Cambridge Model Distributed System
%J Software-Pract. & Exper. (GB)
%V 11
%N 11
%P 1185-1195
%O 9 Refs.
Treatment APPLICATIONS
%D November 1981
%K distributed processing computer networks supervisory and executive programs.
server Cambridge Model Distributed System CMDS Ancilla.
%X Describes the steps involved in writing a server for the Cambridge
Model Distributed System (CMDS). The author describes the essential
components of the system and gives a description of the Ancilla
server. Finally a number of conclusions are drawn.

%A W. D. Shepherd
%A G. S. Blair
%A D. Hutchison
%T Comparison of an Ethernet-like communication system with the
Cambridge ring
%J IEE Proc. E (GB)
%V 129
%N 4
%P 147-155
%D 1982
%O 14 Refs.
Treatment BIBLIOGRAPHY/LITERATURE SURVEY, THEORETICAL/MATHEMATICAL.
%K computer networks.
Ethernet like communication system Cambridge ring local area network
branching broadcasting system Ethernet contention resolving
digital communication ring empty slot principle.
%X Describes the simulation and comparison of two types of local-area
network. One is a branching broadcasting system, based closely on the
standard Ethernet, requiring contention-resolving hardware, and the
second is the Cambridge digital communication ring, a point-to-point
communication system using the empty-slot principle for deterministic
multiplexing.

%A W. D. Shepherd
%E P. D. English
%T An annotated bibliography of local area networks
%B Local area networks. State of the art report
%C Maidenhead, Berks., England
%P 193-203
%O 33 REFS. Treatment BIBLIOGRAPHY/LITERATURE SURVEY
%I Pergamon Infotech
%D 1983
%K communication networks computer networks
LAN applications local area networks computer systems architectures
performance studies simulation protocols
%X Local area networks (LANs) are becoming increasingly important in the
design of computer systems. They are being applied in the fields of
distributed operating systems, real-time control systems and office
automation. It is extremely likely that they will become the
predominant feature of design in the 1980s. The bibliography is
divided into three sections. The first section covers papers
describing the various LAN architectures that are available, the
second covers papers describing performance studies of LANs (these
are mainly analytic or simulation studies) and the last section
covers protocols and applications

%A Eugene S. Y. Shew
%A Jack M. Cotton
%T A receiver for PCM coded digitone and MF signals using associative
processing
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 154-160
%K
%O Applications

%A T. Shimada
%A K. Hiraki
%A K. Nishida
%T An Architecture of a Data Flow Computer and Its Evaluation
%J Proc. COMPCON 84, IEEE Comp. Soc. Conf.
%P 486-490
%D 1984

%A P. F. Shimell
%T Gateways, road blocks, access points and a route guide to better
internetworking
%B Proceedings of Videotex '84 International
%C Amsterdam, Netherlands
%D 20-22 Nov. 1984
%P 283-298
%O 0 REFS. Treatment PRACTICAL
%I Online Publications. London, England, xii+418, Std Book No.0 86353 020 6
%K computer networks data communication systems standards
gateways road blocks access points route guide
internetworking history standards
%X The history and current state of networking standards in use in
various countries are reviewed. An analysis of the possibilities of
internetworking and the surrounding problems is made
Recommendations for systems designers and network purchasers are
given in an attempt to halt the spread of incompatible 'open'
networks and terminal types

%A A. Shimor
%A S. Ruhman
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Toward a Generalization of Two and Three-Pass Multistage, Blocking
Interconnection Networks
%P 337-346
%O Interconnections

%T Parallel Garbage Collection with Associative Tag
%A Heonshik Shin
%A Miroslaw Malek
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 369-375
%K Parallel Algorithms

%A Kang G. Shin
%A Yann-Hang Lee
%A J. Sasidhar
%T Design of HM2p - A Hierarchical Multimicroprocessor for General-Purpose
Applications
%J IEEE Transactions on Computers
%V C-31
%N 11
%D November 1982
%P 1045-1053
%K Hierarchical multiprocessor, monitor, performance falloff,
processing/data distribution hierarchy, queueing model, synchronization,
Special issue on parallel and distributed processing

%A Kang G. Shin
%A Yann-Hang Lee
%T Analysis of the Impact of Error Detection on Computer Performance
%R CRL-TR-2-82
%I Univ. of MI, Computing Research Lab.
%C Ann Arbor, MI
%D October 1982
%X Funded by NASA LaRC

%A Kang G. Shin
%A Yann-Hang Lee
%T Analysis of backward error recovery for concurrent processes with
recovery blocks
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 362-366
%K
U Mich,
simulation/operating systems

%T Evaluation of Error Recovery Blocks Used for Cooperating Processes
%A Kang G. Shin
%A Yann-Hang Lee
%I IEEE Transactions on Software Engineering
%V SE-10
%N 6
%D November 1984
%K Backward error recovery, conversation scheme, domino effect,
pseudorecovery points and lines(s), recovery block(s), recovery
line(s), rollback propagations,
Reliability

%A Kang G. Shin
%A C. M. Krishna
%T The Processor Number-Power Tradeoff in a Class of Multiprocessors
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Resource Allocation, real time, static redundency,
%P 321-328

%A H. Shirakawa
%A T. Kumagai
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T An Organization of a Three-Dimensional Access Memory
%P 137-138
%O

%A J. F. Shoch
%T Inter-network naming, addressing, and routing
%Z Xerox Palo Alto Res. Center, Palo Alto,CA, USA
%J Proceedings of compcon fall '78, computer communications networks
%P 72-79
%D 5-8 Sept. 1978
%C Washington, DC, USA
%I IEEE, New York, USA, xi+434 pp.
%O 15 Refs., treatment: applic, general,review
%K computer networks
computer networks communications system heterogeneous computer systems
internetwork naming internetwork addressing internetwork routing
%X As work continues to interconnect computer networks, it becomes
increasingly important to clarify the differences between names, addresses
and routes-while closely related, these are three distinct functions in any
communications system. A clear appreciation for some of the more subtle
aspects of their use can help in understanding such traditional models as
the switched telephone system, as well as more recent designs for bringing
together heterogeneous computer systems.

%A J. F. Shoch
%A Y. K. Dalal
%A D. D. Redell
%A R. C. Crane
%T Evolution of the Ethernet local computer network
%J Computer (USA)
%V 15
%N 8
%P 10-27
%O 29 REFS
Treatment GENERAL OR REVIEW
%D 1982
%K computer networks
Ethernet local computer network research prototype
%X As it evolved from a research prototype to the specification of a
multi-company standard, Ethernet compelled designers to consider
numerous trade-offs among alternative implementations and design
strategies. The authors discuss the evolution of Ethernet which has
proven a very effective local network

%A Howard A. Sholl
%A Kevin Morris
%A James Norris
%T A Multiprocessor System for Real-Time Classification of Railroad Track Flaws
%J IEEE Transactions on Computers
%V C-31
%N 10
%D October 1982
%P 1009-1017
%K Multiple processor, pattern recognition, pipeline system, railroad
track flaws, real-time system,
Special issue on computer architecture for pattern analysis and image
database management

%A W. Shooman
%T Parallel Computing with Vertical Data
%J 1960 Eastern Joint Computer Conference
%P 111-115

%A William Shooman
%T Orthogonal Processing
%E L. C. Hobbs
%E D. J. Theis
%E Joel Trimble
%E Harold Titus
%E Ivar Highberg
%B Parallel Processor Systems, Technologies and Applications
%I Spartan Books
%C New York, New York
%D 1970
%P 297-308
%K Architecture, orthogonal computer
System and machine organization

%A Rita Shoor
%T CDC 205 Runs 800 Million Operations/Sec
%J Computerworld
%V 14
%N 23
%D June 9, 1980
%P 1-2
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%A John E. Shore
%T Second Thoughts on Parallel Processing
%J Computing and Electrical Engineering
%V 1
%I Pergamon Press
%C Oxford, England
%i NTIS
%r AD-738422
%d December 1971
%D 1973
%P 95-109
%X An analysis of several machines at that time: STARAN, ILLIAC IV, and
Shooman's orthogonal computer.

%A L. Shrira
%A N. Francez
%T An Experimental Implementation of CSP
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 126-136
%K
%O Semantics of Parallel Programming

%A S. K. Shrivastava
%A J. P. Banatre
%T Reliable resource allocation between unreliable processes
%J IEEE Trans. on Software Engineering
%V SE-4
%N 3
%D May 1978
%P 230-241
%K reliability and error recovery
%X Examines error recovery in interacting processes and describes
error recovery techniques for cooperating processes. Presents programming
language constructs to express these techniques.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A S. K. Shrivastava
%A F. Panzieri
%T The Design of a Reliable Remote Procedure Call Mechanism
%J IEEE Transactions on Computers
%V C-31
%N 7
%D July 1982
%P 692-697
%K Atomic actions, data communication, distributed systems,
fault tolerance, local area networks
Special Issue on Reliable and Fault-Tolerant Computing
computer networks distributed processing.
reliable remote procedure call mechanism data transmission
remote call mechanism.
%O 16 Refs.
Treatment PRACTICAL, THEORETICAL/MATHEMATICAL.
%X Describes the design of a reliable remote procedure call mechanism
intended for use in local area networks. Starting from the hardware
level that provides primitive facilities for data transmission, the
authors describe how such a mechanism can be constructed. They
discuss various design issues involved, including the choice of a
message passing system over which the remote call mechanism is to be
constructed and the treatment of various abnormal situations such as
lost messages and node crashes. They also investigate what the
reliability requirements of the remote processor call mechanism
should be with respect to both the application programs using it and
the message passing system on which it itself is based.

%A S. K. Shrivastava
%T On the treatment of orphans in a distributed system
%J Proceedings Third Symposium on Reliability in Distributed Software
and Database Systems
%C Clearwater Beach, FL, USA
%P 155-162
%O 10 REFS. Treatment THEORETICAL/MATHEMATICAL
%I IEEE Comput. Soc. Press, ISBN: 0-8186-0501-4
Silver Spring, MD, USA, p: viii+195
%D 17-19 Oct. 1983
%K graph theory operating systems
unwanted computations orphans interference free executions distributed system
%X Failures in a distributed system (such as node crashes) can give rise
to unwanted computations referred to as orphans. Orphans can
interfere with executions of other programs, thus giving rise to
unpredictable behavior. A graph model of computation is utilized to
discuss the orphan phenomenon in a rigorous manner. In particular,
conditions are derived for interference-free executions of programs
In a distributed system consisting of clients and servers, where
clients interact with servers by making use of remote procedure
calls, various techniques for treating orphans under 'at least once'
and 'exactly once' call semantics are investigated

%A Santosh K. Shrivastava
%T A structured approach to concurrent process synchronization
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 54
%K
%O Languages
%X Summary.

%A B. D. Shriver
%A S. P. Landry
%T An overview of dataflow related research
%R Tech. Rep.
%I Dept. of Computer Science, University of Southwestern Louisiana
%D 1978

%A R. S. Shuford
%T An introduction to fiber optics. II. Connections and networks
%J BYTE (USA)
%V 10
%N 1
%P 197-209
%O 7 REFS., Treatment GENERAL
%D Jan. 1985
%K fibre optics optical communication equipment optical communication
optical links telecommunication networks
connections fiber optics computer communications local area networks
%X Concentrates on the more practical aspects of fiber optics: how
they are connected together and how they are being used in computer
communications, e.g. in local area networks

%A Jon Shultis
%T A Functional Shell
%J Proceedings of the SIGPLAN '83 Symposium on Programming Language Issues
in Software Systems, SIGPLAN NOTICES
%C San Francisco, CA
%V 18
%N 6
%D June 1983
%P 202-211
%K F shell, streams, functional programming

%T Simulation of Multiprocessor Computer Architectures Using ACL
%A Roger Shultz
%I University of Iowa
%R TR-83-11
%D December 1984

%A M. Sidi
%A A. Segall
%T A three-node packet radio network
%J IEEE Trans. Commun. (USA)
%V COM-32
%N 12
%P 1336-1339
%O 6 REFS. Treatment THEORETICAL
%D Dec. 1984
%K radio networks packet switching
steady state function packet radio network buffers radio channel
random access generating function queue length distribution relay node

%T Minimum Storage Sorting Networks
%A Alan R. Siegel
%I IEEE Computer Society
%R ISSN 0018-9340
%D April 1985
%K Data compression, lower bounds, minimum storage digital sorters,
noncompressing sorting network, sorting network, VLSI, VLSI complexity.

%A H. J. Siegel
%T PASM: A Reconfigurable Multimicrocomputer for Image Processing
%B Languages and Architectures for Image Processing
%E M. J. B. Duff
%E S. Levialdi
%I Academic Press
%C New York, NY
%D 1981
%P 257-265

%A Howard J. Siegel
%A S. Diane Smith
%T Study of Multistage SIMD Interconnection Networks
%J Proceedings of 5th Annual Symposium on Computer Architecture
%D 1978
%K Purdue University, recommended
%P 223-229

%A Howard J. Siegel
%A Philip T. Mueller, Jr.
%A Harold E. Smalley, Jr.
%T Control of a Partitionable Multimicroprocessor System
%J Proceedings of the International Conference on Parallel Processing
%I IEEE
%C Bellaire, Michigan
%D August 1978
%P 9-17
%K multiprocessor architecture and operating systems,
General Purpose Architectures
%X Describes a highly flexible architecture which may be dynamically
configured as a multiprocessor or as an array processor.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Howard J. Siegel
%T Interconnection networks for SIMD machines
%J Computer
%V 12
%N 6
%D June 1979
%P 57-65
%K Recommended,
%X A good survey paper on processor memory interconnects.
This paper was reproduced in Kuhn and Padua's (1981)
"Tutorial on Parallel Processing."

%A Howard J. Siegel
%A Leah J. Siegel
%A F. C. Kemmerer
%A P. T. Mueller, Jr.
%A H. E. Smalley, Jr.
%A S. Diane Smith
%T PASM: A Partitionable SIMD/MIMD System for Image Processing and Pattern
Recognition
%J IEEE Transactions on Computers
%V C-30
%N 12
%D December 1981
%P 934-947
%K Recommended, Purdue U
Image processing, memory management, MIMD machines, multimicroprocessor
systems, multiple-SIMD machines, parallel processing, partitionable
computer systems, PASM, reconfigurable computer systems, SIMD machines

%A Howard Jay Siegel
%T Analysis Techniques for SIMD Machine Interconnection Networks and the
Effects of Processors Address Masks
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 106-109
%K
%O processor memory interconnections

%A Howard Jay Siegel
%T Single instruction stream-multiple data stream machine interconnection
network design
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 273-282
%K
%O System architecture and organization

%A Howard Jay Siegel
%T The Universality of Various Types of SIMD Machine Interconnection
Networks
%J Proceedings 4th Annual Symposium on Computer Architecture
%C College Park, MD
%D 1977
%P 70-79

%A Howard Jay Siegel
%T Controlling the Active/Inactive Status of SIMD machine processors
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 183
%K
%O Architecture

%A Howard Jay Siegel
%T Analysis Techniques for SIMD Machine Interconnection Networks
%J IEEE Transactions on Computers
%V C-26
%N 2
%D February 1977
%P 153-161
%K Array processors, computer architectures, ILLIAC IV,
interconnection networks, parallel processing, perfect shuffle,
permutation groups, SIMD machines, special purpose computers
Inter connection networks,
special issue on parallel processors and processing

%A Howard Jay Siegel
%T Partitionable SIMD Computer System Interconnection Network Universality
%J Proc. 16th Annual Allerton Conference on Communication, Control, and
Computing
%I Univ. of Ill.
%C Urbana-Champaign, Ill.
%D October 1978
%P 586-595

%A Howard Jay Siegel
%A Robert J. McMillen
%A P. T. Mueller, Jr.
%T A survey of interconnection methods for reconfigurable parallel processing
systems
%J AFIPS Proc. of the NCC
%V 48
%D 1979
%P 529-542
%K Purdue U, recommended

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T Partitioning Permutation Networks:  The Underlying Theory
%A Howard Jay Siegel
%P 175-184
%O Interconnection Networks

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T Parallel Memory System for a Partitionable SIMD/MIMD Machine
%A Howard Jay Siegel
%A Frederick Kemmerer
%A Mark Washburn
%P 212-221
%O Reconfigurable Systems

%A Howard Jay Siegel
%T A Model for SIMD Machines and a Comparison of Various Interconnection
Networks
%J IEEE Transactions on Computers
%V C-28
%N 12
%D December 1979
%P 907-917
%K Algorithm correctness, array processors, computer architecture, ILLIAC IV,
interconnection networks, n-cube array, parallel processing, perfect shuffle,
permutation networks, SIMD machines, STARAN

%A Howard Jay Siegel
%T An Interconnection Network for Multimicroprocessor Emulator Systems
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 772-
%O Network Design for Distributed Systems

%A Howard Jay Siegel
%T The Theory Underlying the Partitioning of Permutation Networks
%J IEEE Transactions on Computers
%V C-29
%N 9
%D September 1980
%P 791-801
%K Cube network, ILLIAC, interconnection networks,
multiple-SIMD (MSIMD) machines, parallel processing,
partitionable computer systems, permutation networks, PM2I network,
shuffle-exchange network, SIMD machines
%O Special issue on Parallel Processing
%X
Reproduced in the 1984 tutorial: "Interconnection Networks for parallel
and distributed processing" by Wu and Feng.

%A Howard Jay Siegel
%A R. J. McMillen
%T The Cube Network as a Distributed Processing Test Bed Switch
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 377-386
%K
%O Local Area Networks Applications

%A Howard Jay Siegel
%A Robert J. McMillen
%T The multistage cube: a versatile interconnection network
%J Computer
%V 14
%N 12
%D Dec. 1981
%P 12-27

%A Howard Jay Siegel
%A Robert J. McMillen
%T Using the Augmented Data Manipulator Network in PASM
%J Computer
%V 14
%N 2
%D February 1981
%P 25-33

%A Howard Jay Siegel
%A Philip H. Swain
%A Bradley W. Smith
%T Remote Sensing on the PASM and CDC Flexible Processors
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 331-342
%K Purdue U, MIMD, MSIMD, CDC FP
%X One of the few published papers which describes the CDC FP.

%A L. Siegel
%A H. Siegel
%A P. Swain
%T Performance Measurements for Evaluating Algorithms for SIMD Machines
%J IEEE Transactions Software Engineering
%V SE-8
%P 319-331
%D 1982

%A L. J. Siegel
%T Image Processing on a Partitionable SIMD Machine
%B Languages and Architectures for Image Processing
%E M. J. B. Duff
%E S. Levialdi
%I Academic Press
%C New York, NY
%D 1981
%P 293-300

%A Leah J. Siegel
%A Howard Jay Siegel
%A Philip H. Swain
%T Parallel Algorithm Performance Measures
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 241-252
%K SIMD algorithms

%T Parallel Processing Approaches to Image Correlation
%A Leah J. Siegel
%A Howard Jay Siegel
%A Arthur E. Feather
%J IEEE Transactions on Computers
%V C-31
%N 3
%D March 1982 
%P 208-218
%K Algorithms, convolution, image correlation, image processing,
multimicroprocessor systems, parallel processing, parallel programming,
PASM, pattern recognition, SIMD machines
Digital systems

%A Leah Jamieson Siegel
%A Howard Jay Siegel
%A R. J. Safranek
%A M. A. Yoder
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T SIMD Algorithms to perform Linear Predictive Coding for Speech
Processing Applications
%P 193-196
%O Numerical Algorithms and Applications

%A Leah Jamieson Siegel
%A Howard Jay Siegel
%A Arthur E. Feather
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Parallel Image Correlation
%P 190-198
%O Special-Purpose Processors

%A D. Siewiorek
%A M. Canepa
%A S. Clark
%T C.vmp: The Architecture and Implementation of a Fault Tolerant
Multiprocessor
%J Proc. Seventh Ann. Int'l Conf. Fault-Tolerant Computing
%C Los Angeles, California
%D June 1977
%P 37-43
%K multiprocessor architecture and operating systems
%X This multiprocessor uses multiple processing units to improve reliability
without software modification.  The hardware uses bus-level voting on
signals to detect and recover from failures.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A D. Siewiorek
%T State-of-the-Art in Parallel Computing
%E A. Noor
%B Impact of New Computing Systems on Computational Mechanics
%I The American Society of Mechanical Engineers
%D 1983
%P 33-48

%A D. P. Siewiorek
%T Multiprocessors: Reliability, Modelling and Graceful Degradation
%B System Reliability and Integrity, State of the Art Report
%I Infotech Ltd.
%C Maidenhead, England
%K reliability and error recovery
%X Discusses the reliability and fail-soft characteristics of multiprocessor
systems and describes quantitative techniques for evaluating systems along
these dimensions.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A D. P. Siewiorek
%T Introducing PMS
%J Computer
%V 7
%N 12
%D Dec. 1974
%P 42-45

%A D. P. Siewiorek
%A R. Hartenstein
%A R. Zaks
%T Process coordination in multi-microprocessor systems
%J Proc. Workshop on Microarchitecture of Computer Systems
%C Nice, France
%D June 1975
%K theoretical results
%X Discusses the coordination of multiple tasks in a multiprocessing
environment.  Describes different synchronization techniques and their
applicability in a multi-microprocessor environment.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A D. P. Siewiorek
%A M. R. Barbacci
%T Modularity and multiprocessor structures \(em some open problems in the
construction and utilization of mini- and microprocessor networks
%B Distributed Systems, International State of the Art Report
%I Infotech Ltd.
%C Maidenhead, England
%D 1976
%K miscellaneous topics in multiprocessing
%X Presents a taxonomy of the multiprocessor design space and discusses three
multiprocessor designs in this light.  Discusses both hardware and software
issues related to the three designs.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A D. P. Siewiorek
%A K. Vini
%A H. Mashburn
%A S. R. McConenel
%A M. Tsao
%T A case study of C.mmp, Cm*, and C.vmp:
Part I \(em Experiences with fault tolerance in multiprocessor systems
%J Proc. IEEE
%V 66
%N 10
%D October 1978
%P 1178-1199
%K reliability and error recovery
%X Describes the fault tolerance features of three multiprocessors and
presents data on their reliability.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A D. P. Siewiorek
%A V. Kini
%A others
%T A case study of C.mmp, Cm*, and C.vmp:
Part II \(em Predicting and calibrating reliability of multiprocessor systems
%J Proc. IEEE
%V 66
%N 10
%D October 1978
%P 1200-1220
%K reliability and error recovery
%X Presents reliability models for multiprocessor systems and compares
the predictions of these models with observed data on three multi-processor
systems.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A D. P. Siewiorek
%A C. G. Bell
%A A. Newell
%T Computer Structures: Principles and Examples
%I McGraw-Hill
%D 1982

%A Daniel P. Siewiorek
%T A Summary of Fault Tolerant Computing Research
%R CMU-CS-84-123
%I Department of Computer Science, Carnegie-Mellon University
%C Pittsburg, PA 15213
%K C.vmp, Cm*
%X Short statement of what was learned about reliable systems from the
gate and chip level up to higher level systems software.

%A Daniel P. Siewiorek
%A Edward J. McCluskey
%T Switch Complexity in Systems with Hybrid Redundancy
%J IEEE Transactions on Computers
%V C-22
%N 3
%D March 1973
%P 276-282
%K Computer reliability, disagreement detector, hybrid redundancy,
replacement-repair schemes, restoring organs, standby sparing,
switching strategies,
Special issue on fault tolerant computing

%A Daniel P. Siewiorek
%A Edward J. McMcluskey
%T An Iterative Cell Switch Design for Hybrid Redundancy
%J IEEE Transactions on Computers
%V C-22
%N 3
%D March 1973
%P 290-297
%K Disagreement detector, hybrid redundancy, iterative cell array,
propagation delay, retry, standby sparing, voter,
Special issue on fault tolerant computing

%A Daniel P. Siewiorek
%T Reliability Modeling of Compensating Module Failures in Majority Voted
Redundancy
%J IEEE Transactions on Computers
%V C-24
%N 5
%D May 1975
%P 525-533
%K Compensating module failures, fault dominance, fault equivalence,
mission time improvement, triple modular redundancy (TMR),
Special issue on fault-tolerant computing

%A Daniel P. Siewiorek
%T Architecture of Fault-Tolerant Computers
%J Computer
%I IEEE
%V 17
%N 8
%D August 1984
%P 9-18
%K Special issue on fault-tolerant computers

%A V. Sigmund
%T Structure of Parallel Transformation and Execution
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 87-90
%K microprogramming,
structure for parallel and associative processing

%A V. Sigmund
%T Parallel Compiled Interpretation
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 16-25
%K
%O

%T Comments on "Multiprocessor Scheduling with Memory Allocation - A
Deterministic Approach"
%A V. A. Signaevskii
%J IEEE Transactions on Computers
%V C-31
%N 9
%D September 1982
Correspondence

%A Ashok K. Signhania
%A P. Bruce Berra
%T Associative Processor Application to Change Detection
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 247-256
%K STARAN, image processing,
parallel numerical algorithms

%A A. Silberschatz
%A Z. Kedem
%T Consistency in hierarchical database systems
%J JACM
%D Jan. 1980
%V 27
%P 72-80

%A A. Silberschatz
%T A Multi-Version Concurrency Control Scheme with No Rollbacks
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 216-223

%A Jonathan Silverman
%T Communications in a Distributed Computer Testbed
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 108-116
%O Software allocation to distributed hardware

%A Herbert A. Simon
%T Models of Man
%I Wiley
%D 1957

%A Herbert A. Simon
%A Joseph B. Kadane
%T Optimal Problem-Solving Search: All-or-None Solutions
%J Artificial Intelligence
%D 1975
%V 6
%P 235-247

%A Herbert A. Simon
%T The Sciences of the Artificial, 2nd ed.
%I The MIT Press
%C Cambridge, MA
%D 1981

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T Concurrent Diagnosis in Parallel Systems
%A L. Simoncini
%A A. D. Friedman
%P 279-286
%O

%A W. D. Sincoskie
%A D. J. Farber
%T The Series/1 distributed operating system: description and
comments
%J Proceedings of distributed computing. COMPCON 80, Twenty-First
IEEE Computer Society International Conference
%C Washington, DC, USA
%D 23-25 Sept. 1980
%P 579-584
%O 11 REFS. Treatment APPLICATIONS
%I IEEE. New York, USA 1980, xi+746
%K distributed processing computer architecture operating systems
file system local communications network Series/1 operating system

%A W. D. Sincoskie
%A D. J. Farber
%T SODS/OS: a distributed operating system for the IBM Series/1
%Z Dept. of Electrical Engng., Univ. of Delaware, Newark, DE, USA
%J Oper. Syst. Rev. (USA)
%V 14
%N 3
%P 46-54
%D July 1980
%O 10 Refs.
treatment: applic, practical
%K operating systems distributed processing
sods/os distributed operating system ibm series/1 file system
communications network
%X The Series/1 distributed system (sods) project in progress at the
university of delaware is concerned with the design and construction of a
distributed processing environment. The sods project consists of three
major parts: the operating system (sods/os), the file system (sods/fs), and
a local communications network. The authors describe sods/os, the
distributed operating system for the ibm series/1.

%A Pradeep S. Sindhu
%T Distribution and Reliability in a Multiprocessor Operating System
%R CMU-CS-84-125
%I Department of Computer Science, Carnegie-Mellon University
%C Pittsburg, PA 15213
%D April 1984

%A A. Singh
%A Z. Segall
%T Synthetic Workload Generation for Experimentation with Multiprocessors
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 778-785
%K
%O Performance Evaluation of Multiprocessor Systems

%A Shanker Singh
%A Ronald Waxman
%T Multiple Operand Addition and Multiplication
%J IEEE Transactions on Computers
%V C-22
%N 2
%D February 1973
%P 113-120
%K Binary arithmetic, binary multiplier, bit partitioning, multioperand
adder, partial product array, pipelining,
Algorithms

%A Mukesh Singhal
%A A. K. Agrawala
%T Synchronization Techniques in Distributed Database Systems
%I Dept. of Computer Science, University of Maryland
%C College Park, MD
%R TR-1396
%D May 1984

%A M. K. Sinha
%A N. Natarajan
%T A Priority Based Distributed Deadlock Detection Algorithm
%J IEEE-TSE
%V SE-11
%N 1
%P 67-79 
%D January 1985

%A Mukul K. Sinha
%A N. Natarajan
%T A Distributed Deadlock Detection Algorithm Based on Timestamps
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 546-556
%O Distributed control algorithms

%A K. O. Siomalas
%A B. A. Bowen
%T Performance of cross-bar multiprocessors systems
%J IEEE Transactions on Computers
%V C-32
%N 7
%D July 1983
%P 689-695
%K
cost, c/p ration, Markov chains, memory conflict, multiprocessors, performance
bottleneck

%A H. J. Sips
%T A bit-sequential multi-operand inner product processor
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 301-303
%K
%O Special purpose processors

%A Henk J. Sips
%T Bit-Sequential Arithmetic for Parallel Processors
%J IEEE Transactions on Computers
%V C-33
%N 1
%D January 1984
%P 7-20
%K Cost-effectiveness, floating point arithmetic, larges scale integration,
on-line algorithms, parallelism, pipelining,
Computer arithmetic

%A Henk J. Sips
%T Task Distribution on Clustered Parallel- or Multiprocessor Systems
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 126-130
%O Resource allocation

%A Eric Siskind
%T Tentative Design of 1024 Node System
%R Hm32
%I California Institute of Technology
%C Pasadena, CA
%D February 1983
%K Caltech Cosmic Cube, hypercube, C^3P

%A A. Sistla
%A E. Clarke
%A N. Francez
%A Y. Gurevich
%T Can Message Buffers be Characterized in Linear Temporal Logic
%T Language Constructs and Support Systems for Distributed Computing
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 148-156

%A A. P. Sistla
%T Distributed Algorithms for Ensuring Fair Interprocess Communications
%J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing
%I ACM
%D August 1984

%A Aravinda Prasad Sistla
%T Theoretical Issues in the Design and Verification of Distributed
Systems
%R 84-146
%I Department of Computer Science, Carnegie-Mellon University
%C Pittsburg, PA 15213
%D August 1983

%A Richard L. Sites
%T An Analysis of the Cray-1 Computer
%J Proceedings of 5th Annual Symposium on Computer Architecture
%P 101-106
%I IEEE and ACM
%D 1978
%K Language-Oriented Architectures

%A Stephen Skedzielewski
%A Michael Welcome
%A R. Kim Yates
%T SISAL/IF1 User's Guide
%R M-163
%I LLNL
%C Livermore, CA
%D April 1985
%K intermediate language, data flow
%X Collection of Unix man pages.

%A Stephen Skedzielewski
%A Michael Welcome
%T Data Flow Graph Optimization in IF1
%J Proc. Conf. on Functional Languages and Computer Architecture
%r UCRL-92122
%i LLNL
%c Livermore, CA
%C Nancy, France
%d February 1985
%D August 1985
%K intermediate language, data flow

%A Stephen Skedzielewski
%A R. Kim Yates
%T Fibre: An External Format for SISAL and IF1 Data Objects
%R M-154
%I LLNL
%C Livermore, CA
%D January 1985
%K ASCII, intermediate language, data flow

%A D. Skeen
%A M. Stonebraker
%T A formal model of crash recovery in a distributed system
%J IEEE Trans. Software Eng. (USA), Fifth Berkeley Workshop on
Distributed Data Management and Computer Networks
%V SE-9
%N 3
%C Berkeley, CA, USA
%P 219-228
%O 15 REFS
Treatment PRACTICAL
%D 3-5 Feb. 1981
%K protocols system failure and recovery database management systems
distributed processing
transaction management formal model crash recovery distributed system
atomic commit protocols database system site failures independent recovery
messages
%X A formal model for atomic commit protocols for a distributed database
system is introduced. The model is used to prove existence results
about resilient protocols for site failures that do not partition the
network and then for partitioned networks. For site failures, a
pessimistic recovery technique, called independent recovery, is
introduced and the class of failures for which resilient protocols
exist is identified. For partitioned networks, two cases are studied:
the pessimistic case in which messages are lost, and the optimistic
case in which no messages are lost. In all cases, fundamental
limitations on the resiliency of protocols are derived

%T The Performance of Mega-Microprocessor Networks
%A B. B. Skillicorn
%I Dept. of Computing and Information Science, Queen's University
%C Kingston, Canada - Ontario
%R TR-85-166
%D January 1985

%A Jack Sklansky
%A Luigi P. Cordella
%A Stefano Levialdi
%T Parallel Detection of Concavities in Cellular Blobs
%J IEEE Transactions on Computers
%V C-25
%N 2
%D February 1976
%P 187-195
%K Artificial retinas, blobs, cellular mosaics, concavities, convex hull,
digital image processing, minimum-perimeter polygon (MPP),
parallel algorithms, pattern recognition, smoothing of digitized silhouettes,
Pattern recognition

%A R. A. Skoog
%E H. Rudin
%E W. Bux
%T Transient considerations in the performance analysis of ring-based
packet switches.
%J Performance of Computer-Communication Systems. Proceedings of the
IFIP WG 7.3/TC 6 Second International Symposium
%C Zurich, Switzerland
%I North-Holland, Amsterdam, Netherlands, P: xii+527
%P 3-15
%O 9 Refs
%D 21-23 March 1984
Treatment THEORETICAL/MATHEMATICAL.
%K communication networks packet switching.
performance analysis packet switch transient behavior ring
design tradeoffs network.
%X The performance of a ring-based packet switch is determined not only
by its steady-state delay vs. throughput characteristics, but also by
its transient behavior after short duration (on the order of one
second) ring shutdowns caused by ring related failures. This paper
develops a model for a ring-based packet switch, and then develops an
approximation technique to analyze the transient behavior. The
results show that a very simple approximation exists for the mean
delay transient behavior resulting from short duration ring failures,
and they identify the basic design tradeoffs one can make in
establishing the performance of the packet switched network.

%A A. A. Slade
%A H. O. McMahon
%T A Cryotron Catalog Memory System
%J 1956 Eastern Joint Computer Conference
%P 115-120

%A M. R. Sleep
%T Applicative Languages, Dataflow, and Pure Combinatory Code
%J COMPCON Spring 80
%I IEEE
%D February 1980
%P 112-115

%A M. R. Sleep
%A F. W. Burton
%T Towards a Zero Assignment Parallel Processor
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 80-85
%K
%O Architecture

%A D. L. Slotnick
%A W. C. Borck
%A R. C. McReynolds
%T The SOLOMON Computer
%J Proceedings AFIPS Fall Joint Computer Conference
%I AFIPS Press
%V 22
%D December 1962
%P 97-107

%A D. L. Slotnick
%T Unconventional Systems
%J Proceedings AFIPS Spring Joint Computer Conference
%V 31
%D 1967
%P 477-481
%X The `Pro' side of the classic debate with Gene Amdahl on the future
of array and multi processors.  Rather inflammatory introduction.

%A D. L. Slotnick
%T The Fastest Computer
%J Scientific American
%V 224
%N 2
%D February 1971
%P 76-85
%K ILLIAC IV, SIMD, popular press,
%X The title of this paper is a bit dated.  Covers the ILLIAC IV before
delivery.  Includes a discussion on the laser storage facility, PEs,
and programming a heat conduction and weather problem.  No specific
information on languages.  Some coverage on the interconnection and and
PEs.

%A D. L. Slotnick
%A N. B. Coletti
%A E. Gallopoulous
%A S. D. McEwan
%A D. Visek
%T Research in the Application and Design of a Massively Parallel Processor
%R Quarterly Progress Reports 1-11
%D December 1980-present
%I Univ. of Ill.
%K MPP
%X See the more recent reports.

%A D. L. Slotnick
%A N. B. Coletti
%A E. Gallopoulous
%A D. J. Kopetzky
%A D. M. Mancl
%A S. D. McEwan
%T Research in the Application and Design of a Massively Parallel Processor
%R Quarterly Progress Reports 1-12
%D September 1977-August 1980
%I Univ. of Ill.
%K MPP
%X See the older reports.

%A D. L. Slotnick
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Centrally-Controlled Parallel Processors
%P 16-24
%O History of Parallel Processing

%A D. L. Slotnick
%T The Conception and Development of Parallel Processors \(em A Personal
Memoir
%J Annuals of the History of Computing
%V 4
%N 1
%D January 1982
%P 20-30
%K MPP, Massively Parallel Processor

%A S. R. Smirnoff
%T AlaskaNet decodes datacom protocol
%J Teleph. Eng. & Manage. (USA)
%V 88
%N 3
%P 83, 87-8
%O 0 Refs.
Treatment GENERAL OR REVIEW.
%D 1984
%K computer networks data communication systems decoding protocols.
datacom protocol time shared process tapping distant information
computers.
%X Presents AlaskaNet which uses a time-shared process of tapping
distant information, and lets computers 'talk' to each other.

%A J. H. Smit
%T Architecture Descriptions for the Massively Parallel Processor (MPP) and the
Airborne Associative Processor (ASPRO)
%J Proceedings of the Very High Speed Computing Symposium
%D September 1980
%I Georgia Institute of Technology
%C Atlanta, GA

%A A. J. Smith
%T Multiprocessor memory organization and memory interference
%J Communications of the ACM
%V 20
%N 10
%D October 1977
%P 754-761
%K performance
%X Examines the effect of various memory organizations on interference.
Demonstrates that localizing each processor's memory references to one or more
memory modules results in lowered memory interference.  These results are
derived analytically and verified by simulation.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A A. J. Smith
%T Directions for Memory Hierarchies and Their Components: Research and
Development
%J Computer Software and Applications Conference (COMPSAC78)
%I IEEE
%D November 1978
%P 704-709
%O hardware architecture

%A Bradley Warren Smith
%A Howard Jay Siegel
%T Models for Use in the Design of Macro-Pipelined Parallel Processors
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K Special Purpose Parallel Processors, PASM
%C Boston, MA
%P 116-123

%A Burton Smith
%T The Architecture of HEP
%E Janusz S. Kowalik
%B Parallel MIMD Computation: HEP Supercomputer and Its Applications
%I MIT Press
%C Cambridge, MA
%D 1985
%P 41-55
%K Architecture, pipelining, full-empty bit,
%X More of a pitch rather than a technical paper.

%A Burton J. Smith
%T A pipelined, shared resource MIMD computer
%J Proceedings of the International Conference on Parallel Processing
%I IEEE
%C Bellaire, Michigan
%D August 1978
%P 6-8
%K Recommended,
multiprocessor architecture and operating systems, general purpose
architectures
%X One of the first papers on the Denelcor Heterogeneous Element Processor
(HEP) after major design had been completed.
This paper was reproduced in Kuhn and Padua's (1981)
"Tutorial on Parallel Processing."

%A Burton J. Smith
%T Architecture and Applications of the HEP Multiprocessor Computer System
%J Real Time Signal Processing, Proceedings of SPIE
%I Intl. Society of Optical Engineering
%P 241-248
%D 1981

%A C. Smith
%A L. Wittie
%T Discriminating content addressable memories
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 100-101
%K
%O Associative processors

%A C. U. Smith
%A D. D. Loendorf
%T Performance Analysis of Software for an MIMD Computer
%R CS-1982-7
%C Duke Univ.
%K FEM, finite element machine

%A Diane C. P. Smith
%A John Miles Smith
%T Relational Data Base Machines
%J Computer
%I IEEE
%V 12
%N 3
%D March 1979
%P 28-37
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%A Edward T. Smith
%T Debugging Tools for Message-Based, Communicating Processes
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE Comput. Soc. Press,
Silver Spring, MD, USA, p: ix+580
ISBN: 0-8186-0534-0
%D May 1984
%P 303-310
%O 17 REFS
Treatment PRACTICAL
%K distributed processing program debugging
message based communicating systems debugging tools communicating programs
Distributed naming and debugging
%X A description is given of work done on a debugger for message-based
communicating processes. The intention of this work is to reduce the
apparent complexity of large systems of communicating programs by
regarding only the interprocess activities of such programs. The use
of multiple communicating processes as a model of computation allows
for a very clean 'cut' of what information is interesting for
debugging and what is not. The author's approach to debugging is to
provide the user with information about how sets of these processes
behave rather than what each program associated with each process
does

%A J. E. Smith
%T Decoupled Access/Execute Computer Architectures
%J Proceedings of 9th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 10
%N 3
%D April 1982
%P 112-119

%A J. W. Smith
%T Cooperation and competition: An approach to parallel computation
%J Proc. SOUTHEASTCON 1979
%C Roanoke, Virginia
%D April 1979
%K theoretical results
%X Reviews the use of parallelism in computing systems and discusses resource
allocation in parallel systems.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A James E. Smith
%A Andrew R. Pleszkun
%T Implementation of Precise Interrupts in Pipelined Processors
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K Pipelined CPUs, buffering, cache,
%C Boston, MA
%P 36-44

%A Justin R. Smith
%T Parallel algorithms for depth-first searches: I. Planar graphs
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 299-301
%K partitioning, decompositioning,
%O theory

%A K. Smith
%T DAP-Fortran \(em Social Sciences Research Center Research Student Conference
%I Queen Mary's College DAP Support Unit
%D May 1980

%A Kevin Smith, ed.
%T DAP Support Unit Documentation List
%D June 1982
%X This bibliography has a number of errors in it.  Use it with caution and
The Contact is at Queen Mary College, Mile End Road, London, England 4N5,
Phones (01) 980-4811 ext 827 or 825 (w) or (01) 223-3319 (h)
$Revision: 1.2 $ $Date: 84/07/05 16:35:25 $

%A Kevin A. Smith
%T An Image Manipulation Package for the DAP
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 271-275
%D 1984

%A Kirk D. Smith
%A Leah H. Jamieson
%T MIMD Algorithm Analysis: Low Level Algorithm Descriptions
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Distributed Programming, shared memory, private memory models,
concurrency control, semaphores
%P 150-157

%A P. Z. Smith
%A D. R. Fitzwater
%T Syntactic recognition of parallel processes in formally defined complexes
of interacting digital systems
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 132-133
%K
%O Modelling and parallelism detection

%A R. Smith
%A J. Pitts
%T A Vectorization of the Jameson-Caughey NYU Transonic Swept-wing
Computer Program FLO-22-VI for the STAR-100 Computer
%I NASA Langley Research Center
%R TM-78665
%D 1978

%A R. Smith
%A J. Pitts
%T The Solution of the Three-Dimensional Viscous Compressible
Navier-Stokes Equations on a Vector Computer
%J Advances in Computer Methods for Partial Differential Equations-III
%I IMACS
%P 245-252
%D 1979

%A Reid G. Smith
%T The Contract Net Protocol: High-Level Communication and Control in
a Distributed Problem Solver
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 185-192
%O Communications Protocols for Distributed Computing Systems
%X Also see the paper with the same title published in IEEE TOC, v C-29,
#12, December 1980, pp. 1104-1113.

%A Reid G. Smith
%Z Defence Res. Establ. Atlantic, Dartmouth, Nova Scotia, Canada
%T The Contract Net Protocol: High-Level Communication and Control in a
Distributed Problem Solver
%J IEEE Transactions on Computers
%V C-29
%N 12
%P 1104-1113
%D December 1980
%K Artificial intelligence (AI), connection, cooperation,
distributed problem solving, focus, high-level protocols, negotiation,
resource allocation, task-sharing
Special issue on distributed processing systems
protocols distributed processing
contract net protocol high level communication control
distributed problem solver distributed sensing bottlenecks
%O 12 Refs.
treatment: practical
%X The contract net protocol has been developed to specify problem-solving
communication and control for nodes in a distributed problem solver. Task
distribution is affected by a negotiation process, a discussion carried on
between nodes with tasks to be executed and nodes that may be able to
execute those tasks. The author presents the specification of the protocol
and demonstrates its use in the solution of a problem in distributed
sensing. The utility of negotiation as an interaction mechanism is
discussed. It can be used to achieve different goals, such as distributing
control and data to avoid bottlenecks and enabling a finer degree of
control in making resource allocation and focus decisions than is possible
with traditional mechanisms.
Also see the paper with the same title published in 1st Conf. on Dist.
Computing Systems, pp 185-192, October 1979.

%A Reid G. Smith
%A Randall Davis
%T Frameworks for cooperation in distributed problem solving
%J IEEE Transactions on Systems, Man, and Cybernetics
%V SMC-11
%N 1
%P 61-70
%D January 1981

%A Reid G. Smith
%T Correction to 'the contract net protocol: high-level communication and
control in a distributed problem solver'
%Z Defence Res. Establ. Atlantic, Dartmouth, Nova Scotia, Canada
%J IEEE Trans. Comput. (USA)
%V C-30
%N 5
%P 372
%D May 1981
%O treatment: applic, theoretical
%K computer networks protocols
contract net protocol distributed problem solver high level communication

%A Reid Garfield Smith
%T A Framework for Distributed Problem Solving
%I Stanford University
%R PhD thesis

%A Reid Garfield Smith
%T A Framework for Problem Solving in a Distributed Processing Environment
%R STAN-CS-78-800, PhD thesis
%I Computer Science Department, Stanford University
%C Stanford, California
%D December 1978

%A S. Diane Smith
%A Howard Jay Siegel
%T Recirculating, Pipelined, and Multi-stage SIMD Interconnection
Networks
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 206-214
%K SIMD networks, cube network, shuffle-exchange network, plus-minus-2^i
(PM2I) network, recirculating networks, multistage shuffle-no shuffle-exchange
network
%O Interconnection Technology
%X Analyzes SIMD networks: cube, shuffle-exchange, plus-minus-2^i
(PM2I).  Proposed: recirculating networks and an interesting
multistage shuffle-no shuffle-exchange network.

%A S. Diane Smith
%A Howard Jay Siegel
%T An Emulator Network for SIMD Machine Interconnection Networks
%J Proceedings of 6th Annual Symposium on Computer Architecture
%D 1979
%K Purdue University
%P 232-237

%A S. Diane Smith
%A Howard Jay Siegel
%A Robert J. McMillen
%A George B. Adams, III
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Use of the Augmented Data Manipulator Multistage Network for SIMD
Machines
%P 75-78
%O Interconnections

%A T. B. Smith
%A A. L. Hopkins
%T Architectural description of a fault-tolerant multiprocessor
engineering prototype
%J 8th Ann. Int. Conf. on Fault-Tolerant Computing
%C Toulouse, France
%D June 1978
%P 194
%K multiprocessor architectures and operating systems
%X Describes a multiprocessor system for use in avionic systems with a high
reliability characteristics.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A T. Basil Smith, III
%T A Damage- and Fault-Tolerant Input/Output Network
%J IEEE Transactions on Computers
%V C-24
%N 5
%D May 1975
%P 505-516
%K Computer communications, computer networks, computer input and output,
damage tolerance, digital control systems, fault tolerance,
highly reliable systems, system test,
Special issue on fault-tolerant computing

%A Warren Smith
%A Paul Decitre
%T An Evaluation Method for Analysis of the Weighted Voting Algorithm for
Maintaining Replicated Data
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 494-502
%O Distributed synchronization algorithms

%A S. W. Smoliar
%T Using Applicative Techniques to Design Distributed Systems
%J Proceedings: Specifications or Reliable Software
%D April 1979
%P 150-161

%A S. W. Smoliar
%A J. E. Scalf
%T A Framework for Distributed Data Processing Requirements
%J Computer Software and Applications Conference (COMPSAC79)
%I IEEE
%D November 1979
%P 535-541
%O distributed systems

%A S. W. Smoliar
%T Operation Requirements Accommodations in Distributed Systems Design
%J Computer Software and Applications Conference (COMPSAC80)
%I IEEE
%D October 1980
%P 214-219
%O software requirements and specification

%A M. Snir
%T On Parallel Searching
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 242-253

%A Marc Snir
%T Comments on Lens and Hypertrees \(em or the Perfect-Shuffle Again
%R ULTRACOMPUTER NOTE #38
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University

%A Marc Snir
%A Jon Solworth
%T The Ultraswitch \(em A VLSI Network Node for Parallel Processing
%R ULTRACOMPUTER NOTE #39
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University

%A Marc Snir
%A Amnon B. Barak
%T A Direct Approach to the Parallel Evaluation of Rational Expressions
with a Small Number of Processors
%J IEEE Transactions on Computers
%V C-26
%N 10
%D October 1977
%P 933-937
%K Computational complexity, parallel algorithms, polynomial expressions,
rational expressions, recursive doubling,
Analysis of algorithms

%A Marc Snir
%T "NETSIM" Network Simulator for the Ultracomputer
%R ULTRACOMPUTER NOTE #28
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D May 1981

%A Marc Snir
%T Lower Bounds on VLSI Implementations of Communication Networks
%R TR 032, ULTRACOMPUTER NOTE #29
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D May 1981

%A Marc Snir
%T On Parallel Searching
%R TR 045
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D June 1982

%A Richard Snodgrass
%T Monitoring Distributed Systems: A Relational Approach
%R CMU-CS-82-154
%I Carnegie-Mellon University
%C Pittsburgh, PA
%D December 1982

%A L. Snyder
%T Overview of the CHiP Computer
%R CSD-TR-377
%I CS Dept., Purdue Univ.
%C West Layfayette, IN
%D 1981

%A L. Snyder
%T The BLUE CHiP Project: A Summary of Current Activities
%I CS Dept., Purdue Univ.
%C West Layfayette, IN
%D 1982

%A L. Snyder
%A D.B. Gannon
%T Linear Recurrence Algorithms for VLSI: The Configurable, Highly Parallel
Approach -extended abstract-
%I CS Dept., Purdue Univ.
%C West Layfayette, IN
%D 1982

%A L. Snyder
%T The Configurable, Highly Parallel (CHiP) Approach for Signal Processing
Applications
%R CSD-TR-402
%I CS Dept., Purdue Univ.
%C West Layfayette, IN
%D 1982?

%A L. Snyder
%T Programming Processors Interconnection Structures
%R CSD-TR-381
%I CS Dept., Purdue Univ.
%C West Layfayette, IN
%D 1982?

%A Lawrence Snyder
%T Introduction to the Configurable, Highly Parallel [CHiP] computer
%J Computer
%V 15
%N 1
%D Jan. 1982
%P 47-56
%r CSD-TR-351
%d Nov. 1980
%K CS Dept., Purdue Univ.
%X
Reproduced in the 1984 tutorial: "Interconnection Networks for parallel
and distributed processing" by Wu and Feng.
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984, pp. 521-548.

%A Lawrence Snyder
%T Introduction to the Poker Programming Environment
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 289-292
%K
Purdue U, CHiP, Pringle,
expressing parallelism

%A Lawrence Snyder
%T Parallel Programming and the Poker Programming Environment
%J Computer
%I IEEE
%V 17
%N 7
%D July 1984
%P 27-36
%K Hardware-software interface: effect on performance

%T An Inquiry into the Benefits of Multigauge Parallel Computation
%A Lawrence Snyder
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 488-497
%K Aspects of Parallel Systems

%A Wesley E. Snyder
%A Carla D. Savage
%T Content-Addressable Read/Write Memories for Image Analysis
%J IEEE Transactions on Computers
%V C-31
%N 10
%D October 1982
%P 963-968
%K Clustering, content-addressable memory, data structures, graph
algorithms, image analysis, minimum spanning tree, region labeling,
Special issue on computer architecture for pattern analysis and image
database management

%A J. W. Soh
%T Scheduling Strategies for Periodic Jobs in a Multiprocessor Environment
%R PhD Dissertation
%I CS Dept., Northwestern University
%C Evanston, Ill.
%D August 1974

%A Gurindar S. Sohi
%A Edward S. Davidson
%T Performance of the structured memory access (SMA) architecture
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 506-513
%K Gaussian elimination, Eigen, memory access study, memory access processor
(MAP),
%O memory systems

%A Gurindar S. Sohi
%A Edward S. Davidson
%A Janak H. Patel
%T An Efficient LISP-Execution Architecture With A New Representation For
List Structure
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K LISP Machines, Garbage Collection Processor,
%C Boston, MA
%P 91-98

%A P. Soll
%A N. Habra
%A G. Russel
%T Experience with a Vectorized General Circulation Climate Model on
STAR-100
%E D. Kuck
%E D. Lawrie
%E A. Sameh, (Ed.)
%B High Speed Computer and Algorithm Organization
%I Academic Press
%C New York
%D 1977
%P 311-312

%A M. H. Solomon
%A R. A. Finkel
%T The Roscoe Distributed Operating System
%J Proc. 1979 Annual Conference ACM
%I ACM
%P 108-114
%K U of Wisc.
%X See also latter papers on Arachne and Charlotte.  For hardware, see
also Crystal.

%A M. H. Solomon
%A R. A. Finkel
%T The ROSCOE distributed operating system
%Z Univ. of Wisconsin, Madison, WI, USA
%J Proceedings of the 7th symposium on operating systems principles
%P 108-114
%D 10-12 Dec. 1979
%C Pacific Grove,CA, USA
%I ACM, New York, USA
ix+163 pp. isbn 0 89791 009 5
%O 19 Refs.
treatment: practical
%K operating systems computer networks
roscoe distributed operating system university of wisconsin
network microcomputers
%X ROSCOE is an operating system implemented at the university of wisconsin
that allows a network of microcomputers to cooperate to provide a
general-purpose computing facility. After presenting an overview of the
structure of roscoe, this paper reports on experience with roscoe and
presents several problems currently being investigated by the roscoe
project.

%A T. Soma
%A T. Ida
%A N. Inada
%A M. Idesawa
%T The Virtual Plane Concept in Image Processing
%E Morio Onoe
%E Kendall Preston, Jr.
%E Azriel Rosenfeld
%B Real-Time/Parallel Computing: Image Analysis
%I Plenum Press
%C New York, NY
%D 1981
%P 193-202
%X Nothing involving parallelism, a short survey of automata theory in
image processing.

%A Arun K. Somani
%A Vinod K. Agarwal
%T An Efficient VLSI Dictionary Machine
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%D June 1984
%P 142-150
%K tree machine, database issues

%A A. Sommer
%T Ermittlung Einer Optimalen Scheduling-Strategie for Statische Pipelines
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 547-552
%D 1984

%A S. W. Song
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T A Highly Concurrent Tree Machine for Database Applications
%P 259-258
%O Data Base Architecture and Software

%A Norman L. Soong
%T Performance Bounds for a Certain Class of Parallel Processing
%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%P 115
%O Performance Evaluation
%X Summary only.

%A D. Sorensen
%T Buffering for Vector Performance on a Pipelined MIMD Machine
%I Argonne National Laboratory
%R ANL/MCS-TM-29
%D 1984

%A D. Sorensen
%T Analysis of Pairwise Pivoting in Gaussian Elimination
%I Argonne National Laboratory
%R ANL/MCS-TM-76
%D 1984
%X Remove?

%T Analysis of Pairwise Pivoting in Gaussian Elimination
%A Danny C. Sorensen
%I IEEE Computer Society
%R
%D March 1985
%K Error analysis, linear equations, parallel computation, systolic array.

%A J. Soubiron
%T Multiple-microprocessor systems in attitude and orbit control systems
%J Proc. 1st Int. Conf. on Attitude and Orbit Control Systems
%C Noordwijk, Netherlands
%D October 1977
%K multiprocessor applications
%X Examines the use of multi-microprocessor systems to signal and data
processing in space applications, whose reliability is crucial.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A J. South
%A J. Keller
%A M. Hafez
%T Vector Processor Algorithms for Transonic Flow Calculations
%J AIAA Journal
%V 18
%P 786-792
%D 1980

%A J. South
%A J. Keller
%A M. Hafez
%T Computational Transonics on a Vector Computer
%J U. S. Army Numerical Analysis and Computers Conference
%R ARO Rep. No. 80-3
%D August 1980
%P 357-368

%A R. L. South
%A R. J. Purdy
%T A Distributed Processor Architecture for BMD Signal and Data Processing
Application
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 490-506
%O Applications of distributed computing to radar systems

%A R. J. Souza
%A E. E. Balkovich
%T Impact of Hardware Interconnection Structures on the Performance of
Decentralized Software
%J Proceedings of 8th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 9
%N 3
%D May 1981
%P 357-366
%O interconnection

%A R. J. Souza
%A E. E. Balkovich
%T Validation of a performance model for a decentralized computer system
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 699-704
%K
%O Performance Evaluation of Distributed Computer Systems

%A R. Sovis
%T Uniform Theory of the Shuffle-Exchange Type Permutation Networks
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 11
%N 3
%D 1983
%P 185-193
%O Interconnection Networks

%T A Data Flow Computer Architecture with Program and Token Memories
%A Masahiro Sowa
%A Tadao Murata
%J IEEE Transactions on Computers
%V C-31
%N 9
%D September 1982
%P 820-824
%K Data flow computer, multiprocessor architecture, multiport register
(token) memory, parallel processing, program memory
Computer architecture

%A S. Sowrirajan
%A S. M. Reddy
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Fault Diagnosis and Design of Fault-Tolerant Concentrators
%P 243-244
%O Interconnection Networks

%A S. Spaccapietra
%A B. Demo
%A C. Parent
%T SCOOP: a system for integrating existing heterogeneous distributed
data bases and application programs
%B Proceedings of IEEE INFOCOM 83
%C San Diego, CA, USA
%P 608-616
%O 28 REFS
Treatment APPLICATIONS, THEORETICAL/MATHEMATICAL
%I IEEE, New York, USA, p: xvii+618 ISBN: 0-8186-0006-3
%D 18-21 April 1983
%K database management systems supervisory and executive programs
distributed processing
heterogeneous distributed data bases application programs SCOOP project
%X The SCOOP project aims to integrate existing heterogeneous data bases
into a distributed data base, while keeping the existing application
programs alive. This paper discusses the motivations for the project
and presents the general architecture of the system as well as an
insight into the major problems and the solutions adopted in the
design of SCOOP modules

%A O. Spaniol
%T Analysis and Performance Evaluation of HYPERchannel Access Protocols
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 247-255
%K
%O Performance Analysis

%A Arthur E. Speckhard
%A Thomas C. Wood
%A Joseph Thames
%T The Aerospace Research Computer (ARC)
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 2.29-2.36
%O Architecture dependent computation
%K FOCAL [FORTRAN Calculus],

%A Alfred Z. Spector
%T Multiprocessing Architectures for Local Computer Networks
%R PhD thesis
%I Computer Science Dept.
%C Stanford, University
%D 1981

%A Alfred Z. Spector
%T Performing Remote Operations Efficiently on a Local Computer Network
(Summary)
%J Proceedings of the 8th Symposium on Operating Systems Principles,
Operating Systems Review
%V 15
%N 5
%D December 1981
%P 76-77
%C Pacific Grove, CA, USA
%O 0 Refs
Treatment PRACTICAL.
%K computer networks operating systems distributed processing.
OS remote operations local computer network communication
high speed local network distributed programs interprocessor communication
remote procedure calls monitor calls message passing primitives
communication model remote reference/remote operation model
taxonomy Xerox Alto computers 3 megabit Ethernet.
computer-computer communications
%X Summary form only given. Discusses communication among computers
connected by a very high speed local network and focuses on ways to
support distributed programs that require efficient interprocessor
communication. It is motivated by the availability of increasingly
high speed local networks and inefficiencies in existing
communication subsystems. Mechanisms such as remote procedure calls,
monitor calls, and message passing primitives are bases for
interprocessor communication at high levels (i.e. within a
programming language). At lower levels, interprocessor communication
occurs via the transmission of data over some communication medium.
On a local network, this basic communication mechanism is the
transmission of packets. The author presents a communication model
called the remote reference/remote operation model in which a
taxonomy of communication primitives is defined. He illustrates the
model by describing an implementation of simple communication
primitives on Xerox Alto computers interconnected with a 3 megabit
Ethernet.

%T Support for Distributed Transactions in the TABS Prototype
%A Alfred Z. Spector
%A Jacob Butcher
%A Dean S. Daniels
%A Daniel J. Duchamp
%A Jeffrey L. Eppinger
%A Charles E. Fineman
%A Abdelsalam Heddaya
%A Peter M. Schwarz
%J IEEE Transactions on Software Engineering
%V SE-11
%N 6
%I IEEE Computer Society
%D June 1985
%O Special Issue on Reliability in Distributed Software and Database
Systems
%P 520-530
%K Availability, distributed databases, distributed systems, operating
systems organization, reliability, transaction-based systems, virtual
memory

%A B. Speelpenning
%A J. Nievergelt
%T A Simple Model of Processor - Resource Utilization in Networks of
Communicating Modules
%J IEEE Transactions on Computers
%V C-28
%N 12
%D December 1979
%P 927-929
%K Interleaved memories, interaction model, performance analysis,
resource utilization, shared resources,
Correspondence

%A David A. Spencer
%T Limitations on the Use of Distributed Environment Simulation as a Means
of System Testing
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 593-600
%O Distributed data bases applications and techniques

%A Jason L. Speyer
%T On Decentralized Information and Data Processing Considerations for
Stochastic Real Time Control Algorithms
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 579-585
%O decentralized control

%A M. J. Spier
%A R. L. Hill
%A T. J. Stein
%A D. Bricklin
%T The Typeset-10 message exchange facility \*- a case study in systemic
design
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 167-186
%K
%O System control

%A Michael J. Spier
%T Process communication pre-requisites of the IPC-setup revisited
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 79-88
%K
%O Software design

%A Michael J. Spier
%T The experimental implementation of a comprehensive inter-module
communication facility
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 89
%K
%O Software design
%X Summary.

%A J. Spragins
%A T. Lewis
%A H. Jafari
%T Some Simplified Performance Modeling Techniques with Applications to a
New Ring-Structured Microcomputer Network
%J Proceedings of 6th Annual Symposium on Computer Architecture
%D 1979
%K Oregon State University, National University of Iran
%P 111-116

%A Joseph F. Springer
%T The Architecture and Operation of a Multiple Microcomputer ESM Signal
Processing System
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 234-242
%O Special applications

%A R. F. Sproull
%A D. Cohen
%T High-level protocols
%Z Computer Sci. Dept., Carnegie-Mellon Univ., Pittsburgh, PA, USA
%J Proc. IEEE (USA)
%V 66
%N 11
%P 1371-1386
%D Nov. 1978
%O 40 Refs.
treatment: general,review
%K computer networks
high level languages distributed systems structure control
programming languages application processes high level protocols
%X Discusses high-level protocols (hlps) which are the high level languages
of distributed systems. In a resource-sharing network, hlps link processes
working on a common application. Describes some examples of hlps (arpa
network voice and graphics protocols), and argues that modern techniques
for expressing structure and control in programming languages should be
applied to analogous problems in communication among application processes
in a network.

%A Robert F. Sproull
%A Ivan E. Sutherland
%A A. Thompson
%A S. Gupta
%A C. Minter
%T The 8 by 8 Display
%J ACM Transactions on Graphics
%V 2
%N 1
%D Jan. 1983
%P 32-56

%A J. S. Squire
%A S. M. Paleis
%T Programming and Design Considerations of a Highly Parallel Computer
%J Proceedings AFIPS Spring Joint Computer Conference
%D 1963
%P 395-400

%A V. P. Srini
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Framework for Communication in Loosely coupled Multiple Processor
Systems
%P 49-52
%O Architecture

%A V. P. Srini
%T An Architecture for Extended Abstract Data Flow
%J Proceedings of 8th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 9
%N 3
%D May 1981
%P 303-325
%O data flow machines

%A Vason P. Srini
%T Iterative Realization of Multivalued Logic Systems
%J IEEE Transactions on Computers
%V C-28
%N 4
%D April 1979
%P 306-310
%K Cell, cellular array, fault detection, +gate, .gate, U gates,
general fault, multiple faults, multivalued logic,
Correspondence

%A Vason P. Srini
%A Jorge F. Asenjo
%T Analysis of CRAY-1S Architecture
%J Proceedings of the National ACM
%I ACM
%P 194-206
%D 1983
%X Looks at the flow of data in the CRAY-1.  Also includes an
empirical study (4 experiments) to look at this flow.
See also, Proc. 10th Symp. on Computer Architecture, SIGARCH Newsletter,
v11, #3, 1983, pp. 194-206.

%A Vason P. Srini
%A Jorge F. Asenjo
%T Analysis of Cray-1S Architecture
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 11
%N 3
%D 1983
%P 194-206
%O Performance Evaluation of Scientific Computers
%X See also, 1983 Proc. of the National ACM Meeting, pp. 194-206.

%A Vason P. Srini
%T Node Reassignments in a Dataflow Machine
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 15-27
%O Data flow systems

%A Vason P. Srini
%T A Message-Based Processor for a Dataflow System
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 1.10-1.19
%X Uses AMD 2900s.
%O Data flow machines

%A Vason P. Srini
%T A Fault-Tolerant Dataflow System
%J Computer
%I IEEE
%V 18
%N 3
%D March 1985
%P 54-68

%A Mandayam A. Srinivas
%T Optimal Parallel Scheduling of Gaussian Elimination DAG's
%J IEEE Transactions on Computers
%V C-32
%N 12
%D December 1983
%P 1109-1117
%K Dense matrices, directed acyclic graphs, Gaussian elimination,
linear systems, parallel computation, scheduling.

%A R. J. Srodawa
%T Positive experiences with a multiprocessing system
%J Computing Surveys
%V 10
%N 1
%D March 1978
%P 73-82
%K miscellaneous topics in multiprocessing
%X Examines the experience gained from using multiprocessing in the Michigan
Terminal System.  Based on this experience, evaluates the options available
to the designer of a multiprocessing system.  This paper is one of the few
pieces of widely circulated literature describing actual multiprocessor
experience rather than a system design or modeling.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A E. P. Stabler
%T Mixed mode arithmetic for STARAN
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 228-229
%K
%O RADCAP - the RADC associative processor

%A Edward P. Stabler
%T Formal transformations for parallel processing logic
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 47-53
%K
%O Languages

%A William Stallings
%T Local Networks
%J Computing Surveys
%I ACM
%V 16
%N 1
%D March 1984
%P 3-41
%K B.4.1 [Input/output and Data communications]:
Data Communications Devices - receivers; transmitters;
B.4.3 [Input/Output and data communications]:
interconnections (subsystems);
C.2.5 [Computer-communications networks]: local networks,
Design, Performance, Standardization
local area networks microcomputer applications protocols standards
microcomputers local network technology IEEE 802 standards topology
transmission medium medium access control protocol twisted pair baseband
broadband coaxial cable optical fiber bus tree
ring CSMA/CD token bus token ring
register insertion slotted ring
%O 67 REFS
Treatment BIBLIOGRAPHY/LITERATURE SURVEY, PRACTICAL
%X The rapidly evolving field of local network technology has produced a
steady stream of local network products in recent years. The IEEE 802
standards that are now taking shape, because of their complexity do
little to narrow the range of alternative technical approaches and at
the same time encourage more vendors into the field. The purpose of
this paper is to present a systematic, organized overview of the
alternative architectures for and design approaches to local
networks. The key elements that determine the cost and performance of
a local network are its topology, transmission medium, and medium
access control protocol. Transmission media include twisted pair,
baseband and broadband coaxial cable, and optical fiber. Topologies
include bus, tree, and ring. Medium access control protocols include
CSMA/CD, token bus, token ring, register insertion, and slotted ring
Each of these areas is examined in detail, comparisons are drawn
between competing technologies, and the current status of standards
is reported

%A Charalambos D. Stamopoulos
%T Parallel Image Processing
%J IEEE Transactions on Computers
%V C-24
%N 4
%D April 1975
%P 424-433
%K Artificial intelligence (AI), cellular logic, cybernetics,
image processing, optical computing, parallel digital computing,
parallel processing, pattern recognition,
Special issue on optical computing

%A P. Stanat
%A J. Nolan
%T Performance Comparisons for Reservoir Simulation Problems on Three
Supercomputers
%J 6th SPE Symposium Reservoir Simulation
%D 1982
%X Also in Control Data Corp.

%A Edward C. Stanke, II
%T Automatic Track initiation using the RADCAP STARAN
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 187-188
%K
%O STARAN and related topics
%X Summary only.

%A J. A. Stankovic
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T A Comprehensive Framework for Evaluating Decentralized Control
%P 181-187
%O Distributed Processing

%A J. A. Stankovic
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T The Analysis of a Decentralized Control Algorithm for Job Scheduling
Utilizing
%P 333-340
%O Scheduling

%A John A. Stankovic
%A Andries van Dam
%T Issues in Distributed Processing - An Overview of Two Workshops
%J IEEE Computer
%D January 1978
%V 11
%N 1
%P 22-26

%T The Analysis of a Decentralized Control Algorithm for
Job Scheduling Utilizing Bayesian Decision Theory
%A John A. Stankovic
%J submitted to CACM
%D 1980

%A John A. Stankovic
%A Inderjit S. Sidhu
%T An Adaptive Bidding Algorithm for Processes, Clusters, and Distributed
Groups
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 49-59
%O Distributed task scheduling

%A Henry Stark
%T An Optical-Digital Computer for Parallel Processing of Images
%J IEEE Transactions on Computers
%V C-24
%N 4
%D April 1975
%P 340-347
%K Digital image processing, image processing, optical data processing,
parallel processing, pattern recognition,
Special issue on optical computing

%A R. Steeb
%A S. Camaratta
%A F.A. Hayes-Roth
%A P.W. Thorndyke
%A R.B. Wesson
%T Distributed Intelligence for Air Fleet Control
%I Rand Corporation
%D October 1981
%R R-2728-ARPA

%A Craig S. Steele
%T Placement of Communicating Processes on Multiprocessor Networks
%R 5184:TR:85
%I CS Dept, Caltech
%C Pasadena, CA
%D April 1985
%K Graphical, interconnection, mapping, partitioning,
%X MS Thesis.

%A G. L. Steele
%T Multiprocessing compactifying garbage collection
%J Comm. ACM
%V 18
%N 9
%D September 1975
%P 495-508
%K multiprocessor applications
%X Presents algorithms for concurrently doing useful computation and
garbage collection in a list-processing environment, such as Lisp.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A M. E. Steenstrup
%A D. T. Lawson
%A C. Weems
%T Determination of the rotational and translational components of a flow
field using a content addressable parallel processor
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 492-495
%K
SIMD, U Mass, Content Addressable Parallel Processor (CAPP), 512x512
associative processing/distributed systems

%T A Suggestion for a High-Speed Parallel Binary Divider
%A Renato Stefanelli
%J IEEE Transactions on Computers
%V C-21
%N 1
%D January 1972
%P 42-55
%K Binary divider, binary redundant code, carry propagation,
cellular array, combinatorial network, high-speed dividers, parallel adders,
parallel counters, parallel dividers, parallel subtractors,
Logic design

%A M. Steinacker
%A D. Hennings
%A S. Schindler
%T Scheduling two-processor systems
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 31-
%K
%O

%A David Steinberg
%A Michael Rodeh
%T A Layout for the Shuffle-Exchange Network with O(N^2/log^(3/2)N) Area
%J IEEE Transactions on Computers
%V C-30
%N 12
%D December 1981
%P 978-982
%K Bisection, layout, permutation network, shuffle-exchange
%O correspondence
%X
Reproduced in the 1984 tutorial: \fI Interconnection Networks for parallel
and distributed processing\fP by Wu and Feng.

%T An Architecture for a Video Rate Fuzzy Golay Processor
%A R. H. Steinvorth
%A G. F. Taylor
%A J. F. McDonald
%A T. Hunter
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 576-582
%K Parallel Systems

%A W. H. Stellhorn
%T A Specialized Computer for Information Retrieval
%R PhD thesis, Report 74-637
%I Computer Science Dept., University of Illinois
%C Urbana-Champaign
%D 1974

%A William H. Stellhorn
%T An Inverted File Processor for Information Retrieval
%J IEEE Transactions on Computers
%V C-26
%N 12
%D December 1977
%P 1258-1267
%K Computer systems, information retrieval, inverted files, merging,
parallel processing,
Inverted file retrieval system

%A F. Stepczyk
%T A Case Study in Real-Time Distributed Processing Design
%J Computer Software and Applications Conference (COMPSAC78)
%I IEEE
%D November 1978
%P 514-519
%O distributed system software

%A Stephen L. Stepoway
%A David L. Wells
%A Gerald R. Kane
%T An architecture for efficient generation of fractal surfaces
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 261-268
%K
images and speech

%T A Multiprocessor Architecture for Generating Fractal Surfaces
%A Stephen L. Stepoway
%A David L. Wells
%A Gerald R. Kane
%J IEEE Transactions on Computers
%V C-33
%N 11
%D November 1984
%P 1041-1045
%K Architecture, computer graphics, fractal surfaces, parallel processing,
VLSI,
Correspondence

%A T. L. Sterling
%T Overview of Simultaneous Pascal
%I MIT, Cambridge, MA 02139

%A T. L. Sterling
%T PCF Specification Guide, version 1.2
%I MIT, Cambridge, MA 02139

%A M. Stern
%T The DELTA 2 \(em A Distributed computer
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 136-145
%K
%O Bus Oriented Multiprocessor systems

%A S. R. Sternberg
%T Parallel Architectures for Image Processing
%E Morio Onoe
%E Kendall Preston, Jr.
%E Azriel Rosenfeld
%B Real-Time/Parallel Computing: Image Analysis
%I Plenum Press
%C New York, NY
%D 1981
%P 347-359
%X Survey of image processing with an emphasis on pipelines.  A somewhat
disappointing paper.

%A Stanley R. Sternberg
%T Pipeline Architectures for Image Processing
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 291-305
%K ERIM, Cytocomputer

%A K. Stevens
%T Numerical Aerodynamics Simulation Facility Project
%E C. Jesshope
%E R. Hockney
%B Infotech State of the Art Report: Supercomputers
%I Maidenhead: Infotech Int. Ltd.
%V 2
%D 1979
%P 331-342

%A K. G. Stevens, Jr.
%T CFD \(em A FORTRAN-like Language for the ILLIAC IV
%J SIGPLAN Notices
%V 10
%P 72-76
%D 1975

%A David K. Stevenson
%T Programming the ILLIAC IV
%I CMU (Available from NTIS)
%R (NTIS AD-A020 051
%D November 1975

%A Hulmut G. Stiegler
%T A Unified Interface for Process Communication
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 419-429
%O implementation schemes for interprocess communication systems

%A R. Stokes
%A R. Cantarella
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T The History of Parallel Processing at Burroughs
%P 25-32
%O History of Parallel Processing

%A Richard A. Stokes
%T Burroughs Scientific Processor
%B High Speed Computer and Algorithm Organization
%I Academic Press
%D 1977
%P 85-89
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%A Salvatore J. Stolfo
%A Daniel P. Miranker
%T DADO: A parallel processor for expert systems
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 74-82
%K tree machine, AI, production systems, PPL/M, Prolog, SIMD
%O artificial intelligence
%X A fine-grained parallel processor to be built in several prototype
stages.  DADO will use about 1K processing elements.  The paper covers
a little about the programming.

%A H. Stone
%T Parallel Tridiagonal Equation Solvers
%J ACM Transactions on Mathematical Software
%V 1
%P 289-307
%D 1975

%A H. S. Stone
%T Sorting on STAR
%I IEEE
%J Trans. on Software Eng.
%V SE-4
%N 2

%A H. S. Stone
%T Associative Processing for General Purpose Computers Through the Use of
Modified Memories
%J Proceedings AFIPS Fall Joint Computer Conference
%D 1968
%P 949-955

%A H. S. Stone
%T Problems of Parallel Computation
%E J. F. Traub
%B Complexity of Sequential and Parallel Numerical Algorithms
%P 1-16
%I Academic Press, Inc.
%D 1973

%A H. S. Stone
%T An Efficient Parallel Algorithm for the Solution of a Tridiagonal Linear
System of Equations
%J Journal of the ACM
%V 20
%N 1
%D January 1973
%P 27-38

%A H. S. Stone
%T Introduction to Computer Architecture
%J SRA
%D 1975

%A Harold S. Stone
%T A Pipeline Push-Down Stack Computer
%E L. C. Hobbs
%E D. J. Theis
%E Joel Trimble
%E Harold Titus
%E Ivar Highberg
%B Parallel Processor Systems, Technologies and Applications
%I Spartan Books
%C New York, New York
%D 1970
%P 235-249
%K Architecture
System and machine organization

%A Harold S. Stone
%T The Organization of High-Speed Memory for Parallel Block Transfer of
Data
%J IEEE Transactions On Computers
%V C-19
%N 1
%D January 1970
%P 47-53
%K (d, k) graphs, ILLIAC IV, interlaced memories, modular memories,
parallel data transfer, star polygons
Logical Design

%A Harold S. Stone
%T Parallel Processing with the Perfect Shuffle
%J IEEE Transactions on Computers
%V C-20
%N 2
%D February 1971
%P 153-161
%K Data paths, fast Fourier Transform, interconnection patterns,
matrix transposition, parallel sorting, perfect shuffle,
polynomial evaluation, sorting,
Hardware and systems
%X
Reproduced in the 1984 tutorial: \fIInterconnection Networks for parallel
and distributed processing\fP by Wu and Feng.

%A Harold S. Stone
%T Dynamic Memories with Fast Random and Sequential Access
%J IEEE Transactions on Computers
%V C-24
%N 12
%D December 1975
%P 1167-1174
%K Bubble memories, dynamic memories, memories, perfect shuffle,
shift-register memories,
Memory systems

%A Harold S. Stone
%T Multiprocessor Scheduling with the Aid of Network Flow Algorithms
%J IEEE Transactions on Software Engineering
%V SE-3
%N 1
%D January 1977
%P 85-93
%K scheduling
%X These scheduling algorithms, based on the Ford-Fulerson network flow
algorithm, minimize interprocessor communication in a multiprocessor
system.  The two-processor case is treated in detail, and partial results are
presented for the general case.
Text reproduced with the permission of Prentice-Hall \(co 1980.
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%A Harold S. Stone
%T Multiprocessor Scheduling with the Aid of Network Flow Algorithms
%J IEEE Transactions on Software Engineering
%D January 1977
%V SE-3
%N 1
%P 85-93

%A Harold S. Stone
%T Sorting on STAR
%J IEEE Transactions on Software Engineering
%V SE-4
%N 2
%D March 1978
%P 138-146
%K Batcher sort, CDC STAR, parallel computation, pipeline computers,
Quicksort, sorting
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%A Harold S. Stone
%T Critical Load Factors in Two-Processor Distributed Systems
%J IEEE Transactions on Software Engineering
%D May 1978
%V SE-4
%N 3
%P 254-258

%A Harold S. Stone
%T Database Applications of the Fetch-And-Add Instruction
%J IEEE Transactions on Computers
%V C-33
%N 7
%D July 1984
%P 604-612
%K Concurrency control, database computers, fetch-and-add, locking,
parallel computers, ultracomputer,
database systems
%X A good description of the Fetch-and-And instruction.  Note: the paper
does not include any description of implementation on an omega net, but
is more based on the terminology of databases.

%A Harold S. Stone
%T Computer Research in Japan
%J Computer
%V 17
%N 3
%D Mary 1984
%P 26-32
%K Data flow, supercomputers, survey trip report
%X Not specifically on multiprocessors or super computers, but does cover
contacts of data flow and other research in Japan since few Americans
speak the language.  Any exposure is helpful.

%A Michael Stonebraker
%T MUFFIN: A Distributed Data Base Machine
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 459-469
%O data base computers

%A O. O. Storaasli
%A S. W. Peebles
%A T. Crockett
%A J. Knott
%A L. Adams
%T The Finite Element Machine [FEM]: An Experiment in Parallel Processing
%J Proc. of Conf.Research in Structures and Solid Mechanics
%I NASA Langley Research Center
%R NASA Conf. Pub. 2245
%C Washington D.C.
%D Oct. 1982
%P 201-217

%A W. Storz
%T Process model and resource management in a distributed database
%J Inf. Syst. (GB)
%V 7
%N 3
%P 229-236
%O 18 REFS
Treatment PRACTICAL
%D 1982
%K database management systems distributed processing
process model DBMS resource management distributed database
deadlock free resource management database access transactions write operations
%X A deadlock-free resource management for a homogeneous distributed
database system is proposed. Consistent database access is guaranteed
in sections called transactions. Transactions consist of several
processes of hierarchical structure. Transactions with read-and
write-operations use a two-phase locking. The read-resources are
locked as they are needed. The write-operations are buffered and
executed at the end of a transaction. At this point the write-resources
can be locked in a given order. Transactions which only
read the database, do not lock the resources. It is only checked if
these transactions can be serialized. Conflicts are resolved by
resetting of transactions. No expensive recovery is needed. No
physical controlling centre is used

%A Paul David Stotts, Jr.
%T A comparative survey of concurrent programming languages
%J SIGPLAN Notices
%V 17
%N 9
%D September 1982
%P 76-87

%A Bjarne Stoustrup
%T An Inter-Module Communication System for a Distributed Computer
System
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 412-418
%O implementation schemes for interprocess communication systems

%A Quentin F. Stout
%T Sorting, merging, selecting, and filtering on tree and pyramid machines
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 214-221
%K
non-numerical algorithms

%A Quentin F. Stout
%T Mesh-connected computers with broadcasting
%J IEEE Transactions on Computers
%V C-32
%N 9
%D September 1983
%P 826-830
%K
broadcasting, mesh-connected computer, parallel computing, selection,
semigroup computations, sorting

%T Tree-Based Graph Algorithms for Some Parallel Computers
%A Quentin F. Stout
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 727-730
%K Problem Mapping Techniques

%A W. D. Strecker
%T Analysis of the Instruction Execution Rate in Certain Computer Structures
%R PhD thesis
%I Carnegie-Mellon University
%C Pittsburgh, PA
%D 1970

%A J. Strelchun
%T Array Processor Responds in Real Time
%J Electronics
%V 52
%N 17
%D August 16, 1979
%P 118-124

%A J. C. Strikwerda
%T Multi-grid solvers on parallel computers
%r ICASE Report No. 80-27
%d October 20, 1980
%E G. Rodrigue
%B Parallel Computation
%V 1
%I Academic Press
%D 1982
%P 251-267

%A John C. Strikwerda
%T A Time-Split Difference Scheme for the Compressible Navier-Stokes Equations
with Applications to Flow in Slotted Nozzles
%E Garry Rodrigue
%B Parallel Computations
%I Academic Press
%D 1982
%P 251-267

%A L. Stringa
%T EMMA: An Industrial Experience on Large Multiprocessing Architectures
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%D 1983
%V 11
%N 3
%P 326-333
%O multicomputers and multiprocessors

%A J. Stringer
%T Efficiency of D4 Gaussian Elimination on A Vector Computer
%J Science, Engineering and The CRAY-1, Proceedings of a Cray Research
Inc. Symposium
%I Cray Research
%D 1982
%P 115-121

%A N. C. Strole
%A P. N. Marinos
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Modeling of Shared-Resource Systems Using the Central-Server
Queueing Model
%P 325-328
%O Performance Evaluation

%A N. C. Strole
%T A local communications network based on interconnected token-access
rings: a tutorial
%J IBM J. Res. & Dev. (USA)
%V 27
%N 5
%P 481-96
%O 35 Refs.
%D 1983
%K computer networks fault location.
network architecture fault isolation local communications network
interconnected token access rings
tutorial local area network LAN high speed data transfer
group of nodes extendible star/ring wiring topology token access control
requirements small networks large networks physical components
operation fault detection network expansion IBM's systems network architecture
SNA.
%X The primary objective of a local area network (LAN) is to provide
high-speed data transfer among a group of nodes consisting of
data-processing terminals, controllers, or computers within the confines
of a building or campus environment. The network should be easily
accessible, extremely reliable, and extendible in both function and
physical size. The star/ring wiring topology with token-access
control has emerged as a technology that can meet all of these
objectives. The requirements of small networks with just a few nodes,
as well as those of very large networks with thousands of nodes, can
be achieved through this one architecture. The paper describes the
fundamental aspects of the architecture, physical components, and
operation of a token-ring LAN. Particular emphasis is placed on the
fault detection and isolation capabilities that are possible, as well
as the aspects that allow for network expansion and growth. The role
of the LAN relative to IBM's systems network architecture (SNA) is
also discussed.

%A N. C. Strole
%A D. W. Andrews
%C New York, USA
%T Design and architecture of a token-ring local area network
%J Local Networks. Distributed Office and Factory Systems.
Proceedings of Localnet '83
%D 27-29 June 1983
%I Online Publications, Pinner, England
%P 171-187
%O 15 REFS
%K computer networks data communication systems
design architecture token ring local area network token access control
fault detection isolation capabilities

%A Robert E. Strom
%A Shaula Yemini
%T NIL: An Integrated Language and System for Distributed Programming
%J Proceedings of the SIGPLAN '83 Symposium on Programming Language Issues
in Software Systems, SIGPLAN NOTICES
%C San Francisco, CA
%V 18
%N 6
%D June 1983
%P 73-82
%K IBM, interprocess communication (IPC), security,

%T Synthesizing Distributed and Parallel Programs through Optimistic
Transformation
%A Rob Stron
%A Shaula Yemini
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 632-642
%K Expressing Parallelism

%A J. P. Strong
%A D. H. Schaefer
%A J. R. Fischer
%A K. R. Wallgren
%A P. A. Bracken
%T The Massively Parallel Processor and Its Applications
%J 13th International Symposium on Remote Sensing of the Environment
%D April 1979
%I ERIM
%C Ann Arbor, MI
%K MPP

%A J. P. Strong
%A P. D. Argentinero
%T A Geophysical Application of the Massively Parallel Processor
%I NASA/GSFC
%R X-934-82-25
%D October 1982
%K MPP

%A James P. Strong
%T Basic Image Processing Algorithms on the Massively Parallel Processor
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 47-85
%K MPP

%A Ray Strong
%T Problems in Fault Tolerant Distributed Systems
%I IBM Research Laboratory
%C San Jose, CA
%R RJ 4519 (48527)
%D November 28, 1984

%A E. F. Strovink
%T Compilation strategies for multiprocessor message-passing systems
%J Proc. 7th Texas Conf. on Computing Systems
%C Houston, Texas
%D November 1978
%P 7-15 to 7-20
%K theoretical results
%X Describes the syntax and implementation of a language for the MuNet
multi-processor.  An important design goal of this language is the easy
expression of parallelism.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A F. W. Stubblefield
%T Logical and Physical Resource Management in the Common Node of
a Distributed Function Laboratory Computer Network
%J IEEE Transactions on Nuclear Science
%D February 1976
%V NS-23
%N 1
%P 406-412

%A B. Stuck
%T Analyzing congestion in local area networks: IEEE Computer Society
Project 802 local area network standards
%J Local Networks. Distributed Office and Factory Systems. Proceedings
of Localnet '83
%C New York, USA
%P 499-512
%O 12 REFS
%I Online Publications, Pinner, England
%D 27-29 June 1983
%K computer networks data communication systems standards
local area networks IEEE Computer Society Project 802 local area network
standards transmission medium access

%A B. Stuck
%T Analyzing congestion in local area networks: IEEE Computer Society
Project 802 local area network standards.
%B Local Networks. Distributed Office and Factory Systems. Proceedings
of Localnet '83
%C New York, USA
%I Online Publications, Pinner, England xii+524
%P 499-512
%O 12 Refs
Treatment PRACTICAL.
%D 27-29 June 1983
%K computer networks data communication systems standards.
local area networks IEEE Computer Society Project 802
local area network standards transmission medium access.
%X In February 1980 a group of people met for the first time under the
sponsorship of the IEEE Computer Society to formulate a standard set
of interfaces and media for so called local area networks. This
effort has since come to be called Project 802: local area network
standards and has held full committee meetings roughly every six
weeks since its inception, as well as numerous additional
subcommittee meetings. In December 1980 a decision was made to pursue
multiple methods for determining transmission medium access. A
subcommittee was formed in the spring of 1981 to study the behavior
of each access method under congestion, for the same workload. This
is a summary of the activity of that subcommittee; because the
knowledge and techniques used are not widely known, every attempt has
been made to make this report self contained.

%A H. Sturgis
%A J. Mitchell
%A J. Israel
%T Issues in the design and use of a distributed file system
%Z Xerox Corp., Palo Alto Res. Center, Palo Alto,CA, USA
%J Oper. Syst. Rev. (USA)
%V 14
%N 3
%P 55-69
%D July 1980
%O 7 Refs.
treatment: applic, practical
%K file organisation distributed processing systems analysis
distributed file system dfs systems design
%X Discusses an independent file facility, one that is not embedded in an
operating system. The distributed file system (dfs) is so named because it
is implemented in a cooperating set of server computers connected by a
communications network which together create the illusion of a single,
logical system for the creation, deletion, and random accessing of data.
Access to the dfs can only be accomplished over the network; a computer
(or, more precisely, a program running on one) that uses the dfs is called
a client. The authors describe the division of responsibility between
servers and clients. The basic tool for maintaining data consistency in
these situations is the atomic property of transactions, which protects
clients from system malfunctions and from the competing activities of other
clients. Several cooperating clients may share a transaction. The dfs
provides an unconventional locking mechanism between transactions that
supports client caches and eliminates a novel form of deadly embrace. The
authors have implemented and put into service a system based on these
concepts.

%A Joel N. Sturman
%T An Iteratively Structured General-Purpose Digital Computer
%J IEEE Transactions on Computers
%V C-17
%N 1
%D January 1968
%P 2-9
%K associative memories, cellular arrays, computer organization,
distributed logic memories, iterative arrays
Logical design

%A Joel N. Sturman
%T Asynchronous Operation of an Iteratively Structured General-purpose
Digital Computer
%J IEEE Transactions on Computers
%V C-17
%N 1
%D January 1968
%P 10-17
%K associative memories, cellular arrays, computer organization,
distributed logic memories, iterative arrays,
Logical design

%A Shun-Piao Su
%A Kai Hwang
%T Multiple pipeline scheduling in vector supercomputers
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 226-234
%K
Purdue
%O Large-scale scientific processing

%T The Architectural Features and Implementation Techniques of the
Multicell CASSM
%A Stanley Y. W. Su
%A Le Huu Nguyen
%A Ahmed Emam
%A G. J. Lipovski
%J IEEE Transactions on Computers
%V C-28
%N 6
%D June 1979
%P 430-445
%K Associative memory, computer architectures, content addressing,
database machine, database management, parallel processing,
Special issue on database machines

%A J. S. R. Subrahmanium
%A Parimal Pal Chaudhuri
%A Pabitra Pal Chaudhuri
%T Design of a "T" Fault Repairable Multiprocessor System
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Fault-Tolerant Interconnection
%P 227-233

%A P. A. Subrahmanyam
%A R. D. Kieburtz
%T Interprocess communication and blockage propagation
in Multiprocessor Configurations
%J Proc. 12th Hawaii Int. Conf. on System Sciences, Part I
%C Honolulu, Hawaii
%D January 1979
%K theoretical results
%X Considers the interaction of processes and classifies interprocess
communication techniques according to the degree of interprocess
synchronization.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A J. Suchard
%A H. H. Quang
%T Parallel Processors for Multiple Criteria Data Retrieval
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 215-225
%O Data Base Machines

%A Tatsuya Suda
%T Performance of a Tree Network with Collision Avoidance Switches
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 223-231
%O Network performance analysis

%A R. Sugarman
%T Superpower Computers
%J IEEE Spectrum
%V 17
%N 4
%D April 1980
%P 28-34

%A R. Sugarman
%A P. Wallich
%T The limits of simulation
%J IEEE Spectrum
%V 20
%N 4
%D April 1983
%P 36-41

%A Shigeo Sugimoto
%A Kiyoshi Agusa
%A Koichi Tabata
%A Yukata Ohno
%T A multi-microprocessor for concurrent LISP
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 135-143
%K
C-LISP
special purpose processors

%A H. Sullivan
%A T. Bashkow
%A D. Klappholz
%A L. Cohn
%T The Node Kernel: Resource management in a self-organizing parallel
processor
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 157-
%K
%O Chopp: Self-organizing parallel processor

%A H. Sullivan
%A T. Bashkow
%A D. Klappholz
%T High-level language constructs in a self-organizing parallel processor
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 163
%K
%O Chopp: Self-organizing parallel processor

%A H. Sullivan
%A T. Bashkow
%T Parameters of CHoPP
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 164
%K
%O CHoPP: Self-organizing parallel processor

%A Herbert Sullivan
%A Theodore R. Bashkow
%T A Large Scale, Homogeneous, Fully Distributed Parallel Machine, part I
%J Proceedings 4th Annual Symposium on Computer Architecture
%D March 1977
%C College Park, MD
%P 105-117
%K CHoPP, distributed systems,

%A Herbert Sullivan
%A Theodore R. Bashkow
%A David Klappholz
%T A Large Scale, Homogeneous, Fully Distributed Parallel Machine, part II
%J Proceedings 4th Annual Symposium on Computer Architecture
%D March 1977
%I IEEE and ACM
%C College Park, MD
%P 118-124
%K CHoPP, distributed systems,

%A C. F. Summer
%A R. O. Pettus
%A R. D. Bonnell
%A M. N. Huhns
%A L.M. Stephens
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T Design Optimization for a Special-Purpose Multiple-Computers
%P 133-134
%O

%A M. W. Summers
%A D. F. Trad
%T The Evolution of a parallel active tracking program
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 238-249
%K
%O RADCAP - the RADC associative processor

%A M. G. Sundar
%T The NICNET distributed file system
%B NETWORKS India 84. International Symposium on Data Communication and
Computer Networks. Conference Record
%C Madras, India
%D 19-21 Oct. 1984
%P 198
%O 0 REFS. Treatment PRACTICAL
%E H. N. Mahabala
%E K. B. Lakshmanan
%E S. Srinivasan
%I Comput. Soc. India, IFIP, UNESCO
%K file organisation distributed processing computer networks
NICNET distributed file system DFS stand alone file system
support layer UDMS Universal Database Management System heterogeneous databases
computer systems computer network HP 1000 HP 2000
LSI 2/10 models CYBER 170/730 star configuration operating systems
nodal computers local filing systems queries subqueries
virtual file model data transfer cash recovery algorithms QTRM
VTP network support software file retrieval requests
%X Summary form only given, substantially as follows. The DFS
(distributed file system) is being implemented both as a stand-alone
file system and also as a support layer for the UDMS (Universal
Database Management System). The combined aim of both the modules is
a provision of a unified view of the heterogeneous databases spread
over the different computer systems of the computer network NICNET
NICNET is a computer network connecting ten computers comprising
HP-1000, HP-2000 and LSI 2/10 models with the CYBER 170/730 system
in a star configuration. The authors present the design and
implementation details of the DFS. The DFS assumes complete
responsibility to interact with the operating systems of the nodal
computers in order to be able to access the files, through the local
filing systems. To provide the software support layer for UDMS, the
DFS maps the queries and the subqueries onto the physical file
structures. The DFS employs a simple virtual file model procedures
to be stored in a given mode and also to provide a basis for
structured file transfers. Due to the nature of the data involved
DFS provides reliable data transfer by resorting to cash-recovery
algorithms. The QTRM and VTP modules referred to are already
available in the network support software of the CYBER system
Finally the DFS is expected to support file retrieval requests only

%A M. G. Sundar
%T The NICNET distributed file system
%B NETWORKS India 84. International Symposium on Data Communication
and Computer Networks
%C Madras, India
%D Oct. 1984
%P 198
%O 0 REFS. Treatment PRACTICAL
%E H. N. Mahabala
%E K. B. Lakshmanan
%E S. Srinivasan
%I Comput. Soc. India, IFIP, UNESCO
%K file organisation distributed processing computer networks
NICNET distributed file system DFS stand alone file system
support layer UDMS Universal Database Management System heterogeneous databases
computer systems computer network HP 1000 HP 2000
LSI 2/10 models CYBER 170/730 star configuration operating systems
nodal computers local filing systems queries subqueries
virtual file model data transfer cash recovery algorithms QTRM
VTP network support software file retrieval requests

%A Chia-Hsiaing Sung
%A Clarence L. Coates, Jr.
%T Tessellation Aspect of Combinational Cellular Array Testing
%J IEEE Transactions on Computers
%V C-23
%N 4
%D April 1974
%P 363-368
%K Cellular array, combinational logic, fault detection, tessera,
tessellation,
Fault testing

%T Testable Sequential Cellular Arrays
%A Chia-Hsiaing Sung
%J IEEE Transactions on Computers
%V C-25
%N 1
%D January 1976
%P 11-21
%K Bilateral arrays, cellular arrays, fault detection, fault locations,
unilateral arrays, information losslessness (IL), sequential arrays,
Cellular arrays

%A Nam Sung
%A C. H. Smith
%A A. Agrawala
%T A proof of the determinacy property of the data flow schema
%I Inf. Process. Lett. (Netherlands)
%V 19
%N 1
%P 13-16
%O 13 REFS. Treatment THEORETICAL
%D 26 July 1984
%K deterministic automata
data flow determinacy abstract semantics data flow schema SWITCH actors
APPLY actors

%A J. M. Surprise
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Airborne Associative Processor (ASPRO)
%P 129-130
%O Associative Processors and Processing

%A Ivan E. Sutherland
%A Carver A. Mead
%A Thomas E. Everhart
%T Basic Limitations in Microcircuit Fabrication Technology
%I Rand Corp.
%R R-1956-ARPA
%C Santa Monica, CA
%D 1976

%A I. Suzuki
%A T. Kasami
%T An Optimality Theory for Mutual Exclusion Algorithms in Computer
Networks
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 365-370
%K
%O Mutual Exclusion and Synchronization

%A T. Suzuki
%A Moto-oka
%T Control Structure of TOPSTAR and its Evaluation
%J Proceedings of Annual Conference of Japan Information Processing
Society
%D May 1980
%P 85-86

%A J. Sventek
%A W. Greiman
%A M. O'Dell
%A A. Jansen
%T Token ring local area networks: a comparison of experimental and
theoretical performance
%B Proceedings of the Computer Networking Symposium
%C Silver Spring, MD, USA
%P 51-56
%O 11 Refs
%D 13 Dec. 1983
%K computer networks protocols
infinite capacity assumption protocols local area networks performance
token ring network randomness assumption access control mechanisms congestion
%X Experimental measurements of the characteristics of a commercially
available token ring network are described. It is shown that the
violation of both the infinite-capacity and the randomness assumption
severely invalidates model predictions, and that the utility of all
access control mechanisms for such applications must be reevaluated
Finally, it is shown that congestion is a very real problem even in
small 'simple' local area networks

%A Antonin Svoboda
%T Parallel Processing in Boolean Algebra
%J IEEE Transactions on Computers
%V C-22
%N 9
%D October 1973
%P 897-903
%K Batch processing, Boolean analyzer, listing of implicants,
parallel processing in Boolean algebra, triadic order,
Parallel processing

%A Liba Svobodova
%T A Reliable Object-Oriented Data Repository for a Distributed Computer
%J Proceedings of the 8th Symposium on Operating Systems Principles,
Operating Systems Review
%V 15
%N 5
%D December 1981
%P 47-58
%K distributed data storage system, server, atomic update, stable storage,
optical disk, memory management, crash recovery
%O remote data storage

%A Liba Svobodova
%T File servers for network-based distributed systems
%J Computing Surveys
%V 16
%N 4
%P 353-398
%D December 1984
%K C.2.2 [Computer-Communication Networks]:
Network Protocols - protocol architecture; D.4.1 [Operating Systems]:
Process management - concurrency; deadlocks; D.4.2 [Operating Systems]:
Storage management - allocation/deallocation strategies; [D.4.3]
[Operating Systems]: file systems management - distributed file systems;
file organization; D.4.4 [Operating Systems]:
Communications Management - message sending; network communication;
D.4.5 [Operating systems]:
Reliability - backup procedures; checkpoint/restart; D.4.6
[Operating Systems]: Security and protection - access controls; D.4.7
[Operating Systems]: Organization and Design - distributed systems;
E.5 [Files]: backup/recovery; organization; structure; H.2.0
[Database Management]: General - security, integrity, and protection,
H.2.4 [Database Management]: Systems: distributed systems;
transaction processing; H.2.7 [Database Management]:
Database Administration - logging and recovery;
design, reliability, atomic update, client/server communication,
file servers, recoverable files, remote procedure call

%A Liba Svobodova
%T Resilient Distributed Computing
%J IEEE Transactions on Software Engineering
%V SE-10
%N 3
%D May 1984
%P 257-268
%K Atomic actions, checkpoints, consistency, crash resistance,
distributed programs, distributed systems, recoverability,
remote procedure calls

%A Richard J. Swan
%A S. H. Fuller
%A Daniel P. Siewiorek
%T Cm* \(em A Modular, Multi-Microprocessor
%J Proceedings AFIPS National Computer Conference
%I AFIPS Press
%V 46
%D 1977
%P 637-644
%K CMU, required
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%A Richard J. Swan
%A A. Bechtolsheim
%A K. W. Lai
%A J. K. Ousterhout
%T The Implementation of the Cm* Multiprocessor
%J Proceedings AFIPS National Computer Conference
%I AFIPS Press
%V 46
%D 1977
%P 645-655
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."

%A Richard J. Swan
%T The Switching and Addressing Structure of an Extensible Multiprocessor: Cm*
%R CMU-CS-78-138, doctoral thesis
%I Dept. of Computer Science, Carnegie-Mellon University
%C Pittsburgh, PA 15132
%D August 1978
%K multiprocessor architecture and operating systems
%X Gives a fairly detailed description of the Cm* multiprocessor and its
hardware implementation.  Discusses in detail the problem of deadlock in
Cm*-like interconnection schemes and explains the strategies used to
avoid it in Cm*.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Roger C. Swanson
%T Interconnections for Parallel Memories to Unscramble p-Ordered Vectors
%J IEEE Transactions on Computers
%V C-23
%N 11
%D November 1974
%P 1105-1115
%K Array storage allocation, data alignment, group generators, ILLIAC IV,
memory interconnections, parallel memories, star polygons,
Computer systems

%A Earl E. Swartzlander, Jr.
%T Parallel Counters
%J IEEE Transactions on Computers
%V C-22
%N 11
%D November 1973
%P 1021-1024
%K Associative processors, carry-shower, counters,
computer arithmetic units, digital counters, full-adder counters,
multipliers, parallel counters, quasi-digital processing,
READ-ONLY memory fast adders, response counters
Logic design

%T Supersystems: Technology and Architecture
%A Earl E. Swartzlander, Jr.
%A Barry K. Gilbert
%J IEEE Transactions on Computers
%V C-31
%N 5
%D May 1982
%P 399-409
%K Computer tomography, computer networks, integrated circuit technology,
network figure of merit, supersystems,
Special issue on supersystems

%A P. Swarztrauber
%T The Solution of Tridiagonal Systems on the CRAY-1
%J Infotech State of the Art Report: Supercomputers
%V 2
%I Maidenhead: Infotech Int. Ltd.
%D 1979
%E C. Jesshope
%E R. Hockney
%D 1979
%P 343-358

%A P. Swarztrauber
%T Efficient Algorithms for Pipeline and Parallel Computers
%B Impact of New Computing Systems on Computational Mechanics
%I The American Society of Mechanical Engineers
%E A. Noor
%D 1983
%P 89-104

%A Paul N. Swarztrauber
%T Vectorizing the FFTs
%E Garry Rodrigue
%B Parallel Computations
%I Academic Press
%D 1982
%P 51-83

%A Paul N. Swarztrauber
%T FFT algorithms for vector computers
%J Parallel Computing
%V 1
%N 1
%D August 1984
%P 45-63
%K Cooley-Tukey FFT, Pease FFT, Stockham autosort FFT, vectorization

%A R. Swarztrauber
%T The Methods of Cyclic Reduction, Fourier Analysis and the FACR
Algorithm for the Discrete Solution of Poisson's Equation on a
Rectangle
%J SIAM Rev.
%V 19
%P 490-501
%D 1977

%A R. Swarztrauber
%T A Parallel Algorithm for Solving General Tridiagonal Equations
%J Math. Comp.
%V 33
%P 185-199
%D 1979

%A R. Swarztrauber
%T FFT Algorithms for Vector Computers
%J Computing
%V 1
%P 45-63
%D 1984

%A Alan F. Sweet
%A Arthur E. Oldehoeft
%T Concurrency and Access Control in Hierarchical Information Systems
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 226-234
%O Data Base Machines

%A Daniel Swinehart
%A Gene McDaniel
%A David Boggs
%Z Xerox Palo Alto Res. Center, Palo Alto,CA, USA
%T WFS: A Simple File System for a Distributed Environment
%J Proceedings of the 7th Symposium on Operating Systems Principles
%D December 1979
%P 9-17
%C Pacific Grove,CA, USA
%I ACM, New York, USA
ix+163 pp. isbn 0 89791 009 5
%O 17 Refs.
treatment: practical
%K distributed processing operating systems file organisation
simple shared file system wfs client programs stream io
directory system atomic commands connectionless protocols
distributed processing
shared data in a distributed system
system construction primitives
%X WFS is a shared file server available to a large network community. Wfs
responds to a carefully limited repertoire of commands that client programs
transmit over the network. The system does not utilize connections, but
instead behaves like a remote disk and reacts to page-level requests. The
design emphasizes reliance upon client programs to implement the
traditional facilities (stream io, a directory system, etc.) of a file
system. The use of atomic commands and connectionless protocols nearly
eliminates the need for wfs to maintain transitory state information from
request to request. Various uses of the system are discussed and extensions
are proposed to provide security and protection without violating the
design principles.

%A Pierre Sylvain
%A Maniel Vineberg
%T The Design and Evaluation of the Array machine:  A High-Level Language
Processor
%J Proceedings of 2nd Annual Symposium on Computer Architecture
%D 1975
%P 119-125

%A J. Sylwestrowicz
%T Social Science Applications of the DAP
%J Social Sciences Research Center Newsletter
%D October 1979

%A J. D. Sylwestrowicz
%T Distributed Array Processors in Social Science \(em Social Sciences Research Center Research
Student Conference
%I Queen Mary's College DAP Support Unit
%D May 1980

%A J. D. Sylwestrowicz
%T Applications of the ICL Distributed Array Processor in Econometric
Computations
%J ICL Technical Journal
%V 2
%P 280
%D 1981

%A F. W. Symons, Jr.
%T Spatial and Spectral Filtering as Applied to Array Processing
%R AD-A017785/7ST
%D September 18, 1975
%I National Technical Information Service
%C Springfield, VA 22151

%A J.-C. Syre
%T The data flow approach for MIMD multiprocessor systems
%E D. J. Evans
%B Parallel Processing Systems
%I Cambridge University Press
%D 1982
%P 239-

%A J. C. Syre
%A others
%T Parallelism, Control and Synchronization Expression in a Single-Assignment
Language
%J Proceedings of the 4th Annual ACM Computer Science Conference
%D February 1976
%I ACM
%C New York, NY

%A J. C. Syre
%A others
%T LAU System: A Parallel Data-Driven Software/Hardware System Based on Single
Assignment
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 347-351
%K data flow,
multi-processors and parallel computers
%X A simple early paper on the LAU data flow system including an simple
language code.

%A J. C. Syre
%A D. Comte
%A H. Hifde
%T Pipelining, parallelism and asynchronism in the LAU system
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 87-92
%K
%O Data-Flow Architectures

%A J. C. Syre, ed.
%J Proceedings 1st European Conference on Parallel and Distributed
Processing
%C Toulouse, France
%D February 1979

%T Preliminary Results in Implementing a Model of The World Economy on the
CYBER 205: A Case of Large Sparse Nonsymmetric Linear Equations
%A D. Szyld
%J CYBER 200 Applications Seminar
%R NASA Conference Publication 2295
%D October 1983
%E J. Patrick Gary, Compiler
%I NASA Goddard Space Flight Center
%C Greenbelt, Maryland
%P 279-287

%l journal-article
%T MOVE Architecture in Digital Computers
%A Daniel Tabak
%A G. J. Lipovski
%J IEEE Trans. on Computers
%V C-29
%N 2
%M February
%D 1980
%P 180-189
%K RISC CMOVE architecture

%A M. Tadjan
%A R. E. Buehrer
%A W. Haelg
%T Parallel simulation by means of a prescheduled MIMD-system featuring
synchronous pipeline processors
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 280-283
%K
ETH, EMPRESS, Power-Series Continuous Simulation Program (PSCSP),
%O MIMD processing

%A C. Taft
%T Preconditioning Strategies for Solving Elliptic Equations on a
Multiprocessor
%I University of Illinois
%R Computer Science Department Report
%D 1982

%A M. Takagi
%A M. Onoe
%T Color Display for Image Processing with Multiple Functions
%E Morio Onoe
%E Kendall Preston, Jr.
%E Azriel Rosenfeld
%B Real-Time/Parallel Computing: Image Analysis
%I Plenum Press
%C New York, NY
%D 1981
%P 361-370
%X Real time image processing, nothing parallel.

%A Naohisa Takahashi
%A Makoto Amamiya
%T A Data Flow Processor Array System: Design and Analysis
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%D 1983
%V 11
%N 3
%P 243-250
%K dynamic data flow, colored architecture,
Eddy (Experimental system for data driven processor array) system,
Data flow architectures
%X Paper includes a photo of the wiring of the box (complex).
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%A Y. Takahashi
%T Partitioning and Allocation in Parallel Computation of Partial
Differential Equations
%J Proc. 10th IMACS World Congress on Systems Simulation and Scientific
Computation
%V 1
%I IMACS
%P 311-313
%D 1982

%A R. Takanuki
%A I. Nakata
%A Y. Umetani
%T Some Compiling Algorithms for an Array Processor
%J Proc. 3rd USA-Japan Computer Conf.
%D 1978
%P 273-279

%A Yoshiyasu Takefuji
%A Koichiro Tsujino
%A Mari Ibuki
%A Hideo Aiso
%T A novel approach to parallel processing cryptosystem
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 313-315
%K
%O Special purpose processors

%A Yoshiyasu Takefuji
%A Takakazu Kurokawa
%A Masato Ishizaki
%A Hideo Aiso
%T New matrix equations solvers in GF(2) employing Crammer with Chio method
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 47-50
%K
Gauss Jordan elimination, VLSI
numerical algorithms

%T A Distributed Unification Scheme for Systolic Logic Programs
%A Hisao Tamaki
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 552-559
%K Logic Programming/Production Systems

%l journal-article
%T Strategies for Managing the Register File in RISC
%A Y. Tamir
%A C. H. Sequin
%J IEEE Trans. on Computers
%M Nov
%D 1983
%K risc reduced instruction set computer restricted architecture

%A Yuval Tamir
%A Carlo H. Sequin
%T Error recovery in multicomputers using global checkpoints
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 32-41
%K VLSI, fault tolerance, packet communications
%O distributed systems

%T TANDEM 16 System Introduction
%Q Tandem Computer
%C Cupertino, CA
%D 1977

%A S. L. Tanimoto
%T Algorithms for Median Filtering of Images on a Pyramid Machine
%E M. J. B. Duff
%B Computing Structures for Image Processing
%I Academic Press
%D 1983
%P 123-141

%A S. L. Tanimoto
%T A Pyramidal Approach to Parallel Processing
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%D 1983
%V 11
%N 3
%P 372-378
%O architectures for image processing

%A Steven L. Tanimoto
%T Programming Techniques for Hierarchical Parallel Image Processors
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 421-429
%K PCLIP

%A Steven L. Tanimoto
%T Sorting, Histogramming, and other Statistical Operations on a Pyramid
Machine
%I Univ. of Wash.
%R TR 82-08-02
%D Aug. 1982
%C Seattle, WA

%A Fabio Tarini
%A others
%T A Network System Language
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 305-314
%O Network Language and System Software

%A Robert E. Tarjan
%A Uzi Vishkin
%T An Efficient Parallel Biconnectivity Algorithm
%R ULTRACOMPUTER NOTE #51, TR #69
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D May 1983
%K Parallel graph algorithm, biconnected components, blocks, spanning tree

%A John Tartar
%T Multiprocessor hardware: an architectural overview
%J Proc. 1980 Annual Conference ACM
%I ACM
%D 1980
%P 518-526
%X This bibliography has certain problems: references are improper, page
numbers are wrong, etc.  On the whole, it it not bad, but dated.
$Revision: 1.2 $ $Date: 84/07/05 16:58:21 $

%A M. Tasto
%T Parallel Array Processors for Digital Image Processing
%J Optica Acta
%V 24
%N 4
%D April 1977
%P 391-406

%A J. R. Taylor
%T A multiprocessor configuration for high reliability processing
%J Proc. 1st European Seminar on Computing with Real-Time Systems
%C Harwell, England
%D 1972
%K multiprocessor architecture and operating systems
%X A multiprocessor configuration achieves high reliability using commercially
available computers.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A C. Temperton
%T Direct Methods for the Solution of the Discrete Poisson Equation: Some
Comparisons
%J J. Comp. Phys.
%V 31
%P 1-20
%D 1979
%X Remove?

%A C. Temperton
%T Fast Fourier Transforms on CRAY-1
%I European Center for Median Range Weather Forecasts
%R No. 21
%D 1979

%A C. Temperton
%T On the FACR(1) Algorithm for the Discrete Poisson Equation
%J J. Comp. Phys.
%V 34
%P 314-329
%D 1980

%A C. Temperton
%T Fast Fourier Transforms on the CYBER 205
%B Proceedings of the NATO Workshop on High Speed Computations
%E J. Kowalik
%S NATO ASI Series
%V F-7
%I Springer-Verlag
%P 403-416
%D 1984

%A S. Temple
%E I. N. Dallas
%E E. B. Spratt
%T The design of the Cambridge Fast Ring
%B Ring Technology Local Area Networks. Proceedings of the IFIP WG 6.4
%C University of Kent Workshop, Canterbury, England
%I North-Holland
Amsterdam, Netherlands,ix+269, ISBN: 0-444-86852-6
%P 79-88
%O 5 Refs
Treatment PRACTICAL.
%D 28-30 Sept. 1983
%K computer networks.
LAN Cambridge Fast Ring local area network CFR
VLSI design.
%X The Cambridge Fast Ring (CFR) is a high speed local area network
similar in principle to the well established Cambridge Ring. In
addition to allowing much higher transfer rates than existing
networks, the CFR incorporates facilities for partitioning the
bandwidth between several groups of users and for connecting rings
together without the need for bridge computers and complex addressing
schemes. The CFR is currently being implemented in VLSI. This paper
describes the major design decisions that were taken and the system
which resulted from them.

%A A. Y. Teng
%A M. T. Liu
%T A Formal Approach to the Design and Implementation of Network Communication
Protocol
%J Computer Software and Applications Conference (COMPSAC78)
%I IEEE
%D November 1978
%P 722-727
%O distributed processing

%A G. Tennille
%T Development of a One-Dimensional Stratospheric Analysis Program for the
CYBER 203
%J Proceedings Symposium CYBER 205 Applications
%I Control Data Corporation
%C Ft. Collins, CO
%D 1982
%X Remove?

%A Robert R. Tenny
%T Distributed Decision Making using a Distributed Model
%R Technical Report LIDS-TD-938, PhD thesis
%I Laboratory for Information and Decision Systems, Massachusetts Institute
of Technology
%C Cambridge, Massachusetts
%D June 1979

%T Mapping Production Systems in Multiprocessors
%A M. F. M. Tenorio
%A D. I. Moldovan
%Z EE, Dept. USC
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 56-62
%K Problem Mapping and Scheduling
artificial intelligence, parallel processing, expert systems,
mapping techniques, multiprocessors,

%A D. B. Terry
%T A analysis of naming conventions for distributed computer systems
%B Comput. Commun. Rev. (USA), SIGCOMM 84 Tutorials and Symposium on
Communications, Archiectures and Protocols
%V 14
%N 2
%C Montreal, Quebec, Canada
%P 218-224
%O 8 REFS
Treatment PRACTICAL
%D 6-8 June 1984
%K database management systems distributed processing storage management
resource sharing distributed computer systems name space management name server
database entries
%X Name servers that collectively manage a global name space facilitate
sharing of resources in a large internetwork by providing means of
locating named objects. The efficiency with which the name space can
be managed is strongly influenced by the adopted naming convention
Structured name spaces are shown to simplify name space management
from both an administrative and system viewpoint. Formulae have been
derived which allow one to quantitatively measure the effect of the
distributed name server configuration on a given client's level of
performance. In general, the cost of a name server query can be
reduced by distributing replicated copies of name server database
entries in a way that exploits the locality of clients' reference
patterns

%A L. G. Tesler
%A H. J. Enea
%T A Language Design for Concurrent Processes
%J Conf. Proc. 1968 SJCC
%P 403
%I AFIPS Press
%D 1968

%A Jack A. Test
%T An Interprocess Communication Scheme for the Support of Cooperating
Process Networks
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 405-411
%O implementation schemes for interprocess communication systems

%A Thomas Teufel
%T A Hardware Architecture of an Optimal BCD-Floating-Point Processor
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%I North-Holland
%D 1984
%P 553-560

%Q Texas Instruments
%T ASC, A Description of the Advanced Scientific Computer System
%R M100MP
%D April 1972

%Q Texas Instruments Inc.
%T A Description of the Advanced Scientific Computer System
%C Austin, TX
%D 1973

%T Interference Analysis of Shuffle/Exchange Networks
%A Suchai Thanawastien
%A Victor P. Nelson
%J IEEE Transactions on Computers
%V C-30
%N 8
%D August 1981
%P 545-556
%K Blocking probability, interconnection networks, interference, loading,
Markov modeling, memory bandwidth, multi-processing, performance
modeling, shuffle/exchange networks

%A Andre Thayse
%T A Matrix Formalism for Asynchronous Implementation of Algorithms
%J IEEE Transactions on Computers
%V C-33
%N 4
%D April 1984
%P 289-300
%K Algorithmic state machines, factorization of Boolean matrices,
implementation of algorithms, microprogrammed structures, Petri nets,
P-functions, switching theory,
Algorithmic state machines

%A Andre Thayse
%T Synthesis and Asynchronous Implementation of Algorithms Using a
Generalized P-Function Concept
%J IEEE Transactions on Computers
%V C-33
%N 10
%D October 1984
%P 861-868
%K Algorithmic state machines, factorization of Boolean matrices,
implementation of algorithms, microprogrammed structures, parallel
program schemata, petri nets, p-functions, switching theory,
Algorithmic State Machines

%A Marvin Theimer
%T Resource Migration Facilities for Failure Recovery in
distributed Computer Systems
%D 1983
%X Strong on low level facilities. Exception handling to
effect migration closest thing to reasoning when to trigger migration.
Does not deal with migration for performance. However, some pointers
in bib to migration for load balancing

%A Douglas J. Theis
%T Array Processor Architecture
%J Computer
%V 14
%N 9
%D September 1981
%P 8-9
%X Introduction to a special issue

%A R. J. Thierauf
%T Distributed Processing Systems
%I Prentice-Hall
%C Englewood Cliffs, New Jersey
%D 1978

%A J. W. Thomas
%A J. N. Patel
%A M. D. Vojta
%A D Bhatt
%T Standard Bus Architectures
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 152-157
%K
%O Bus Oriented multiprocessor systems

%A R. E. Thomas
%T A Modular Dataflow Architecture with Improved Asymptotic Performance
%R Ph.D. Thesis
%I Dept. of Information and Computer Science, University of California
%C Irvine, CA
%D 1980

%A R. H. Thomas
%T A resource sharing executive for the ARPANET
%B AFIPS conference proceedings
1973 National computer conference
and exposition
%P 155-163
%V 42
%D 4-8 June 1973
%C New York, USA
%I AFIPS, montvale, N.J., USA, x+913 pp pp.
%O 16 refs
treatment: practical
%K data communication systems supervisory and executive programs
arpanet resource sharing executive rsexec distributed
tenex computer network
%X The resource sharing executive (rsexec) is a distributed, executive-like
system that runs on tenex host computers in the arpa computer network. The
rsexec creates an environment which facilitates the sharing of resources
among hosts on the arpanet. The large hosts, by making a small amount of
their resources available to small hosts, can help the smaller hosts
provide services which would otherwise exceed their limited capacity. By
sharing resources among themselves the large hosts can provide a level of
service better than any one of them could provide individually. Within the
environment provided by the rsexec a user need not concern himself directly
with network details such as communication protocols nor even be aware that
he is dealing with a network.
Reproduced in Advances in Computer Commun., Chu,W.W.
(Ed.), (1974) 359-367

%A Robert H. Thomas
%T A Majority Consensus Approach to Concurrency Control for Multiple Copy
Databases
%J ACM Transactions on Database Systems
%V 4
%N 2
%D June 1979
%P 180-209
%K Distributed databases, distributed computation, distributed control,
computer networks, update synchronization, concurrency control, clock
synchronization, multiprocess systems
CR Categories: 4.3, 4.32, 4.33, 4.39, 5.29

%A T. B. Thomas
%A W. L. Arbuckle
%T Multiprocessor software: Two approaches
%J Proc. 6th Conf. on the Use of Digital Computers in Process Control
%C Baton Rouge, Louisiana
%D February 1971
%K multiprocessor applications
%X Two uses of multiprocessing in real-time systems are discussed.  One
approach uses multiple processors as backups to provide enhanced reliability,
while the other uses them for improving performance.  Discusses the
characteristics of the operating system in each case.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A A. Thomasian
%A A. Avizienis
%T Architectural Design Considerations for a Fault-Tolerant Array Processing
System
%J Proceedings of the 1977 International Conference on Parallel Processing
%P 184
%D August 1977
%I IEEE
%O Architecture

%A Alexander Thomasian
%A Algirdas Avizienis
%T Optimal Scheduling of vector computations in a reconfigurable
shared-resource array processing system
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 92
%K
%O Scheduling
%X Summary only.

%A Alexander Thomasian
%T A Capacity Bound for Parallel Processing Systems
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 193-196
%O Scheduling

%A Alexander Thomasian
%A Paul Bay
%T Analysis of an Integrated Queueing Model of a Computer Communication
Network
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 213-222
%O Network performance analysis

%A W. Thompkins
%A L. Wald
%T A Minicomputer/Array Processor/Memory System for Large-Scale
Fluid Dynamic Calculations
%B Impact of New Computing Systems on Computational Mechanics
%I The American Society of Mechanical Engineers
%E A. Noor
%D 1983
%P 117-126

%A C. Thompson
%A H. Kung
%T Sorting on a Mesh Connected Parallel Computer
%J Comm ACM
%V 20
%N 4

%A Clark D. Thompson
%T Generalized Connection Networks for Parallel Processor Intercommunication
%J IEEE Transactions on Computers
%V C-27
%N 12
%D December 1978
%P 1119-1125
%K Array processors, connection networks, message broadcasting, parallel
algorithms, parallel processing, resource partitioning, SIMD machines,
Parallel processors

%A Clark D. Thompson
%T The VLSI Complexity of Sorting
%J IEEE Transactions on Computers
%V C-32
%N 12
%D December 1983
%P 1171-1184
%K Area-time complexity, bitonic sort, bubble sort, heapsort,
mesh-connected computers, parallel algorithms, shuffle-exchange network,
sorting, VLSI, VLSI sorter
%X
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%A Clark D. Thompson
%T Fourier Transforms in VLSI
%J IEEE Transactions on Computers
%V C-32
%N 11
%D November 1983
%P 1047-1057
%K Algorithms implemented in hardware, area-time complexity, computational
complexity, FFT, Fourier transform, mesh-connected computers, parallel
algorithms, shuffle-exchange network, VLSI.

%A G. B. Thompson
%T A Conceptual Model for Crossbar Switching Networks
%J Proc. 1976 Intl. Conf. Communication
%D June 1976
%I IEEE
%P (7-23)-(7-25)
%C New York, NY

%A Alexander Thomsian
%A Paul Bay
%T Queueing models for parallel processing of task systems
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 421-428
%K
system performance

%T A Feasibility Study of a Memory Hierarchy
%A Sharilyn A. Thoreson
%A Arlen N. Long
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 356-360
%K Data Flow

%A J. E. Thornton
%T Design of a Computer: The CDC 6600
%I Scott, Foresman & Co.
%C Glenview, IL
%D 1970

%A J. E. Thornton
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Control Data 6600 and STAR-100
%P 33-37
%O History of Parallel Processing

%A J. E. Thornton
%T Heterogeneous Computer Architecture
%J Proceedings of 8th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 9
%N 3
%D May 1981
%P 355-356
%O interconnection

%A R. D. Thornton
%T Instrumentation networks with distributed control
%B Wescon 83. Electronic Show and Convention
%C San Francisco, CA, USA
%D 8-11 Nov. 1983
%P 31/3/1-7
%O 0 REFS. Treatment GENERAL
%I Electron. Conventions. Los Angeles, CA, USA IEEE
%K computerised instrumentation local area networks distributed control
local area networks LAN control signals distributed control
computers microprocessor data signals

%A K. J. Thurber
%A R. O. Berg
%T Applications of Associative Processors
%J Computer Design
%D November 1971
%P 103-110

%A K. J. Thurber
%A P. C. Patton
%T Hardware Floating Point Arithmetic on an Associative Processor
%J IEEE Computer Society International Conference
%D 1972
%P 719-740

%A K. J. Thurber
%A E. D. Jensen
%A L. A. Jack
%A P. E. Patton
%A L. C. Anderson
%T A Systematic Approach to the Design of Digital Bussing Structures
%J Proceedings AFIPS Fall Joint Computer Conference
%D 1972
%P 719-740

%A K. J. Thurber
%A P. C. Patton
%T The Future of Parallel Processing
%J IEEE Transactions on Computers
%D December 1973
%P 1140-1143

%A K. J. Thurber
%T Interconnection Networks - A Survey and Assessment
%J Proceedings AFIPS National Computer Conference
%D 1974
%P 909-919

%A K. J. Thurber
%T Large Scale Computer Architecture
%I Hayden Book Company
%D 1976

%A K. J. Thurber
%T A course structure: Computer communications subsystems
%J SIGCSE Bulletin
%V 11
%N 4
%D December 1978
%P 15-24

%A K. J. Thurber
%T Computer Communications Techniques
%J Computer Software and Applications Conference (COMPSAC78)
%I IEEE
%D November 1978
%P 589-594
%O communications issues in parallel and distributed systems

%A K. J. Thurber
%T Circuit switching technology: A state-of-the-art survey
%J Proc. COMPCON 78
%D September 1978
%P 116-124

%A K. J. Thurber
%T Parallel Processor Architectures \(em Part I: General Purpose Systems
%J Computer Design
%D 1979
%V 18
%P 89-97

%A K. J. Thurber
%A G. M. Masson
%T Distributed-Processor Communication Architecture
%I D. C. Heath & Co.
%C Lexington, Massachusetts
%D 1979

%A K. J. Thurber
%T Tutorial: Distributed processor communication architecture
%I IEEE
%N Catalog No. EHO 152-9
%D 1979

%A K. J. Thurber
%T Parallel Processor Architectures \(em Part 2
%J Computer Design
%V 18
%N 2
%D February 1979
%P 103-114

%A K. J. Thurber
%A H. A. Freeman
%T Architecture considerations for local computer networks
%J Proc. 1st Int. Conf. on Distributed Computing Systems
%C Huntsville, Alabama
%D October 1979
%P 131-142

%A K. J. Thurber
%A Harvey A. Freeman
%T Architecture Considerations for Local Computer Networks
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 131-142
%K Distributed architectures
%X Reproduced in Tutorial on Local Computer Networks, Thurber
K.J., and Freeman,H.A., (Eds.), (1981).

%A K. J. Thurber
%A others
%T An Assessment of the Applicability of Highly Variable
Computer Architectures to Radar Data Processing
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 274-283
%O Distributed Architectures

%A K. J. Thurber
%T An accessment of the status of network architectures
%J Fall 1980 Compcon
%I IEEE
%D 1980
%P 87-94

%A K. J. Thurber, ed.
%T A Pragmatic View of Distributed Processing
%I IEEE
%D 1980

%A Kenneth J. Thurber
%A John W. Myrna
%T System Design of a Cellular APL Computer
%J IEEE Transactions On Computers
%V C-19
%N 4
%D April 1970
%P 291-303
%K APL, array processors, cellular arrays, parallel processors,
special purpose computer
Hardware and Systems

%A Kenneth J. Thurber
%A Leon D. Wald
%T Associative and Parallel Processors
%J Computing Surveys
%V 7
%P 215-255
%D 1975
%K associative processor, parallel processor, OMEN, STARAN, PEPE, ILLIAC IV,
architecture, large-scale systems, SIMD processors, array processors,
ensemble
CR categories: 3.80, 4.20, 6.22

%A Kenneth J. Thurber
%T Computer Communications Techniques
%J Proceedings of the 2nd IEEE COMPSAC
%I IEEE
%v 7
%n 3
%D October 1978
%P 589-594
%p 7-16
%X Reproduced in Computer Architecture News (SIGARCH) and 
"Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A Kenneth J. Thurber
%A Harvey A. Freeman
%T A Bibliography of Local Computer Network Architectures
%J Computer Architecture News, (SIGARCH)
%I ACM
%V 7
%N 5
%D February 1979
%P 22-27
%X What is intersting about this paper is the list of example multiprocessors
and distributed networks, and how each of these networks fall into
Thurber's well known classification hierarchy.

%A Kenneth J. Thurber
%T Interprocess communication layer: Introduction
%E B. W. Lampson
%E M. Paul
%E H. J. Siegel
%B Distributed Systems \(em Architecture and Implementation (An Advanced Course)
%S Lecture Notes in Computer Science
%V 105
%I Spring-Verlag
%D 1981
%P 44-56

%A Kenneth J. Thurber
%T Hardware interconnection technology
%E B. W. Lampson
%E M. Paul
%E H. J. Siegert
%B Distributed Systems \(em Architecture and Implementation (An Advanced Course)
%S Lecture Notes in Computer Science
%V 105
%I Spring-Verlag
%D 1981
%P 57-85

%A Kenneth J. Thurber
%T Hardware issues
%E B. W. Lampson
%E M. Paul
%E H. J. Siegert
%B Distributed Systems \(em Architecture and Implementation (An Advanced Course)
%S Lecture Notes in Computer Science
%V 105
%I Spring-Verlag
%D 1981
%P 377-412

%A J. Tiberghien, (ed.)
%T New Computer Architectures
%I Academic Press
%C London, England
%D 1984

%A J. Tiberghien, (Ed.)
%T New Computer Architectures
%I Academic Press
%C Orlando, FL
%D 1984

%A Evan Tick
%T Towards a Multiple Pipelined Prolog Processor
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 4.7-4.17
%O PROLOG machines

%A A. M. van Tilborg
%A L. D. Wittie
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T High-Level Operating System Formation in Network Computers
%P 131-132
%O

%A A. M. van Tilborg
%A L. D. Wittie
%T Wave Scheduling: Distributed Allocation of Task Forces in Network
Computers
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 337-347
%K
%O Distributed Scheduling

%A Andre M. van Tilborg
%T Guardian: Decentralized Control of an Embedded Multimicroprocessor
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 406-413
%O Control architectures

%A Andre M. Van Tilborg
%A Larry D. Wittie
%T Wave Scheduling - Decentralized Scheduling of Task Forces in
Multicomputers
%J IEEE Transactions on Computers
%V C-33
%N 9
%D September 1984
%P 835-844
%K Decentralized scheduling, distributed operating system, multicomputer,
parallel scheduling, task forces,
Scheduling,

%A J. C. Tilton
%T Contextual Classification of Multispectral Image Data Using Compound
Decision Theory
%J Digest of the 1983 International Geoscience and Remote Sensing Symposium
%I IEEE
%D September 1983
%C San Francisco, CA
%K MPP, Massively Parallel Processor

%A J. C. Tilton
%A S. C. Cox
%T Segmentation of Remotely Sensed Data Using Parallel Region Growing
%J Digest of the 1983 International Geoscience and Remote Sensing Symposium
%I IEEE
%D September 1983
%C San Francisco, CA
%K MPP, Massively Parallel Processor

%A C. Timsit
%T The Propal II Computer
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 154-159
%O SIMD Architectures

%A Calue Timsit
%T The ISIS Vector Super-Computer
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%I North-Holland
%D 1984
%P 561-564
%X 64-bit, 640 MFLOPS, 16 memory banks, 2.1 GB/s P->M thruput,
64 MBs primary memory upgradeable to 256 MB, F77, batch OS, 8-16 PEs,
100 MB/s mass storage rate (!), switch thruput of 266 MW/s.

%A J. W. Tippie
%A J. E. Kulaga
%T Design considerations for a multiprocessor base data acquisition system
%J IEEE Trans. on Nuclear Science
%V NS-26
%N 4
%D August 1979
%P 4548-4551
%K multiprocessor applications
%X Discusses the use of a multiprocessor system to achieve a high throughput
in data acquisition applications.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A G. Tjaden
%A M. Flynn
%T Detection and Simultaneous Execution of Independent Instructions
%J IEEE Trans. on Computers
%V C-19
%P 889-895
%D 1970

%A G. S. Tjaden
%T Hierarchical properities of concurrency
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 55-64
%K
%O operating systems

%A Garold S. Tjaden
%A Michael J. Flynn
%T Representation of Concurrency with Ordering Matrices
%J IEEE Transactions on Computers
%V C-22
%N 8
%D August 1973
%P 752-761
%K Branch instructions, concurrency, cyclic independence, independence,
resources,
Special issue on parallel computation, scheduling and queueing

%A N. G. Toan
%T Distributed Query Management for a Local Network Database System
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 188-196
%K
%O Distributed Datases

%A Nguyen Gia Toan
%T A Unified Method for Query Decomposition and Shared Information
Updating in Distributed Systems
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 679-685
%O Distributed data bases processing and control

%A F. A. Tobagi
%A F. Borgonovo
%A L. Fratta
%T Expressnet: a high-performance integrated-services local area
network
%J IEEE J. Sel. Areas Commun. (USA)
%V SAC-1
%N 5
%P 898-913
%O 23 REFS
%D 1983
%K computer networks multi access systems packet switching protocols
Expressnet integrated services local area network distributed access protocol
round robin scheduling
carrier detection time end to end network propagation delay channel data rate
packet size voice data bandwidth

%A F. A. Tobagi
%A M. Fine
%T Performance of unidirectional broadcast local area networks:
Expressnet and Fasnet.
%J IEEE J. Sel. Areas Commun. (USA)
%V SAC-1
%N 5
%P 913-926
%O 17 Refs.
Treatment PRACTICAL.
%D 1983
%K computer networks multi access systems packet switching.
unidirectional broadcast local area networks Expressnet Fasnet
packet broadcasting architectures distributed conflict free
round robin algorithm random access integrated services digital local network
%X Local area communication networks based on packet broadcasting
techniques provide simple architectures, and flexible and efficient
operation. Unidirectional broadcast systems use a unidirectional
transmission medium which, due to their physical ordering on the
medium, users can access according to some efficient distributed
conflict-free round-robin algorithm. Two systems of this type have
been presented in the literature; Expressnet and Fasnet. Three
different service disciplines achievable by these systems are
discussed and their performance compared. These systems overcome some
of the performance limitations of existing random-access schemes,
making them well suited to the high bandwidth requirements of an
integrated services digital local network.

%A Jeffrey M. Tobias
%T A Single User Multiprocessor Incorporating Processor Manipulation
Facilities
%J Proceedings of 7th Annual Symposium on Computer Architecture
%D 1980
%P 131-138
%I IEEE

%A K. W. Todd
%T High Level VAL Constructs in a Static Dataflow Machine
%R TR-262
%I Laboratory for Computer Science, MIT
%C Cambridge, MA
%D June 1981

%A Kenneth W. Todd
%T Function sharing in a static data flow machine
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 137-139
%K
MIT, VAL
%O Data flow and reduction machines

%A M. Tokoro
%A K. Tamaru
%A M. Mizuno
%A M. Hori
%T A High Level Multi-Lingual Multiprocessor KMP/II
%J Proceedings 7th Annual Symposium on Computer Architecture
%D May 1980
%C La Baule, France
%P 325-333

%A M. Tokoro
%A J. R. Jagannathan
%A H. Sunahara
%T On the Working Set Concept for Data-Flow Machines
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 11
%N 3
%D 1983
%P 90-97
%O Data Flow Architectures

%A Mario Tokoro
%A Taisuke Watanabe
%A Katsura Kawakami
%A Jun Sugano
%A Katsuhiko Moda
%T PM/II \(em Multiprocessor Oriented Byte-Sliced LSI Processor Modules
%J Proceedings of the National Computer Conference
%D 1977
%V 46
%I AFIPS
%P 217-225

%A H. Tokuda
%A E. G. Manning
%T An interprocess communication model for a distributed software
testbed
%J Comput. Commun. Rev. (USA), SIGCOMM '83 Symposium on Communications
Architectures & Protocols
%V 13
%N 2
%C Austin, TX, USA
%P 205-212
%O 20 REFS
Treatment PRACTICAL
%D 8-9 March 1983
%K program testing distributed processing
interprocess communication model distributed software testbed Shoshin
message communication
user level protocols multiprocess structure protocol management
%X Describes the design and implementation of an IPC model for a
distributed software testbed Shoshin. The IPC model was designed to
provide a reliable message communication among distributed processes
and to support implementations of user level protocols for various
applications. A multiprocess structure, which separates a link level
and a transport level, has been used to provide a flexible protocol
management. The basic performance of the current implementation and
the extensibility of the model are also discussed

%A S. G. Tolchin
%A S. A. Kahn
%A E. S. Bergan
%A G. P. Gafke
%T A distributed hospital information system
%B 4th Jerusalem Conference on Information Technology (JCIT). Next
Decade in Information Technology
%C Jerusalem, Israel
%D 21-25 May 1984
%P 620-631
%O 14 REFS. Treatment APPLICATIONS, PRACTICAL
%I IEEE Comput. Soc. Press. Silver Spring, MD, USA, xii+720,
Std Book No.0 8186 0535 9
%K medical administrative data processing local area networks
distributed hospital information system intelligent
local area communications network LACN UCSF Medical Center
outpatient pharmacy clinical laboratory radiology medical records
fiber optic communications medium communications protocol local area network

%A D. Tolle
%A W. Siddall
%T On the Complexity of Vector Computations in Binary Tree Machines
%J Information Processing Letters
%V 13
%D 1981
%P 120-124

%A D. Tolle
%A W. Siddall
%T On the Complexity of Vector Computations in Binary Tree Machines
%J Inform. Process. Lett.
%V 3
%P 120-124
%D 1981

%A D. M. Tolle
%T Implementing FFP Trees in Binary Trees: An Architectural Proposal
%J Proceedings of the 1981 Conference on Functional Programming
Languages and Computer Architecture
%D October 1981
%P 115-122

%A R. M. Tomasulo
%T An Efficient Algorithm for Exploiting Multiple Arithmetic Units
%J IBM J. Research and Development
%P 25-33
%D 1967

%A S. Tomita
%A K. Shibayama
%A T. Kitamura
%A T. Nakata
%A H. Hagiwara
%T A User-Microprogrammable, Local Host Computer with Low-Level
Parallelism
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 11
%N 3
%D 1983
%P 151-159
%O Multiple Functional Unite Processors

%A T. Della Torre
%A J. Roitman
%T An array of computing memory cells
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 102
%K
%O Processor components
%X Short summary.

%A S. Toueg
%T Randomized Asynchronous Byzantine Agreements
%J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing
%I ACM
%D August 1984

%A Roy F. Touzeau
%T A FORTRAN Compiler for the FPS-164 Scientific Computer
%J Proc. SIGPLAN '84 Symposium on Compiler Construction, SIGPLAN Notices
%I ACM
%V 19
%N 6
%D June 1984
%P 48-57
%K array processor,
%X A paper describing the architecture and the compiler of the FPS-164
by a member of the FPS staff.

%A R. Towle
%T Control and Data Dependence for Program Transformations
%R PhD thesis, Report 76-788
%I Computer Science Dept., University of Ill.
%C Urbana-Champaign, Ill.
%D March 1976

%A Ross A. Towle
%A Richard P. Brent
%T On the time required to parse an arithmetic expression for parallel
processing
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 254
%K
%O Language issues

%A D. Towsley
%A J. K. Wolf
%T On adaptive tree polling algorithms
%J IEEE Trans. Commun. (USA)
%V COM-32
%N 12
%P 1294-1298
%O 12 REFS. Treatment THEORETICAL
%D Dec. 1984
%K adaptive systems computer networks trees (mathematics)
data communication networks computer networks
adaptive tree polling algorithms binary state
Bernoulli random variables feedback signal

%A D. F. Towsley
%T The effects of CPU: I/O overlap on computer system configurations
%J Proc. 5th Ann. Symp. on Computer Architecture
%C Palo Alto, California
%D April 1978
%P 238-241
%K performance
%X Presents a model describing the overlap of processing and I/O in multi-
processor systems.  The model allows an evaluation of the effectiveness of
a number of multiprocessor designs.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%T Transactions and Consistency in Distributed Database Systems
%A Irving L. Traiger
%A Jim Gray
%A Cesare A. Galtieri
%A Bruce G. Lindsay
%J ACM Transactions on Database Systems
%V 8
%N 1
%D September 1982
%P 323-342
%K Data replication, data partitioning, concurrency control, recovery.
H.2.4[Database Management]: Systems-distributed systems; transaction
processing

%A J. Traub
%T Complexity of Sequential and Parallel Numerical Algorithms
%I Academic Press
%D 1973

%A J. Traub
%T Iterative Solution of Tridiagonal Systems on Parallel or Vector Computers
%E J. Traub
%B Complexity of Sequential and Parallel Numerical Algorithms
%I Academic Press
%D 1973
%P 49-82

%T An Abstract Architecture for Parallel Graph Reduction
%A Kenneth R. Traub
%I Massachusetts Institute of Technology
%R MIT/LCS/TR-317

%A Kenneth R. Traub
%T An Abstract Parallel Graph Reduction Machine
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K data flow and reduction
%C Boston, MA
%P 333-341

%A H. L. Tredennick
%A T. A. Welch
%T High-Speed Buffering for Variable Length Operands
%J Proceedings of 4th Annual Symposium on Computer Architecture
%D 1977
%K U Texas, Sperry Research Center
%K Network Architecture
%P 205-2ll

%A P. Treleaven
%T Decentralized Computer Architectures
%E J. Tiberghien
%B New Computer Architectures
%I Academic Press
%C Orlando, FL
%D 1984

%A P. C. Treleaven
%T Principal Components in Data Flow Computers
%B Large Scale Integration: Technology, Applications and Impacts: Fourth
EUROMICRO Symposium on Microprocessing and Microprogramming
%E H. W. Lawson, Jr.
%E H. Brendt
%E G. Hermanson
%D October 1978
%P 366-374

%A P. C. Treleaven
%T Exploiting Program Concurrency in Computing Systems
%J Computer
%I IEEE
%V 12
%N 1
%D January 1979
%P 42-50

%A P. C. Treleaven
%T VLSI Machine Architecture and Very High Level Languages
%R Tech. Rep. 156
%I Univ. of Newcastle upon Tyne
%d Dec. 1980
%J SIGARCH Computer Architecture News
%V 8
%N 7
%D 1980

%A P. C. Treleaven
%A R. P. Hopkins
%T Decentralized Computation
%J Proceedings of 8th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 9
%N 3
%D May 1981
%P 279-289
%K parallel processing
%X A survey of distributed computing including data flow.

%A P. C. Treleaven
%A R. P. Hopkins
%A P. W. Rautenbach
%T Combining Data Flow and Control Computing
%J Compt. J.
%V 25
%N 1
%D February 1982

%A Philip C. Treleaven
%A Geoffrey F. Mole
%T A Multi-Processor Reduction Machine for User-Defined Reduction
Languages
%J Proceedings of 7th Annual Symposium on Computer Architecture
%D 1980
%K University of Newcastle upon Tyne
%P 121-130

%A Philip C. Treleaven
%T A Recursive Computer Architecture for VLSI
%J The 9th Annual Symposium on Computer Architecture, SIGARCH Newsletter
%r Tech. Rep. 161
%i Univ. of Newcastle upon Tyne
%d March 1981
%V 10
%N 3
%D April 1982
%P 229-238

%A Philip C. Treleaven
%A David R. Brownbridge
%A Richard P. Hopkins
%T Data-Driven and Demand-Driven Computer Architecture
%J Computing Surveys
%V 14
%N 1
%D March 1982
%P 93-143
%K Recomended,
CR Categories and Subject Descriptors: C.0 [Computer System Organization]:
General - hardware/software interfaces; system archiectures; C.1.2
[Processor Architecture]: Multiple Data Stream Architectures
(Multiprocessors); C.1.3 [Processor Architecture]: Other Architecture
Styles - data flow architectures; high level language architectures;
D.3.2 [Programming Languages]: Language Classifications - data-flow
languages; macro and assembly languages; very high-level languages
General Terms: Design
Additional Key Words and Phrases: Demand = driven architecture,
data = driven architecture

%A Philip C. Treleaven
%T Decentralised Computer Architectures
%E J. Tiberghien
%B New Computer Architectures
%I Academic Press
%C London, England
%D 1984
%P 1-58
%K Dataflow, reduction, data driven computation, demand driven computation,
functional languages, communications, survey,

%A Philip C. Treleaven
%A Isabel Gouveia Lima
%T Future Computers: Logic, Data Flow, ..., Control Flow?
%J Computer
%V 17
%N 3
%D March 1984
%P 47-58
%X Survey based around Fifth-generation computer idea
(This was a special issue on Japanese computer technology).
Mentions supercomputers, but concentrates on Treleaven's ideas on
decentralized computation published elsewhere.
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984, pp. 586-596.

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T An Architecture for Parallel Processing of "Sparse" Data Streams
%A Tom Trilling
%P 298-305
%O Special Purpose Architectures

%A A. R. Tripathi
%A G. J. Lipovski
%T Packet switching in banyan networks
%J Proc. 6th Annual Symp. on Computer Architecture
%I IEEE
%D April 1979
%P 160-167
%K U Texas, TRAC

%A A. R. Tripathi
%A E. T. Upchurch
%A J. C. Browne
%T An overview of research directions in distributed processing
%J Fall 1980 Compcon
%I IEEE
%D 1980
%P 333-340

%A Anand R. Tripathi
%A G. Jack Lipovski
%T Packet Switching in Banyan Networks
%J Proceedings of 6th Annual Symposium on Computer Architecture
%D 1979
%K University of Texas at Austin
%P 160-167

%A Kishor S. Trivedi
%T On the Paging Performance of Array Algorithms
%J IEEE Transactions on Computers
%V C-26
%N 10
%D October 1977
%P 938-947
%K Array language, compiler, compiler optimization, demand prepaging,
locality, matrix algorithm, paging performance, prepaging,
submatrix algorithm,
Computer architecture

%A Kishor S. Trivedi
%A Lt.C. Robert L. Leech
%T The Design and Analysis of a Distributed Computer System
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 125-131
%O Distributed Processing

%A Kishor Shridharbai Trivedi
%T On the Design and Use of High Performance Computing Systems
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 287-292
%K multi-processors and parallel computers
%X Yet another survey of terms and defintions (e.g multitasking
and multi programming, SIMD and MIMD, pipelining).

%A James L. Troy
%T Computer simulation of PEPE and its host at the instruction level
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 187
%K
%O PEPE
%X This is a summary.

%A Stephen R. Troyer
%T Sparse Matrix Multiplication
%I NTIS
%R PB-180035
%D June 1968
%K ILLIAC IV,
%X Algorithms for multiplying spare time sparse, sparse times dense,
and dense times sparse matrices.  Maximum rank of the matrices is
256.  Algorithm was implemented in ILLIAC IV assembly language.

%A Vito A. Trujillo
%T System architecture of a reconfigurable multi-micro-processor research
system
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 350-352
%K
MIMD, LANL, Pup
%O Multi-microprocessors

%A M. M. Tsao
%T A Study of Transient Errors on Cm*
%R Master's thesis
%I CMU
%D 1978

%A N. T. Tsao-Wu
%A D. C. Opferman
%T On Permutation Algorithms for Rearrangeable Switching Networks
%J Proc. 1969 Int. Conf. Communications
%P (10-29)-(10-34)

%A F. M. Tse
%T A multi-micro system for I/O intensive applications
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 144-147
%K
DIMENSION AIS/System 85, Multibus
special purpose processors

%T A VLSI-Based Multiprocessor Architecture for Implementing Parallel
Algorithms
%A P. S. Tseng
%A K. Hwang
%A V. K. Prasanna Kumar
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 657-664
%K Multiprocessor Systems

%A Yung H. Tsin
%T Bridge-connectivity and biconnectivity algorithms for parallel computer
models
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 180-182
%K
SIMD, VLSI
non-numerical algorithms

%A J. Tsoras
%T The Massively Parallel Processor (MPP) Innovation in High Speed Processors
%J AIAA Computers in Aerospace Conference
%V III
%D October 1981
%K Recommended,

%T CALTECH/JPL Mark II Hypercube Concurrent Processor
%A J. Tuazon
%A J. Peterson
%A M. Pniel
%A D. Liberman
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 666-673
%K Parallel Systems

%T Memory Efficient Solution of the Primitive Equations For Numerical
Weather Prediction on The CYBER 205
%A James J. Tuccillo
%J CYBER 200 Applications Seminar
%R NASA Conference Publication 2295
%D October 1983
%E J. Patrick Gary, Compiler
%I NASA Goddard Space Flight Center
%C Greenbelt, Maryland
%P 35-60

%A R. Tugender
%T Maintaining order and consistency in multi-access data
%J Proc. Nat. Computer Conf.
%I AFIPS Press
%C Montvale, New Jersey
%D 1979
%P 869-874

%A D. L. Tuomenoksa
%A Howard Jay Siegel
%T Analysis of multiple-queue task scheduling algorithms for multiple-
SIMD machines
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 114-121
%K
%O Distributed operating systems

%A D. L. Tuomenoksa
%A Howard Jay Siegel
%T Preloading Schemes for the PASM Parallel Memory System
%J Proc. 1983 Parallel Processing Symp.
%I IEEE
%D Aug. 1983
%P 407-415

%A David Lee Tuomenoksa
%A Howard Jay Siegel
%T Analysis of the PASM control system memory hierarchy
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 363-370
%K
Purdue, SIMD/MIMD,
%O Multi-microprocessors

%T Task Preloading Schemes for Reconfigurable Parallel Processing Systems
%A David Lee Tuomenoksa
%A Howard Jay Siegel
%J IEEE Transactions on Computers
%V C-33
%N 10
%D October 1984
%P 895-905
%K Distributed Processing, memory management multimicroprocessor systems,
multiple-SIMD machines, parallel processing, PASM, performance
evaluation, reconfigurable computer systems, scheduling,
Reconfigurable systems

%T Task Scheduling on the PASM Parallel Processing System
%A David Lee Tuomenoksa
%A Howard Jay Siegel
%J IEEE Transactions on Software Engineering
%V SE-11
%N 2
%D February 1985
%P 145-156
%K Distributed processing, multimicro computer systems, multiple-SIMD systems,
parallel processing, partitionable SIMD/MIMD systems, PASM,
performance evaluation, reconfigurable computer systems, scheduling
%O Parallel processing

%A David Lee Tuomenoska
%A Howard Jay Siegel
%T Preloading schemes for the PASM parallel memory system
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 407-415
%K
Purdue U, PASM, prescheduling, prediction
scheduling resources

%A D. A. Turner
%T A New Implementation Technique for Applicative Languages
%J Software \(em Practice and Experience
%V 9
%N 1
%D January 1979
%P 31-49

%A D. A. Turner
%T Another Algorithm for Bracket Abstraction
%J Journal of Symbolic Logic
%V 44
%N 2
%D June 1979
%P 267-270

%A David Turner
%T Combinator Reduction Machines
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 5.26-5.38
%O Reduction language architectures

%A R. E. Twogood
%T Array Processor Implementation of 2-D Digital Filters
%R UCRL-82472
%D March 15, 1979
%I National Technical Information Service
%C Springfield, VA 22151

%T The Performance of a Fault-Tolerant Multistage Interconnection Network
%A Nian-Feng Tzeng
%A Pen-Chung Yew
%A Chuan-Qi Zhu
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 458-465
%K Network Performance

%A Nian-Feng Tzeng
%A Pen-Chung Yew
%A Chuan-Qi Zhu
%T A Fault-Tolerant Scheme for Multistage Interconnect Networks
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K Interconnection Networks
%C Boston, MA
%P 368-375

%A Y. K. Tzu
%A S. T. Yang
%A C. H. Yue
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T An Analysis on a New Memory System for Conflict-free Access
%P 318-324
%O Performance Evaluation

%A K. Uchida
%A Y. Seta
%A Y. Tanakura
%T The FACOM 230-75 Array Processor System
%J Proc. 3rd USA-Japan Computer Conf.
%D 1978
%P 369-374

%A Shunichi Uchida
%A Tetsuya Higuchi
%T A Multi-Minicomputer system for Picture Processing Experiments and
its Interconnection Mechanism
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 88-94
%K Picture oriented poly processor system (POPS)
%O Special Purpose Architectures

%A L. Uhr
%T A Language for Parallel Processing of Array, Embedded in PASCAL
%B Languages and Architectures for Image Processing
%E M. J. B. Duff
%E S. Levialdi
%I Academic Press
%C New York, NY
%D 1981
%P 53-87

%A L. Uhr
%T Pyramid Multi-computer Structures, and Augmented Pyramids
%E M. J. B. Duff
%B Computing Structures for Image Processing
%I Academic Press
%D 1983
%P 95-112

%A Leonard Uhr
%T Towards Very Large Multi-Computers
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 1-6

%A Leonard Uhr
%A Larry Schmitt
%A Pat Hanrahan
%T Cone/Pyramid Perception Programs for Arrays and Networks
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 179-191

%A Leonard Uhr
%T Comparing Serial Computer, Arrays, and Networks Using Measures of
"Active Resources"
%J IEEE Transactions on Computers
%V C-31
%N 10
%D October 1982
%P 1022-1025
%K Active resources, evaluating computer power, image processing, MIMD,
parallel computers, processor-memory ration, SIMD,
Special issue on computer architecture for pattern analysis and image
database management

%A Leonard Uhr
%T Pyramid Multi-computer, and Extensions, and Augmentations
%I CS Dept., Univ. of Wis.
%R TR #523
%D November 1983
%P 95-112
%X See also, Uhr's paper in Duff.

%A Leonard Uhr
%T Feasible Multi-Computer Architectures, Given 3-Dimensional Stacked Wafers
%R CS TR #518
%I Computer Sciences Dept., Univ. Wisc.
%C Madison, WI
%D October 1983

%A Leonard Uhr
%T Algorithm-Structured Computer Arrays and Networks
%I Academic Press
%D 1984
%X A very basic survey of multiprocessors and computer networks.
It tends to over simplify much, and it uses $$ (dollars) too much.
It is particularly disappointing in its coverage of various algorithms.

%A Jeffrey D. Ullman
%T Some Thoughts About Supercomputer Organization
%J Digest of Papers COMPCON, Spring 84
%I IEEE
%D Feb. 1984
%P 424-432
%K Sorting, networks, batch-and-binsort, two-way search,
AI architectures,
%X Oriented to covering problems like sorting and searching on supercomputers.

%A Michael K. Ullner
%T Parallel Machines for Computer Graphics
%I California Institute of Technology
%R Technical Report 5112
%D January 7, 1983
%K ray tracing, distributed computation,

%A J. M. Ulm
%T A timed token ring local area network and its performance
characteristics
%B 7th Conference on Local Computer Networks
%C Minneapolis, MN, USA
%P 50-56
%O 11 Refs
Treatment PRACTICAL
%D 11-13 Oct. 1982
%K computer networks protocols
timed token ring local area network performance characteristics
timed token protocol ring topology
%X Discusses a timed token ring local area network and its performance
characteristics. The timed token protocol allows the integration of
digital voice, interactive data communications and large file
transfers over the same network. The performance of this protocol on
a ring topology is analyzed with respect to channel capacity, network
cable length, number of stations and other system parameters

%A Hiroshi Umeo
%T A Class of SIMD Algorithms Implemented on Systolic VLSI Arrays
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 374-376
%O array computations

%A S. Umeyama
%A K. Tamura
%T A Parallel Execution Model of Logic Programs
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%D 1983
%V 11
%N 3
%P 349-355
%O architectural support for high level languages

%A Vincent Ung
%T An Efficient multiprocessor architecture
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 213-218
%K
%O Multiple-microprocessors

%l proceedings-article
%A D. Ungar
%A R. Blau
%A P. Foley
%A D. Samples
%A D. Patterson
%T Architecture of SOAR: Smalltalk on a Risc
%J 11th Annual International Symposium on Computer Architecture
%I SIGARCH
%D 1984
%P 188-197
%K object oriented architectures reduced instruction set architectures
tagged object oriented architectures garbage collection

%A S. H. Unger
%T A Computer Oriented Toward Spatial Problems
%J IRE Proceedings
%V 46
%D October 1958
%P 1744-1750

%A E. Upfal
%T Efficient Scheme for Parallel Communications
%T Language Constructs and Support Systems for Distributed Computing
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 55-59

%T Utilizing an Executable Specification Language for an Information
System
%A Susan D. Urban
%A Joseph E. Urban
%A Wayne D. Dominick
%I IEEE Computer Society
%D July 1985
%K Abstract execution, executable specifications, information storage and
retrieval, prototyping.

%A G. Urschler
%T The transformation of flow diagrams into maximally parallel form
%J Proceedings of the 1973 Sagamore Computer Conference
%D August 1973
%I IEEE
%P 38-46
%K
%O Languages

%T Fault Reconfiguration in a Distributed MIMD Environment with Multistage
Network
%A M. Umit Uyar
%A Anthony P. Reeves
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 798-806
%K Fault Tolerance and Reliability

%A Mmit U. Uyar
%A Anthony P. Reeves
%T Fault Reconfiguration for the Near Neighbor Problem in a Distributed
MIMD Environment
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%P 372

%A K. Vairavan
%A Richard A. DeMillo
%T On the Computational Complexity of a Generalized Scheduling Problem
%J IEEE Transactions on Computers
%V C-25
%N 11
%D November 1976
%P 1067-1073
%K Complexity of scheduling, generalized scheduling, parallel computation,
task systems with control structures
%X
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A K. Vairavan
%A V. Vairavan
%T A Model for the Parallel Representation and Execution of Programs
%J Computer Software and Applications Conference (COMPSAC80)
%I IEEE
%D October 1980
%P 295-298
%O Distributed systems

%A M. Vajtersic
%T A Fast Parallel Method for Solving the Biharmonic Boundary Value
Problem on a Rectangle
%J Proc. First European Conference on Parallel Distributed Processing
%C Toulouse
%P 136-141
%D 1979

%A M. Vajtersic
%T Solving Two Modified Discrete Poisson Equations in 7 Log N Steps on N2
Processors
%J CONPAR81
%P 473-432
%D 1981

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T Fast Parallel Biharmonic Semidirect Solvers
%A Marian Vajtersic
%P 135
%O Arithmetic Processing
%X Summary only.

%A Marian Vajtersic
%T Parallel Poisson and biharmonic solvers implemented on the EGPA
multiprocessor
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 72-81
%K
Slovak Acad. of Sci, EGPA
%O Numerical algorithms

%A J. C. Valadier
%A D. R. Powell
%T On CSMA Protocols Allowing Bounded Channel Access Times
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 146-153
%O Protocols for local area networks

%A I. Valet
%T Multipoint transport protocol for satellite systems
%B NETWORKS India 84. International Symposium on Data Communication
and Computer Networks
%C Madras, India
%D 19-21 Oct. 1984
%P 131-132
%O 0 REFS. Treatment PRACTICAL
%E H. N. Mahabala
%E K. B. Lakshmanan
%E S. Srinivasan
%I Comput. Soc. India, IFIP, UNESCO
%K protocols satellite relay systems
multipoint transport protocol satellite systems
satellite communication systems NADIR
multipoint bulk data transport service OSI Reference Model
%X Summary form only given, substantially as follows: The French
NADIR pilot project studies and experiments with computer
communication using satellite systems such as Telecom1, which was
launched in August 1984. Among basic tools developed by the project
new protocols were designed to meet the requirements of satellite
communication systems and to offer specific facilities to user. As
broadcasting facility is a natural property of satellites
multipoint links will be available on satellite systems. The NADIR
project has designed and implemented a communication system which
offers a multipoint bulk data transport service over such a link
for high data rates (up to 2 Mb/s), and several receivers (up to
32). This communication system is described along with the
requirements of the OSI Reference Model

%A L. G. Valiant
%T Optimality of a two-phase strategy for routing in interconnection networks
%J IEEE Transactions on Computers
%V C-32
%N 9
%D September 1983
%P 861-863
%K
complexity, interconnection network, parallel computer, routing, shuffle
graph

%A P. E. Valisalo
%T A Binary Method to Automatically Select the Best Value of Coefficient
a [Alpha] for Adaptive Smoothing Within a Hybrid Computer System
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 315-318
%K application of hybrid computer systems

%A Jerry Vanaken
%A Gregory E. Zick
%T The X-Pipe:  A Pipeline for Expression Trees
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 238-245
%O Arithmetic Processors
%X Proposed low cost answer to expensive vector machines which as
Cray-1s.  Concerns itself with instruction level-pipelining.
Not meant to compete with SIMD or MIMD machine either.

%T The Expression Processor: A Pipelined, Multiple-Processor Architecture
%A Jerry R. Vanaken
%A Gregory L. Zick
%J IEEE Transactions on Computers
%V C-30
%N 8
%D August 1981
%P 525-536
%K Arithmetic expression, binary-tree network, multiple-processor
architecture, overlap and pipelining, parallelism

%A R. Varga
%T Matrix Iterative Analysis
%I Prentice Hall
%C Englewood Cliffs, NJ
%D 1962
%X Remove?

%T Realization of Permutations on Generalized Indra Networks
%A A. Varma
%A C. S. Raghavendra
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 328-333
%K Interconnection Networks

%T Performance Analysis of a Redundant-Path Interconnection Network
%A A. Varma
%A C. S. Raghavendra
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 474-479
%K Network Performance

%A P. J. Varman
%A I. V. Ramakrishnan
%T Dynamic programming and transitive closure on linear pipelines
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 359-364
%K CHiP,
%O array computations

%A Peter J. Varman
%A Donald S. Fussell
%T Design of robust systolic algorithms
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 458-460
%K
VLSI processor arrays

%A Yaakov L. Varol
%A Susan V. Vrbsky
%T Distributed Query Processing Allowing for Redundant Data
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 389-396
%O Distributed query processing

%A P. K. T. Vaswani
%T The Demos Multi-Computer Project: Hardware Aspects
%I National Physical Laboratory
%R NPL Report DITC 36/84
%D January 1984
%X Nasa Report N84-28493

%A Russell F. Vaughan
%A Mark S. Anastas
%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T Limiting Multiprocessor Performance analysis
%P 55-64
%O Models and analysis of Parallel Computation

%A J. Vavrus
%T Machine Interface Entry Points for Time Warp Operating System
%D July 1984
%R Internal memo 96
%I California Institute of Technology
%C Pasadena, CA
%K Caltech Cosmic Cube, hypercube, C^3P

%A B. Del Vecchio
%A A. Ferrier
%T PHLOX, Database management systems for micro-computers
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 92-97
%K
%O Database Management Systems

%A Rex Vedder
%A Dennis Finn
%T The Hughes Data Flow Multiprocessor: Architecture For Efficient Signal
and Data Processing
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K data flow and reduction, bussed cube (3x3x3) design,
%C Boston, MA
%P 324-332

%A Rex Vedder
%A Michael Campbell
%A George Tucker
%T The Hughes Data Flow Multiprocessor
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Data Flow Systems
%P 2-9
%X Like a similar paper pulbished in the Computer Architecture Conference
for this year.

%A A. H. Veen
%T Reconciling Data Flow Machines and Conventional Languages
%r Tech. Report 1W 146/80
%i Mathematical Center, Amsterdam
%d September 1980
%J CONPAR 81: Conference on Analysing Problem Class and Programming for
Parallel Computing, Lecture Notes in Computer Science 111
%D June 1981
%P 127-140

%A V. Vemuri
%A W. J. Karplus
%T Digital Computer Treatment of Partial Differential Equations
%I Prentice-Hall
%C Englewood Cliffs, NJ
%D 1981

%A V. Venkayya
%A D. Calahan
%A P. Summers
%A V. Tischler
%T Structural Optimization on Vector Processors
%J Impact of New Computing Systems on Computational Mechanics
%I The American Society of Mechanical Engineers
%E A. Noor
%D 1983
%P 155-190

%A Jean-Pierre Verjus
%T Synchronization in Distributed Systems: an Informal Introduction
%E Y. Paker
%E J.-P. Verjus
%B Distributed Computing Systems (Synchronization, Control and Communication)
%I Academic Press
%D 1983
%P 3-22

%A R. Vichnevetsky
%A R. Stepleman, (Ed.)
%T Advances in Computer Methods for Partial Differential Equations
%J Proc. of the Fifth IMACS International Symposium
%V V
%I Lehigh University
%D June 1984
%X Remove?

%T The TAMIPS Multiprocessor
%A Jouko Viitanen
%A Pertti Vanni
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 643-645
%K Multiprocessor Systems

%A Bostjan Vilfan
%T Other Proof of the Two-Dimensional Cayley-Hamilton Theorem
%J IEEE Transactions on Computers
%N 12
%D December 1973
%P 1140-1143
%K Associative processors, computer architecture, parallel processors,
special-purpose computers,
Correspondence
%X
Abstract-This correspondence considers the cost and performance factors in
computer architecture and how they apply to parallel processors

%A F.-Y. Villemin
%T SERFRE: A general-purpose multi-processor reduction machine
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 140-141
%K
FP
%O Data flow and reduction machines

%A Uzi Vishkin
%T Synchronous Parallel Computation \(em A Survey
%R ULTRACOMPUTER NOTE #53, TR #71
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D April 1983
%X Reviews ten basic algorithms from the literature.

%A Uzi Vishkin
%A Avi Wigderson
%T Dynamic Parallel Memories
%R ULTRACOMPUTER NOTE #54
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D April 1983
%X To appear in \fIInformation and Control.\fP

%A Uzi Vishkin
%T An Optimal Parallel Algorithm for Selection
%R ULTRACOMPUTER NOTE #64, TR #106
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D December 1983

%A Uzi Vishkin
%T On Choice of a Model of Parallel Computation
%R ULTRACOMPUTER NOTE #50, TR #61
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D February 1983

%A Uzi Vishkin
%T A Parallel-Design Distributed-Implementation (PDDI) General-Purpose Computer
%R ULTRACOMPUTER NOTE #58, TR #96
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D June 1983
%X To appear in \fITheoretical Computer Science.\fP

%A Uzi Vishkin
%T O(log n) and optimal parallel biconnectivity algorithms
%R ULTRACOMPUTER NOTE #51, TR #69
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D March 1983

%A Uzi Vishkin
%A Avi Wigderson
%T Trade-offs Between Depth and Width in Parallel Computation
%R ULTRACOMPUTER NOTE #56
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D September 1983
%X To appear in \fISICOMP\fP.

%A Uzi Vishkin
%T Lucid-Boxes vs. Black-Boxes
%R ULTRACOMPUTER NOTE #65
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D September 1983

%A J. Vocar
%T Image Magnification
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 216
%K
%O Algorithms and applications

%A W. G. Vogt
%A M. H. Mickle
%T Modeling and Simulation
%B Proceedings of the Fourteenth Annual Pittsburgh Conference
%C Pittsburgh, PA, USA
%D 21-22 April 1983
%V 14
%P 57
%O Treatment GENERAL
%K power systems control systems digital simulation biomedical engineering
process control social sciences
socioeconomics power system planning digital simulation
solar heating system ecological systems systems analysis identification
control systems process control geography regional science
medical modelling biological sciences human factors production engineering
modelling theory robotics computer networks public sector planning
flexible spacecraft
%X The following topics were dealt with: power system modelling and
planning; digital simulation; solar heating system modelling;
ecological systems; engineering systems analysis and identification;
control systems; process control; geography and regional science;
medical modelling; biological sciences; human factors; industrial
production engineering; modelling theory; robotics; computer
networks; public sector planning; socio-economics; and flexible
spacecraft modelling

%A R. Voigt
%A D. Gottlieb
%A M. Hussaini, (Ed.)
%T Spectral Methods for Partial Differential Equations
%I SIAM
%C Philadelphia
%D 1984

%A R. G. Voigt
%T The influence of vector computer architecture on numerical algorithms
%E D. Kuck
%E D. Lawrie
%E A. Sameh
%B High Speed Computer and Algorithm Organization
%I Academic Press
%P 229-244
%r ICASE Report No. 77-8
%d March 21, 1977

%A R. Voitus
%T A Multiple Process Software Package for the Finite Element Machine
%I University of Colorado
%R Computer Science Dept. Report
%D 1981
%K FEM

%A R. Vollmar
%T Cellular Spaces and Parallel Algorithms \(em An Introductory Survey
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 49-58
%X A small survey on basic cellular automata including parallel algorithms
and languages.

%A David C. Van Voorhis
%A Thomas H. Morrin
%T Memory Systems for Image Processing
%J IEEE Transactions on Computers
%V C-27
%N 2
%D February 1978
%P 113-125
%K Array processor, array storage, image processing, memory system,
parallel memory, parallel processor,
Memory systems

%A K. Vorgrimler
%T Enhancement of computing power in multiprocessor systems for processing
of digitized pictures
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 11-17
%K
%O applications: image processing

%A K. Vorgrimler
%A P. Gemmar
%T Structural Programming of a Multiprocessor System
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 191-195
%K FMPP (Flexible Multi Pipeline Processor), image processing,
industrial and industrial like projects
%X A 16 PE multi pipeline system for image analysis.

%A H. van der Vorst
%T A Vectorizable Variant of Some ICCG Methods
%J SIAM J. Sci. Stat. Comp.
%V 3
%P 350-356
%D 1981

%A H. van der Vorst
%T On the Vectorization of Some Simple ICCG Methods
%J First Int. Conf. Vector and Parallel Computation in Scientific
Applications
%C Paris
%D 1983

%A N. Vosbury
%A C. Bryant
%T System Software for Experiments in Distributed Computing on Distributed
Testbed
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 410-415
%K
%O Distributed Testbeds for Real Time Systems

%A K. Voss
%T Stepwise Specification of a Distributed Database System
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 218-225
%K
%O Distributed Databases

%A J. Vrolijk
%A P. L. Pearson
%A J. S. Ploem
%T TAL: An Interpretive Language for the Leyden Television Analysis System
%B Languages and Architectures for Image Processing
%E M. J. B. Duff
%E S. Levialdi
%I Academic Press
%C New York, NY
%D 1981
%P 125-137

%A Dalibor Vrsalovic
%A Daniel P. Siewiorek
%A Zary Z. Segall
%A Edward F. Gehringer
%T Performance prediction for multiprocessor systems
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 139-146
%K cyclic processing power (CP), analytic model, speedup,
%O performance modeling
%X A new analytic method for measuring multiprocessor power is presented.
This contrasts to simple speedup measures.  Three codes were tested for
sensitivity in differences in hardware, algorithms, and so on.

%A Dalibor Vrsalovic
%A Edward F. Gehringer
%A Zary Z. Segall
%A Daniel P. Siewiorek
%T The Influence of Parallel Decomposition Strategies on the Performance
of Multiprocessor Systems
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K Multiprocessor Performance, measurement,
%C Boston, MA
%P 396-405

%A A. M. Vural
%T Comparative Performance Study of Adaptive Array Processors
%J Conf. Record, IEEE Int'l Conf. Acoustics, Speech and Signal Processing
%D 1977
%P 695-700

%A W. W. Wadge
%T An Extensional Treatment of Dataflow Deadlock
%J Theoretical Computer Science
%V 13
%N 1
%D January 1981
%P 3-15

%A R. Wagner
%T Parallel Solution of Arbitrarily Sparse Linear Systems
%I Duke University
%R Dept. of Comp. Sci. Report No. CS-1984-13
%D 1984

%A R. A. Wagner
%T The Boolean Vector Machine (BVM)
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 11
%N 3
%D 1983
%P 59-66
%K
%O VLSI architecture

%A E. B. Wagstaff
%A F. J. Mowle
%T Integrated High Speed Parallel-Sequential Computer
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 343-346
%K STARAN, Univac 1108, CDC 6600,
multi-processors and parallel computers
%X Experiences interconnecting an associative processor to a Univac
multiprocessor.

%A B. W. Wah
%A Y. W. Ma
%T MANIP \(em A Parallel Computer System for Implementing Branch and Bound
Algorithms
%J Proceedings of 8th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 9
%N 3
%D May 1981
%P 239-262
%O parallel processing

%A B. W. Wah
%T A Comparative Study of Distributed Resource Sharing on Multiprocessors
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%D 1983
%V 11
%N 3
%P 301-308
%O interconnection networks

%A Benjamin W. Wah
%A Anthony Hicks
%T Distributed Scheduling of Resources on Interconnection Networks
%E H. L. Morgan
%J National Computer Conference \(em Proceedings
%V 51
%D 1982
%P 697-709
%C Houston TX, USA
%O 23 Refs
Treatment THEORETICAL/MATHEMATICAL
%I AFIPS Press
Arlington, VA, USA, p: xi+843, P:
%K computer networks scheduling operating systems
computer networks OS interconnection networks distributed scheduling
resources address mapping problem control signals priority
multiple requests distributed cross bar switch distributed Omega
binary n cube networks exchange box
%X The authors have studied the distributed scheduling of resources on
interconnection networks. The resource scheduling problem is
different from the conventional address mapping problem on
interconnection networks because a request is not directed towards a
particular destination address but to any one of a pool of
destination addresses for free resources. To design an algorithm with
the minimum transfer of control signals, priority is associated with
the scheduling of multiple requests. This is illustrated by the
distributed cross-bar switch which has one signal line in each
direction of a switch node. For complete asynchronous operation, more
signal lines are needed. This is illustrated by the distributed Omega
and binary n-cube networks. Each exchange box in the network operates
independently to resolve conflicts. The performance of the
distributed scheduling algorithm for the Omega and cube networks is
compared against the optimal centralized scheduling algorithm which
has about 1% average blocking probability. The performance
degradation is less than 20% in all cases. The theory of the design
can be applied to other interconnection networks

%A Benjamin W. Wah
%T A Comparative Study of Distributed Resource Sharing on Multiprocessors
%J IEEE Transactions on Computers
%V C-33
%N 8
%D August 1984
%P 700-711
%K address mapping, crossbar switch, multistage dynamic network, queueing delay,
resource sharing, shared bus,
RSIN (resource-sharing interconnection network), Omega network,
interconnection networks
distributed processing multiprocessing programs multiprocessing systems
scheduling switching networks
resource interconnection networks resource allocation
distributed resource sharing multiprocessors
distributed scheduling resource mapping problem single shared bus
multiple shared buses
multistage dynamic networks network configurations resource sharing networks
routing tags
%X The interconnection of resources to multiprocessors and the
distributed scheduling of these resources have been studied. For a
given interconnection network, the resource-mapping problem entails
searching for one of the free resources which can be connected to
each requesting processor. To prevent the bottleneck of sequential
scheduling, a request without any destination address is given to the
network, and the network is responsible for finding the necessary
resource and connecting it to the processor. The addressing mechanism
is thus distributed in the network. Three different classes of
networks have been investigated: namely, single shared bus, multiple
shared buses and multistage dynamic networks. In each case, the
scheduling algorithm is described and the tradeoffs between different
network configurations are studied. The resource-sharing networks are
a generalization of conventional interconnection networks with
routing tags in which all the resources are of different types

%A Benjamin W. Wah
%T File Placement on Distributed Computer Systems
%J Computer
%V 17
%N 1
%D January 1984
%P 23-32
%K allocation, migration,

%A Benjamin W. Wah
%A Guo-Jie Li
%A Chee-Fen Yu
%T The Status of MANIP \(emA Multicomputer Architecture for Solving
Combinatorial Extremum-search Problems
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%D June 1984
%P 56-63
%K anomalies, approximations, domainance criteria, heuristic search,
NP-hard problems, parallel branch-and-bound algorithms, ring network,
virtual memory
%O non-numerical processors

%A Benjamin W. Wah
%A Y. W. Eva Ma
%T MANIP \*- A Multicomputer Architecture for Solving Combinatorial
Extremum-Search Problems
%J IEEE Transactions on Computers
%V C-33
%N 5
%D May 1984
%P 377-390
%K Approximate branch-and-bound, NP-hard problems, parallel branch-and-bound,
ring network, selection, vertex-covering problem, virtual memory,
Computer architecture

%T Design of Distributed Databases on Local Computer Systems with a
Multiaccess Network
%A Benjamin W. Wah
%A Yao-nan Lien
%J IEEE Transactions on Software Engineering
%V
%N 7
%D July 1985
%K Broadcast, concurrency control, file allocation, local computer
network, multiaccess bus, priority, query processing, transaction.

%A Benjamin W. Wah
%A Guo-jie Li
%A Chee Fen Yu
%T Multiprocessing of Combinatorial Search Problems
%J Computer
%I IEEE
%V 18
%N 6
%D June 1985
%P 93-108
%X Multiprocessing solutions to complex science and engineering
problems require an effective representation of the problem and an
efficient search. Functional requirements for search algorithms must
open up a variety of architectures for any problem
%K parallel processing pruning alpha-beta search divide and conquer
branch and bound manip dynamic programming malop

%A A. Waksman
%T A Permutation Network
%J Journal of the ACM
%V 15
%N 1
%D January 1968
%P 159-163

%A Leon D. Wald
%T An Associative Memory Using Large-Scale Integration
%J NAECON '70
%I IEEE
%D 1970
%P 271-281

%A Leon D. Wald
%A G. A. Anderson
%T Associative Memory for Multiprocessor Control
%R NAS 12-2087
%D September 1971

%A M. Mitchell Waldrop
%T Artificial Intelligence in Parallel
%J Science
%V 225
%N 4662
%D 10 August 1984
%P 608-610
%X A popular article which gives a good summary of problems: granularity,
topology, control, algorithms, photos include Fox and Seitz sitting
next to Caltech Hypercube, and mentions the NON-VON, DADO, and BOLTZMANN

%T Parallel Implementation of the LMS Algorithm
%A J. S. Walicki
%A M. Andrews
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 312-316
%K Numeric Processing

%A Bruce Walker
%A Gerald Popek
%A Robert English
%A Charles Kline
%A Greg Thiel
%T The LOCUS Distributed Operating System
%J Proceedings of the 9th Symposium on Operating Systems Principles,
Operating Systems Review
%V 17
%N 5
%D October 1983
%P 49-70
%K distributed file systems, remote processes, reconfiguration, error
recovery.
%O LOCUS
%X Experience paper on the LOCUS system utilizing 17 VAX-11/750s on an
Ethernet (also other machines).  Explains performance and the issues
mentioned in the keyword list.

%A L. L. Walker
%T Multiprocessor operating system design
%B Operating Systems, International Computer State of the Art Report
%I Infotech Ltd.
%C Maidenhead, England
%D 1972
%K multiprocessor architecture and operating systems
%X Identifies issues in and derives guidelines for, multiprocessor operating
system design.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Paul Walker
%T The Transputer
%J Byte
%V 10
%N 5
%D May 1985
%P 219-235
%K Occam
%O Special issue on multiprocessing
%X A rather disappointing overview of the Transputer concept from Keller
and Davis.  Author is with INMOS.  Article has a ray tracing example.

%A R. Wall
%T Image Processing Applications for Concurrent Architectures
%R Internal Memo, Hm45
%I Jet Propulsion Lab, California Institute of Technology
%C Pasadena, CA
%D November 1983
%K Caltech Cosmic Cube, hypercube, C^3P

%A John J. Wallace
%A Walter W. Barnes
%T Designing for Ultrahigh Availability: The UNIX RTR Operating System
%J Computer
%I IEEE
%V 17
%N 8
%D August 1984
%P 31-39
%K 3B20D,
Special issue on fault-tolerant computers

%T The Convex C-1 64-bit Supercomputer
%A Steve Wallach
%J Digest of Papers, Compcon85 Thirtieth IEEE Computer society
International Conference
%I IEEE Computer Society
%D February 25-28, 1985
%P 122-126

%A Y. Wallach
%A V. Konrad
%T Parallel Solution of Load Flow Problems
%J Arch. Elektrotechnik
%V 57
%P 345-354
%D 1976

%A Y. Wallach
%T Alternating Sequential/Parallel Processing
%S Lecture Notes in Computer Science
%I Springer-Verlag
%D 1982

%T On Block-Parallel Methods for Solving Linear Equations
%A Yehuda Wallach
%A Victor Konrad
%J IEEE Transactions on Computers
%V C-29
%N 5
%D May 1980
%P 354-359
%K Back substitution, Gauss-Seidel, linear equations, MIMD, parallel
processing, speedup
%O Parallel computation

%A J. Wallis
%A J. Grisham
%T Petroleum Reservoir Simulation on the CRAY-1 and on the FPS-164
%J Proc. 10th IMACS World Congress on Systems Simulation and Scientific
Computation
%V 1
%I IMACS
%P 308-310
%D 1982

%A J. Wallis
%A J. Grisham
%T Reservoir Simulation on the CRAY-1
%J Science, Engineering and The CRAY-1, Proceedings of a Cray Research
Inc. Symposium
%I Cray Research
%D 1982
%P 122-139

%A Bernd Walter
%T Network Partitioning and Symmetric Surveillance Protocols
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Communication Protocols
%P 124-129

%T Self-Diagnosing Cellular Implementations of Finite-State Machines
%A Stephen M. Walters
%A F. Gail Gray
%A Richard A. Thompson
%J IEEE Transactions on Computers
%V C-30
%N 12
%D December 1981
%P 953-959
%K Decomposition for diagnosability, design for diagnosability, fault
detection, finite-state machines, tessellation automata

%A W. Walther
%T Multiprocessor Self Diagnosis, Surgery, and Recovery in Air Traffic Control
%J Proceedings of the 4th Symposium on Operating Systems Principles,
Operating Systems Review
%V 7
%N 4
%D October 1973
%O systems

%T Architectures
%A I. C. Wand
%B Distributed Computing - Part III Loosely-Coupled Systems
%E Fred B. Chambers
%E David A. Duce
%E Gillian P. Jones
%I Academic Press
%S APIC Studies in Data Processing
%V 20
%D 1984
%P 141-146
%K standards,

%A I. C. Wand
%A A. J. Wellings
%T Distributed Operating Systems
%B Distributed Computing - Part III Loosely-Coupled Systems
%E Fred B. Chambers
%E David A. Duce
%E Gillian P. Jones
%I Academic Press
%S APIC Studies in Data Processing
%V 20
%D 1984
%P 193-200
%K PULSE, Cambridge,

%A I. C. Wand
%A A. J. Wellings
%T Programming Languages
%B Distributed Computing - Part III Loosely-Coupled Systems
%E Fred B. Chambers
%E David A. Duce
%E Gillian P. Jones
%I Academic Press
%S APIC Studies in Data Processing
%V 20
%D 1984
%P 201-215
%K Ada, Pascal-m, occam, CONIC,

%A H. Wang
%T On Vectorizing the Fast Fourier Transforms
%J BIT
%V 20
%P 233-243
%D 1982

%A H. Wang
%T Vectorization of a Class of Preconditioned Conjugate Gradient Methods
for Elliptic Difference Equations
%I IBM Corporation
%C Palo Alto, CA
%D 1982

%T A Parallel Method for Tridiagonal Equations
%A H. H. Wang
%J ACM Transactions on Mathematical Software
%V 7
%N 2
%D June 1981
%P 170-183
%K Tridiagonal equations, parallel computers, vector computers, partition
method, cyclic reduction method, recursive doubling method
%O CR Categories: 5.14, 6.22

%A J. T. Wang
%A Y. S. Lee
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Distributed Processing Approach for the International Public Telegrams
Message
%P 72-78
%O Distributed Systems and Networks

%A Patrick Shen-Pei Wang
%A William I. Grosky
%T SIMPARAG \(em Simultaneous Parallel Array Grammars
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 171
%K
%O languages
%X Summary only.

%A Pong-sheng Wang
%A Ming T. Liu
%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T Parallel Processing of High-Level Language Programs
%P 17-26
%O Languages and Translations

%T Load Sharing in Distributed Systems
%A Yung-Terng Wang
%A Robert J.T. Morris
%I IEEE Computer Society
%R
%D March 1985
%K Distributed scheduling, distributed systems, load sharing, performance
analysis, queueing analysis.

%A Donald F. Wann
%A Mark A. Franklin
%T Asynchronous and Clocked Control Structures for VLSI Based Interconnection
Networks
%J IEEE Transactions on Computers
%V C-32
%N 3
%D March 1983
%P 284-283
%K Asynchronous, clocked, clock skew, crossbar, interconnection,
multiprocessors, networks, self-timed, switches, switching modules

%A Matthew O. Ward
%T The automated design of task-specific parallel processing architectures
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 298-300
%K
Bell Labs Holmdel
%O Special purpose processors

%A Matthew O. Ward
%A Deborah J. Romero
%T Assigning parallel-executable, intercommunicating subtasks to
processors
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 392-394
%K Interprocessor communications (IPC), heuristics, MIMD,
%O languages

%A S. A. Ward
%T The MuNet: A multiprocessor message-passing system architecture
%J Proc. 7th Texas Conf. on Computing Systems
%C Houston, Texas
%D November 1978
%P 7-21 to 7-24
%K multiprocessor architecture and operating systems
%X Describes a multiprocessor whose performance may be varied widely without
software modification, thus permitting the hardware designer to defer certain
design decisions.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Stephen A. Ward
%T An Approach to Real Time Computation
%J Proceedings of the Seventh Texas Conference on Computing Systems
%I IEEE
%D October 1978
%P 5-26 to 5-34

%A W. Ware
%T The Ultimate Computer
%J IEEE Spectrum
%V 10
%N 3
%P 89-91
%D 1973
%X Remove?

%T SIMD Image Resampling
%A Michael R. Warpenburg
%A Leah J. Siegel
%J IEEE Transactions on Computers
%V C-31
%N 10
%D October 1982
%P 934-942
%K Algorithms, image processing, interpolation, parallel programming,
PASM, resampling, rectification, SIMD machine
Special issue on computer architecture for pattern analysis and image
database management

%A D. S. Watanable
%A others
%T Implementation of Finite Difference Schemes of Solving Fluid Dynamic
Problems on ILLIAC-IV
%I NTIS
%R AD-78-67-47
%D October 1974
%K Transient stability problem,

%A S. J. Waters
%T Majority verdicts in multi-processing \(em Any two from three
%J Computer Journal
%V 20
%N 3
%D August 1977
%P 207-212
%K reliability and error recovery
%X A software technique uses voting among three processors performing
identical tasks to detect computational errors and processor failure.
Different approaches to this problem are proposed and their relative
merits discussed.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A S. W. Watkins
%E M. B. Williams
%T National Bureau of Standards computer based message systems standards
efforts: a status report
%B Pathways to the Information Society. Proceedings of the Sixth
International Conference on Computer Communication
%C London, England
%P 289-294
%O 7 REFS. Treatment PRACTICAL
%I North-Holland, Amsterdam, Netherlands, p: xx+1018
ISBN: 0-444-86464-4
%D 7-10 Sept. 1982
%K protocols message switching data communication systems standards
computer based message systems CBMS communication message reading
storage message transfer protocol
%X The Institute for Computer Sciences and Technology (ICST) at the
National Bureau of Standards (NBS) is developing standards and
guidelines for computer based message systems (CBMS) as part of its
computer based office systems program. A CBMS allows communication
among entities using computers. The computer's role in this messaging
process is threefold: assistance to the user for message creation,
assistance to the user for message reading and storage, and mediation
of the actual communications. The author provides an overview of the
ICST program for CBMS standards, discusses the technical
specifications of the first proposed standard out of this program
which is for message format for CBMS, and introduces ICST work on a
message transfer protocol

%A I. Watson
%A J. Gurd
%T A Prototype Data Flow Computer with Token Labelling
%J Proceedings of the 1979 National Computer Conference
%I AFIPS Press
%V 48
%D June 1979
%P 623-628

%A I. Watson
%A J. Gurd
%T A practical data flow computer
%J Computer
%V 15
%N 2
%D Feb. 1982
%P 51-57
%K Recommended,

%A I. Watson
%T Architecture and Performance
%B Distributed Computing - Part I The Dataflow Approach
%E Fred B. Chambers
%E David A. Duce
%E Gillian P. Jones
%I Academic Press
%S APIC Studies in Data Processing
%V 20
%D 1984
%P 21-32
%K granularity,

%A R. W. Watson
%A S. Mamrak
%T Special or General Purpose End-to-End Transport Mechanisms in Distributed
Systems: One View
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 154-165
%O Protocols for local area networks

%A Richard W. Watson
%T Distributed system architecture model
%E B. W. Lampson
%E M. Paul
%E H. J. Siegel
%B Distributed Systems \(em Architecture and Implementation (An Advanced Course)
%S Lecture Notes in Computer Science
%V 105
%I Spring-Verlag
%D 1981
%P 10-43
%K Recommended,

%A Richard W. Watson
%T IPC interface and end-to-end protocols
%E B. W. Lampson
%E M. Paul
%E H. J. Siegert
%B Distributed Systems \(em Architecture and Implementation (An Advanced Course)
%S Lecture Notes in Computer Science
%V 105
%I Spring-Verlag
%D 1981
%P 140-190
%K Recommended,

%A Richard W. Watson
%T Identifiers (naming) in distributed systems
%E B. W. Lampson
%E M. Paul
%E H. J. Siegert
%B Distributed Systems \(em Architecture and Implementation (An Advanced Course)
%S Lecture Notes in Computer Science
%V 105
%I Spring-Verlag
%D 1981
%P 191-210

%A W. J. Watson
%T The TI ASC \(em A Highly Modular and Flexible Super Computer Architecture
%J Conf. Proc. 1972 FJCC
%P 221-228
%I AFIPS Press
%D 1972

%A W. J. Watson
%A H. M. Carr
%T Operational Experiences with the TI Advanced Scientific Computer
%J Proceedings AFIPS National Computer Conference
%V 43
%I AFIPS Press
%D 1974
%P 389-397

%A J. Watts
%T A Conjugate Gradient Truncated Direct Method for the Iterative Solution
of the Reservoir Simulation Pressure Equation
%J Proc. SPE 54th Annual Fall Technical Conference and Exhibition
%C Las Vegas
%D 1979
%X Remove?

%A W. Wawer
%T A local area network with ordered bus access by low level token passing
%J Interfaces Comput. (Switzerland)
%V 2
%N 4
%P 309-319
%O 9 REFS. Treatment PRACTICAL
%D Nov. 1984
%K local area networks protocols distributed processing
deterministic systems local area network ordered bus access
low level token passing
packet generation carrier sense multiple access collision detection
worst case access times transaction times distributed process control systems
data link controller protocols

%A S. B. We
%A M. T. Liu
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T A Partition Algorithm for Parallel and Distributed Processing
%P 254-258
%O Nonnumerical Algorithms and Applications

%A T. Wearden
%T The role of beam expansion systems in fibre-optic data highways
%J New Electron. (GB)
%V 17
%N 13
%P 35-37
%D 26 June 1984
%O 0 REFS. Treatment APPLICATIONS, PRACTICAL
%K optical fibres optical communication equipment optical couplers
data communication equipment
optical fibre optical links beam expansion systems fibre optic data highways
Hellerman Deutsch 6000 range beam splitters
optical wavelength multiplexers coupled by expanded beam connectors
completely optical data networks reflective transmission bean splitter
demountable hardware
%X The introduction of the Hellerman Deutsch 6000 range, which
includes beam-splitters and optical wavelength multiplexers that may
be coupled by expanded-beam connectors, means that completely
optical data networks can be designed. The principle of a reflective
transmission bean splitter is well known. This basic idea has been
refined and incorporated into engineered, demountable hardware which
offers wide opportunity for building optical 'circuits'. The design
ensures efficient use of optical power with no back-coupling into
the transmitting fibre (one of the problems with many
star-couplers). The 6000 range of connectors, splitters and
multiplexers depends on a beam expansion system

%A S. Webb
%T Solution of Partial Differential Equations on the ICL Distributed Array
Processor
%J ICL Technical Journal
%P 175-190
%D 1980
%K DAP

%A S. J. Webb
%A J. J. McKeown
%A D. J. Hunt
%T The Solution of Linear Equations on a SIMD Computer using a
parallel iterative algorithm
%I ICL
%J Proceedings of Chester Conference

%A S.J. Webb
%T Solution of Elliptical Partial Differential Equations on the ICL DAP
%J ICL Technical Journal
%V 2
%P 175
%D 1980

%A Stuart Wecker
%T A design for a multiple processor operating environment
%J Computing Networks from Minis through Maxis \(em Are They for Real? \(em
Digest of Papers \(em COMPCON 73
%C San Francisco, California
%D March 1973
%K multiprocessor architecture and operating systems
%X Interprocess communication in multiprocessor systems can and computer
networks, the software analog of interprocessor communication, is discussed.
Also, presents a unified communication structure and techniques for using
this structure to interface operating systems in multiple processor
environments.
Text reproduced with the permission of Prentice-Hall \(co 1980.
Reprinted in "Tutorial: Distributed Processing," IEEE,
compiled by Burt H. Liebowitz and John H. Carson, 1981, 3rd edition.

%A Horst F. Wedde
%T A Formal Basis for Correct Implementations of Distributed Programming
Languages
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Models of Distributed Processes, CSP, GCP,
%P 476-85

%A D. Wedel
%T FORTRAN for the Texas Instruments ASC System
%J SIGPLAN Notices
%V 10
%P 119-132
%D 1975

%A R. G. Wedig
%A M. J. Flynn
%T Concurrency Detection in Language-Oriented Processing Systems
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 805-810
%K
%O Parallel Processing

%l proceedings-article
%A Robert G. Wedig
%T A Language-Oriented Approach for Implementing Branches: Structured
Control Flow
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%M May
%D 1984
%P 3. 1-3. 7
%K risc reduced instruction set computer restricted architecture

%A Robert G. Wedig
%T A Language-Oriented Approach for Implementing Branches: Structured
Control Flow
%J International Workshop on High-Level Computer Architecture
%I Univ. of Maryland
%D May 1984
%P 3.1-3.7
%O RISCs

%A C. I. Weger
%A D. J. Lynch
%A J. L. Reese
%A P. L. Jones
%T The Massively Parallel Processor Simulator System
%D February 1982
%K MPP

%T Multiprocessor Scheduling with Memory Allocation - A Deterministic
Approach
%A Jan Weglarz
%J IEEE Transactions on Computers
%V C-29
%N 8
%D August 1980
%P 703-709
%K Deterministic scheduling, independent tasks, memory allocation,
multiprocessor system, paged-virtual memory
%O Performance analysis

%T An Expression Model for Extraction and Evaluation of Parallelism in
Control Structures
%A Martin C. Wei
%A Howard A. Sholl
%J IEEE Transactions on Computers
%V C-31
%N 9
%D September 1982
%P 851-863
%K Computation structure, distributed processing, parallel computation,
parallel extraction, software performance evaluation
Distributed computing

%A B. W. Weide
%J Proceedings of the 1981 International Conference on Parallel Processing
%D August 1981
%T Analytical Models to Explain Anomalous Behavior of Parallel Algorithms
%P 183-187
%O Non-Numerical Algorithms

%A Bruce W. Weide
%T Modeling Unusual Behavior of Parallel Algorithms
%J IEEE Transactions on Computers
%V C-31
%N 11
%D November 1982
%P 1126-1130
%K Integer programming, multiprocessor systems, order statistics,
parallel algorithms, performance analysis,
Special issue on parallel and distributed processing

%A E. Weidner
%A J. Drummond
%T Numerical Study of Staged Fuel Injection for Supersonic Combustion
%J AIAA Journal
%V 20
%P 1426-1431
%D 1982
%X Remove?

%A J. Weilmunster
%A L. Howser
%T Solution of a Large Hydrodynamic Problem Using the STAR-100 Computer
%I NASA Langley Research Center
%R TM X-73904
%D 1976

%A C. Weiman
%A C. Grosch
%T Parallel processing research in computer science: Relevance to the
Design of a Navier-Stokes Computer
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 175-
%K
%O Architecture

%A Carl F. R. Weiman
%A Jerome Rothstein
%T Polyautomaton Design for Recognizing Certain L System Languages by
Parallel Computation
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 168-170
%K
%O languages

%A Carl F. R. Weiman
%T Highly parallel digitized geometric transformations without matrix
multiplication
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 1-10
%K
%O applications: image processing

%T Status and Performance of the Zmob Parallel Processing System
%A Mark Weiser
%A Steve Kogge
%A Michelle McElvany
%A Roger Pierson
%A Rehmi Post
%A Ashok Thareja
%J Digest of Papers, Compcon85 Thirtieth IEEE Computer society
International Conference
%I IEEE Computer Society
%D February 25-28, 1985
%P 71-74

%A Uri Weiser
%A Al Davis
%T A Wavefront Notation Tool for VLSI Array Notation
%B VLSI Systems and Computation
%E H. T. Kung
%E R. Sproull
%E Guy Steele
%I Computer Science Press
%P 226-234
%D 1981
%X
Reproduced in the 1984 tutorial: \fI Interconnection Networks for parallel
and distributed processing\fP by Wu and Feng.

%A Shlomo Weiss
%A James E. Smith
%T Instruction Issue Logic for Pipelined Supercomputers
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%D June 1984
%P 110-118
%K Cray-1, LLNL loops, control unit issues
%X Analysis of performance based on a detailed look at two
algorithms.

%A Shlomo Weiss
%A James E. Smith
%T Instruction Issue Logic in Pipelined Supercomputers
%J IEEE Transactions on Computers
%V C-33
%N 11
%D November 1984
%P 1013-1022
%K CDC 6600 scoreboard, control logic, CRAY-1, IBM 360/91,
instruction issue logic, performance simulation, pipelined computers,
supercomputers, Tomasulo's algorithm,
Pipelines

%A Alan J. Weissberger
%T Analysis of Multiple-Microprocessor Systems Architectures
%J Computer Design
%D June 1977
%P 151-163
%X
Reprinted in "Tutorial: Distributed Processing," IEEE,
compiled by Burt H. Liebowitz and John H. Carson, 1981, 3rd edition.

%A C. Weitzman
%T Distributed Micro/Minicomputer Systems:
Structure, Implementation and Application
%I Prentice-Hall
%C Englewood Cliffs, New Jersey
%D 1980

%A C. Weitzman
%T Performance Measures for Distributed Computing Systems
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 705-709
%K
%O Performance Evaluation of Distributed Computer Systems

%A H. Welch
%T Numerical weather prediction in the PEPE parallel processor
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 186
%K
%O Parallel array processors

%A D. L. Weller
%A E. S. Davidson
%T Optimal searching algorithms for parallel pipelined computers
%D August 1974
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 291-305
%K
%O Computation algorithms

%A James G. Welsh
%T Geophysical Fluid Simulation on a Parallel Computer
%E Garry Rodrigue
%B Parallel Computations
%I Academic Press
%D 1982
%P 269-277
%K TI ASC

%A K. Y. Wen
%A D. H. Lawrie
%T Effectiveness of some processor/memory interconnections
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 283-292
%K
%O System architecture and organization

%A Roli G. Wendorf
%T Decentralized Resource Management
%R Definition of Distributed Operating System Concepts and Techniques: NOSC
Contract N66001-81-C-0484 First Quarterly Progress Report
%D January 1982
%I Computer Science Department, Carnegie-Mellon University

%A K.-S. Weng
%T Stream-Oriented Computation in Recursive Data Flow Schemas
%R TM-68
%I Laboratory for Computer Science, MIT
%C Cambridge, MA
%D October 1975

%A K.-S. Weng
%T An Abstract Implementation for a Generalized Data Flow Language
%R TR-228
%I Laboratory for Computer Science, MIT
%C Cambridge, MA
%D May 1979

%A B. T. Werner
%A P. K. Haff
%T Grain Dynamics Simulations on the Caltech Concurrent Processor
%R Hm88
%I California Institute of Technology
%C Pasadena, CA
%D 1984
%K Caltech Cosmic Cube, hypercube, C^3P

%A B. T. Werner
%T Grain Dynamics
%R Internal, Hm60
%I California Institute of Technology
%C Pasadena, CA
%D January 1984
%K Caltech Cosmic Cube, hypercube, C^3P
%X Oral defense presentation.

%A L. P. West
%T Loop-Transmission Control Structures
%J IEEE Transactions on Communications
%D June 1972

%A Neil Weste
%A David J. Burr
%A Vryan D. Ackland
%T Dynamic time warp pattern matching using an integrated multiprocessing
array
%J IEEE Transactions on Computers
%V C-32
%N 8
%D August 1983
%P 731-744
%K
array processor, dynamic programming, multiprocessing architecture, parallel
processing, pattern matching, pipelining, speech recognition, VLSI design

%Q Westinghouse
%T Multiple Processing Techniques
%J National Technical Information Service
%R AD602693
%D June 1964

%A C. Wetherell
%T Array Processing for FORTRAN
%R UCID-30175 (Rev. 1)
%D January 31, 1980
%I National Technical Information Service
%C Springfield, VA 22151

%A C. S. Wetherell
%T Design considerations for array processing languages
%J Software \(em Practice and Experience
%V 10
%N 4
%D April 1980
%P 265-270

%A C. S. Wetherell
%T Error Data Values in the Data-Flow Language VAL
%J ACM Transactions on Programming Languages and Systems
%V 4
%N 2
%D April 1982
%P 226-238
%K Design, Languages
Categories: C.1.3 [Processor Architectures]: Other Architectural Systems -
data-flow architectures;  D.2.5 [Software Engineering]: Testing and Debugging -
error handling and recovery; D.3.2 [Programming Languages]: Language
Classifications - applicative languages, data-flow languages; G.1.0
[Numerical Analysis]: General - computer arithmetic; J.2
[Computer Applications]: Physical Sciences and Applications

%A C. Whitby-Strevens
%T On the Performance of Dijkstra's Self-Stablizing Algorithms in Spite of
Distributed Control
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 586-592
%O decentralized control

%A Colin Whitby-Strevens
%T The Transputer
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K Multiprocessor Issues, inmos, occam, communications,
%C Boston, MA
%P 292-300

%A C. H. White, ed.
%T Multiprocessor Systems, International Computer State of the Art Report
%I Infotech Ltd.
%C Maidenhead, England
%D 1976
%K miscellaneous topics in multiprocessing
%X A collection of articles on the state of the art of multiprocessing in
1976.  Most of the information is still valid and relevant.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A G. W. White
%T Lower layers of open systems interconnection architecture: network, data
and physical layers link
%J Proceedings of distributed computing. compcon 80, twenty-first IEEE
computer society international conference
%P 572-576
%D 23-25 Sept. 1980
%C Washington, DC, USA
%I IEEE, New York, USA
xi+746 pp.
%O treatment: applic, general,review
%K standards computer networks
open systems interconnection iso/ansi reference model network layer
data link layer
physical layer bit transmission convection resetting
%X Describes the lower three layers of the iso/ansi reference model of open
systems interconnection architecture, and the services they provide. The
network layer provides for the transparent exchange of network service data
units between transport entities over network connections. The data link
layer enables logical sequences of data to be exchanged across a single
physical data link. The physical layer provides the actual means of bit
transmission across a physical medium. In the iso/ansi model, three types
of services have been identified as being provided to higher layers. They
are: connection oriented service, transaction oriented service, and
broadcast oriented service.

%A R. A. Whiteside
%A P. G. Hibbard
%A N. S. Ostlund
%T Systolic Algorithms for Monte Carlo Simulations
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 800-804
%K
%O Parallel processing

%A Robert A. Whiteside
%A Neil S. Ostlund
%A Peter G. Hibbard
%T A Parallel Jacobi Diagonalization Algorithm for a Loop Multiple Processor
System
%J IEEE Transactions on Computers
%V C-33
%N 5
%D May 1984
%P 409-413
%K Eigenvalue problem, Jacobi diagonalization, multiprocessing,
parallel algorithms, systolic loop,
Parallel algorithms

%A Heide Wichmann
%T Algorithms for Vertical Processing
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 75-77
%K microprogramming,
structure for parallel and associative processing

%A L. C. Widdoes, Jr.
%T Architectural considerations for general purpose multiprocessors
%J Fall 1976 Compcon
%I IEEE
%D 1976
%P 251-254

%A L. Curtis Widdoes, Jr.
%A Steven Correll
%T The S-1 Project: Developing High-Performance Digital Computers
%J Energy and Technology Review
%I LLNL
%D 1979
%X This paper is reproduced in Kuhn and Padua's (1981, IEEE)
survey "Tutorial on Parallel Processing."  It is especially difficult to
locate this paper.  Gives an excellent, but dated overview of the S-1: a
16 processor system using two crossbar switches like the C.mmp, a 36 bit
word (and DEC-10 like instruction set), and up to 4 GBs of physical memory.
It lacks adequate descrption of the current design phase, beyond the so called
S-I Mark IIa processor.

%A L. Curtis Widdoes, Jr.
%A Steven Correll
%T The S-1 Project: Developing High-Performance Digital Computers
%J Spring 1980 Compcon
%I IEEE
%D 1980
%P 282-291
%X Early paper on this 16 times a Cray-1 system.  Up to the stage Mark IIa.
Before the cross-bar or memory system was designed.
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%A Lawrence C. Widdoes, Jr.
%T The Minerva multi-microprocessor
%J Proceedings of 3rd Annual Symposium on Computer Architecture
%C Clearwater, Florida
%D January 1976
%P 34-39
%K multiprocessor architecture and operating systems, multi-microprocessors
%X This multiprocessor consists of microprocessors connected by a shared bus.
Discusses interrupt handling and techniques for reducing processor contention
for the shared bus.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A O. Widlund
%T Iterative Methods for Elliptic Problems on Regions Partitioned into
Substructures and the Biharmonic Dirichlet Problem
%I Courant Institute, New York University
%R Dept. of Computer Science Report No. 101
%D 1984
%X Remove?

%A A. Wigderson
%A F. Fich
%A P. L. Ragde
%T Relations Between Concurrent-Write Models of Parallel Computation
%J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing
%I ACM
%D August 1984

%T The Structure of Periodic Storage Schemes for Parallel Memories
%A Harry A.G. Wijshoff
%A Jan VanLeeuwen
%I IEEE Computer Society
%R ISSN 0018-9340
%D June 1985
%K d-dimensional arrays, lattices, parallel memories, SIMD machines,
skewing schemes.

%A Jack C. Wileden
%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T An Introduction to the Modelling of Parallel Systems with Dynamic
Structure
%P 65-73
%O Models and Analysis of Parallel Computation

%A Jack C. Wileden
%T Constrained expression and the analysis of designs for
dynamically-structured distributed systems
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 340-344
%K
Dynamic Process Modelling Scheme (DPMS), Dynamic Modelling Language (DYMOL),
%O Distributed processing

%A P. Wiley
%T Interfacing Peripherals Directly to an Array Processor
%J Computer Design
%V 18
%N 8
%D August 1979
%P 158-164

%A R. Wilhelmson
%T Solving Partial Differential Equations using ILLIAC IV
%B Constructive and Computational Methods for Differential and Integral
Equations
%E A. Dold
%E B. Eckmann
%I Springer-Verlag
%C New York
%P 453-476
%D 1974

%T The Cambridge model distributed system
%A M. V. Wilkes
%A R. M. Needham
%J Oper. Syst. Rev. (USA)
%V 14
%N 1
%P 21-29
%O 2 REFS. Treatment NEW DEVELOPMENTS, PRACTICAL
%D Jan. 1980
%K computer networks distributed processing
distributed system CMDS microcomputers mainframe
minicomputers implementation

%A M. V. Wilkes
%A R. M. Needham
%T The cambridge model distributed system
%Z Computer Lab., Univ. of Cambridge, Cambridge, England
%J Oper. Syst. Rev. (USA)
%V 14
%N 1
%P 21-29
%D Jan. 1980
%O 2 Refs.
treatment: new developments, practical
%K computer networks distributed processing
distributed system cmds microcomputers mainframe
minicomputers implementation
%X Describes the cambridge model distributed system (cmds). CMDS sets out to
provide, by means of a number of interconnected mini-and microcomputers,
facilities that are similar to those provided by a time-sharing system. A
user logs-in in the usual manner, but instead of being given a share of the
capacity of a central mainframe he is allocated one of the computers on the
system. Implementation of cmds is still in an early stage. This paper
contains a discussion of various controversial issues that are being
encountered during the design and gives reasons for the decisions that are
being taken.

%l journal-article
%A M. V. Wilkes
%T Keeping Jump Instructions out of the Pipeline of a RISC-Like Computer
%J Computer Architecture News
%I ACM
%V 11
%N 5
%M Dec
%D 1983
%P 5-7

%A G. Wilkinson
%A R. Burge
%T Using the ICL DAP for Satellite Climatology
%I Queen Elizabeth College (QEC)
%C London
%J Proceedings of Chester Conference
%D 1981

%A J. Wilkinson
%T The Calculation of the Latent Roots and Vectors of Matrices on the
Pilot Model of the ACE
%J Proc. Camb. Phil Soc.
%V 50, Pt. 4
%P 536-566
%D 1954
%X Remove?

%A Elizabeth Williams
%T Assigning Processes to Processor in Distributed Systems
%J Proc. 1983 Parallel Processing Symp.
%I IEEE
%D August 1983
%P 404-406
%K
U Texas, CSP, Gauss-Seidel,
scheduling resources

%A Elizabeth Williams
%T Selecting processor queueing disciplines in distributed systems
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 330-332
%K
%O scheduling
%X Author took a look at various scheduling algorithms and their effect
on a PDE applications code on a small distributed processor system.

%T Speedup Predictions for Large Scientific Parallel Programs on CRAY
X-MP-Like Architectures
%A Elizabeth Williams
%A Frank Bobrowicz
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 541-543
%K Performance Measurement

%T On the Development of the Algebra of Functional Programs
%A John H. Williams
%J ACM Transactions on Programming Languages and Systems
%V 4
%N 4
%D October 1982
%P 733-757
%K Languages, Theory, Transformations
Categories: D.1.1 [Programming Techniques]:
Applicative (Functional) Programming; D.2.4 [Software Engineering]:
Program Verification - correctness proofs;
D.3.1 [Programming Languages]: formal definitions and theory - semantics;
F.3.2 [Logics and Meanings of Programs]:
Semantics of Programming Languages - algebraic approaches to semantics;
F.3.3 [Logics and Meanings of Programs]:
Studies of Programming Constructs - functional constructs

%A Michael Kevin Williams
%T An Algorithmically Flexible Highly Concurrent VLSI Architecture
%I University of Massachusetts at Amherst
%R Electrical and Computer Engineering Technical Report CS-85-130
%D February 1985

%A P.W. Williams
%T Using the DAP for Information Retrieval
%I UMIST

%A R. K. Williams
%T System 250 \(em Basic Concepts
%J Proc. Conf. on Computers \(em Systems and Technology
%I I.E.R.E.
%C London, England
%D 1972

%A S. Williams
%T The Portability of Programs and Languages for Vector Computers
%E C. Jesshope
%E R. Hockney
%B Infotech State of the Art Report: Supercomputers
%I Maidenhead: Infotech Int. Ltd.
%V 2
%P 381-394
%D 1979

%A S.A. Williams
%T A proposal for parallel language constructs
%I Univ. of Reading
%D 1981

%A T. G. Williams
%A W. C. McDonald
%A M. W. Beasley
%A G. W. Cox
%T A Hardware Architecture for a Flexible Distributed Computing Testbed
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 404-409
%K
%O Distributed Testbeds for Real Time Systems

%A D. Williamson
%T Computational Aspects of Numerical Weather Predictions on the Cray Computer
%B Impact of New Computing Systems on Computational Mechanics
%E A. Noor
%I The American Society of Mechanical Engineers
%D 1983
%P 127-140

%A David L. Williamson
%A Paul N. Swarztrauber
%T A Numerical Weather Prediction Model - Computational Aspects on the
CRAY-1
%J Proceedings of the IEEE
%V 72
%N 1
%K Special issue -- Supercomputers - Their Impact on Science and Technology
%P 56-67
%D January 1984

%A John C. Willis
%A Arthur C. Sanderson
%T RAPIDbus: Design of an Extensible Multiprocessor structure
%I Carnegie-Mellon University
%R CMU-RI-TR-84-13
%D May 1984

%A A. Wilson
%T Examples of Array Processing in the Next FORTRAN
%E D. J. Paddon
%B Supercomputers and Parallel Computation
%I Clarendon Press
%C Oxford, England
%D 1984
%P 41-44
%X A short survey of modifications to FORTRAN 8X as proposed:
5 measurement functions of arrays: RANK, SIZE, EXTENT, LBOUND, UBOUND
14 computation functions on arrays:
 counting: COUNT
 arithmetic: SUM, PRODUCT, MASK_SUM, MASK_PRODUCT
 logical: ANY, ALL
 extremal: MAXVAL, MINVAL, MASK_MAXVAL, MASK_MINVAL
 algebraic: MATMUL, DOTPRODUCT, TRANSPOSE
2 manipulation functions on arrays: CSHIFT, ESHIFT
3 functions accessing arrays: FIRSTLOC, LASTLOC, PROJECT
6 functions constructing arrays: SEQ, ALT, DIAGONAL, SPREAD, REPLICATE, MERGE

%A Andrew Wilson
%A Dan Siewiorek
%A Zary Segall
%T Evaluation of Multiprocessor Interconnect Structure with the Cm* Testbed
%J Proceedings of the 1983 Parallel Processing Symposium
%I IEEE
%D August 1983
%P 165-171
%K node-to-node networks

%A D. E. Wilson
%T The PEPE Support Software System
%J Compcon 72
%P 61-64
%D 1972

%A E. Wilson
%T Finite Element Analysis on Microcomputers
%B Impact of New Computing Systems on Computational Mechanics
%E A. Noor
%I The American Society of Mechanical Engineers
%D 1983
%P 105-116

%A Kenneth G. Wilson
%T Experiences with a Floating Point System Array Processor
%E Garry Rodrigue
%B Parallel Computations
%I Academic Press
%D 1982
%P 279-314
%X Reminiscences rather than technical paper.
Wilson won Nobel Prize in Physics.

%A Kenneth G. Wilson
%T Science, Industry, and the New Japanese Challenge
%J Proceedings of the IEEE
%V 72
%N 1
%D January 1984
%K Special issue -- Supercomputers - Their Impact on Science and Technology
%P 6-18
%X Political statement of his opinion.

%A Thomas C. Wilson
%A Charles B. Silio, Jr.
%T Extensions to the "Play Through" Protocol for Loop Networks
%J Workshop on Interconnection Networks for Parallel and Distributed
Processing
%D April 1980
%I IEEE
%P 103-104

%A O. Wing
%A J. Huang
%T A parallel triangulation process for sparse matrices
%J Proceedings of the 1977 International Conference on Parallel Processing
%D August 1977
%I IEEE
%P 207-
%K
%O Algorithms and Applications

%T A Computation Model of Parallel Solution of Linear Equations
%A Omar Wing
%A John W. Huang
%J IEEE Transactions on Computers
%V C-29
%N 7
%D July 1980
%P 632-638
%K Computation model, parallel computation, parallel solution of linear
equations, parallel processing
%O Parallel computation

%A C. N. Winningstad
%T Scientific Computing on a Budget
%J Datamation
%V 24
%N 10
%D October 1978
%P 159-173

%A S. Winograd
%T On Computing the Discrete Fourier Transform
%J Mathematics of Computation
%V 32
%P 141?

%A Glynn Winskel
%T Synchronisation Trees
%R CMU-CS-83-139
%I Department of Computer Science, Carnegie-Mellon University
%C Pittsburg, PA 15213
%D June 1983

%A Leon E. Winslow
%A Yuan-Chien Chow
%T The analysis and design of some new sorting machines
%J IEEE Transactions on Computers
%V C-32
%N 7
%D July 1983
%P 677-683
%K
computer architectures, distributed systems, parallel sorting,
performance analysis algorithm

%A N. Winsor
%T Vectorization of Fluid Codes
%B Vectorized Fluid Dynamics Calculations
%E D. Book
%I Springer-Verlag
%C New York
%P 152-163
%D 1981

%A J. E. Wirsching
%A Tadashi Kishi
%T CONET-A Connection Network Model: Summary of Parameter Study
%J Workshop on Interconnection Networks for Parallel and Distributed
Processing
%D April 1980
%I IEEE
%P 105-106

%T CONET: A Connection Network Model
%A J. E. Wirsching
%A T. Kishi
%J IEEE Transactions on Computers
%V C-30
%N 4
%D April 1981
%P 298
%K Computer programmed connection network model, multiprocessor, network
arbitration, Omega network
%O Correspondence

%A J. E. Wirsching
%A T. Kishi
%T Minimization of Path Lengths in Single Stage Connection Networks
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 563-571
%K
%O Multistage Network Performance

%A N. Wirth
%T Modula \(em a language for modular multiprogramming
%J Software\(em Practice and Experience
%V 7
%N 1
%D January 1977
%P 3-35

%A D. P. Wiseman
%A D. S. Wise
%T Aspects of applicative programming for file systems
%J ACM SIGPLAN Notices
%V 12
%N 3
%D March 1977
%P 41-55

%A J. A. Wisniewski
%T On Solving the Large Sparse Generalized Eigenvalue Problem
%I University of Illinois, Urbana-Champaign
%R PhD thesis
%R Also R-81-1056, Department of Computer Science
%D 1981
%X ABSTRACT. This thesis presents an algorithm for solving the large sparse
generalized eigenvalue problem. The matrices involved are assumed to be
symmetric, and haphazardly sparse, with one of the matrices being positive
definite. The problem is treated for a constrained optimization approach and
an inverse iteration is developed which requires the solution of linear
algebraic systems only to the accuracy demanded by a given subspace. The
convergence of the method is discussed, and the rate of convergence is improved
by using shifting with the Ritz approximations. Numerical results are
presented, and aspects concerning implementation on a parallel computer are
discussed.

%A J. A. Wisniewski
%A A. H. Sameh
%T Parallel Algorithms for Network Routing: Problems and Recurrences
%J SIAM J. Disc Meth.
%P 379-394
%V 3
%D 1982
%X ABSTRACT. In this paper, we consider the parallel solution of recurrences,
and linear systems in the regular algebra of Carre. These problems are
equivalent to solving the shortest path problem in graph theory, and they also
arise in the analysis of FORTRAN programs. Our methods for solving linear
systems in the regular algebra are analogues of well-known methods for solving
systems of linear algebraic equations. A parallel version of Dijkstra's
method, which has no linear algebraic analogue is presented. Considerations
for choosing an algorithm when the problem is large and sparse are also
discussed.

%A F. G. Withington
%T Beyond 1984:  A Technology Forecast
%J Datamation
%D January 1975
%P 54-73

%A David J. De Witt
%T DIRECT - A Multiprocessor Organization for Supporting Relational
Database Management Systems
%J IEEE Transactions on Computers
%V C-28
%N 6
%D June 1979
%P 395-406
%K Associative processors, back-end computers, computer architecture,
database machines, database management, parallel processors,
Special issue on database machines

%A L. Wittie
%A R. Curtis
%T Time Management for Debugging Distributed Systems
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Debugging in Distributed Systems, BUGNET,
%P 549-550
%X This paper is only a long abstract.

%A Larry Wittie
%T A Distributed OS for a Reconfigurable Network Computer
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 669-678
%O Distributed operating systems

%A Larry D. Wittie
%T Efficient message routing in mega-micro-computer networks
%J Proc. 3rd Ann. Symp. on Computer Architecture
%D January 1976
%P 136-140

%A Larry D. Wittie
%T Architectures for Large Networks of Microcomputers
%J Workshop on Interconnection Networks for Parallel and Distributed
Processing
%D April 1980
%I IEEE
%P 31-40

%A Larry D. Wittie
%A Andre van Tilboug
%T MICROS, A Distributed Operating System for MICRONET, A Reconfigurable
Network Computer
%J IEEE Transactions on Computers
%V C-29
%N 12
%D December 1980
%P 1133-1144
%K Concurrent Pascal, distributed operating system, management hierarchy,
message-passing system, MICRONET/MICROS, multimicrocomputer, network
computer, packet-switching network, reconfigurable parallel computer
%O Special issue on distributed processing systems

%A Larry D. Wittie
%A Andre M. van Tilborg
%T MICROS, A Distributed Operating System for MICRONET, A
Reconfigurable Network Computer
%J IEEE Transactions on Computers
%D December 1980
%V C-29
%N 12
%P 1133-1144

%T Communication Structures for Large Networks of Microcomputers
%A Larry D. Wittie
%J IEEE Transactions on Computers
%V C-30
%N 4
%D April 1981
%P 264-273
%K Bus topologies, communication structures, cube connected-cycles,
distributed computers, dual-bus hypercubes, extensible interconnections,
hypercube spanning buses, microcomputer architectures, network
computers, parallel computers
%O Special issue on interconnection networks for parallel and distributed
processing

%A Larry D. Wittie
%T Communication structures for large multimicrocomputer systems
%J IEEE Trans. on Computers
%V C-30
%N 4
%D April 1981
%P 264-273
%K Bus topology, communication structures, cube-connected-cycles,
distributed computers, dual-bus hypercubes, extensible interconnections,
hypercube spanning buses, microcomputer architectures, network computers,
parallel computers
%X
Reproduced in the 1984 tutorial: "Interconnection Networks for parallel
and distributed processing" by Wu and Feng.

%A Larry D. Wittie
%A Ronald S. Curtis
%A Ariel J. Frank
%T MICRONET/MICROS \(em A Network Computer System for Distributed Applications
%B Multicomputers and Image Processing
%E Kendall Preston, Jr.
%E Leonard Uhr
%I Academic Press
%D 1982
%P 307-318
%K SUNY
%X This paper was published when a single LSI-11 was completed.  The
finished system will consist of other loosely-coupled LSI-11s running a
subset of UNIX.

%A W. R. Wittmayer
%T Array Processor Provides High Throughput Rates
%J Computer Design
%V 17
%N 3
%D March 1978
%P 93-100

%A Erling H. Wold
%A Alvin M. Despain
%T Pipeline and Parallel-Pipeline FFT Processors for VLSI Implementations
%J IEEE Transactions on Computers
%V C-33
%N 5
%D May 1984
%P 414-426
%K CORDIC, fast Fourier transform, integrated circuits, parallel processors,
pipeline processors, signal processing,
Parallel algorithms

%A G. Wolf
%A J. R. Jump
%T Matrix Multiplication in an Interleaved Array Processing Architecture
%J Proceedings of the 12th International Symposium on Computer
Architecture
%I IEEE
%D June 1985
%K Array Processing, IAP
%C Boston, MA
%P 11-17

%A P. Wolper
%A S. Pinter
%T A Temporal Logic for Reasoning About Partially Ordered Computations
%J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing
%I ACM
%D August 1984

%A P. L. Wolper
%T synthesis of communicating processes from temporal logic specifications
%I computer science department, stanford university
%D 1982
%R stan-cs-82-925

%A C. K. Wong
%A Shi-Kuo Chang
%T Parallel Generation of Binary Search Trees
%J IEEE Transactions on Computers
%V C-23
%N 3
%D March 1974
%P 268-271
%K Binary search trees, multiprocessor computer systems,
parallel generation, parametrized restructuring,
Computer systems

%A J. W. Wong
%T Distribution of end-to-end delay in message-switched networks
%J Comput. Networks (Netherlands)
%V 2
%N 1
%P 44-49
%O 8 REFS. Treatment APPLICATIONS, THEORETICAL
%D Feb. 1978
%K computer networks queueing theory packet switching
open queueing network model fixed routing message switched network

%A J. W. Wong
%T Queuing network modeling of computer communication networks
%J Computing Surveys
%V 10
%N 3
%D September 1978
%P 343-351
%O 29 REFS. Treatment Applications, Theoretical
%K computer networks queueing theory
computer communication networks queueing network models performance analysis
buffer management

%A Nam Sung Woo
%A Ashok A. Agrawala
%T The DC1 flow schema with the Data/Control-driven evaluation
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 244-251
%K
U Maryland
parallel programming and languages

%A P. T. Woo
%T Application of Array Processor Technology to Sparse Elimination
%J J. Petroleum Technology
%V 31
%N 1
%D January 1979
%P 68

%A Alan Wood
%T The Interaction between Hardware, Software, and Algorithms
%B Languages and Architectures for Image Processing
%E M. J. B. Duff
%E S. Levialdi
%I Academic Press
%C New York, NY
%D 1981
%P 1-11

%A C. M. Woodside
%A D. W. Craig
%T Function Allocation in a Tightly Coupled Signal Processing Multiprocessor
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 118-125
%O Resource allocation

%A Paul R. Woodward
%T Trade-Off in Designing Explicit Hydrodynamical Schemes for Vector Computers
%E Garry Rodrigue
%B Parallel Computations
%I Academic Press
%D 1982
%P 153-171

%T A Multiprocessor Architecture for Viewing Solid Models
%A J. R. Woodwark
%J Disp. Technol. and Applications (GB)
%V 5
%D April 1984
%P 97-103

%A Peter B. Worland
%T Parallel Methods for the Numerical Solution of Ordinary Differential
Equations
%J IEEE Transactions on Computers
%V C-25
%N 10
%D October 1976
%P 1045-1048
%K Block methods, one-step methods, ordinary differential equations,
parallel algorithms, predictor-correctors,
Correspondence

%A Jack Worlton
%T A Philosophy of Supercomputing
%I Los Alamos National Laboratory
%R No. LA-8849-MS
%D 1981

%A Jack Worlton
%T Understanding Supercomputer Benchmarks
%J Datamation
%V 30
%N 14
%D 1984
%P 121-130

%A A. Wray
%T Vectoral \(em A Vector Algorithmic Language for ILLIAC
%J Proc. 1978 LASL Workshop on Vector and Parallel Machines
%P 174-175
%I LASL
%D 1978

%A C. Wu
%T A Digital Fast Correlation Approach to Produce SEASAT SAR Imagery
%J Convention Record, IEEE Int'l Radar Conf.
%D 1980
%P 153-160

%A C. Wu
%A J. Ferziger
%A D. Chapman
%A R. Rogallo
%T Navier-Stokes Simulation of Homogeneous Turbulence on the CYBER 205
%J CYBER 200 Applications Seminar
%R NASA Conference Publication 2295
%D October 1983
%E J. Patrick Gary, Compiler
%I NASA Goddard Space Flight Center
%C Greenbelt, Maryland
%P 227-239

%A C.-l. Wu
%A T-y. Feng
%T A Software Technique for Enhancing Performance of a Distributed
Computing System
%J Computer Software and Applications Conference (COMPSAC80)
%I IEEE
%D October 1980
%P 274-280
%O Distributed Systems

%A Chuan-lin Wu
%A Tse-yun Feng
%T Routing Techniques for a Class of Multistages Interconnection Networks
%J Proceedings of the 1978 International Conference on Parallel Processing
%I IEEE
%D August 1978
%P 197-205
%K Indirect binary n-cube network, simplified data manipulator network,
flip network, omega network, regular SW banyan network,
reverse baseline network, baseline network
%O Interconnection Technology
%X Attempts to the the equivalence of the following interconnection switching
structures: indirect binary n-cube network, simplified data manipulator network,
flip network, omega network, regular SW banyan network S=F=2,
reverse baseline network, baseline network.

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T Fault-Diagnosis for a Class of Multistage Interconnection Networks
%A Chuan-lin Wu
%A Tse-yun Feng
%P 269-278
%O

%A Chuan-Lin Wu
%A Tse-Yun Feng
%T On a Class of Multistage Interconnection Networks
%J IEEE Transactions on Computers
%V C-29
%N 8
%D August 1980
%P 694-702
%K Array processing, computer architecture, conflict resolution,
interconnection networks, MIMD machine, multiple-processor systems,
network configurations, parallel processing, routing techniques,
SIMD machine
%X
Reproduced in the 1984 tutorial: "Interconnection Networks for parallel
and distributed processing" by Wu and Feng.
Also reprinted in the text compiled by Kai Hwang:
"Supercomputers: Design and Application," IEEE, 1984.

%T On a Class of Multistage Interconnection Networks
%A Chuan-Lin Wu
%A Tse-Yun Feng
%J IEEE Transactions on Computers
%V C-29
%N 8
%D August 1980
%P 694-702
%K Array processing, computer architecture, conflict resolution,
interconnection networks, MIMD machine, multiple-processor systems,
network configurations, parallel processing, routing techniques, SIMD
machine
%O Parallel processing

%A Chuan-Lin Wu
%A Tse-Yun Feng
%T The Reverse-Exchange Interconnection Network
%J IEEE Transactions on Computers
%V C-29
%N 9
%D September 1980
%P 801-811
%K Admissible permutations, baseline network, multiple-pass realization,
multistage interconnection networks, parallel processing systems,
permutation network, reconfiguration, recursive control algorithm,
reverse-exchange network, routing techniques
%X
Reproduced in the 1984 tutorial: "Interconnection Networks for parallel
and distributed processing" by Wu and Feng.

%T The Reverse-Exchange Interconnection Network
%A Chuan-Lin Wu
%A Tse-Yun Feng
%J IEEE Transactions on Computers
%V C-29
%N 9
%D September 1980
%P 801-811
%K Admissible permutations, baseline network, multiple-pass realization,
multistage interconnection networks, parallel processing systems,
permutation network, reconfiguration, recursive control algorithm,
reverse-exchange network, routing techniques
%O Special issue on Parallel Processing

%A Chuan-Lin Wu
%A Tse-Yun Feng
%T The Universality of the Shuttle-Exchange Network
%J IEEE Transactions on Computers
%V C-30
%N 5
%D May 1981
%P 324-332
%K Interconnection network, omega network, parallel processing,
perfect shuffle, permutation network, routing algorithms,
shuffle-exchange network
%X
Reproduced in the 1984 tutorial: \fI Interconnection Networks for parallel
and distributed processing\fP by Wu and Feng.

%T The Universality of the Shuffle-Exchange Network
%A Chuan-Lin Wu
%A Tse-Yun Feng
%J IEEE Transactions on Computers
%V C-30
%N 5
%D May 1981
%P 324-332
%K Interconnection network, omega network, parallel processing, perfect
shuffle, permutation network, routing algorithms, shuffle-exchange
network

%A Chuan-lin Wu
%A Woei Lin
%A Min-Chang Lin
%T Distributed circuit switching starnet
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 26-33
%K
U of Texas, EE Dept., Austin
%O Interconnection networks

%T Star: A Local Network System for Real-Time Management of Imagery Data
%A Chuan-Lin Wu
%A Tse-Yun Feng
%A Min-Chang Lin
%J IEEE Transactions on Computers
%V C-31
%N 10
%D October 1982
%P 923-933
%K Communication subnet, image database management, interconnection
network, local computer network, MIMD machines, parallel image
processing, SIMD machines
Special issue on computer architecture for pattern analysis and image
database management

%A Chuan-lin Wu
%A Tse-yun Feng, eds.
%T Tutorial: Interconnection Networks for Parallel and Distributed Processing
%I IEEE
%D 1984
%X A collection of papers on interconnection networks like the Parallel
Processing tutorial of 1981.  Where ever possible, reference will made
in bibliography annotations pointing to this collection.

%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%T The Reverse-Exchange Interconnection Network
%A Chuan-lin L. Wu
%A Tse-yun Feng
%P 160-174
%O Interconnection Networks

%A Liang Tai Wu
%T Models for Evaluating the Performability of Degradable Computing Systems
%R CRL-TR-7-82
%I Univ. of MI, Computing Research Lab.
%C Ann Arbor, MI
%D June 1982
%X Funded by NASA LaRC

%A Shyue B. Wu
%A Ming T. Liu
%T A Generalized Cluster Structure for Large Multi-Microcomputer Systems
%J Proceedings of the 1979 International Conference on Parallel Processing
%D August 1979
%P 74-75
%O Models and Analysis of Parallel Computation
%X Summary only

%A Shyue B. Wu
%A Mign T. Liu
%T Optimal Interconnection Design for Large Multi-Microcomputer Systems
%J Workshop on Interconnection Networks for Parallel and Distributed
Processing
%D April 1980
%I IEEE
%P 101-102

%T A Cluster Structure as an Interconnection Network for Large
Multimicrocomputer Systems
%A Shyue B. Wu
%A Ming T. Liu
%J IEEE Transactions on Computers
%V C-30
%N 4
%D April 1981
%P 254-264
%K Bus load, cluster structure, distributed processing, interconnection
network, large multimicrocomputer systems, message delay, topological
optimization, traffic congestion
%O Special issue on interconnection networks for parallel and distributed
processing

%A W. Wulf
%A E. Cohen
%A W. Corwin
%A A. Jones
%A R. Levin
%A C. Pierson
%A F. Pollack
%T HYDRA: The kernel of a multiprocessor operating system
%J Communications of the ACM
%V 17
%N 6
%D June 1974
%P 337-345
%K operating system, kernel, nucleus, protection, security,
CR categories: 4.3, 6.2
multiprocessor architecture and operating systems
%X Describes the original design of the operating system for C.mmp.  The
hardware structure assumed is the one described in Wulf and Bell's first
C.mmp paper(44).
Text reproduced with the permission of Prentice-Hall \(co 1980.
Reproduced in "Distributed Computing: Concepts and Implementations" edited by
McEntire, O'Reilly and Larson, IEEE, 1984.

%A W. A. Wulf
%T Performance Monitors for Multiprogramming Systems
%J Proceedings of the 2nd Symposium on Operating Systems Principles
%D October 1969
%P 175-
%O instrumentation and measurement

%A W. A. Wulf
%A C. G. Bell
%T C.mmp \(em A multi-mini processor
%J Proc. Fall Joint Computer Conference
%V 41, part II
%I AFIPS Press
%C Montvale, New Jersey
%D 1972
%P 765-777
%K multiprocessor architecture and operating systems
Required
%X This paper describes the original design of C.mmp and discusses issues such
as its viability and the feasibility of building it using a minimum of
custom-built hardware.  The final C.mmp design differs significantly from the
design described here, but the paper is worth reading for the picture of the
designers' original motives.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A W. A. Wulf
%A R. Levin
%A C. Pierson
%T Overview of the Hydra Operating System
%J Proc. 5th Symp. on Operating System Principles
%P 122-131
%I ACM
%D 1975

%A W. A. Wulf
%A R. Levin
%T A Local Network
%J Datamation
%P 47-50
%D 1975
%X This is not a paper on local area networks.  It is an early summary of CMU's
work on the C.mmp (around the time they went to eleven processors).
Reproduced in "Tutorial on Local Computer Networks"
Thurber,K.J., and Freeman,H.A., (Eds.), (1981)

%A W. A. Wulf
%T Reliable hardware/software architecture
%J IEEE Trans. on Software Engineering
%V SE-1
%N 2
%D June 1975
%P 233-240
%X Reliability aspects of C.mmp.

%A William A. Wulf
%A Samuel P. Harbison
%T Reflections in a Pool of Processors \(em an experience report on C.mmp/Hydra
%J AFIPS Proc. of the NCC
%V 47
%D 1978
%P 939-951
%r CMU-CS-78-103
%i Dept. of Computer Science, Carnegie-Mellon University, Pittsburgh, PA
%d February 1978
%K miscellaneous topics in multiprocessing
%X A candid evaluation of the successes and shortcomings of the C.mmp
project.  The report is refreshingly frank and pulls no punches.
Text reproduced with the permission of Prentice-Hall \(co 1980.
This paper was published in the Proceedings of the NCC 1978, pp. 939-951.

%A William A. Wulf
%A Roy Levin
%A Samuel P. Harbison
%T HYDRA/C.mmp: An Experimental Computer System
%I McGraw-Hill
%D 1981
%K Recommended,
CMU, C.mmp, HYDRA OS,
multiprocessor architecture and operating systems
%X A detailed description of the philosophy, design, and implementation of
Hydra, similar in a sense to Organick's monograph on Multics. Highly
recommended to anyone desiring an understanking of multiprocessor operating
systems in general and Hydra in particular.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Peter Wypior
%T A Parallel Simplex Algorithm
%B Parallel Computers, Parallel Mathematics
%E M. Feilmeier
%I North-Holland
%D 1977
%P 235-237
%K MIMD,
parallel numerical algorithms
%X This is a rather simple two instruction stream means of controlling multiple
data streams for solving Dantzig's method.

%A P. Xia
%A X. Fang
%A Y. Wang
%A G. Wang
%A Y. Liu
%A C. Li
%A C. Lin
%A W. Zhan
%A Q. Sun
%T An Array Processor for Petroleum Exploration
%J Proceedings of 8th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 9
%N 3
%D May 1981
%P 349-354
%O architecture

%A S. Yalamanchili
%A M. Malek
%A J. K. Aggarwal
%T Workstations in a local area network environment
%J Computer (USA)
%V 17
%N 11
%P 74-86
%O 13 REFS
Treatment PRACTICAL
%D November 1984
%K local area networks workstations
local area network environment workstations future trends application areas
workstation design
%X The factors behind the development of local area network-based
systems of workstations are identified in order to pinpoint future
trends and determine potential application areas for specialized
workstations. A profile of a workstation and its environment is
constructed to distinguish it from such products as word processors
and intelligent terminals. Five commercially produced workstations
are described, each chosen to emphasize one or more aspects of
workstation design

%A Kazunori Yamaguchi
%A Tosiyasu L. Kunii
%T PICCOLO Logic for a Picture Database Computer and Its Implementation
%J IEEE Transactions on Computers
%V C-31
%N 10
%D October 1982
%P 983-996
%K Architecture engineering, language directed machine, parallel
processing, PICCOLO, picture database, relational model, VLSI technology,
Special issue on computer architecture for pattern analysis and image
database management

%A Chao-Chih Yang
%T Fast algorithms for bounding the performance of multiprocessor systems
%J Proc. 1976 Int. Conf. on Parallel Processing
%C Walden Woods, Michigan
%D August 1976
%P 73-82
%K scheduling
%X Presents efficient algorithms for finding the lower bound on performance
when scheduling a set of tasks.  The performance measures here are the number
of processor used and the total execution time for the set of tasks.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Xiao-Zong Yang
%A Gary York
%A Wiliian P. Birmingham
%A Daniel P. Siewiorek
%T Fault Recovery of Triplicated Software on the Intel iAPX 432
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Software Approach to Fault tolerance
%P 438-443

%A Yee-Hong Yang
%A Tsung-Wei Sze
%T An evaluation study of six topologies of parallel computer architectures
for scene matching
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 258-260
%K
cluster-connected, mesh connected, cluster-cluster-connected,
cluster-mesh-connected, mesh-cluster-connected, mesh-mesh-connected
images and speech

%A Arzit Yannai
%T PLISP Users' Manual
%R ULTRACOMPUTER NOTE #75
%I Courant Institute of Mathematical Sciences, Computer Science Dept.,
New York University
%D November 1984
%K AI, simulator, parallel LISP,

%A M. Yannakakis
%A C. H. Papadimitriou
%A H. T. Kung
%T Locking policies: Safety and freedom from deadlock
%J 20th Annual Symposium on Foundations of Computer Science
%D October 1979
%P 286-297

%A R. M. Yanney
%A J. P. Hayes
%T Distributed Recovery in Fault-Tolerant Multiprocessor Networks
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 514-525
%O Recovery in fault-tolerant distributed systems

%A A. Chi-Chih Yao
%T Scheduling unit-time tasks with limited resources
%J Proceedings of the Sagamore Computer Conference (1974)
%I Springer-Verlag
%P 17-36
%C Raquette Lake, New York
%D August 1974
%K scheduling
%X Gives heuristic algorithms for optimally scheduling a set of tasks with
different resource requirements, but with identical processing times.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A Mehrad Yasrebi
%A Sanjay Deshpande
%A J. C. Browne
%T A comparison of circuit switching and packet switching for data transfer
in two simple image processing algorithms
%J Proceedings of the 1983 International Conference on Parallel Processing
%I IEEE
%D August 1983
%P 25-28
%K histogramming,
U Texas, TRAC
multistage network performance

%A Mehrad Yasrebi
%A G. J. Lipovski
%T A State-of-the-art SIMD Two-dimensional FFT Array Processor
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%D June 1984
%O array processors
%P 21-27

%A Michiaki Yasumura
%A Yoshikazu Tanaka
%A Yasusi Kanada
%T Compiling Algorithms and Techniques for the S-810 Vector Processor
%J Proceedings of the 1984 International Conference on Parallel
Processing
%I IEEE
%D August 1984
%P 285-290
%K SIMD code decomposition
%O vector machines

%A Hiroto Yasuura
%A Naofumi Takagi
%A Shuzo Yajima
%T The Parallel Enumeration Sorting Scheme for VLSI
%J IEEE Transactions on Computers
%V C-31
%N 12
%D December 1982
%P 1192-1201
%K Bus connected cellular array, database machine, merging, multikey sort,
parallel enumeration sort, parallel sorting, algorithm, pipeline,
sorting, VLSI,
Sorting techniques

%A S. S. Yau
%A H. S. Fung
%T Associative Processor Architecture \(em A Survey
%J Proceedings of the Sagamore Computer Conference (1975)
%D August 1975
%I IEEE
%P 1-14
%X A slightly later survey was published in ACM Comuting Surveys, v9, #1,
March 1977, pp. 3-28, by the same authors.

%A S. S. Yau
%A H. S. Fung
%T Associative Processor Architecture \(em A Survey
%J Computing Surveys
%V 9
%N 1
%P 3-28
%D March 1977
%X An earlier survey was done by the same authors and published in the 1975
Parallel Processing (Sagamore) Conference Proceedings, pp.1-14.

%A S. S. Yau
%A C. C. Yang
%T An Approach to Distributed Computing System Software Design
%J 1st International Conference on Distributed Computing Systems
%I IEEE
%D October 1979
%P 31-42
%O Design and requirements specification methodology

%A S. S. Yau
%A S. M. Shatz
%T On Communication in the Design of Software Components of
Distributed Computer Systems
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 280-287
%K
%O Design of Distributed Computing Systems

%A Stephen S. Yau
%A Mehmet U. Caglayan
%T Distributed Software System  Design Representation Using Modified
Petri Nets
%J IEEE Transactions on Software Engineering
%V SE-9
%N 6
%D November 1983
%P 733-745
%K Control flow and data flow, design analysis, distributed software system,
modified Petri net, software design representation
Concurrent systems

%T Performance Optimization of a CSMA Protocol for Local Computer Networks
%A Stephen S. Yau
%A Wonmo Hong
%J IEEE Transactions on Computers
%V C-33
%N 9
%D September 1984
%P 812-817
%K CSMA network protocol, local computer networks, optimal average
retransmission delay, performance optimization, queueing model,
throughput,
Computer networks

%A C.-S. Yeh
%A Irving S. Reed
%A T. K. Truong
%T Systolic Multipliers for Finite Fields GF(2^m)
%J IEEE Transactions on Computers
%V C-33
%N 4
%D April 1984
%P 357-360
%K Finite field, logic design, primitive element, systolic array,
Systolic multipliers

%A P. C. C. Yeh
%A J. H Patel
%A E. S. Davidson
%T Performance of Shared Cache for Parallel-Pipelined Computer Systems
%J Proceedings of 10th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 11
%N 3
%D 1983
%P 117-123
%O Cache Memories

%A Y. Yemini
%A D. Cohen
%T Some issues in distributed processes communication
%Z Information Sci. Inst., Univ. of Southern California, Marina del Rey,CA,
USA
%J 1st International Conference on Distributed Computing Systems
%D October 1979
%P 199-203
%C Huntsville, AL, USA
%I IEEE, New york, USA
x+782 pp.
%O 8 Refs.
treatment: applic, general,review
%K computer networks communicating process protocol
Communications Protocols for Distributed Computing Systems
%X This paper considers communicating processes that use an unreliable
communication medium. It proves that the general's protocol problem of
gallager, i.e., the problem of reaching agreement in real time over an
unreliable communication network, does not possess a solution. Besides
identifying some intrinsic limitations of communicating processes resulting
from unreliability, the proof serves to highlight some of the issues
arising in protocol specifications, implementation and verification.

%T Some Research Directions Towards Reliable Distributed Systems
%A Yechiam Yemini
%J Digest of Papers, Compcon85 Thirtieth IEEE Computer society
International Conference
%I IEEE Computer Society
%D February 25-28, 1985
%P 299

%T Memory Interference in Synchronous Multiprocessor Systems
%A David W. L. Yen
%A Janak H. Patel
%A Edward S. Davidson
%J IEEE Transactions on Computers
%V C-31
%N 11
%D November 1982
%P 1116-1121
%K Analytical models, memory bandwidth, memory interference,
multiprocessor systems, performance evaluation
Special issue on parallel and distributed processing

%A W. C. Yen
%A K. S. Fu
%T Analysis of Multiprocessor Cache Organizations with Alternative Main
Memory Update Policies
%J Proceedings of 8th Annual International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 9
%N 3
%D May 1981
%P 89-106
%O performance analysis

%A W. C. Yen
%A K. S. Fu
%T Coherence problem in a multi-cache system
%J Proceedings of the 1982 International Conference on Parallel Processing
%D August 1982
%I IEEE
%P 332-339
%K
LSCS (Logical semi-critical section) scheme
%O Distributed processing

%A Pen-Chung Yew
%A Duncan H. Lawrie
%T An Easily Controlled Network for Frequently Used Permutations
%J Workshop on Interconnection Networks for Parallel and Distributed
Processing
%D April 1980
%I IEEE
%P 72-73

%T An Easily Controlled Network for Frequently Used Permutations
%A Pen-Chung Yew
%A Duncan H. Lawrie
%J IEEE Transactions on Computers
%V C-30
%N 4
%D April 1981
%P 296-298
%K Bit-permute-complement permutations, decomposition algorithms,
multiple-pass control algorithm, network partitions, Omega network
%O Correspondence

%T Simulation of a Word Recognition System on Two Parallel Architectures
%A Mark A. Yoder
%A Leah H. Jamieson
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 171-179
%K Parallel Algorithms/Simulation

%A S. Yokoi
%A J-i. Toriwaki
%A T. Fukumura
%T Theoretical Considerations on a Family of Distance Transformations and
Their Applications
%E Morio Onoe
%E Kendall Preston, Jr.
%E Azriel Rosenfeld
%B Real-Time/Parallel Computing: Image Analysis
%I Plenum Press
%C New York, NY
%D 1981
%P 73-94

%A D. Young
%T Iterative Solution of Large Linear Systems
%I Academic Press
%C New York
%D 1971
%X Remove?

%A S.T.B. Young
%A D.C. Leslie
%T Turbulent flow simulations on scalar, vector and parallel processors
%I Queen Mary College
%D 1982

%A STB Young
%T An FFT-BASED 3-D Poisson Solver for the DAP
%I Queen Mary's College, Nuclear Eng.
%D 1980

%A N. Y. Yousif
%T Parallel Algorithms for Asynchronous Multiprocessors
%I Loughborough University
%R Ph.D. Thesis
%D 1983

%A S. Yshitake
%A M. Mhio
%A I. Ideguchi
%A M. Katsumata
%T Method for testing data communication products that implement
standard protocols
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 742-747
%K
%O Communication Protocols

%A C. T. Yu
%A Y. C. Lin
%T Some Estimation Problems in Distributed Query Processing
%J 3rd International Conference on Distributed Computing Systems
%C Miami, FL
%D October 1982
%I IEEE
%P 13-20
%K
%O Database systems

%A C. T. Yu
%A M. K. Siu
%A K. Lam
%A C. H. Chen
%T Adaptive file allocation in star computer network
%J Proceedings COMPSAC 83: The IEEE Computer Society's Seventh
International Computer Software and Applications Conference
%C Chicago, IL, USA
%P 537-546
%O 37 REFS. THEORETICAL/MATHEMATICAL
%I IEEE Comput. Soc. Press
Silver Spring, MD, USA, p: xxi+648
%D 7-11 Nov. 1983
%K computer networks
adaptive file handling file allocation star computer network star network
%X A study is made of the allocation of files in a star network. Unlike
previous algorithms which assume that files are independently
accessed and independently assigned, the interaction of files during
the processing of queries is directly incorporated into the cost
model. An adaptive algorithm is presented which is much faster than
existing algorithms on file allocation, obtains solutions that are on
the average only 0.1% away from the optimal solutions, and possesses
many desirable properties such as the satisfaction of some necessary
and sufficient conditions for file allocation

%A C. T. Yu
%A C. C. Chang
%T Distributed Query Processing
%J Computing Surveys
%V 16
%N 4
%P 399-433
%D December 1984
%K C.2.4 [Computer Communications Networks]:
Distributed Systems - distributed databases;
F.2.2 [Analysis of Algorithms and Problem Complexity]:
Nonnumerical Algorithms and Problems; H.2.4 [Database Management]:
Systems - distributed systems; query processing;
Algorithms, design, theory,
Communication, cyclic queries, distributed query processing, fragment
processing, heuristics, join, optimization, performance, semijoin, tree queries

%A N. Yu
%A P. Rubbert
%T Transonic Flow Simulation for 3D Complex Configurations
%J Cray Channels
%D 1982
%P 41-47

%A M. Yudkin
%T Resource management in a distributed system
%J Proceedings. Eighth Data Communications Symposium
%C North Falmouth, MA, USA
%I IEEE Computer Soc. Press
Silver Spring, MD, USA x+261
%P 221-226
%O 9 Refs
Treatment APPLICATIONS, PRACTICAL.
%D 3-6 Oct. 1983
%K communication networks
communications applications of control computer networks
distributed processing
distributed system Cambridge Distributed System terminals machines
peripherals ring network control security.
%X In the Cambridge Distributed System, terminals, machines and
peripherals are separated by a ring network. A problem that arises is
the establishment and control of suitable connections between the
individual components, so that users may use machines, machines may
use peripherals or other machines, etc., in a secure manner. An
experimental mechanism used to control the connections and provide
security is described. The solution is not restricted to the
Cambridge ring, although a different architecture may suggest
alternative solutions more suited to its specific features. Some
possibilities are discussed.

%T A Programmable Systolic Array for Arithmetic Operation in Galois Field
%A David Y. Y. Yun
%A Chang N. Zhang
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 742-747
%K Systolic Systems

%A John G. Zabolitzky
%T Coupled-Cluster Equations on the CYBER 205
%I North-Holland
%B Parallel Computing 83
%E M. Feilmeier
%E G. Joubert
%E U. Schnedel
%P 373-377
%D 1984

%A J. Zahorjan
%A E. D. Lazowska
%A R. L. Garner
%T A decomposition approach to modelling high service time
variability
%J Performance Eval. (Netherlands)
%V 3
%N 1
%P 35-54
%O 17 REFS. Treatment THEORETICAL
%D Feb. 1983
%K queueing theory approximation theory
noniterative method computer performance evaluation decomposition
high service time variability
queueing network models simultaneous resource possession approximate solution
Coxian servers near complete decomposability performance measures

%T Incorporating load dependent servers in approximate mean value analysis
%A J. Zahorjan
%A E. D. Lazowska
%B Performance Eval. Rev. (USA) Proceedings of the 1984 ACM
SIGMETRICS Conference on Measurement and Modeling of Computer Systems
%C Cambridge, MA, USA
%D 21-24 Aug. 1984
%V 12
%N 3
%P 52-62
%O 9 REFS. Treatment THEORETICAL, EXPERIMENTAL
%K queueing theory performance evaluation function approximation
queueing network models load dependent servers approximate mean value analysis
performance modelling hierarchical modelling multiple class models

%A Vasili Zakharov
%T Parallelism and Array Processing
%J IEEE Transactions on Computers
%V C-33
%N 1
%D January 1984
%P 45-78
%K Array processing, computer architecture, computer history, multiple
processor systems, parallel algorithms, parallel computing,
Parallel processing,
%X Historical is the keyword for this paper.  Principally a survey covering
existing high performance machines like: STAR-100, 7600, 6600, Cray-1 and
Cyber 205 in detail, limited ILLIAC and SOLOMON coverage, DAP, MPP.
Tries to survey programmability.  The algorithms section is like Hockney
and Jesshope (1981).  Lacks things like data flow and Denelcor HEP.

%T A Protocol for Load Balancing on CSMA Networks
%A Mehdi R. Zargham
%A Ralph D. Purcell
%J Proceedings of the 1985 International Conference on Parallel
Processing
%I IEEE
%D August 1985
%P 163-165
%K Operating System Problems

%A P. Zave
%T Testing Incomplete Specifications of Distributed Systems
%T Language Constructs and Support Systems for Distributed Computing
%J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing
%I ACM
%C Ottawa, Canada
%D August 1982
%P 42-48

%A Pamela Zave
%T On the formal definition of processes
%J Proceedings of the 1976 International Conference on Parallel Processing
%D August 1976
%I IEEE
%P 35-42
%K
%O Operating Systems

%A Pamela Zave
%A Werner C. Rheinboldt
%T Design of an Adaptive, Parallel Finite-Element System
%J ACM Transactions on Mathematical Software
%V 5
%N 1
%D March 1979
%P 1-17
%K Finite-element method, partial differential equations,
parallel processing, adaptivity, a posteriori; error estimation,
CR Categories: 3.20, 4.30, 5.17

%T A Quantitative Evaluation of the Feasibility of, and Suitable Hardware
Architectures for, an Adaptive, Parallel Finite-Element System
%A Pamela Zave
%A George E. Cole, Jr.
%J ACM Transactions on Mathematical Software
%V 9
%N 3
%D September 1983
%P 271-292
%K Parallelism, multiprocessors, design, experimentation, measurement
Categories and Subject Descriptors: G.1.8 [Numerical Analysis]: Partial
Differential Equations-finite element methods; G.4 [Mathematics of
Computing]: Mathematical Software-efficiency

%A Bernard P. Zeigler
%A Robert G. Reynolds
%T Towards a Theory of Adaptive Computer Architectures
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Models of Distributed Processes, hire/fire reconfiguartons schemes,
performance relations, local transforms,
state monitoring and adaptive policies,
%P 468-485

%A P. V. Zeleny
%A R. E. Nagle
%T Application of an Array Processor in Satellite Image Processing
%R AD-A056664/6ST
%D June 30, 1977
%I National Technical Information Service
%C Springfield, VA 22151

%A Andres Zellweger
%T Computer architectures for advanced air traffic control applications
%J Proceedings of the 1976 International Conference on Parallel Processing
%C Walden Woods, Michigan
%D August 1976
%P 132-139
%K multiprocessor applications, reliability
%X These multiprocessors are used in highly reliable air traffic control
systems; two specific are described.
Text reproduced with the permission of Prentice-Hall \(co 1980.

%A X. C. Zeng
%J Proceedings of the 1980 International Conference on Parallel Processing
%D August 1980
%T An Algorithm of Parallel Processors for Theorem Proving and Its
Applications
%P 165-172
%O

%A Chang nian Zhang
%A David Y. Y. Yun
%T Multi-Dimensional Systolic Networks for Discrete Fourier Transform
%J Proceedings of the 11th International Symposium on Computer
Architecture, SIGARCH Newsletter
%V 12
%N 3
%I IEEE
%D June 1984
%P 215-222
%K systolic arrays

%A Chuan-Qi Zhu
%A Pen-Chung Yew
%T A Synchronization Scheme and its Applications for Large Multiprocessor
Systems
%J 4th International Conference on Distributed Computing Systems
%C San Francisco, CA
%I IEEE
%D May 1984
%P 486-493
%K Read-test-operation instruction,
U Ill
%O Distributed synchronization algorithms

%A H. Zimmermann
%T OSI Reference Model-the ISO model of architecture for open systems
interconnection
%Z IRIA/Lab., Rocquencourt, France
%J IEEE Trans. Commun. (USA)
%V COM-28
%N 4
%P 425-432
%D April 1980
%O 19 Refs.
treatment: practical
%K computer networks
osi reference model open systems interconnection standards
heterogeneous computer networks model of architecture protocols
%X Considering the urgency of the need for standards which would allow
constitution of heterogeneous computer networks, iso created a new
subcommittee for 'open systems interconnection' (ISO/TC97/SC16) in 1977.
The first priority of subcommittee 16 was to develop an architecture for
open systems interconnection which could serve as a framework for the
definition of standard protocols. In july 1979 the specifications of this
architecture, established by SC16, were passed under the name of 'osi
reference model' to technical committee 97 'data processing'. This paper
presents the model of architecture. Some indications are also given on the
initial set of protocols which will likely be developed in this osi
reference model.

%A H. Zimmermann
%A J. -S. Banino
%A A. Caristan
%A M. Guillemont
%A G. Morisset
%T Basic Concepts for the Support of Distributed Systems: The
Chorus Approach
%J 2nd International Conference on Distributed Computing Systems
%I IEEE
%C Paris, France
%D April 1981
%P 60-66
%K
%O Distributed Systems Structure

%A Tony Zingale
%T Distributed Processing with iAPX 186 Microprocessor Systems
%J National Computer Conference \(em Proceedings
%I AFIPS
%V 51
%D 1982
%P 59-65
%K <Sales pitch>

%A Michael D. Zisman
%T Use of production systems for modeling asynchronous, concurrent
processes
%E D. A. Waterman
%E Frederick Hayes-Roth
%B Pattern-Directed Inference Systems
%P 53-68
%I Academic Press
%D 1978

%A Dieter Zobel
%T The deadlock problem: a classifying bibliography
%J Operating Systems Review
%V 17
%N 4
%D October 1983
%P 6-15

%A Glenn Zorpette
%T Computers that are `never' down
%J IEEE Spectrum
%V 22
%N 4
%D April 1985
%P 46-54
%K Survey, fault-tolerance, coupling, avionics, space borne, ESS, iAPX-432

%A Willy Zwaenepoel
%T Implementation and Performance of Pipes in the V-System
%J Proceedings of the 5th International Conference on Distributed
Computing Systems
%I IEEE Computer Society
%C Denver, Colorado
%D May 1985
%K Interprocess communication, pipe server,
%P 99-106