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Re: IA64 timings

Dear Clint,

> Dan,
> Are you still under NDA on the IA64?  If not, do you have MKL numbers for
> this machine?

As far as I know, the NDA situation hasn't changed, but I would hope that if
we talk to Intel then they should allow us a little freedom - perhaps we have
been taking a rather too litteral stance on our NDA.

> You asked a while back whether anyone has gotten any decent results on this
> machine.  Well, I finally have.  I'm getting roughly 70% of theoretical
> peak now.  On the 666Mhz Itanium that Compaq has at their testdrive, the best
> time I've seen on a full DGEMM is around 1845Mflop.  I include more complete
> timings below.  The performance could probably be tweaked further, but
> this will be good enough until after the release.

I only succeeded in building ATLAS with gcc, which gave reasonable, but not
great performance.

ATLAS breaks SGI's C complier - I am still waiting for an updated version.
As an interim measure, please can I have a copy of your binaries?

Also which compiler did you use - I guess it was Digital's ?

> I'm too tired to do the other precisions, but initial timings seem to indicate
> we will break 2Gflop for single . . .

  Is not the therotical peak for singles:  2MMX x 4FPU x 666MHz = 5333 Mflops?


Dr. Daniel Kidger                               | E: d.kidger@man.ac.uk
High Performance Computing Group                | W: www.csar.cfs.ac.uk
Manchester Computing, University of Manchester, | T:   +44 161 275 7038
Manchester, M13 9PL, United Kingdom.            | F:   +44 161 275 6800
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